Indium phosphide substrate and semiconductor epitaxial wafer

Abstract

An indium phosphide substrate with a diameter of 50 mm or more has a waviness Wq of less than 200 nm on the entire substrate surface excluding the edge portion. The waviness Wq of the entire substrate surface excluding the edge portion is measured in the following order (1) to (2). (1) The area within 5 mm from the outer periphery to the center is defined as the "edge portion". The entire wafer surface excluding the area within 5 mm from the outer periphery to the center is defined as the "substrate surface excluding the edge portion". (2) The waviness Wq is measured using the white interferometry function of a laser microscope. Taking the center of the substrate surface in the short dimension direction of a range of 1 mm × 40 mm as the reference line, 20 lines with a spacing of 4.5 μm are set as a measurement interval. The waviness of the 10 surrounding lines that move parallel to the short dimension direction and the total of 11 lines of the reference line spanning 40 mm in the long dimension direction is calculated. The average value of these values ​​is taken as the waviness Wq.

Description

Technical Field

[0001] This invention relates to an indium phosphide substrate and a semiconductor epitaxial wafer. Background Technology

[0002] Indium phosphide (InP) is a group III-V compound semiconductor material composed of group III indium (In) and group V phosphorus (P). As a semiconductor material, it possesses the following characteristics: a band gap of 1.35 eV and an electron mobility of ~5400 cm⁻¹. 2 At a high electric field, its electron mobility is higher than that of other common semiconductor materials such as silicon and gallium arsenide (GaAs) by / V·s. Furthermore, it possesses the following characteristics: its stable crystal structure at room temperature and pressure is a cubic zincblende type structure, and its lattice constant is larger than that of compound semiconductors such as gallium arsenide (GaAs) and gallium phosphide (GaP).

[0003] In silicon photonics, devices are fabricated by epitaxial growth of the InP substrate on an InP substrate, followed by bonding to a Si substrate. The bonding between the InP epitaxial layer and the Si device is crucial to the device's characteristics, and the surface waviness of the substrate is transferred to the epitaxial film surface, affecting bonding accuracy. Therefore, controlling the surface waviness of the InP epitaxial layer during bonding to the Si device is extremely important.

[0004] Patent Document 1 discloses a technique for mirror polishing InP wafers using a specified mirror polishing slurry on a rotating polishing disc with polishing cloth, thereby suppressing the surface waviness of the InP wafers.

[0005] Patent Document 2 discloses a method for grinding semiconductor wafers. The method involves adsorbing a semiconductor wafer onto the surface of a plurality of circumferentially rotatable disc-shaped chucks, rotating a disc-shaped grinding wheel at least the size of the circumference in the opposite direction to the rotation of the chucks, and spraying water from a nozzle located at the center of the grinding wheel, followed by the spraying of a drying gas. The method involves bringing the chucks and grinding wheel relatively close in the direction of rotation, maintaining a constant contact area between the wafers and the grinding wheel, and grinding multiple wafers together to a predetermined thickness. In this technique, by bringing the chucks and grinding wheel relatively close in the direction of rotation, spraying water from a nozzle, followed by the spraying of a drying gas, and grinding the surfaces of multiple wafers together to a predetermined thickness, the waviness of the substrate is suppressed.

[0006] Patent document 3 discloses a method for polishing indium phosphide, characterized by using a mixture of a solution obtained by dissolving bromine in methanol and an aqueous solution of silica gel for polishing. Furthermore, by adjusting this mixture to polish the substrate, the waviness of the substrate caused by etching is suppressed.

[0007] Existing technical documents Patent documents Patent Document 1: Japanese Patent Publication No. 07-027881 Patent Document 2: Japanese Patent No. 3316939 Patent Document 3: Japanese Patent Application Publication No. 58-145604 Summary of the Invention

[0008] The problem that the invention aims to solve As mentioned above, when an InP epitaxial layer is grown on an InP substrate and then bonded to a Si substrate to form a device, the bonding between the InP epitaxial layer and the Si device is extremely important for the device's characteristics. The surface waviness of the substrate is also transmitted to the surface of the epitaxially grown film, affecting the bonding accuracy. Therefore, when using an InP substrate with a large overall surface waviness for epitaxial growth, there is a problem that bonding may not be successful.

[0009] The technologies disclosed in Patent Documents 1 and 2 suppress the waviness of the substrate, but do not disclose the extent to which the waviness is suppressed throughout the entire substrate.

[0010] Furthermore, the technology disclosed in Patent Document 3 for suppressing substrate waviness caused by etching focuses on localized waviness of the substrate and relates to techniques for suppressing said localized waviness. Thus, Patent Document 3 does not disclose a technique for suppressing waviness across the entire substrate.

[0011] The present invention was made to solve the technical problems described above, and its purpose is to provide an indium phosphide substrate and a semiconductor epitaxial wafer with suppressed surface waviness.

[0012] Solution for solving the problem The above-mentioned technical problems are solved by specific embodiments of the present invention as described below.

[0013] (1) An indium phosphide substrate having a diameter of 50 mm or more, and the overall waviness Wq of the substrate surface except for the edge portion being less than 200 nm.

[0014] (2) The indium phosphide substrate according to (1), wherein the overall waviness Wq of the substrate surface except for the edge portion is 100 to 200 nm.

[0015] (3) The indium phosphide substrate according to (1) or (2), wherein the diameter is 50 to 150 mm.

[0016] (4) A semiconductor epitaxial wafer having an indium phosphide substrate as described in any one of (1) to (3) and an epitaxial crystal layer disposed on the main surface of the indium phosphide substrate.

[0017] Invention Effects According to embodiments of the present invention, an indium phosphide substrate and a semiconductor epitaxial wafer with suppressed surface waviness can be provided. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the surface of an indium phosphide substrate according to an embodiment of the present invention.

[0019] Figure 2 This is a schematic diagram of a wafer surface used to illustrate the method for calculating waviness Wq. Detailed Implementation

[0020] Next, specific embodiments of the present invention will be described in detail with reference to the accompanying drawings. It should be understood that the present invention is not limited to the following embodiments, and appropriate design changes and modifications can be made based on the ordinary knowledge of those skilled in the art without departing from the spirit of the present invention.

[0021] [Indium phosphide substrate] The structure of the indium phosphide substrate in this embodiment will be described below.

[0022] The indium phosphide (InP) substrate of this embodiment includes: a substrate surface (main surface), a substrate back surface, and an edge portion. The edge portion may also have: an orientation plane (OF) indicating the orientation of the crystal and an index plane (IF) for distinguishing the main surface and the back surface of the substrate.

[0023] The main surface of the indium phosphide substrate can be designated as the surface for forming an epitaxial crystal layer. The surface for forming an epitaxial crystal layer refers to the surface on which epitaxial growth is actually performed when the indium phosphide substrate of this embodiment is used as a substrate for epitaxial growth in order to form a semiconductor device structure.

[0024] The main surface of the indium phosphide substrate is formed to have a diameter of 50 mm or more. Alternatively, the diameter of the main surface of the indium phosphide substrate can be 50–150 mm. The planar shape of the indium phosphide substrate can be circular, or it can be a rectangle such as a quadrilateral.

[0025] The thickness of the indium phosphide substrate is not particularly limited, but is preferably 300 to 900 μm, and more preferably 300 to 700 μm. Especially when the diameter (aperture) of the indium phosphide substrate is large, if the thickness of the indium phosphide substrate is less than 300 μm, it may crack, and if the thickness of the indium phosphide substrate exceeds 900 μm, it may sometimes cause waste of the parent material crystals.

[0026] In this embodiment, the indium phosphide substrate can have a carrier concentration of 1×10⁻⁶. 16 cm －3 Above and 1×10 19 cm －3 The following methods include Zn (zinc) as a dopant (impurity), and the carrier concentration can also be 1×10⁻⁶. 16 cm －3 Above and 1×10 19 cm －3 The following methods include S (sulfur) as a dopant (impurity), and can also be used with a carrier concentration of 1×10 16 cm －3 Above and 1×10 19 cm －3 The following methods include Sn (tin) as a dopant (impurity), and can also be expressed as having a resistivity of 1×10⁻⁶. 5 Ωcm or more and 1×10 8 The following types contain Fe (iron) as a dopant (impurity) and have a diameter of less than Ωcm.

[0027] Figure 1 The diagram shows a schematic representation of the surface of an indium phosphide substrate according to an embodiment of the present invention. The indium phosphide substrate is formed in a generally disk-shaped manner and has OF and IF. It should be noted that... Figure 1 This drawing is for understanding the edge portion of an indium phosphide substrate in embodiments of the present invention. The indium phosphide substrate in embodiments of the present invention is not limited to such a shape. In particular, it may also lack OF and IF.

[0028] In embodiments of the present invention, the waviness Wq of the indium phosphide substrate surface, excluding the edge portion, is controlled to be below 200 nm. Specifically, in this invention, the region within approximately 5 mm from the outer periphery to the center of the wafer, excluding the roll-off effect, is defined as the "edge portion," and the entire wafer surface excluding the roll-off effect, excluding the region within 5 mm from the outer periphery to the center, is defined as the "entire substrate surface excluding the edge portion." That is, in this invention, "entire substrate surface excluding the edge portion" refers to... Figure 1 The circular area in the center of the "wrinkle measurement area" is shown in the diagram.

[0029] Since the wafer is ground simultaneously across its entire surface, the edge portion (the area within approximately 5 mm from the outer periphery towards the center) that would roll off due to the grinding process is excluded. The waviness of the central portion is measured to represent the overall wafer. Furthermore, waviness is periodic and can therefore be considered constant and independent of aperture.

[0030] In this invention, the "wrinkle Wq" of the entire substrate surface excluding the edges is the "root mean square wrinkle" as specified in JIS B 0601:2013. By measuring the wrinkle Wq, the average value of the wrinkle of the entire substrate surface excluding the edges can be quantified.

[0031] The overall waviness Wq of the indium phosphide substrate surface, excluding the edges, can be measured using the white interferometry function of a VKX-3000 laser microscope manufactured by KEYENCE Corporation. When measuring the overall waviness Wq of the indium phosphide substrate surface, excluding the edges, a 10x interferometric lens is used. The waviness (Wq: root mean square waviness) curve is measured as a profile curve of approximately 1mm × 40mm, obtained with the center of the wafer as the center of the measurement range. The waviness is calculated using a cutoff wavelength λc = 25mm. In calculating the waviness Wq, as follows... Figure 2 As shown, using the center of the substrate surface in the short dimension direction, covering an area of ​​approximately 1 mm × 40 mm, as the reference line, 20 lines with an interval of approximately 4.5 μm (the basic interval specified by the VKX-3000 laser microscope) were set as a measurement interval (approximately 4.5 μm × 20 lines = approximately 90 μm interval). The waviness of the 10 surrounding lines that moved parallel to the short dimension direction and the reference line, totaling 11 lines, spanning 40 mm in the long dimension direction, was calculated, and their average value was taken as Wq. It should be noted that the average value was automatically measured by the white interferometry function of the VKX-3000 laser microscope manufactured by KEYENCE Corporation.

[0032] To minimize the effects of thermal expansion, the measurements were conducted in a clean room with a controlled temperature of 22±5℃. It should be noted that the various settings for the white interferometry function of the VKX-3000 laser microscope are as follows.

[0033] • Tilt correction: Automatic.

[0034] • DCL / BCL: None.

[0035] • Measurement category: Waviness.

[0036] • Cutoff wavelength: λs and λf are not set. λc is 25mm.

[0037] • Correction of terminal effect: Effective.

[0038] • Double Gaussian: Closed.

[0039] Stylus mode: Off.

[0040] • Number of reference wavelengths: 1.

[0041] • Number of outlines: 11.

[0042] Since the wafer is ground simultaneously across its entire surface, there is no in-plane positional dependence. Therefore, evaluating the waviness profile of the aforementioned portion represents the overall waviness of the wafer required for the bonding process. Furthermore, the waviness is periodic and can therefore be considered fixed, independent of aperture.

[0043] If the overall waviness Wq of the indium phosphide substrate surface, excluding the edges, is 200 nm or less, then an indium phosphide substrate with reduced surface waviness after epitaxial growth can be provided, and adhesion defects caused by waviness are well suppressed even when bonded to a Si substrate including Si devices. The overall waviness Wq of the indium phosphide substrate surface, excluding the edges, is preferably 180 nm or less, more preferably 150 nm or less. Furthermore, the lower limit of the waviness Wq is not particularly limited, and Wq can be 100 to 200 nm.

[0044] [Indium phosphide substrate manufacturing method] Next, the manufacturing method of the indium phosphide substrate according to an embodiment of the present invention will be described.

[0045] As a method for manufacturing indium phosphide substrates, firstly, indium phosphide ingots are produced using known methods.

[0046] Next, the ingot of indium phosphide is ground to form a cylinder. At this time, an orientation plane (OF) and an indicator plane (IF) can also be formed at specified positions on the outer periphery of the wafer.

[0047] Next, wafers with a main face and a back face are cut from the ground indium phosphide ingot. At this time, the crystal ends of the indium phosphide ingot are cut along the specified crystal plane using a wire saw or the like, and multiple wafers are cut out with a thickness of 750 to 850 μm.

[0048] In the wafer cutting process, it is preferable to continuously feed new wires while reciprocating the steel wire in the horizontal direction, and to move the worktable carrying the ingot of indium phosphide toward the steel wire in the vertical direction.

[0049] The cutting conditions for an ingot using a wire saw are shown below.

[0050] • New wire supply speed: 10-60m / minute.

[0051] • Reciprocating speed of the steel wire: 300-350 m / min.

[0052] • Vertical movement speed of the worktable carrying indium phosphide ingots: 200-400 μm / min.

[0053] • Abrasive management for wire saws: Assuming the use of abrasive GC#1200 and cutting oil PS-LP-500D, the abrasive should be managed to achieve a viscosity of 300–400 mPa·s at a rotor shaft rotation speed of 60 rpm. The viscosity can be measured using a TVB-10 viscometer manufactured by Toki Sangyo Co., Ltd.

[0054] Next, in order to remove the processing-induced altered layer generated during the cutting process using a wire saw, the cut wafer is subjected to double-sided etching (single-pass etching) using a prescribed etching solution. The wafer can be etched by immersing the entire wafer in the etching solution. As the etching solution, a mixture of 85% by mass aqueous phosphoric acid and 30% by mass hydrogen peroxide is preferably used to etch a total thickness of 5 to 15 μm from both sides.

[0055] Next, the outer periphery of the wafer is chamfered, with a diameter of 50mm or more. After chamfering, both sides of the wafer are coarsely ground. This coarse grinding process, also known as lapping, involves grinding with a specified abrasive material to remove surface irregularities while maintaining the flatness of the wafer. Here, during the cutting process using a wire saw, waviness is generated throughout the wafer due to wire deviation. The inventors have discovered that to remove this waviness, polishing after slicing (the process of cutting the wafer from the ingot) is necessary. Specifically, a polishing process of 100g / cm² is required. 2 The pressure applied to the wafer's surface and back surfaces is used to remove a total thickness of 100 μm or more through polishing. It should be noted that, to increase the polishing amount, it is preferable to increase the wafer thickness during slicing accordingly.

[0056] Next, the wafer is etched on both sides (secondary etching) using a prescribed etching solution. The wafer can be etched by immersing the entire wafer in the etching solution. As the etching solution, a mixed solution of 85% by mass aqueous phosphoric acid, 30% by mass hydrogen peroxide, and ultrapure water is preferably used to etch a total thickness of 7 to 15 μm from both sides.

[0057] Next, both sides of the wafer are polished. This process removes any waviness that was not completely removed in the polishing process described above. From a production point of view, it is preferable to polish multiple wafers simultaneously on both sides. To uniformly remove waviness in-plane across all wafers being polished simultaneously, sufficient polishing slurry must be supplied to the wafers from multiple slurry supply ports during the polishing of both sides using an upper and lower plate, ensuring that the polishing pads on both plates are fully permeated by the polishing slurry. Specifically, this is achieved by supplying 0.07 mL / min·cm² per unit area of ​​the upper or lower plate. 2 The above-mentioned flow rate of polishing slurry enables uniform polishing of both sides of the wafer. As a result, waviness that was not completely removed during the polishing process can be removed. Thus, the overall waviness Wq of the substrate surface, excluding the edges, can be controlled to below 200 nm.

[0058] Next, the main surface of the wafer is polished using polishing materials for mirror polishing to achieve a mirror finish.

[0059] Next, cleaning is performed to manufacture the indium phosphide substrate according to the embodiment of the present invention. Alternatively, after the above-described mirror finishing, etching, mirror polishing, cleaning, etc., can be performed to manufacture the indium phosphide substrate.

[0060] [Semiconductor epitaxial wafer] Semiconductor thin films can be epitaxially grown on the main surface of the indium phosphide substrate according to embodiments of the present invention using known methods, thereby forming an epitaxial crystal layer and fabricating a semiconductor epitaxial wafer. As an example of such epitaxial growth, a HEMT (High Electron Mobility Transistor) structure can be formed by epitaxially growing an InAlAs buffer layer, an InGaAs channel layer, an InAlAs spacer layer, and an InP electron supply layer on the main surface of the indium phosphide substrate. In fabricating a semiconductor epitaxial wafer with such a HEMT structure, generally, the mirror-finished indium phosphide substrate is etched using an etchant such as sulfuric acid / hydrogen peroxide to remove impurities such as silicon (Si) adhering to the substrate surface. With the back side of the etched indium phosphide substrate in contact with a substrate and supported, an epitaxial crystal layer is formed on the main surface of the indium phosphide substrate using molecular beam epitaxy (MBE) or metal-organic chemical vapor deposition (MOCVD).

[0061] The semiconductor epitaxial wafer of the present invention is fabricated using an indium phosphide substrate of the present invention, as described above, in which the overall surface waviness of the substrate is suppressed. Therefore, the surface waviness after epitaxial growth is reduced, and even when bonded to a Si substrate including Si devices, poor adhesion caused by the waviness is well suppressed.

[0062] Example The following are embodiments provided to better understand the present invention and its advantages, but the present invention is not limited to these embodiments.

[0063] (Examples 1 and 2) Examples 1 and 2 are prepared as described below.

[0064] First, prepare ingots of indium phosphide.

[0065] Next, the indium phosphide ingot is ground to form a cylinder. At this time, an orientation plane (OF) and an indicator plane (IF) are formed at predetermined positions on the outer periphery of the wafer.

[0066] Next, wafers with a main face and a back face are cut from the ground indium phosphide ingot. At this time, the crystal ends of the indium phosphide ingot are cut along the specified crystal plane using a wire saw or the like, and multiple wafers are cut out with a thickness of 0.84 mm.

[0067] In the wafer cutting process, a new wire is continuously fed while the wire is reciprocated horizontally, and the worktable carrying the ingot of indium phosphide is moved vertically toward the wire.

[0068] The cutting conditions for an ingot using a wire saw are shown below.

[0069] • New wire supply speed: 10-60m / minute.

[0070] • Reciprocating speed of the steel wire: 320m / minute.

[0071] • Vertical movement speed of the worktable carrying indium phosphide ingot: 330 μm / min.

[0072] • Abrasive management for wire saws: Assuming the use of abrasive GC#1200 and cutting oil PS-LP-500D, the abrasive should be managed to achieve a viscosity of 300–400 mPa·s at a rotor shaft rotation speed of 60 rpm. The viscosity can be measured using a TVB-10 viscometer manufactured by Toki Sangyo Co., Ltd.

[0073] Next, in order to remove the processing-induced altered layer generated during the cutting process using a wire saw, the cut wafer was etched from both sides for a total thickness of 15 μm (one-time etching) using a mixed solution of 85% by mass phosphoric acid aqueous solution and 30% by mass hydrogen peroxide. The wafer was etched by immersing the entire wafer in the etching solution.

[0074] Next, the outer periphery of the wafer is chamfered, with a diameter of at least 50mm. After chamfering, both sides of the wafer are rough ground (polished). Specifically, 150g / cm² is applied to one side. 2 The pressure is applied to the back of the wafer to remove a total thickness of 120 μm through polishing.

[0075] Next, the wafer was etched from both sides to a total thickness of 7 μm (double etching) using a mixed solution of 85% by mass phosphoric acid aqueous solution, 30% by mass hydrogen peroxide, and ultrapure water. The wafer was etched by immersing the entire wafer in the etching solution.

[0076] Next, both sides of the wafer are polished. This process removes any waviness that was not completely removed in the polishing process described above. In this double-sided polishing process, when polishing both sides of the wafer using an upper and lower plate, sufficient polishing slurry is supplied to the wafer from multiple slurry supply ports in such a way that the polishing pads provided on the upper and lower plates are fully permeated by the polishing slurry. Specifically, the supply rate is set to 0.072 mL / min·cm² per unit area of ​​the upper or lower plate. 2 The flow rate (total volume of polishing slurry) of the polishing slurry. It should be noted that the areas of the upper and lower plates used are 5608 cm². 2 .

[0077] Next, the main surface of the wafer is polished using polishing materials for mirror polishing to achieve a mirror finish.

[0078] Next, it is cleaned, thereby producing a product with the characteristics of... Figure 1 The sample of an indium phosphide substrate with the shape shown and a diameter of 76.2 mm.

[0079] (Comparative Examples 1-5) In Comparative Examples 1 to 5, a total thickness of 40 μm was removed from both the front and back surfaces of the wafer during the polishing process; and in the double-sided polishing process after secondary etching, the total amount of polishing fluid was set to 0.065 mL / min·cm. 2 In addition, under the same conditions as in Examples 1 and 2, a product with the following characteristics was produced. Figure 1 The sample of an indium phosphide substrate with the shape shown and a diameter of 76.2 mm.

[0080] (Evaluation of ripple Wq) For the indium phosphide substrate samples of Examples 1, 2 and Comparative Examples 1 to 5, the overall waviness Wq of the substrate surface excluding the edge portion was measured by the following method.

[0081] That is, for Examples 1 and 2 and Comparative Examples 1 to 5, having the following characteristics... Figure 1 The indium phosphide substrates with diameters of 76.2 mm for both IF and OF are shown. The area within approximately 5 mm from the outer periphery to the center is defined as the "edge". The entire wafer surface excluding the area within 5 mm from the outer periphery to the center, excluding the effect of roll-off, is defined as the "substrate surface excluding the edge".

[0082] Next, the waviness Wq of the waviness measurement area was measured using the white interferometry function of a VKX-3000 laser microscope manufactured by KEYENCE Corporation. During the measurement, a 10x interferometric lens was used to measure a waviness curve over an area of ​​approximately 1mm × 40mm, with the center of the wafer as the center of the measurement range. The waviness was calculated using a cutoff wavelength λc = 25mm. When calculating the waviness Wq, as follows... Figure 2 As shown, using the center of the substrate surface in the short dimension direction, covering an area of ​​approximately 1 mm × 40 mm, as the reference line, 20 lines with an interval of approximately 4.5 μm (the basic interval specified by the VKX-3000 laser microscope) were set as a measurement interval (approximately 4.5 μm × 20 lines = approximately 90 μm interval). The waviness of the 10 surrounding lines that moved parallel to the short dimension direction and the reference line, totaling 11 lines, spanning 40 mm in the long dimension direction, was calculated, and their average value was taken as Wq. It should be noted that the average value was automatically measured by the white interferometry function of the VKX-3000 laser microscope manufactured by KEYENCE Corporation.

[0083] To minimize the effects of thermal expansion, the measurements were conducted in a clean room with a controlled temperature of 22±5℃. It should be noted that the various settings for the white interferometry function of the VKX-3000 laser microscope are as follows.

[0084] • Tilt correction: Automatic.

[0085] • DCL / BCL: None.

[0086] • Measurement category: Waviness.

[0087] • Cutoff wavelength: λs and λf are not set. λc is 25mm.

[0088] • Correction of terminal effect: Effective.

[0089] • Double Gauss: Closed.

[0090] • Stylus mode: Off.

[0091] • Number of reference wavelengths: 1.

[0092] • Number of outlines: 11.

[0093] The manufacturing conditions and evaluation results described above are shown in Table 1. (Inspection) In Examples 1 and 2, the overall waviness Wq of the substrate surface, excluding the edge portion, is below 200 nm, and the surface waviness is well suppressed.

[0094] In contrast, the overall waviness Wq of the substrate surface of Comparative Examples 1 to 5, excluding the edge portion, all exceeded 200 nm.

[0095] It should be noted that in both Examples 1 and 2, the total polishing depth of the wafer's front and back surfaces is 120 μm, and the total amount of polishing slurry on both surfaces is also 0.072 mL / min·cm. 2 However, the overall waviness Wq of the substrate surface, excluding the edges, were different values ​​of 118.1 nm and 178.9 nm, respectively. Furthermore, in Comparative Examples 1-5, the total polishing depth of the wafer's front and back surfaces was also 40 μm, and the total amount of polishing slurry on both sides of the wafer was also 0.065 mL / min·cm. 2 However, the overall waviness Wq of the substrate surface, excluding the edges, varies between 228.8 and 306.1 nm. This can be attributed to the different waviness after cutting due to uneven temperatures and other factors during wire sawing.

Claims

1. An indium phosphide substrate having a diameter of 50 mm or more, The overall waviness Wq of the substrate surface, excluding the edges, is below 200 nm. The waviness Wq of the entire substrate surface, excluding the edge portion, is measured in the following order 1 to 2. 1: For indium phosphide substrates, the area within 5mm from the outer periphery to the center is defined as the "edge area", and the entire wafer surface excluding the area within 5mm from the outer periphery to the center is defined as the "substrate surface excluding the edge area". 2: Next, the white interferometry function of a laser microscope is used to measure the waviness Wq. During the measurement, a 10x interferometer lens is used to measure the waviness curve of a 1mm × 40mm area with the center of the wafer as the center of the measurement range. The waviness is calculated by setting the cutoff wavelength λc = 25mm. When calculating the waviness Wq, the center of the substrate surface in the short dimension direction of the 1mm × 40mm area is used as the reference line. 20 lines with a 4.5μm interval are set as a measurement interval. The waviness of the 10 surrounding lines that move parallel to the short dimension direction and the reference line, a total of 11 lines, spanning 40mm in the long dimension direction is calculated. The average value of these is taken as the waviness Wq.

2. The indium phosphide substrate according to claim 1, wherein, The overall waviness Wq of the substrate surface, excluding the edges, is 100–200 nm.

3. The indium phosphide substrate according to claim 1 or 2, wherein, The diameter is 50-150 mm.

4. A semiconductor epitaxial wafer having an indium phosphide substrate as described in claim 1 or 2 and an epitaxial crystal layer disposed on the main surface of the indium phosphide substrate.

5. A semiconductor epitaxial wafer having an indium phosphide substrate as described in claim 3 and an epitaxial crystal layer disposed on the main surface of the indium phosphide substrate.

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