Method for improving large particle anomalies after silicon polished wafer epitaxy, silicon polished wafer

By optimizing the chamfering and acid etching polishing processes of silicon wafers, the problem of large particle abnormalities after epitaxy of silicon wafers has been solved, significantly reducing large particle defects on the epitaxial surface, improving the yield of epitaxial wafers and the reliability of devices, and making it suitable for the manufacture of integrated circuits and power semiconductor devices.

CN122185042APending Publication Date: 2026-06-12SHANGHAI SEMICON WAFER TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SHANGHAI SEMICON WAFER TECH CO LTD
Filing Date
2026-04-24
Publication Date
2026-06-12

AI Technical Summary

Technical Problem

Existing technologies struggle to effectively and stably eliminate large particle anomalies after epitaxy of silicon polished wafers, especially for polycrystalline silicon particles with surface sizes greater than 0.5 μm, while ensuring uniformity of epitaxial layer thickness and crystal quality.

Method used

By optimizing the chamfering, acid etching, and chamfering surface polishing processes of silicon wafers, using chamfering grinding wheels of 2000# to 3000#, controlling the grinding wheel speed to ≥8000rpm, and the silicon wafer processing speed to ≤25mm/s, the acid etching removal amount is not less than 28μm, and a two-step polishing method is adopted, with a total polishing time of more than 100 seconds, thereby improving the surface quality of the chamfered surface.

Benefits of technology

It significantly reduces the number of large particle defects on the epitaxial surface, reduces surface roughness and defect density, effectively suppresses the generation and shedding of polycrystalline silicon grains, improves the yield of epitaxial wafers and device reliability, reduces costs and does not change the existing process flow.

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Abstract

This invention discloses a method for improving large particle abnormalities after epitaxy of silicon polished wafers, belonging to the field of semiconductor silicon wafer processing technology. The method includes: chamfering the polished silicon wafer using a chamfering wheel with an abrasive grain size of 2000#-3000#, controlling the wheel speed ≥8000rpm and the wafer processing speed ≤25mm / s; acid etching the chamfered silicon wafer, removing ≥28μm of silicon; using a two-step polishing method to polish the chamfered surface of the acid-etched silicon wafer, the first step being edge polishing that balances removal amount and quality, and the second step focusing on chamfered surface quality, with the total edge polishing time controlled to be greater than 100 seconds; subsequently, conventional surface polishing and cleaning are performed to produce a silicon polished wafer for epitaxy. This invention suppresses the generation and shedding of polycrystalline silicon grains from the chamfered surface of the silicon polished wafer onto the epitaxial surface during epitaxy, significantly eliminating or even reducing large particle abnormalities after epitaxy without adding additional equipment or changing the basic process flow, thereby improving product yield and reliability.
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