Multilayer electronic component

Abstract

The present disclosure provides a multilayer electronic component including a main body including a dielectric layer and internal electrodes alternately disposed with the dielectric layer, and an external electrode disposed on the main body, wherein the internal electrode includes a plurality of electrode portions and a plurality of disconnected portions, and a filler including Y, Si, and O is disposed in at least one of the disconnected portions, and the dielectric layer includes BaTiO3 and (Ba 1‑x Ca x )TiO3, wherein x can be greater than 0 and less than 1.

Description

[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2024-0185090, filed on December 12, 2024, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] This disclosure relates to a multilayer electronic component. Background Technology

[0003] Multilayer ceramic capacitors (MLCCs, a type of multilayer electronic component) are chip capacitors that can be mounted on printed circuit boards of various electronic products, such as imaging devices (including liquid crystal displays (LCDs) or plasma display panels (PDPs)), computers, smartphones, or mobile phones, for charging or discharging from them.

[0004] Such multilayer ceramic capacitors have small size, achieve high capacitance and are easy to mount on printed circuit boards, so they can be used as components in a variety of electronic devices.

[0005] In the manufacturing process of multilayer ceramic capacitors, the internal electrodes are sintered before the dielectric layer. During this process, due to the shrinkage of the internal electrodes, the areas originally filled by them become voids and remain as defects, while stress concentrates in the portions connecting the remaining internal electrodes. This can lead to crack initiation or propagation, causing the internal electrodes to break. This breakage of the internal electrodes may become more severe as the internal electrodes become thinner, potentially becoming a major cause of performance degradation in multilayer ceramic capacitors. Furthermore, excessive breakage of the internal electrodes can create pores within the substrate, which may lead to excessive sintering shrinkage of the dielectric layer, and moisture may easily penetrate into some of these pores, making the internal electrodes susceptible to oxidation.

[0006] Therefore, there is a need for a multilayer electronic component that improves reliability and maintains electrical characteristics by filling the gaps in the internal electrodes. Summary of the Invention

[0007] One aspect of this disclosure is to provide a multilayer electronic component with excellent reliability.

[0008] One aspect of this disclosure is to provide a multilayer electronic component that inhibits the initiation and propagation of cracks.

[0009] One aspect of this disclosure is to provide a multilayer electronic component with excellent high-temperature stability and high-temperature reliability.

[0010] However, the various problems that this disclosure aims to solve are not limited to those described above, and can be more readily understood in the process of describing specific embodiments of this disclosure.

[0011] According to one aspect of this disclosure, a multilayer electronic component includes: a body including a dielectric layer and inner electrodes alternately disposed with respect to the dielectric layer; and an outer electrode disposed on the body, wherein the inner electrode includes a plurality of electrode portions and a plurality of disconnect portions, and at least one of the plurality of disconnect portions is provided with a filler comprising Y, Si, and O, and the dielectric layer comprises BaTiO3 and (Ba 1-x Ca x TiO3, where x can be greater than 0 and less than 1. Attached Figure Description

[0012] The above and other aspects, features and advantages of this disclosure will become clearer from the following detailed embodiments, taken in conjunction with the accompanying drawings, in which: Figure 1 A perspective view of a multilayer electronic assembly according to an embodiment of the present disclosure is shown schematically; Figure 2 Schematic illustration along Figure 1 A cross-sectional view taken from line I-I' in the diagram; Figure 3 Schematic illustration along Figure 1 A cross-sectional view taken from line II-II' in the diagram; Figure 4 The main body of the decomposition is shown schematically; Figure 5 yes Figure 3 A magnified view of region K1; Figure 6 An enlarged view of the internal electrodes is shown schematically; Figure 7 These are SEM scanned images of the internal electrodes according to embodiments of the present disclosure; Figure 8 It was analyzed using scanning electron microscopy-energy dispersive spectroscopy (SEM-EDS). Figure 7 An image showing the distribution of Ni elements in the region; Figure 9 It was analyzed using SEM-EDS. Figure 7 An image showing the distribution of Y elements in a given region; Figure 10 It was analyzed using SEM-EDS. Figure 7 An image showing the distribution of O elements in the region; and Figure 11 It was analyzed using SEM-EDS. Figure 7 Image of the distribution of Si elements in the region. Detailed Implementation

[0013] In the following description, embodiments of the present disclosure will be illustrated with reference to the accompanying drawings. However, the present disclosure may be exemplified in many different forms and should not be construed as being limited to the specific embodiments set forth herein. Rather, these embodiments are provided so that the present disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. Therefore, for clarity of description, the shapes and dimensions of elements in the drawings may be exaggerated, and elements indicated by the same reference numerals in the drawings are the same elements.

[0014] In the accompanying drawings, irrelevant descriptions will be omitted to clearly depict this disclosure, and thicknesses may be enlarged to clearly represent multiple layers and regions. The same reference numerals will be used to describe the same elements having the same function within the same concept. Throughout the specification, unless otherwise expressly stated, when an element is referred to as "comprising" or "including" another element, this means that the element may also include other elements, but does not exclude other elements.

[0015] In the accompanying drawings, the X direction can be defined as a first direction, a stacking direction, or a thickness direction; the Y direction can be defined as a second direction or a length direction; and the Z direction can be defined as a third direction or a width direction.

[0016] Multilayer electronic components Figure 1 A perspective view of a multilayer electronic assembly according to an embodiment of the present disclosure is shown schematically.

[0017] Figure 2 Schematic illustration along Figure 1 The cross-sectional view taken from line I-I' in the diagram.

[0018] Figure 3 Schematic illustration along Figure 1 The cross-sectional view taken from line II-II' in the diagram.

[0019] Figure 4 The main body of the decomposition is shown schematically.

[0020] Figure 5 yes Figure 3 A magnified view of region K1.

[0021] Figure 6 An enlarged view of the internal electrode is shown schematically.

[0022] In the following text, reference will be made to Figures 1 to 6A multilayer electronic assembly 100 according to embodiments of the present disclosure is described in detail. Furthermore, a multilayer ceramic capacitor (hereinafter referred to as "MLCC") will be described as an example of a multilayer electronic assembly, but the present disclosure is not limited thereto, and the present disclosure can also be applied to various multilayer electronic assemblies using ceramic materials, such as inductors, piezoelectric elements, varistors, thermistors, etc.

[0023] According to one aspect of this disclosure, a multilayer electronic assembly 100 includes: a body 110 including a dielectric layer 111 and inner electrodes 121 and 122 alternately disposed with respect to the dielectric layer 111; and outer electrodes 131 and 132 disposed on the body 110, wherein the inner electrodes 121 and 122 include a plurality of electrode portions Ep and a plurality of disconnect portions Cp, wherein at least one of the plurality of disconnect portions Cp may be provided with a filler Sp including Y, Si and O, and the dielectric layer 111 may include BaTiO3 and (Ba 1-x Ca x TiO3, where x can be greater than 0 and less than 1.

[0024] Because the sintering shrinkage behaviors of the inner electrodes 121 and 122 and the dielectric layer 111 differ during the sintering process, the inner electrodes 121 and 122 may break. Therefore, in addition to the electrode portion Ep, the inner electrodes 121 and 122 also include a break portion Cp. Typically, the break portion Cp of the inner electrode is formed by pores Pp, and the pores Pp may act as microcracks inside the body 110. This can cause crack initiation and propagation, leading to excessive shrinkage of the dielectric layer 111 and allowing moisture to easily penetrate into a portion of the pores Pp, making the inner electrodes 121 and 122 susceptible to oxidation.

[0025] According to embodiments of this disclosure, when a filler Sp comprising Y, Si and O is disposed in the disconnection portion Cp, excessive shrinkage of the dielectric layer 111 can be prevented, and moisture penetration can be prevented, thereby preventing oxidation of the inner electrodes 121 and 122.

[0026] Furthermore, when the materials and / or sintering conditions of the inner electrodes 121 and 122 are significantly changed in order to suppress the break Cp, incomplete sintering of the dielectric layer 111 may occur. However, according to embodiments of the present disclosure, the break Cp can be filled without significantly changing the sintering conditions.

[0027] Hereinafter, components included in a multilayer electronic assembly 100 according to some embodiments of the present disclosure will be described.

[0028] The body 110 may have alternating stacked dielectric layers 111 and internal electrodes 121 and 122.

[0029] Although the specific shape of the main body 110 is not particularly limited, however... Figure 1As shown, the body 110 may have a hexahedral shape or a shape similar to a hexahedron. Because the ceramic powder particles included in the body 110 shrink during the sintering process, the body 110 may not have a hexahedral shape with perfectly straight lines, but may have a roughly hexahedral shape.

[0030] The main body 110 may have a first surface 1 and a second surface 2 that are opposite to each other in a first direction, a third surface 3 and a fourth surface 4 that are connected to the first surface 1 and the second surface 2 and are opposite to each other in a second direction, and a fifth surface 5 and a sixth surface 6 that are connected to the first surface 1 and the second surface 2, connected to the third surface 3 and the fourth surface 4 and are opposite to each other in a third direction.

[0031] Since the edge regions of the dielectric layer 111 on which the inner electrodes 121 and 122 are not disposed overlap each other in the first direction, a step difference may be formed due to the thickness of the inner electrodes 121 and 122, such that the corners connecting the first surface 1 to the third surface 3 to the sixth surface 6 and / or the corners connecting the second surface 2 to the third surface 3 to the sixth surface 6 may have a shape that tapers towards the center of the body 110 in the first direction relative to the first surface 1 or the second surface 2. Optionally, through the shrinkage behavior during the sintering process of the body 110, the corners connecting the first surface 1 to the third surface 3, the fourth surface 4, the fifth surface 5 and the sixth surface 6 and / or the corners connecting the second surface 2 to the third surface 3, the fourth surface 4, the fifth surface 5 and the sixth surface 6 may have a shape that tapers towards the center of the body 110 in the first direction relative to the first surface 1 or the second surface 2. Optionally, in order to prevent chipping defects, the corners connecting the various surfaces of the body 110 to each other are rounded by performing additional processes, so the corners connecting the first surface 1 to the third surface 3 to the sixth surface 6 and / or the corners connecting the second surface 2 to the third surface 3 to the sixth surface 6 may have a rounded shape.

[0032] Furthermore, to suppress the step difference formed by the inner electrodes 121 and 122, the edge portions 114 and 115 can be formed as follows: after a ceramic green sheet on which the inner electrodes 121 and 122 are formed to form a laminate including the capacitor forming portion Ac, the laminate is cut to expose the inner electrodes 121 and 122 to the two side surfaces of the capacitor forming portion Ac in the third direction (width direction), and then a single dielectric layer or two or more dielectric layers are stacked on the two side surfaces of the capacitor forming portion Ac in the third direction (width direction). In this case, the portion connecting the first surface 1 to the fifth surface 5 and the sixth surface 6, and the portion connecting the second surface 2 to the fifth surface 5 and the sixth surface 6, may not have a contracted form.

[0033] The dielectric layer 111 may include BaTiO3 and (Ba 1-x Ca x )TiO3 (0 < x < 1).

[0034] BaTiO3 is a ferroelectric material with a high dielectric constant, a relatively small dissipation factor (DF), and excellent insulation resistance characteristics (RC) at room temperature. However, when the dielectric layer 111 includes only BaTiO3 as the main component, the Curie temperature (Tc) is about 125 °C, and the dielectric constant rapidly decreases when the temperature approaches 150 °C, making it difficult to meet the X8R characteristics (operating temperature range from -55 °C to 150 °C, with a capacitance deviation within ±15% within this temperature range) specified in the EIA (Electronic Industries Alliance) standard.

[0035] On the other hand, in order to achieve high-temperature characteristics, (Ba 1-x Ca x )TiO3 (0 < x < 1) (hereinafter referred to as "BCT") in which Ca is solid-solved is used as the matrix powder, and Ca 2+ is doped in the Ba site. Due to the eccentric displacement of Ca ions, the lattice energy is reduced, thereby improving the structural stability at high temperatures, and thus improving the capacitance temperature coefficient (TCC) at high temperatures. However, the dielectric constant of BCT changes greatly according to the AC electric field, and side effects such as a decrease in the RC value and an increase in DF may occur at room temperature.

[0036] Therefore, in the present disclosure, the dielectric layer 111 includes both BaTiO3 and (Ba 1-x Ca x )TiO3 (0 < x < 1), thereby meeting the X8R characteristics (operating temperature range from -55 °C to 150 °C, with a capacitance deviation within ±15% within this temperature range), while reducing the occurrence of side effects caused by the use of BCT.

[0037] In some embodiments, the dielectric layer 111 includes BaTiO3 and (Ba 1-x Ca x )TiO3 (0 < x < 1). Preferably, x may satisfy being greater than or equal to 0.025 and less than or equal to 0.2.

[0038] Therefore, the high-temperature characteristics can be further improved, and the occurrence of side effects caused by the use of BCT can be further reduced.

[0039] When x is less than 0.025, it may be difficult to ensure the high-temperature characteristics, and when x exceeds 0.2, there is a concern that the side effects caused by the use of BCT may increase.

[0040] In some embodiments, relative to BaTiO3 and (Ba 1-xCa x ) The total content of TiO3, the dielectric layer 111 may include (Ba 1-x Ca x )TiO3 at a content of not less than 10 mol% and not more than 95 mol%. Therefore, the high-temperature characteristics can be further improved, and the occurrence of side effects caused by using BCT can be further reduced.

[0041] When in the dielectric layer 111, the content of (Ba 1-x Ca x )TiO3 is less than 10 mol% relative to the total content of BaTiO3 and (Ba 1-x Ca x )TiO3, it may be difficult to ensure high-temperature characteristics, and when in the dielectric layer 111, the content of (Ba 1-x Ca x )TiO3 is greater than 95 mol% relative to the total content of BaTiO3 and (Ba 1-x Ca x )TiO3, there is a concern that the side effects caused by using BCT may increase.

[0042] The plurality of dielectric layers 111 forming the main body 110 may be in a sintered state, and adjacent dielectric layers 111 may be integrated with each other such that it is difficult to identify the boundary between adjacent dielectric layers 111 without using a scanning electron microscope (SEM). The number of stacked dielectric layers 111 is not particularly limited and can be determined by considering the size of the multilayer electronic component 100. For example, 400 or more dielectric layers 111 may be stacked to form the main body 110.

[0043] The dielectric layer 111 can be formed by the following method: manufacturing a ceramic slurry including ceramic powder particles, an organic solvent, and a binder, coating the slurry on a carrier film and drying it to prepare a ceramic green sheet, and then sintering the ceramic green sheet.

[0044] The ceramic powder particles can be obtained by mixing BaTiO3 powder particles and (Ba 1-x Ca x )TiO3 (0 < x < 1) powder particles. Therefore, the dielectric layer 111 can include BaTiO3 and (Ba 1-x Ca x )TiO3 (0 < x < 1) as the main components.

[0045] This disclosure is applicable to wafers of various sizes, from wafer size 0201 (length 0.2 mm, width 0.1 mm) to wafer size 5750 (length 5.7 mm, width 5.0 mm). Therefore, the average thickness td of the dielectric layer 111 is not particularly limited, but can be, for example, 30 μm. Furthermore, the average thickness td of the dielectric layer 111 can be arbitrarily set according to the desired characteristics or purpose.

[0046] Here, the average thickness td of the dielectric layer 111 represents the average dimension of the dielectric layer 111 disposed between the inner electrodes 121 and 122 in the first direction. The average thickness of the dielectric layer 111 can be measured by scanning an image of the cross-section of the body 110 in the first and second directions using a scanning electron microscope (SEM) at a magnification of 10,000x. More specifically, the average thickness td of a dielectric layer 111 can be an average value obtained by measuring the thickness of the dielectric layer 111 at multiple points (e.g., 30 equally spaced points in the second direction) and averaging them. The 30 equally spaced points can be specified in the capacitor forming section Ac, which will be described later. Furthermore, the average thickness td of the dielectric layer 111 can be further generalized by extending the average value measurement to 10 dielectric layers 111.

[0047] The main body 110 may include: a capacitor forming portion Ac disposed in the main body 110, and a capacitor formed in the capacitor forming portion Ac by including a first inner electrode 121 and a second inner electrode 122 that are set opposite to each other and a dielectric layer 111 is disposed therebetween; and covering portions 112 and 113 formed above and below the capacitor forming portion Ac in a first direction.

[0048] Furthermore, the capacitance forming section Ac is a part that contributes to the capacitance formation of the capacitor, and it can be formed by repeatedly stacking a plurality of first inner electrodes 121 and a plurality of second inner electrodes 122 with a dielectric layer 111 between them.

[0049] Cover portions 112 and 113 may include an upper cover portion 112 disposed above the capacitor forming portion Ac in a first direction and a lower cover portion 113 disposed below the capacitor forming portion Ac in a first direction.

[0050] The upper cover portion 112 and the lower cover portion 113 can be formed by stacking a single dielectric layer or two or more dielectric layers on the upper and lower surfaces of the capacitor forming portion Ac in the thickness direction, respectively, and the upper cover portion 112 and the lower cover portion 113 can be mainly used to prevent damage to the internal electrode due to physical stress and / or chemical stress.

[0051] The upper cover 112 and the lower cover 113 do not include internal electrodes and may include the same material as the dielectric layer 111.

[0052] In other words, the upper cover 112 and the lower cover 113 may include ceramic materials, such as barium titanate (BaTiO3) based ceramic materials.

[0053] This disclosure is applicable to wafers of various sizes, from wafer size 0201 (length 0.2 mm, width 0.1 mm) to wafer size 5750 (length 5.7 mm, width 5.0 mm). Therefore, the thickness of the covers 112 and 113 is not particularly limited. However, in order to more easily achieve miniaturization and high capacitance of the multilayer electronic component 100, the thickness tc of the covers 112 and 113 can be less than or equal to 800 μm.

[0054] The average thickness tc of the covers 112 and 113 can represent their dimensions in the first direction, and can be obtained by averaging the dimensions of the covers 112 and 113 in the first direction measured at five equally spaced points above or below the capacitor forming portion Ac.

[0055] Additionally, edge portions 114 and 115 may be provided on the side surface of the capacitor forming portion Ac.

[0056] Edge portions 114 and 115 may include a first edge portion 114 disposed on one side surface of the capacitor forming portion Ac in the third direction and a second edge portion 115 disposed on the other side surface of the capacitor forming portion Ac in the third direction. That is, edge portions 114 and 115 may be disposed on both side surfaces of the capacitor forming portion Ac in the width direction.

[0057] like Figure 3 As shown, the edges 114 and 115 can represent the area between the two ends of the first inner electrode 121 and the second inner electrode 122 in the width direction and the outer surface of the body 110 in a cross section cut in the width-thickness direction of the body 110.

[0058] Edges 114 and 115 are primarily used to prevent damage to the internal electrodes due to physical and / or chemical stress.

[0059] Edges 114 and 115 can be formed by applying conductive paste for forming internal electrodes 121 and 122 to the area of ​​the ceramic green sheet other than the area where edges 114 and 115 will be formed.

[0060] In addition, to suppress the step difference caused by the inner electrodes 121 and 122, the edge portions 114 and 115 can also be formed as follows: after a ceramic green sheet on which the inner electrodes 121 and 122 are formed to form a laminate including the capacitor forming portion Ac, the laminate is cut so that the inner electrodes 121 and 122 are exposed on the two side surfaces of the capacitor forming portion Ac in the third direction (width direction), and then a single dielectric layer or two or more dielectric layers are stacked on the two side surfaces of the capacitor forming portion Ac in the third direction (width direction).

[0061] This disclosure is applicable to sheets of various sizes, from sheet size 0201 (length 0.2 mm, width 0.1 mm) to sheet size 5750 (length 5.7 mm, width 5.0 mm). Therefore, the width of the edge portions 114 and 115 is not particularly limited. For example, the average width of the edge portions 114 and 115 may be less than or equal to 800 μm.

[0062] The average width of the edges 114 and 115 can represent the average size MW1 of the region of the inner electrodes 121 and 122 spaced apart from the fifth surface 5 in the third direction and the average size MW2 of the region of the inner electrodes 121 and 122 spaced apart from the sixth surface 6 in the third direction, and can be the average value of the size of the edges 114 and 115 in the third direction measured at 5 equally spaced points on the side surface of the capacitor forming part Ac.

[0063] Therefore, in some embodiments, each of the average size MW1 of the region of the inner electrodes 121 and 122 spaced apart from the fifth surface 5 in the third direction and the average size MW2 of the region of the inner electrodes 121 and 122 spaced apart from the sixth surface 6 in the third direction may be less than or equal to 800 μm.

[0064] The internal electrodes 121 and 122 may include a plurality of electrode portions Ep and a plurality of disconnect portions Cp, and at least one of the plurality of disconnect portions Cp may be provided with a filler Sp including Y, Si and O.

[0065] In the prior art, attempts have been made to fill the break Cp by including Dy-based filler in the break. However, with Dy-based filler, the following problem exists: because the deformation caused by temperature changes at high temperatures is large, it is difficult to ensure high-temperature properties.

[0066] On the other hand, in this disclosure, by providing a filler Sp including Y, Si and O in the disconnected portion Cp, the high-temperature characteristics can be further improved, thereby ensuring thermal stability.

[0067] In some embodiments, the filler comprising Y, Si and O may include at least one of Y2Si2O7 and Y2SiO5.

[0068] Table 1 below compares the Young's modulus and coefficient of thermal expansion (CTE) of Y2Si2O7 and Dy2Si2O7, which both have a crystal structure of the α-phase.

[0069] [Table 1]

[0070] Referring to Table 1 above, compared with the Dy-based oxide Dy2Si2O7 having the same crystal structure, the oxide Y2Si2O7 containing Y, Si, and O has a relatively small coefficient of thermal expansion. Therefore, when Y2Si2O7 is provided as the filler Sp in the disconnection portion Cp, the deformation caused by temperature changes can be reduced, the excessive shrinkage of the dielectric layer 111 can be prevented, the stress concentration phenomenon between the internal electrodes 121 and 122 and the dielectric layer 111 can be alleviated, and thermal fatigue can be reduced. Therefore, in order to ensure high-temperature characteristics, when the dielectric layer 111 includes both BaTiO3 and (Ba 1-x Ca x )TiO3 (0 < x < 1), if the filler Sp containing Y, Si, and O is provided in the disconnection portion Cp, the high-temperature characteristics can be further improved to ensure thermal stability.

[0071] In addition, the oxide Y2Si2O7 containing Y, Si, and O has a higher Young's modulus than the Dy-based oxide Dy2Si2O7. Therefore, when Y2Si2O7 is provided as the filler Sp in the disconnection portion Cp, the mechanical strength and durability of the multilayer electronic component 100 when used in a high-temperature environment can be improved, and excellent resistance to repeated thermal cycles can be obtained, and the possibility of thermal deformation and crack occurrence can be reduced.

[0072] In addition, the oxide containing Y, Si, and O has less deformation caused by stress, thereby reducing the interlayer stress and enabling stable interlayer bonding even at high temperatures. Materials with a higher Young's modulus have stronger resistance to physical stresses such as mechanical shock and vibration, making the application of such materials in extreme environments in fields such as national defense, aerospace, and automotive electronics advantageous.

[0073] Hereinafter, unless specifically defined, the filler in this disclosure refers to the filler Sp containing Y, Si, and O. In some embodiments, the filler of this disclosure does not include Dy2Si2O7.

[0074] In some embodiments, at least one of the plurality of disconnection portions Cp may include only the filler Sp and not include the pores Pp and the dielectric Dp described below. For example, as Figure 5 shown, in the region K1, all the disconnection portions Cp can be completely filled with the filler Sp. However, this disclosure is not limited to Figure 5 the shown case, and all the disconnection portions Cp do not have to be completely filled with the filler Sp.

[0075] Refer to Figure 6 , in some embodiments, the disconnection part Cp may include at least one of a filler Sp, pores Pp, and a dielectric Dp.

[0076] In addition, the pores Pp are empty spaces that can be filled with air and are parts that do not form a bonding force. The dielectric Dp may be a part formed by diffusion of a part of the dielectric in the dielectric layer 111 and disposed in the disconnection part Cp.

[0077] In some embodiments, the dielectric Dp may include the same material as the dielectric layer 111. The dielectric Dp may include BaTiO3 and (Ba 1-x Ca x )TiO3 (0 < x < 1) as the main component.

[0078] The regions of the internal electrodes 121 and 122 that do not include the disconnection part Cp may be electrode parts Ep, and the electrode parts Ep may be formed by sintering a conductive paste for the internal electrodes 121 and 122.

[0079] Figure 7 is an image of the internal electrode scanned by SEM according to some embodiments of the present disclosure. Figure 8 is analyzed by SEM-EDS Figure 7 image of the distribution of Ni element in the region of Figure 9 is analyzed by SEM-EDS Figure 7 image of the distribution of Y element in the region of Figure 10 is analyzed by SEM-EDS Figure 7 image of the distribution of O element in the region of Figure 11 is analyzed by SEM-EDS Figure 7 image of the distribution of Si element in the region of

[0080] Refer to Figures 7 to 11 , it can be confirmed that Ni element is detected in the electrode part Ep, and Y, Si, and O are detected in the disconnection part Cp with a length greater than or equal to 1 μm. That is, the filler Sp including Y, Si, and O is disposed in the disconnection part Cp with a length greater than or equal to 1 μm.

[0081] In some embodiments, the disconnection part Cp provided with the filler Sp may have a length greater than or equal to 1 μm. Since when the length of the disconnection part Cp is greater than or equal to 1 μm, the influence on electrical characteristics and cracks may be obvious, when the filler Sp is disposed in the disconnection part Cp with a length greater than or equal to 1 μm, the effect of improving the bonding force between adjacent dielectric layers by the filler Sp can be further improved, and the high-temperature characteristics and thermal stability can be more effectively improved.

[0082] In some embodiments, the length ratio of the packing Sp in the break portion Cp can be greater than or equal to 20%. Therefore, high-temperature characteristics and thermal stability can be further improved. More preferably, the length ratio of the packing Sp in the break portion Cp can be greater than or equal to 50%.

[0083] Reference Figure 6 The length of the entire break section Cp is the sum of g1, g2, g3 and g4, and the length of the entire packing Sp is the sum of s1, s2 and s3. Therefore, the ratio of the length of the packing Sp to the length of the break section Cp (i.e., the ratio of the length of the packing Sp in the break section Cp) can be calculated using (s1+s2+s3) / (g1+g2+g3+g4)×100%.

[0084] The length ratio of the filler Sp in the break portion Cp can be measured by scanning an image of a cross-section of the body 110 cut from the center in the second direction, in both the first and third directions, using a scanning electron microscope (SEM). Specifically, after defining a specific region in the image, the lengths of the break portion Cp and the filler Sp can be calculated by analyzing the internal electrodes 121 and 122 included in that region using SEM-EDS. For example, this region may have a dimension of 30 μm in both the first and third directions.

[0085] Furthermore, the length ratio of pores Pp in the disconnected portion Cp can be less than or equal to 20%, and the length ratio of dielectric Dp in the disconnected portion Cp can be less than or equal to 30%.

[0086] Reference Figure 6 The length of the entire broken section Cp is the sum of g1, g2, g3 and g4, and the length of the entire pore Pp is p1. Therefore, the length ratio of pore Pp in the broken section Cp can be calculated using p1 / (g1+g2+g3+g4)×100%.

[0087] Furthermore, the length ratio of dielectric Dp in the disconnected portion Cp can be calculated using (d1+d2) / (g1+g2+g3+g4)×100%.

[0088] In some embodiments, when the ratio of the length of electrode portion Ep to the length of inner electrodes 121 and 122 is referred to as the inner electrode connectivity, the inner electrodes 121 and 122 may have an inner electrode connectivity of greater than or equal to 70% and less than or equal to 95%.

[0089] Reference Figure 6 The internal electrode connectivity can be the ratio of the length of the electrode portion Ep (i.e., the sum of e1, e2, e3, e4 and e5) to the length of the first internal electrode 121 (i.e., a), and can refer to the ratio of the sum of e1, e2, e3, e4 and e5 to a.

[0090] Furthermore, there are no particular limitations on the method of setting filler Sp in the disconnected portion Cp. For example, if Y and Si are added to the raw materials used to form the inner electrodes 121 and 122 and sintering is performed, the inner electrodes 121 and 122 will begin to sinter first, causing the inner electrodes 121 and 122 to disconnect. Then, when the dielectric grains of the dielectric layer 111 grow, the Y and Si remaining in the inner electrodes 121 and 122 will precipitate, thereby filling the disconnected portion Cp and forming filler Sp.

[0091] In this case, in some embodiments, the content of Y is not particularly limited, the internal electrodes 121 and 122 comprise ceramic particles, and the content of Y in the filler Sp is greater than or equal to 0.1 mol and less than or equal to 10 mol relative to 100 mol of ceramic particles.

[0092] In some embodiments, ceramic particles may be disposed within the electrode portion Ep. The ceramic particles may be embedded within the electrode portion Ep and thus disposed within the electrode portion Ep.

[0093] In some embodiments, the dielectric layer 111 and the inner electrodes 121 and 122 may be alternately arranged in a first direction, and the break portion Cp may be arranged to penetrate the inner electrodes 121 and 122 in the first direction.

[0094] When the disconnection Cp is set to penetrate the inner electrodes 121 and 122 in the first direction, cracks may easily occur. Therefore, when the disconnection Cp is set to penetrate the inner electrodes 121 and 122 in the first direction, the effect of the present disclosure in suppressing the occurrence and propagation of cracks can be more significant.

[0095] In some embodiments, the filler Sp may be configured to connect adjacent dielectric layers 111 (e.g., Figure 5 The dielectric layers 111a and 111b in the multilayer electronic assembly 100 are used to improve the bonding force between adjacent dielectric layers 111. Therefore, by improving the bonding force between adjacent dielectric layers 111, the strength of the multilayer electronic assembly 100 can be improved, the occurrence of delamination and cracking can be suppressed, and the moisture resistance reliability can be improved.

[0096] The inner electrodes 121 and 122 may include a first inner electrode 121 and a second inner electrode 122. The first inner electrode 121 and the second inner electrode 122 may be alternately arranged opposite each other and a dielectric layer 111 is disposed between the first inner electrode 121 and the second inner electrode 122, and the first inner electrode 121 and the second inner electrode 122 may be exposed on the third surface 3 and the fourth surface 4 of the body 110, respectively.

[0097] The first inner electrode 121 is spaced apart from the fourth surface 4 and can be exposed through the third surface 3. The second inner electrode 122 is spaced apart from the third surface 3 and can be exposed through the fourth surface 4. The first outer electrode 131 can be disposed on the third surface 3 and can be connected to the first inner electrode 121. The second outer electrode 132 can be disposed on the fourth surface 4 and can be connected to the second inner electrode 122.

[0098] In other words, the first inner electrode 121 is connected to the first outer electrode 131 instead of the second outer electrode 132, and the second inner electrode 122 is connected to the second outer electrode 132 instead of the first outer electrode 131. Therefore, the first inner electrode 121 is formed to be spaced apart from the fourth surface 4 by a predetermined distance, and the second inner electrode 122 is formed to be spaced apart from the third surface 3 by a predetermined distance. Furthermore, the first inner electrode 121 and the second inner electrode 122 are spaced apart from the fifth surface 5 and the sixth surface 6 of the body 110.

[0099] The conductive metal used for the inner electrodes 121 and 122 may be at least one selected from the group consisting of Ni, Cu, Pd, Ag, Au, Pt, In, Sn, Al, Ti and alloys thereof, and this disclosure is not limited thereto. Furthermore, suitable amounts of Y and Si may be included in the conductive paste used for the inner electrodes 121 and 122 to provide filler Sp in the disconnection portion Cp.

[0100] There are no particular limitations on the method for forming the internal electrodes 121 and 122. For example, the internal electrodes 121 and 122 can be formed by coating a conductive paste comprising conductive metals, Y, and Si for the internal electrodes 121 and 122 onto a ceramic green sheet and firing the conductive paste. Screen printing, gravure printing, etc., can be used as methods for printing the conductive paste for the internal electrodes 121 and 122, but the embodiments of this disclosure are not limited thereto.

[0101] There is no particular limitation on the average thickness te of the inner electrodes. In this case, the thickness of the inner electrodes 121 and 122 can represent the dimensions of the inner electrodes 121 and 122 in the first direction. For example, when the average thickness te of the inner electrodes 121 and 122 is less than or equal to 1.0 μm, the effect of suppressing the initiation and propagation of cracks according to this disclosure can be more significant.

[0102] Here, the average thickness te of the inner electrodes 121 and 122 can be measured by scanning an image of the cross-section of the body 110 in the first and second directions using a scanning electron microscope (SEM) at a magnification of 10,000x. More specifically, the average thickness te of one of the inner electrodes 121 and 122 can be an average value obtained by measuring the thickness of the inner electrode at multiple points (e.g., 30 equally spaced points in the second direction) of the inner electrode 121 and 122 and averaging the results. The 30 equally spaced points can be specified in the capacitor forming section Ac. Furthermore, the average thickness te of the inner electrodes 121 and 122 can be further generalized by extending the average value measurement to 10 inner electrodes 121 and 122. Outer electrodes 131 and 132 are disposed on the body 110 and connected to the inner electrodes 121 and 122.

[0103] like Figure 2 As shown, the external electrodes 131 and 132 may include a first external electrode 131 and a second external electrode 132. The first external electrode 131 and the second external electrode 132 are respectively disposed on the third surface 3 and the fourth surface 4 of the main body 110 and are respectively connected to the first internal electrode 121 and the second internal electrode 122.

[0104] In this embodiment, a structure is described where the multilayer electronic assembly 100 has two external electrodes 131 and 132. However, the number and / or shape of the external electrodes may be varied depending on the number and / or shape of the internal electrodes or for other purposes.

[0105] Furthermore, the external electrodes 131 and 132 can be formed from any conductive material, such as metal, and the specific material can be determined by taking into account electrical properties and structural stability. In addition, the external electrodes 131 and 132 can have a multilayer structure.

[0106] For example, the external electrodes 131 and 132 may include electrode layers 131a and 132a disposed on the body 110 and plating layers 131b and 132b formed on the electrode layers 131a and 132a respectively.

[0107] For a more specific example of electrode layers 131a and 132a, electrode layers 131a and 132a may be sintered electrodes comprising conductive metal and glass, or may be resin-based electrodes comprising conductive metal and resin.

[0108] Furthermore, electrode layers 131a and 132a may have a form in which sintered electrodes and resin-based electrodes are sequentially formed on the body 110. Alternatively, electrode layers 131a and 132a may be formed by transferring a sheet comprising conductive metal and glass onto the body 110, or by transferring a sheet comprising conductive metal and resin onto a sintered electrode formed on the body 110.

[0109] Materials with excellent electrical conductivity can be used as conductive metals included in electrode layers 131a and 132a, and are not specifically limited thereto. For example, the conductive metal can be at least one selected from the group consisting of nickel (Ni), copper (Cu), and alloys thereof.

[0110] The plating layers 131b and 132b are used to improve mounting characteristics. There are no particular restrictions on the type of plating layers 131b and 132b, and they can be plating layers including at least one of Ni, Sn, Pd and their alloys, and plating layers 131b and 132b can be formed as multiple layers.

[0111] For a more specific example of plating layers 131b and 132b, plating layers 131b and 132b may be nickel (Ni) plating layers or tin (Sn) plating layers, or may be in the form of nickel (Ni) plating layers and tin (Sn) plating layers sequentially formed on electrode layers 131a and 132a, or may be in the form of tin (Sn) plating layers, nickel (Ni) plating layers, and tin (Sn) plating layers sequentially formed on electrode layers 131a and 132a. Additionally, plating layers 131b and 132b may include multiple Ni plating layers and / or multiple Sn plating layers.

[0112] As described above, according to one of the effects of this disclosure, the reliability of multilayer electronic components can be improved by providing fillers including Y, Si and O in the disconnected portion of the internal electrode.

[0113] However, the various advantages and effects of this disclosure are not limited to the foregoing, and can be more readily understood in the process of describing specific embodiments of this disclosure.

[0114] Although embodiments of the present disclosure have been described in detail above, the present disclosure is not limited to the above embodiments and drawings, and is intended to be limited by the appended claims. Therefore, various substitutions, modifications, and alterations can be made by those skilled in the art without departing from the technical concept of the present disclosure described in the claims, and such substitutions, modifications, and alterations will also fall within the scope of the present disclosure.

[0115] Furthermore, the term "embodiment" as used in this specification does not refer to the same embodiment, but is provided to emphasize and describe the unique features of different embodiments. However, the embodiments presented above may be implemented in combination with features of other embodiments. For example, although matters described in a particular embodiment are not described in other embodiments, they may be understood as descriptions relating to other embodiments unless otherwise described or described to the contrary in other embodiments.

[0116] The terminology used in this disclosure is for illustrative purposes only and is not intended to limit the scope of the invention. Unless the context clearly indicates otherwise, singular expressions include plural expressions.

[0117] While exemplary embodiments have been shown and described above, it will be readily understood by those skilled in the art that variations and modifications may be made without departing from the scope of this disclosure as defined by the appended claims.

Claims

1. A multilayer electronic component, comprising: The main body includes a dielectric layer and internal electrodes alternately disposed with the dielectric layer; as well as External electrodes are disposed on the main body. The internal electrode includes multiple electrode portions and multiple disconnect portions. At least one of the plurality of disconnected portions is provided with a filler comprising Y, Si, and O, and The dielectric layer comprises BaTiO3 and (Ba 1-x Ca x TiO3, where x is greater than 0 and less than 1.

2. The multilayer electronic component according to claim 1, wherein, The length of at least one of the plurality of disconnected portions, which is provided with the filler, is greater than or equal to 1 μm.

3. The multilayer electronic component according to claim 1, wherein, The length ratio of the packing in the plurality of disconnected portions is greater than or equal to 20%.

4. The multilayer electronic component according to claim 1, wherein, The plurality of disconnections include at least one of pores, dielectrics, and the filler.

5. The multilayer electronic component according to claim 1, wherein, The filler includes at least one of Y2Si2O7 and Y2SiO5.

6. The multilayer electronic assembly according to claim 1, wherein, x satisfies a value greater than or equal to 0.025 and less than or equal to 0.

2.

7. The multilayer electronic assembly according to claim 1, wherein, Relative to BaTiO3 and (Ba) in the dielectric layer 1- x Ca x The total content of TiO3, wherein the dielectric layer comprises (Ba) at a content greater than or equal to 10 mol% and less than or equal to 95 mol%. 1- x Ca x TiO3.

8. The multilayer electronic component according to claim 1, wherein, The internal electrode comprises ceramic particles, and The content of Y in the filler is greater than or equal to 0.1 mol and less than or equal to 10 mol relative to 100 mol of the ceramic particles.

9. The multilayer electronic component according to claim 8, wherein, The ceramic particles are disposed within the electrode portion.

10. The multilayer electronic assembly according to claim 1, wherein, The dielectric layer and the internal electrode are alternately arranged in a first direction, and The plurality of disconnections are configured to penetrate the inner electrode in the first direction.

11. The multilayer electronic assembly according to claim 1, wherein, The filler is configured to connect a dielectric layer adjacent to at least one of the plurality of disconnections on which the filler is disposed.

12. The multilayer electronic assembly according to claim 1, wherein, At least one of the plurality of disconnections includes the filler but excludes pores and dielectric.

13. The multilayer electronic assembly according to claim 1, wherein, At least one of the plurality of disconnections includes a dielectric, wherein the dielectric comprises BaTiO3 and (Ba 1-x Ca x TiO3 is the main component, of which 0 <x<1。

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