A capacitor

Abstract

The application discloses a capacitor. The capacitor comprises a capacitor core composed of single-layer double-sided metallized film laminates; a first gold spraying layer formed at a first end of the capacitor core and electrically connected with first metal layers of each laminate of the double-sided metallized film and isolated from second metal layers of each laminate of the double-sided metallized film; and a second gold spraying layer formed at a second end of the capacitor core and electrically connected with the second metal layers of each laminate of the double-sided metallized film and isolated from the first metal layers of each laminate of the double-sided metallized film. In this way, the capacitor provided by the application has a more compact structure and a higher volume ratio.

Description

Technical Field

[0001] This application relates to the field of capacitor technology, and in particular to a capacitor. Background Technology

[0002] In existing double-sided metallized film capacitors, the traditional multilayer structure adopts a design of alternating winding or stacking of multiple thin films. Gaps need to be reserved between layers to avoid short circuits, resulting in insufficient effective dielectric area per unit volume. At the same time, the alignment error between layers and the structural redundancy of multilayer stacking further limit the improvement of the volume ratio (capacitance / volume).

[0003] The above factors together have resulted in a generally low capacitance-to-volume ratio for existing capacitors, making it difficult to meet the application requirements of miniaturized, high-capacity capacitors in fields such as consumer electronics and new energy. Summary of the Invention

[0004] This application provides a capacitor to address the problem that the current capacitors do not have a high enough volume ratio.

[0005] To solve the above-mentioned technical problems, one technical solution adopted in this application is to provide a capacitor. The capacitor includes: a capacitor core, composed of a single-layer double-sided metallized thin film stack; a first gold-plated layer formed at a first end of the capacitor core and electrically connected to the first metal layer of each of the double-sided metallized thin film stacks, and isolated from the second metal layer of each of the double-sided metallized thin film stacks; and a second gold-plated layer formed at a second end of the capacitor core and electrically connected to the second metal layer of each of the double-sided metallized thin film stacks, and isolated from the first metal layer of each of the double-sided metallized thin film stacks.

[0006] In some embodiments, the double-sided metallized film includes a dielectric film and a first metal layer and a second metal layer disposed on both sides of the dielectric film. The first metal layer forms a first thickened portion at a first end of the dielectric film and forms a first edge region from the first metal layer to the second end of the dielectric film. The second metal layer forms a second thickened portion at the second end of the dielectric film and forms a second edge region from the second metal layer to the first end of the dielectric film. The first gold-plated layer is electrically connected to the first thickened portion of each stack of the double-sided metallized film, and the first gold-plated layer and the second metal layer are isolated by the second edge area; the second gold-plated layer is electrically connected to the second thickened portion of each stack of the double-sided metallized film, and the second gold-plated layer and the first metal layer are isolated by the first edge area.

[0007] In some embodiments, the first thickened portion and the first end of the dielectric film are provided with a first irregular structure, and the second thickened portion and the second end of the dielectric film are provided with a second irregular structure.

[0008] In some embodiments, both the first irregular structure and the second irregular structure are wave structures.

[0009] In some embodiments, the dielectric film is one of a polypropylene film, a polyester film, or a polyimide film.

[0010] In some embodiments, both the first metal layer and the second metal layer include a lower vapor-deposited layer and an upper vapor-deposited layer, wherein the lower vapor-deposited layer is one of silver, copper or aluminum, and the upper vapor-deposited layer is zinc.

[0011] In some embodiments, the layers of the double-sided metallized films are tightly bonded together.

[0012] In some embodiments, the capacitor further includes at least one first electrical lead connected to the first gold plating layer and at least one second electrical lead connected to the second gold plating layer.

[0013] In some embodiments, the capacitor further includes a plastic encapsulation housing that encapsulates the capacitor core, the first gold plating layer, and the second gold plating layer, with the first electrical lead and the second electrical lead extending beyond the plastic encapsulation housing.

[0014] In some embodiments, the first gold plating layer covers the entire end face of the first end of the capacitor core, the second gold plating layer covers the entire end face of the second end of the capacitor core, and the first gold plating layer and the second gold plating layer do not contact each other in space.

[0015] The beneficial effects of this application are as follows: Unlike existing technologies, this application uses a single-layer double-sided metallized thin film stack to form the capacitor core, combined with an independent end-gold spraying layer design, which significantly improves the capacitance ratio of the capacitor, resulting in a higher capacitance ratio. The capacitor obtained using this application solution has a larger capacitance value for the same volume, or a smaller volume for the same capacitance value. Specifically, because the capacitor core is constructed using a single-layer double-sided metallized thin film stack structure, the interlayer gap requirement of the traditional multi-layer alternating winding / stacking structure is eliminated. Through the tight bonding design of the single-layer double-sided metallized thin film stack, the effective plate area ratio per unit volume is significantly improved, while eliminating alignment errors and structural redundancy of multi-layer stacking, further improving the capacitance ratio (capacitance / volume). The single-layer stack design combined with the end-face full-coverage gold spraying process makes the capacitor core structure more compact, and the volume is smaller than that of the traditional structure for the same capacitance, meeting the application requirements of miniaturized high-capacity devices in the consumer electronics and new energy fields. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort, wherein: Figure 1 This is a schematic diagram of the structure of an embodiment of the capacitor provided in this application; Figure 2 Is it like this? Figure 1 The diagram shows the structure of the capacitor after the plastic casing has been removed. Figure 3 Is it like this? Figure 2 The diagram shows the structural diagram of the capacitor core in the capacitor shown. Figure 4 Is it like this? Figure 3 A schematic diagram of the unfolded structure of a single-layer double-sided metallized film in the capacitor core shown; Figure 5 Is it like this? Figure 4 The diagram shows a cross-sectional view of the double-sided metallized thin film. Detailed Implementation

[0017] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0018] The terms "first," "second," and "third" used in the embodiments of this application are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.

[0019] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a mutually exclusive, independent, or alternative embodiment. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0020] This application provides a capacitor 100, see reference. Figures 1 to 3 , Figure 1 This is a schematic diagram of the structure of an embodiment of the capacitor provided in this application. Figure 2 Is it like this? Figure 1 The diagram shows the structure of the capacitor after the plastic casing has been removed. Figure 3 Is it like this? Figure 2 The diagram shows the structural schematic of the capacitor core in the capacitor.

[0021] The capacitor 100 includes a capacitor core 10, a first gold-plated layer 21, and a second gold-plated layer 22. The capacitor core 10 is composed of a single layer of double-sided metallized thin films 12 stacked together. The first gold-plated layer 21 is formed at the first end 101 of the capacitor core 10 and is electrically connected to the first metal layer 121 of each stack of double-sided metallized thin films 12, and is isolated from the second metal layer 122 of each stack of double-sided metallized thin films 12. The second gold-plated layer 22 is formed at the second end 102 of the capacitor core 10 and is electrically connected to the second metal layer 122 of each stack of double-sided metallized thin films 12, and is isolated from the first metal layer 121 of each stack of double-sided metallized thin films 12.

[0022] The capacitor 100 provided in this embodiment works based on the electric field energy storage effect. Its working principle is as follows: When a voltage is applied to both ends of the capacitor 100, the metal layers on both sides of the double-sided metallized film 12 serve as different electrodes, forming an electric field on both sides of the dielectric layer 120 of the double-sided metallized film 12. Charge accumulates on the electrodes and stores electrical energy in the form of an electrostatic field.

[0023] Since the capacitor core 10 adopts a single-layer double-sided metallized film 12 folded into a stacked structure, compared with the traditional capacitor core formed by two or more layers of film winding or stacking process, the metal layer and dielectric layer in the capacitor core 10 in this embodiment are more densely arranged, and a larger effective plate area can be formed in the same volume, thereby increasing the capacitance value and having a higher volume ratio, or the volume of the capacitor 10 is smaller than that of the traditional structure under the same capacitance, which meets the application requirements of miniaturized high-capacity devices in the fields of consumer electronics and new energy, and makes the structure of the capacitor 100 more compact.

[0024] See Figures 1 to 5 , Figure 4 Is it like this? Figure 3The diagram shows the unfolded structure of a single-layer double-sided metallized film in the capacitor core. Figure 5 Is it like this? Figure 4 The diagram shows a cross-sectional view of the double-sided metallized thin film.

[0025] Figure 4 The double-sided metallized film shown in the unfolded state forms the stacked structure of the capacitor core after multiple folds. Figure 4 As shown, the double-sided metallized film 12 in its unfolded state is a straight strip-shaped film. Along its length direction A, the double-sided metallized film 12 has a front cleaning area 103 and a rear cleaning area 104 on both sides of the metal layer. The front cleaning area 103 and the rear cleaning area 104 do not cover the metal layer and need to be cleaned sequentially before and after folding the double-sided metallized film 12. Along its width direction B, the double-sided metallized film 12 has a margin area on the metal layer on either side, and the margin areas on both sides are at different positions in the width direction B. The double-sided metallized film 12 in its unfolded state is folded along its length direction A to form a multi-layered stacked structure. Then, hot pressing is used to eliminate the gaps between the layers. Therefore, there are no air layers or gaps between the layers, so that the layers of the double-sided metallized film 12 are tightly bonded together to form the capacitor core 10.

[0026] like Figure 3 As shown, the first metal layer 121 on the same side of the double-sided metallized film 12 is in contact with each other, and the second metal layer 122 on the same side of the double-sided metallized film 12 is in contact with each other. The first metal layer 121 and the second metal layer 122 always maintain insulation and isolation.

[0027] Among them, such as Figure 2 and Figure 3 As shown, the single-layer double-sided metallized film 12 also has a stacked structure at both ends in the width direction B to form the first end 101 and the second end 102 of the capacitor core 10. The first gold sputtering layer 21 is formed at the first end 101 of the capacitor core 10 and is electrically connected to the first metal layer 121 of each stack of the double-sided metallized film 12, and is isolated from the second metal layer 122 of each stack of the double-sided metallized film 12 due to the edge area. The second gold sputtering layer 22 is formed at the second end 102 of the capacitor core 10 and is electrically connected to the second metal layer 122 of each stack of the double-sided metallized film 12, and is isolated from the first metal layer 121 of each stack of the double-sided metallized film 12 due to the edge area.

[0028] Specifically, such as Figure 4 and Figure 5As shown, the double-sided metallized thin film 12 includes a dielectric film 120 and a first metal layer 121 and a second metal layer 122 disposed on both sides of the dielectric film 120. The first metal layer 121 has a first thickened portion 123 formed at the first end 101 of the dielectric film 120, and a first edge area 124 is formed from the first metal layer 121 to the second end 102 of the dielectric film 120. The second metal layer 122 has a second thickened portion 125 formed at the second end 102 of the dielectric film 120, and a second edge area 126 is formed from the second metal layer 122 to the first end 101 of the dielectric film 120.

[0029] See also Figures 2 to 5 The first gold-plated layer 21 is electrically connected to the first thickened portion 123 of each stack of the double-sided metallized film 12, and the first gold-plated layer 21 and the second metal layer 122 are isolated by the second edge area 126; the second gold-plated layer 22 is electrically connected to the second thickened portion 125 of each stack of the double-sided metallized film 12, and the second gold-plated layer 22 and the first metal layer 121 are isolated by the first edge area 124.

[0030] The first thickened portion 123 on the first metal layer 121 increases the thickness of the metal layer relative to the rest, thereby improving the bonding strength and electrical contact area between the first gold-plated layer 21 and the first metal layer 121. Similarly, the second thickened portion 125 on the second metal layer 122 is provided to enhance the adhesion reliability and conductive continuity between the second gold-plated layer 22 and the second metal layer 122. The first thickened portion 123 and the second thickened portion 125 are staggered along the width direction of the dielectric film 120, and each corresponds to the coverage area of ​​the first gold-plated layer 21 and the second gold-plated layer 22. The first edge area 124 and the second edge area 126 are also staggered along the width direction, so that the first thickened portion 123... The second thickened portion 125 overlaps with the first thickened portion 124 in the thickness direction of the dielectric film 120, and the second edge region 126 overlaps with the first thickened portion 124 in the thickness direction of the dielectric film 120. Thus, the first gold-plated layer 21 can form a stable electrical connection only with the first thickened portion 123 of the first metal layer 121, while the second edge region 126 achieves physical isolation of the second metal layer 122. Similarly, the second gold-plated layer 22 forms a stable electrical connection only with the second thickened portion 125 of the second metal layer 122, and the first edge region 124 achieves physical isolation of the first metal layer 121, ensuring the orientation of the end-face electrical connection between the corresponding gold-plated layer and the metal layer and the effectiveness of the insulation isolation between the corresponding gold-plated layer and the other metal layer.

[0031] Furthermore, such as Figures 3 to 5As shown, the first thickened portion 123 and the first end 101 of the dielectric film 10 are both provided with a first irregular structure 127 to increase the contact area with the first gold sputtering layer 21 and improve the interfacial bonding force and current distribution uniformity between them; the second thickened portion 125 and the second end 102 of the dielectric film 120 are respectively provided with a second irregular structure 128, which also work together to enhance the anchoring effect and current conduction stability with the second gold sputtering layer 22.

[0032] Optionally, both the first irregular structure 127 and the second irregular structure 128 are wave structures, or both the first irregular structure 127 and the second irregular structure 128 are toothed structures, or the first irregular structure 127 and the second irregular structure 128 are one of wave structures and toothed structures respectively.

[0033] Furthermore, the first gold plating layer 21 covers the entire end face of the first end 101 of the capacitor core 10, and the second gold plating layer 22 covers the entire end face of the second end 102 of the capacitor core 10, and the first gold plating layer 21 and the second gold plating layer 22 do not contact each other in space.

[0034] By using a gold-plated layer to fully cover the end face of the capacitor core 10, the contact resistance is reduced, thereby reducing heat accumulation during the operation of the capacitor 10. This significantly improves the thermal stability and mechanical stress resistance between the gold-plated layer and the capacitor core 10. Furthermore, in the context of the increasing prevalence of high-frequency and high-power electronic devices, it effectively suppresses the risk of local overheating and early failure caused by micro-voids at the interface. The micro-interlocking effect between the wavy or tooth-shaped irregular structure and the gold-plated layer, combined with the excellent ductility and self-healing tendency of the gold-plated layer, can maintain extremely high initial contact resistance stability with the end face of the capacitor core 10 even after multiple thermal cycles. Especially under wide temperature range conditions from -40℃ to 150℃, the residual compressive stress generated by the irregular structure at the end of the capacitor core 10 and the gold-plated layer can actively compensate for the interface separation tendency caused by thermal expansion mismatch, greatly extending the end face connection life of the two components.

[0035] In this embodiment, the dielectric film 120 is one of a polypropylene film, a polyester film, or a polyimide film. Both the first metal layer 121 and the second metal layer 122 include a lower vapor-deposited layer and a higher vapor-deposited layer. The lower vapor-deposited layer is one of silver, copper, or aluminum, and the higher vapor-deposited layer is zinc. The lower vapor-deposited layer is attached to the surface of the dielectric film 120, and the higher vapor-deposited layer covers the lower vapor-deposited layer, forming a bimetallic gradient structure. The lower vapor-deposited layer provides high conductivity and good adhesion, while the higher vapor-deposited zinc layer combines oxidation resistance with excellent gold sputtering compatibility.

[0036] In this embodiment, as Figure 2 As shown, the capacitor 100 also includes at least one first electrical lead 31 connected to the first gold-plated layer 21 and at least one second electrical lead 32 connected to the second gold-plated layer 22.

[0037] Each first electrical lead 31 and each second electrical lead 32 can achieve low-impedance, high-reliability electrical connection with the corresponding areas of the first gold-plated layer 21 and the second gold-plated layer 22 through inverter soldering, resistance soldering or soldering. Each first electrical lead 31 and each second electrical lead 32, as electrode pins of different polarities, are symmetrically distributed from both sides of the capacitor core 10 to ensure uniform current distribution during operation and significantly reduce the risk of single-point heat concentration.

[0038] The number of first electrical leads 31 and second electrical leads 32 is the same, and each can be one, two, or three or more, preferably two or three, to balance the structural compactness of capacitor 100 and the redundancy of current carrying capacity. The axial spacing between adjacent first electrical leads 31 and adjacent second electrical leads 32 is optimized by electromagnetic field simulation to ensure that the parasitic inductance between pins is effectively controlled under high-frequency operating conditions, which can reduce impedance abrupt changes in high-frequency signal transmission, thereby suppressing resonance peak shift and signal integrity degradation.

[0039] In addition, each of the first electrical leads 31 and each of the second electrical leads 32 is provided with a stress-relieving arc groove at the root. Combined with the stress buffering characteristics of the flexible encapsulation layer outside the capacitor core 10, the initiation of microcracks in the solder joints is significantly suppressed under thermal shock and vibration environments.

[0040] In this embodiment, as Figure 1 As shown, the capacitor 100 also includes a plastic encapsulation shell 40, which encapsulates the capacitor core 10, the first gold plating layer 21, and the second gold plating layer 22. The first electrical lead 31 and the second electrical lead 32 extend out of the plastic encapsulation shell 40.

[0041] The plastic encapsulation housing 40 includes a plastic encapsulation housing 41 and an epoxy resin layer 42 encapsulating the lead-out faces of each first electrical lead 31 and each second electrical lead 32. The plastic encapsulation housing 41 and the epoxy resin layer 42 constitute a complete and sealed housing structure, effectively isolating moisture, ionic contaminants and mechanical stress intrusion. The plastic encapsulation housing 41 is made of a modified epoxy molding compound with low dielectric constant and high glass transition temperature. Its coefficient of thermal expansion matches that of the internal capacitor core 10 and the electrical lead metal, avoiding interface delamination during temperature cycling. The epoxy resin layer 42 is a flexible encapsulation layer that cooperates with the stress relief arc grooves at the roots of each first electrical lead 31 and each second electrical lead 32 to help suppress the initiation of microcracks at the solder joints between the electrical leads and the gold plating layer.

[0042] In the capacitor 100 provided in this embodiment, the capacitor core 10 is composed of a single layer of double-sided metallized film 12 folded and stacked, replacing the traditional multi-layer alternating winding or stacking structure design. This eliminates the interlayer gaps required by the traditional structure to avoid short circuits. Through the tightly fitted stacked design (without air layers or interlayer gaps), the effective mechanism area ratio per unit volume is significantly increased, thereby greatly improving the charge storage density per unit volume. At the same time, it also eliminates the alignment error and structural redundancy of multi-layer stacking, reduces the ineffective space occupation, and further improves the volume ratio of the capacitor 100.

[0043] The capacitor 100 uses the first metal layer 121 and the second metal layer 122 as electrodes to form an electric field for energy storage on both sides of the dielectric film 120. The single-layer double-sided metallized film 12 stacked structure significantly increases the effective plate area (metal layer area) for the same volume. According to the capacitance formula C=εA / d, under the premise that the dielectric thickness d and the dielectric constant ε remain unchanged, the increase in plate area A directly and linearly increases the capacitance value, thereby achieving a higher volume ratio.

[0044] Furthermore, the first gold plating layer 21 fully covers the first end 101 face of the capacitor core 10, and the second gold plating layer 22 fully covers the second end 102 face of the capacitor core 10. Together with the first thickened portion 123, the first edge area 124 of the first metal layer 121, and the second thickened portion 125 and the second edge area 126 of the second metal layer 122, the electrode isolation is ensured while avoiding the space occupied by the complex electrode lead-out structure in the traditional structure, making the structure more compact.

[0045] In this embodiment, through the synergistic effect of eliminating gaps by single-layer stacking, optimizing space utilization by gold sputtering layer, and maximizing effective plate area, capacitor 100 can achieve a larger capacitance in the same volume, or significantly reduce the volume in the same capacity, ultimately meeting the demand for miniaturization and high capacity of capacitor 100 in consumer electronics, new energy and other fields.

[0046] The above descriptions are merely embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made based on the description and drawings of this application, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application. The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the protection scope of this application.

Claims

1. A capacitor, characterized in that, The capacitor includes: The capacitor core is composed of a single-layer double-sided metallized film stack; A first gold-plated layer is formed at the first end of the capacitor core and is electrically connected to the first metal layer of each stack of the double-sided metallized thin film, and is isolated from the second metal layer of each stack of the double-sided metallized thin film. The second gold-plated layer is formed at the second end of the capacitor core and is electrically connected to the second metal layer of each stack of the double-sided metallized thin film, and is isolated from the first metal layer of each stack of the double-sided metallized thin film.

2. The capacitor according to claim 1, characterized in that, The double-sided metallized film includes a dielectric film and a first metal layer and a second metal layer disposed on both sides of the dielectric film. The first metal layer forms a first thickened portion at a first end of the dielectric film and forms a first edge area from the first metal layer to the second end of the dielectric film. The second metal layer forms a second thickened portion at the second end of the dielectric film and forms a second edge area from the second metal layer to the first end of the dielectric film. The first gold-plated layer is electrically connected to the first thickened portion of each stack of the double-sided metallized film, and the first gold-plated layer and the second metal layer are isolated by the second edge area; the second gold-plated layer is electrically connected to the second thickened portion of each stack of the double-sided metallized film, and the second gold-plated layer and the first metal layer are isolated by the first edge area.

3. The capacitor according to claim 2, characterized in that, The first thickened portion and the first end of the dielectric film are both provided with a first irregular structure, and the second thickened portion and the second end of the dielectric film are both provided with a second irregular structure.

4. The capacitor according to claim 3, characterized in that, Both the first irregular structure and the second irregular structure are wave structures.

5. The capacitor according to claim 2, characterized in that, The dielectric film is one of polypropylene film, polyester film or polyimide film.

6. The capacitor according to claim 2, characterized in that, Both the first metal layer and the second metal layer include a lower vapor-deposited layer and an upper vapor-deposited layer. The lower vapor-deposited layer is one of silver, copper or aluminum, and the upper vapor-deposited layer is zinc.

7. The capacitor according to claim 1, characterized in that, The layers of the double-sided metallized thin film are tightly bonded together.

8. The capacitor according to claim 1, characterized in that, The capacitor further includes at least one first electrical lead connected to the first gold-plated layer and at least one second electrical lead connected to the second gold-plated layer.

9. The capacitor according to claim 8, characterized in that, The capacitor also includes a plastic encapsulation shell, which encapsulates the capacitor core, the first gold plating layer, and the second gold plating layer, with the first electrical lead and the second electrical lead extending beyond the plastic encapsulation shell.

10. The capacitor according to claim 1, characterized in that, The first gold plating layer covers the entire first end face of the capacitor core, and the second gold plating layer covers the entire second end face of the capacitor core, and the first gold plating layer and the second gold plating layer do not contact each other in space.

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