A PCBA field repair test system based on TDO mirror image timing player

Abstract

The application provides a PCBA field repair test system based on a TDO mirror timing player, a single-chip microcomputer or a microcontroller is used as a boundary scan test executor, according to the content of an SVF format test input file, TDI / TMS / TCK / TRST and other test excitation and test control signals are generated on IO pins of the boundary scan test executor, and then the signals are broadcasted to TAP interfaces of each measured circuit board and the TDO mirror timing player through a star bus, so that the TDO output signals of each measured circuit board and the TDO mirror timing player output signals are compared, and finally the comparison result is used to control the light and dark of a light-emitting diode to display the test result of each parallel test branch. The application has the mirror test capability which is not possessed by the traditional parallel boundary scan test system, can test multiple measured circuit boards in parallel, and can identify the measured circuit boards with connectivity defects, can improve the cost-effectiveness, greatly reduces the matching use conditions, and is very suitable for field repair test.

Description

Technical Field

[0001] This invention belongs to the field of boundary scan testing technology, specifically relating to a PCBA field repair testing system based on a TDO mirror timing player. Background Technology

[0002] Traditional parallel boundary scan test systems use microcontrollers instead of expensive PCs and comparators instead of expensive fault diagnosis software, achieving parallel boundary scan testing through comparators and thus significantly improving the cost-effectiveness of testing. However, the test system used in this technology requires a reference circuit board as a test reference, making it unsuitable for field emergency repair testing applications. Summary of the Invention

[0003] (a) Technical problems to be solved This invention proposes a PCBA field repair testing system based on a TDO mirror timing player to solve the technical problem that traditional parallel boundary scan testing systems are not suitable for field repair testing.

[0004] (II) Technical Solution To address the aforementioned technical problems, this invention proposes a PCBA field repair and testing system based on a TDO mirror timing player. This system includes an SVF file store, a boundary scan test executor, a bus driver, a star-shaped boundary scan test bus, a TDO mirror timing store, a TDO mirror timing player, multiple comparators, and multiple light-emitting diodes (LEDs). The SVF file store is used to store test input files in SVF format; The boundary scan test executor is used to read the test input file from the SVF file storage and generate four test excitation and test control signals, namely TDI, TMS, TCK and TRST, on the corresponding IO pins according to the test instructions and test excitation vectors in the test input file. The bus driver is used to unidirectionally drive and amplify the test stimulus and test control signals generated by the boundary scan test actuator, and broadcast them to the TAP interface of each circuit board under test and the TDO mirror timing player through the unidirectional signal line of the star boundary scan test bus. TDO mirror timing memory is used to pre-store the corresponding TDI, TMS, TCK, TRST, and TDO pin timing data streams when a normally functioning circuit board under test is subjected to boundary scan testing. The TDI, TMS, TCK, and TRST pins of the TDO mirror timing player are connected to the corresponding signal lines of the star boundary scan test bus. They are used to read the pre-stored TDO signal from the TDO mirror timing memory and drive the read TDO signal to the output pin of the TDO mirror timing player when performing parallel boundary scan tests on each board under test. The number of comparators is the same as that of the circuit board under test; each comparator has two inputs and one output; the first input is connected to the TDO signal of the unique TAP interface or daisy-chain TAP interface of the corresponding circuit board under test, the second input is connected to the output pin of the TDO mirror timing player, and the output is connected to a corresponding LED; each comparator judges the test result based on the consistency between the output signal of the TDO mirror timing player and the TDO output signal of the circuit board under test, and uses the on / off state of the LED to display the test results of each parallel circuit board under test.

[0005] Furthermore, the SVF file storage uses non-volatile memory.

[0006] Furthermore, the boundary scan test actuator is composed of a single-chip microcomputer system or a microcontroller.

[0007] Furthermore, the TDO mirrored sequential memory uses non-volatile memory.

[0008] Furthermore, the comparator is a digital comparator constructed using combinational circuitry.

[0009] (III) Beneficial Effects This invention proposes a PCBA field repair testing system based on a TDO mirror timing player. It utilizes a microcontroller instead of an expensive PC, employing a microcontroller or similar device as the boundary scan test actuator. Based on the content of the SVF format test input file, it generates test stimuli and control signals such as TDI / TMS / TCK / TRST on the I / O pins of the boundary scan test actuator. These signals are then broadcast via a star bus to the TAP interfaces of each board under test (BUT) and the TDO mirror timing player, enabling comparison between the TDO output signals of each BUT and the output signals of the TDO mirror timing player. Finally, the comparison result controls the on / off state of LEDs to display the test results of each parallel test branch. This invention possesses mirror testing capabilities not found in traditional parallel boundary scan test systems, allowing for parallel testing of multiple BUTs and identifying BUTs with connectivity defects. This not only improves cost-effectiveness but also significantly reduces the requirements for system setup, making it ideal for field repair testing. Attached Figure Description

[0010] Figure 1 This is a system block diagram of the PCBA field repair and testing system of the present invention; Figure 2 This is a schematic diagram of the upper boundary scanning daisy chain and TAP interface structure of the circuit board under test. Detailed Implementation

[0011] To make the objectives, contents, and advantages of the present invention clearer, the specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples.

[0012] This embodiment proposes a PCBA field repair and testing system based on a TDO mirror timing player, the composition of which is as follows: Figure 1 As shown, it mainly includes an SVF file storage, a boundary scan test executor, a bus driver, a star-shaped boundary scan test bus, a TDO mirror timing memory, a TDO mirror timing player, multiple comparators, and multiple light-emitting diodes.

[0013] SVF file storage is used to store test input files in SVF format and can use non-volatile memory such as NorFlash, NandFlash, or SD card.

[0014] The boundary scan test actuator is composed of a single-chip microcomputer system or microcontroller. It is used to read the test input file from the SVF file storage and generate four test excitation and test control signals, namely TDI (data input signal), TMS (mode selection signal), TCK (clock signal) and TRST (reset signal), which conform to the IEEE1149.1 standard, on the corresponding four IO pins according to the test instructions and test excitation vectors in the test input file.

[0015] The bus driver is used to unidirectionally drive and amplify the test stimulus and test control signals generated by the boundary scan test actuator, and broadcast them to the TAP interface of each circuit board under test and the TDO mirror timing player through the four unidirectional signal lines of the star boundary scan test bus.

[0016] All circuit boards under test have identical circuit designs and performance parameters, at least one boundary scan chip conforming to the IEEE 1149.1 standard, at least one boundary scan link, and at least one TAP interface. If the circuit board under test has multiple boundary scan links and multiple TAP interfaces, it is constructed as a daisy chain with one daisy chain TAP interface, as shown in the structure below. Figure 2 As shown. The TDI, TMS, TCK, and TRST signals of the unique TAP interface or daisy-chain TAP interface of all the circuit boards under test are connected to the corresponding signal lines of the star boundary scan test bus.

[0017] TDO mirror timing memory is used to pre-store the timing data streams of the TDI, TMS, TCK, TRST, and TDO (data output signal) pins of a working circuit board under test during boundary scan testing. It can be a non-volatile memory such as NorFlash, NandFlash, or SD card.

[0018] The TDI, TMS, TCK, and TRST pins of the TDO mirror timing player are connected to the corresponding signal lines of the star boundary scan test bus (they can be connected to any position on the star boundary scan test bus, such as the rightmost end of the star boundary scan test bus). They are used to read the pre-stored TDO signals from the TDO mirror timing memory and drive the read TDO signals to the output pins of the TDO mirror timing player when performing parallel boundary scan tests on each board under test.

[0019] The comparators are digital comparators constructed using combinational circuits, and the number of them is the same as the number of circuit boards under test (PCBs). Each comparator has two inputs and one output. The first input is connected to the TDO signal of the unique TAP interface or daisy-chain TAP interface of the corresponding PCB. The second input is connected to the output pin of the TDO mirror timing player, and the output is connected to a corresponding LED. Each comparator determines the test result based on the consistency between the output signal of the TDO mirror timing player and the TDO output signal of the PCB under test. The test results of each parallel PCB are displayed by the on / off state of the LEDs. When the two input levels of the comparator are the same, the output is high, and the corresponding LED is lit; when the two input levels are different, it indicates that the corresponding PCB under test has a connectivity defect, the output is low, and the corresponding LED is not lit. The on / off state of the LEDs indicates whether the corresponding PCB under test has a connectivity defect, thereby achieving the purpose of identifying whether the PCB under test has a connectivity fault.

[0020] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A PCBA field repair and testing system based on a TDO mirror timing player, characterized in that, The PCBA field repair and testing system includes an SVF file store, a boundary scan test actuator, a bus driver, a star-shaped boundary scan test bus, a TDO mirror timing memory, a TDO mirror timing player, multiple comparators, and multiple light-emitting diodes; among which... The SVF file storage is used to store test input files in SVF format; The boundary scan test executor is used to read the test input file from the SVF file storage and generate four test excitation and test control signals, namely TDI, TMS, TCK and TRST, on the corresponding IO pins according to the test instructions and test excitation vectors in the test input file. The bus driver is used to unidirectionally drive and amplify the test stimulus and test control signals generated by the boundary scan test actuator, and broadcast them to the TAP interface of each circuit board under test and the TDO mirror timing player through the unidirectional signal line of the star boundary scan test bus. The TDO mirror timing memory is used to pre-store the corresponding TDI, TMS, TCK, TRST, and TDO pin timing data streams when a normally functioning circuit board under test is subjected to boundary scan testing. The TDI, TMS, TCK, and TRST pins of the TDO mirror timing player are respectively connected to the corresponding signal lines of the star boundary scan test bus. They are used to read the pre-stored TDO signal from the TDO mirror timing memory and drive the read TDO signal to the output pin of the TDO mirror timing player when performing parallel boundary scan tests on each circuit board under test. The number of comparators is the same as that of the circuit board under test; each comparator has two input terminals and one output terminal; the first input terminal is connected to the TDO signal of the unique TAP interface or daisy-chain TAP interface of the corresponding circuit board under test, the second input terminal is connected to the output pin of the TDO mirror timing player, and the output terminal is connected to a corresponding light-emitting diode; each comparator judges the test result based on the consistency between the output signal of the TDO mirror timing player and the TDO output signal of the circuit board under test, and uses the on / off state of the light-emitting diode to display the test results of each parallel circuit board under test.

2. The PCBA field repair and testing system based on TDO mirror timing player as described in claim 1, characterized in that, The SVF file storage uses non-volatile memory.

3. The PCBA field repair and testing system based on a TDO mirror timing player as described in claim 1, characterized in that, The boundary scan test actuator is composed of a single-chip microcomputer system or a microcontroller.

4. The PCBA field repair and testing system based on a TDO mirror timing player as described in claim 1, characterized in that, The TDO mirror timing memory uses non-volatile memory.

5. The PCBA field repair and testing system based on a TDO mirror timing player as described in claim 1, characterized in that, The comparator is a digital comparator constructed using combinational circuitry.

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