A preparation method of an asymmetric laminated differential trace FPC structure

Abstract

The application relates to the technical field of flexible circuit boards, in particular to a preparation method of an asymmetric laminated differential wiring FPC structure; the FPC structure is sequentially composed of a bottom covering layer, a bottom copper foil, a flexible dielectric layer, an upper copper foil, a signal wiring layer and a top covering layer from bottom to top, and is provided with electroplated through holes and dielectric layer electroplated through holes for realizing interlayer conduction; the core is an asymmetric design that the thickness of the upper copper foil is smaller than that of the bottom copper foil, and the signal wiring layer contains at least one pair of differential signal wirings. In the preparation, first, a double-sided adhesive-free base material is selected to be laser blind-holed, the upper copper foil is shielded, the bottom copper foil is electroplated and thickened to 15-25 mu.m and copper plating of the hole wall is completed, then the differential wiring is etched, finally, the covering layer is attached and is formed through pressing, solidification and post-processing. The application breaks the symmetry of the electromagnetic field, reduces the common mode noise amplitude of the 60GHz frequency band by more than 20dB, can also simplify the shielding layer and improve the wiring density, and the process is compatible with the existing FPC production line, and the high ductility LCP substrate guarantees the dynamic bending reliability.

Description

Technical Field

[0001] This invention relates to the field of flexible circuit board technology, and specifically to a method for fabricating an asymmetric stacked differential wiring FPC structure. Background Technology

[0002] With the rapid iteration of the consumer electronics and automotive electronics industries, the widespread adoption of 5G communication technology, and the advancement of 6G communication technology research and development, various high-end electronic devices are developing towards thinner, smaller, and higher-performance designs. Market demand for products such as foldable screen phones, AR / VR wearable devices, smart car millimeter-wave radar, and high-speed data terminals continues to rise. These devices place stringent requirements on the high-frequency, high-speed performance and spatial adaptability of their internal signal transmission components. Flexible printed circuit boards (FPCs), with their core characteristics of being thin, flexible, and having flexible wiring, can adapt to the complex installation spaces and dynamic usage scenarios of high-end equipment, becoming a core component for achieving high-speed differential signal transmission. Their performance directly determines the overall operational performance of the device.

[0003] In applications such as foldable phones and AR / VR devices, stable transmission of high-speed differential signals such as MIPI, USB 3.0, and PCIe is crucial for achieving high-definition display, low-latency interaction, and accurate detection. High-frequency FPC differential traces, as the transmission carrier of high-speed differential signals, play a decisive role in signal transmission quality due to their structural design. Currently, the industry commonly adopts a symmetrical stacked structure for high-frequency FPC differential trace designs, where the reference ground planes (copper foil layers) on both the top and bottom sides of the signal layer have a consistent thickness. This design relies on a mature process system, can meet the basic impedance matching requirements in conventional scenarios, and has certain practicality in mid-to-low frequency signal transmission, thus becoming the mainstream design approach in the industry.

[0004] However, as communication technology moves towards the millimeter-wave band (above 30GHz), the inherent defects of traditional symmetrical stacked structures have gradually become apparent, making it difficult to meet the transmission requirements of high-frequency and high-speed signals. The main core problems are as follows: First, the common-mode noise suppression capability is insufficient. The symmetrical stacked structure forms a symmetrical electromagnetic field environment, which makes the propagation path of the common-mode current between the upper and lower reference ground planes completely symmetrical. It is impossible to block the coupling and radiation process of common-mode noise from the structural level, resulting in the difficulty of effectively suppressing common-mode noise and limiting the improvement of signal-to-noise ratio (SNR). Experimental data shows that traditional symmetrical stacked structures are ineffective at suppressing common-mode noise in the 60GHz millimeter-wave band, with the signal-to-noise ratio improvement typically less than 10%, severely impacting the transmission stability of high-frequency and high-speed signals. Secondly, the utilization rate of wiring space is low. To compensate for the insufficient common-mode noise suppression capability, the industry usually needs to add an independent electromagnetic shielding layer to the FPC structure to improve the signal's anti-interference capability. However, the additional shielding layer occupies a large amount of wiring space. In space-constrained scenarios such as AR / VR main control modules and foldable screen mobile phone motherboards, it squeezes out the layout resources of other lines and components, limiting the miniaturization and integration design of the device. Summary of the Invention

[0005] The purpose of this invention is to provide a method for fabricating an asymmetric multilayer differential wiring FPC structure. By designing the asymmetric copper foil thickness, the method optimizes the differential signal integrity, suppresses high-frequency common-mode noise, and increases wiring density, while ensuring process compatibility and product reliability.

[0006] To achieve the above objectives, the technical solution of this application is as follows: a method for fabricating an asymmetric multilayer differential FPC structure, wherein the FPC structure comprises, from bottom to top, a bottom cover layer, a bottom copper foil, a flexible dielectric layer, an upper copper foil, a signal trace layer, and a top cover layer, wherein the thickness of the upper copper foil is less than the thickness of the bottom copper foil, and the signal trace layer is disposed on the upper copper foil and includes at least one pair of differential signal traces; the fabrication method includes: selecting a non-adhesive substrate for laser drilling to process blind holes, layering copper plating on the bottom copper foil to increase its thickness, forming differential signal traces on the upper copper foil through an etching process, and finally attaching the top cover layer and the bottom cover layer, pressing and curing, and post-processing to form the structure. The asymmetric copper thickness structure breaks the electromagnetic field symmetry and achieves high-frequency common-mode noise suppression.

[0007] In another implementation of the present invention, the laser drilling process involves processing blind holes from the bottom copper foil toward the flexible dielectric layer. The depth of the blind hole processing is controlled to avoid damaging the upper copper foil, thus providing a basis for subsequent copper plating of the hole wall and electrical conduction.

[0008] In another implementation of the present invention, the specific operation of layering copper plating on the bottom copper foil is to use a dry film to completely cover the upper copper foil, and then perform black hole and electroplating copper operations on the bottom copper foil in sequence, so as to increase the thickness of the bottom copper foil while simultaneously plating copper on the wall of the blind hole.

[0009] In another implementation of the present invention, the overall thickness of the thickened bottom copper foil is 15-25μm, which serves as a reference ground plane to provide a low-inductance return path for high-frequency signals.

[0010] In another implementation of the present invention, the specific operation of forming differential signal traces on the upper copper foil by etching process is as follows: the differential signal traces are etched on the upper copper foil by sequentially using pressing dry film, exposure, development and chemical etching processes, and the line width, line spacing and trace length difference are controlled during the etching process.

[0011] In another implementation of the present invention, the differential signal trace has a line width of 20-40μm, a line spacing of 15-30μm, a trace length difference controlled within 0.5mm, and the etched differential signal trace layout avoids bending areas.

[0012] In another implementation of the present invention, the flexible dielectric layer is an LCP substrate with a dielectric constant controlled between 2.8 and 3.2, a dielectric loss factor less than 0.002, and a thickness of 25-50 μm. During preparation, a double-sided adhesive-free substrate matching these parameters is directly selected.

[0013] In another implementation of the present invention, the specific operation of attaching the top cover layer and the bottom cover layer is to attach the bottom cover layer to the lower surface of the bottom copper foil and the top cover layer to the upper copper foil and the signal trace layer, respectively. The bottom cover layer and the top cover layer are both made of LCP and high-frequency pure adhesive composite, and the thickness is 15-25μm.

[0014] In another embodiment of the present invention, the post-processing molding includes sequentially cleaning the surface of the substrate after pressing and curing, performing anti-oxidation surface treatment, and then precisely cutting it to the design dimensions through a die-cutting process to obtain the finished product.

[0015] In another implementation of the present invention, the double-sided adhesive-free substrate is made of LCP material with an elongation of ≥30%.

[0016] By adopting the above technical solution, the present invention can achieve the following technical effects: 1. This invention achieves an asymmetrical thickness design of the upper and lower copper foil layers, which breaks the electromagnetic field symmetry of the finished product and suppresses common-mode noise propagation from the source. The common-mode noise amplitude in the 60GHz band is reduced by more than 20dB compared with the traditional symmetrical structure, and the signal-to-noise ratio is improved by more than 15%, which greatly enhances the anti-interference ability of high-frequency signal transmission.

[0017] 2. This invention enables the finished product to achieve differential impedance fluctuation of less than ±5% and insertion loss of less than 0.6dB / m in a wide frequency band of 10-60GHz, thus realizing excellent high-frequency signal integrity and meeting the stringent transmission requirements of high-speed interfaces such as 5G / 6G and millimeter-wave radar.

[0018] 3. The finished product prepared by this invention has strong inherent noise suppression capability, which can simplify the design of the external shielding layer, free up more space for high-density wiring, improve the wiring density and design flexibility of the product, and better adapt to the spatial layout requirements of compact devices such as AR / VR.

[0019] 4. This invention is highly compatible with existing FPC production lines, requiring no large-scale equipment modifications, reducing the technical transformation costs and barriers to industrial mass production, and facilitating enterprises to quickly achieve large-scale production.

[0020] 5. High-ductility LCP substrate with elongation ≥30% is selected, and the wiring layout is optimized to avoid the placement of vias in bending areas. The structural strength of the finished product is guaranteed from both the raw material and process dimensions, which greatly improves its reliability in dynamic bending applications and extends the service life of the product. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0022] Figure 1 This is an exploded view of an asymmetric multilayer differential wiring FPC structure. Figure 2 This is a cross-sectional view of an asymmetric stacked differential wiring FPC structure. The numbers in the diagram are explained as follows: 1. Bottom cover layer; 2. Bottom copper foil; 3. Electroplated via; 4. Flexible dielectric layer; 5. Electroplated via in dielectric layer; 6. Signal trace layer; 7. Upper copper foil grounding area; 8. Top cover layer; 9. Top cover layer window. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the present invention or its application or use. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0024] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments of the present invention. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0025] The following detailed description of the fabrication method of the asymmetric stacked differential FPC structure, in conjunction with the structural composition of the present invention, is provided. This embodiment is only used to illustrate the present invention and is not intended to limit the scope of protection of the present invention.

[0026] The asymmetric multilayer differential wiring FPC structure of this invention consists of, from bottom to top, a bottom cover layer 1, a bottom copper foil 2, a flexible dielectric layer 4, an upper copper foil grounding area 7 and a signal trace layer 6, and a top cover layer 8. The structure also includes electroplated vias 3, electroplated vias 5 in the dielectric layer, and a window 9 in the top cover layer. The structural parameters and fabrication processes of each layer are precisely designed to meet the requirements of high-frequency, high-speed signal transmission. The specific fabrication steps are as follows: S1. Select LCP double-sided adhesive-free substrate as the base substrate. The substrate initially includes a bottom copper foil 2, a flexible dielectric layer 4 and an upper copper foil layer. The flexible dielectric layer 4 is an LCP substrate with a dielectric constant of 2.8-3.2 and a dielectric loss factor of <0.002, preferably with a thickness of 35μm, to provide a foundation for subsequent impedance stabilization.

[0027] S2. Using laser drilling technology, blind holes are processed from the bottom copper foil 2 of the substrate towards the flexible dielectric layer 4. The drilling depth is precisely controlled to the upper surface of the flexible dielectric layer 4 to ensure that the upper copper foil layer is not damaged. This blind hole prepares for the subsequent electroplating of the through hole 3, the forming of the dielectric layer electroplating through hole 5, and the interlayer electrical conduction.

[0028] S3. Use dry film to completely cover the upper copper foil layer to avoid contact with the copper plating solution; perform black hole and copper plating operations on the bottom copper foil 2 in sequence, and thicken the original copper foil 2-1 with an initial thickness of 9μm (the thickening layer is 2-2) to 18μm, so that the final thickness of the bottom copper foil 2 is in the design range of 15-25μm; at the same time, copper is uniformly plated on the wall of the blind hole to form the electroplated through hole 3 and the dielectric layer electroplated through hole 5, so as to realize the electrical conduction between the upper copper foil ground area 7 and the bottom copper foil 2, so that the bottom copper foil 2 serves as the main reference ground plane and provides a stable and low-inductance return path for high-frequency signals.

[0029] S4. The upper copper foil layer is patterned by pressing dry film, exposure, and development. Then, the signal trace layer 6 is etched on the upper copper foil layer by etching process. The signal trace layer 6 includes at least one pair of differential signal traces. The trace width is controlled to be 20-40μm and the trace spacing is 15-30μm, preferably 30μm and 25μm. The length difference of the differential signal trace pair is strictly controlled within 0.5mm to minimize signal delay mismatch and meet the target differential impedance requirement of 100Ω.

[0030] S5. Attach a bottom cover layer 1 to the lower surface of the bottom copper foil 2 and a top cover layer 8 to the upper surface of the upper copper foil and signal trace layer 6. Both the bottom cover layer 1 and the top cover layer 8 are composed of LCP and high-frequency pure adhesive, and the thickness is 15-25μm. According to the component soldering and signal trace requirements, a soldering window is opened in the bottom cover layer 1 and a trace connection window is opened in the top cover layer 8. A top cover layer window 9 is reserved to expose the upper copper foil pads for easy subsequent component soldering.

[0031] S6. Press and cure the substrate with the cover layer attached to ensure the bonding strength between the layers and prevent delamination; then perform surface cleaning, anti-oxidation and other surface treatments in sequence; finally, punch the substrate to the design size through the shape punching process to obtain the finished asymmetric laminated differential wiring FPC.

[0032] The FPC prepared using the above-described embodiments has precisely matched parameters of each structural layer, and the asymmetric copper thickness structure effectively breaks the electromagnetic field symmetry. Furthermore, the wiring and via layout are reasonable, enabling excellent signal transmission performance in a wide frequency band of 10-60GHz. It also possesses good mechanical strength and bending reliability, making it suitable for high-frequency and high-speed signal transmission scenarios such as 5G / 6G communication, AR / VR devices, and millimeter-wave radar.

[0033] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A method for fabricating an asymmetric multilayer differential wiring FPC structure, characterized in that, The FPC structure, from bottom to top, includes a bottom cover layer, a bottom copper foil, a flexible dielectric layer, an upper copper foil, a signal trace layer, and a top cover layer. The thickness of the upper copper foil is less than that of the bottom copper foil. The signal trace layer is laid on the upper copper foil and includes at least one pair of differential signal traces. The fabrication method includes: selecting a non-adhesive substrate for laser drilling to create blind holes; layering copper plating on the bottom copper foil to increase its thickness; forming differential signal traces on the upper copper foil through etching; finally, attaching the top cover layer and the bottom cover layer, pressing and curing them, and performing post-processing to form the final shape. By breaking the electromagnetic field symmetry through the asymmetric copper thickness structure, high-frequency common-mode noise suppression is achieved.

2. The method for fabricating an asymmetric multilayer differential wiring FPC structure according to claim 1, characterized in that, The laser drilling process involves processing blind holes from the bottom copper foil towards the flexible dielectric layer. The depth of the blind hole processing is controlled to avoid damaging the upper copper foil, thus providing a basis for subsequent copper plating on the hole wall and electrical conduction.

3. The method for fabricating an asymmetric multilayer differential wiring FPC structure according to claim 1, characterized in that, The specific operation of layering copper plating on the bottom copper foil is as follows: after completely blocking the upper copper foil with dry film, the bottom copper foil is sequentially subjected to black hole and electroplating copper operations, so as to increase the thickness of the bottom copper foil while simultaneously plating copper on the wall of the blind hole.

4. The method for fabricating an asymmetric multilayer differential wiring FPC structure according to claim 1, characterized in that, After thickening, the overall thickness of the bottom copper foil is 15-25μm, which serves as a reference ground plane to provide a low-inductance return path for high-frequency signals.

5. The method for fabricating an asymmetric multilayer differential wiring FPC structure according to claim 1, characterized in that, The specific operation of forming differential signal traces on the upper copper foil through etching process is as follows: the differential signal traces are etched on the upper copper foil by sequentially using the processes of pressing dry film, exposure, development, and chemical etching. The etching process controls the line width, line spacing, and trace length difference.

6. The method for fabricating an asymmetric multilayer differential wiring FPC structure according to claim 5, characterized in that, The differential signal traces have a linewidth of 20-40 μm, a line spacing of 15-30 μm, and a trace length difference controlled within 0.5 mm. Furthermore, the etched differential signal trace layout avoids bending areas.

7. The method for fabricating an asymmetric multilayer differential wiring FPC structure according to claim 1, characterized in that, The flexible dielectric layer is an LCP substrate with a dielectric constant controlled between 2.8 and 3.2, a dielectric loss factor less than 0.002, and a thickness of 25-50 μm. During preparation, a double-sided adhesive-free substrate matching these parameters is directly selected.

8. The method for fabricating an asymmetric multilayer differential wiring FPC structure according to claim 1, characterized in that, The specific operation of attaching the top cover layer and the bottom cover layer is as follows: attaching the bottom cover layer to the lower surface of the bottom copper foil and attaching the top cover layer to the upper copper foil and signal trace layer. Both the bottom cover layer and the top cover layer are made of LCP and high-frequency pure adhesive composite, and the thickness is 15-25μm.

9. The method for fabricating an asymmetric multilayer differential wiring FPC structure according to claim 1, characterized in that, The post-processing molding includes sequentially cleaning and anti-oxidation surface treatment of the substrate after pressing and curing, and then cutting it to the design size through a die-cutting process to obtain the finished product.

10. The method for fabricating an asymmetric multilayer differential wiring FPC structure according to claim 1, characterized in that, The double-sided adhesive-free substrate is made of LCP material with an elongation of ≥30%.

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