Packaging structure and packaging method for implantable brain-machine interface

Abstract

The present disclosure relates to a packaging structure for an implantable brain-machine interface, the packaging structure comprising: a chip for emitting electrical stimulation to a nerve and / or collecting electrical signals from the nerve, wherein the chip has a first face and a second face facing away from the first face, the chip is provided with a first bonding area and a second bonding area on the first face, a plurality of first pads are arranged on the first bonding area, and a plurality of second pads are arranged on the second bonding area; an electrode substrate carrying a flexible electrode, wherein the electrode substrate is arranged on the first face of the chip and covers the first bonding area, the electrode substrate is provided with a plurality of pads on the face facing the chip, and the electrode substrate is bonded with the first pads of the chip through solder with its pads; and a PCB, the chip is fixed on the PCB with its second face, the PCB is provided with a plurality of pads, and the PCB is bonded with the second pads of the chip through flying wires with its pads. The present disclosure also relates to a packaging method for an implantable brain-machine interface.

Description

Technical Field

[0001] This disclosure relates to the field of microelectronic packaging and implantable medical device technology, specifically to a packaging structure and a packaging method for an implantable brain-computer interface. Background Technology

[0002] With the rapid development of materials science, microelectronics, computer science, and neuroscience, implantable brain-computer interface (BCI) technology has become a cutting-edge field in scientific research and clinical medicine. These devices, through a micro-electrode array implanted in the brain, enable the precise acquisition of neural electrical signals or the electrical stimulation of neural clusters. These devices have shown great potential in exploring brain function, treating neurological diseases (such as Parkinson's disease and epilepsy), and reconstructing motor function.

[0003] The core of an implantable device typically includes a computing chip responsible for signal processing, a PCB (printed circuit board) serving as the circuit carrier, and a microelectrode array for signal reading and writing. However, the clinical application of this technology has always faced a key bottleneck: the overall size of the implant. Existing implantable devices are generally too large, which directly leads to increased implantation trauma, a wider range of brain tissue damage, exacerbated inflammatory responses, and a higher risk of long-term rejection, severely limiting their safety and long-term stability.

[0004] The mainstream approach in related technologies is to first package the chip using commercial chip packaging methods (such as quad flat leadless packages or ball grid array packages), then solder the packaged chip onto a PCB, and finally connect the PCB to flexible electrodes via wire bonding or flexible circuitry. However, this approach has the following inherent limitations: First, the packaging volume is large. Specifically, quad flat leadless packages / ball grid array packages themselves include a substrate, pads / solder balls, and a molding compound, the size of which is much larger than the bare chip, resulting in a huge "packaging waste." Second, the three-dimensional structure is cumbersome. Specifically, the chip, PCB, and electrodes are interconnected through multiple soldering or bonding processes, making it difficult to reduce the device's thickness and planar dimensions. Third, the interconnection paths are lengthy. Specifically, lengthy interconnection wires introduce additional parasitic capacitance and resistance, causing attenuation and interference to the quality of high-frequency, weak neural signals.

[0005] Therefore, existing packaging solutions have significant shortcomings in terms of physical space utilization and electrical performance optimization, making it difficult for the final implant volume to meet the clinical requirements of minimally invasive implantation. Thus, developing a new miniaturized packaging solution that achieves high-density, integrated design of the chip, PCB, and electrodes has become a core issue that urgently needs to be addressed to promote the mature application of implantable brain-computer interface technology. Summary of the Invention

[0006] According to a first aspect of this disclosure, a packaging structure for an implantable brain-computer interface is provided, comprising: a chip for emitting electrical stimulation to a nerve and / or acquiring electrical signals from the nerve, wherein the chip has a first side and a second side opposite to the first side, the chip having a first bonding region and a second bonding region on the first side, a plurality of first pads arranged on the first bonding region, and a plurality of second pads arranged on the second bonding region; an electrode substrate carrying flexible electrodes, wherein the electrode substrate is disposed on the first side of the chip and covers the first bonding region, the electrode substrate having a plurality of pads on the side facing the chip, the electrode substrate being bonded to the first pads of the chip by solder; and a PCB, the chip being fixed on the PCB with its second side, the PCB having a plurality of pads, the PCB being bonded to the second pads of the chip by flying wires.

[0007] In some embodiments, the chip is attached to the PCB with its second side bonded by thermally conductive adhesive.

[0008] In some embodiments, the packaging structure further includes a packaging layer configured to encapsulate a circuit module including a chip, an electrode substrate, and a PCB, and a flexible electrode extending from the packaging layer.

[0009] In some embodiments, the packaging structure further includes a packaging housing configured to encapsulate an internal device module including a circuit module and the packaging layer outside the packaging layer, and flexible electrodes extending from the packaging housing.

[0010] In some embodiments, the encapsulation housing is configured in multiple parts and the housing portions of the encapsulation housing are sealed by material locking, such as welding.

[0011] In some embodiments, the material of the encapsulation layer is selected from: epoxy resin encapsulants, phenelzine-based polymers, or biocompatible silicone.

[0012] In some embodiments, the encapsulation housing is formed of a material that is biocompatible, corrosion resistant, and airtight.

[0013] In some embodiments, functional components are also mounted on the PCB, including at least one of electrical components, control chips, and transceiver chips.

[0014] In some embodiments, a battery is also mounted on the PCB, which is used to power the package structure.

[0015] According to a second aspect of this disclosure, a packaging method for an implantable brain-computer interface is provided, comprising the following steps: bonding an electrode substrate carrying flexible electrodes to a chip using solder; fixing the chip on a PCB; and bonding the chip to the PCB using flying wires.

[0016] In some embodiments, the chip is bonded to the PCB using thermally conductive adhesive.

[0017] In some embodiments, the packaging method further includes the step of forming an encapsulation layer on the outside of a circuit module comprising a chip, an electrode substrate, and a PCB using a material, wherein a flexible electrode extends from the encapsulation layer.

[0018] In some embodiments, the packaging method further includes the following steps: placing an internal device module including a circuit module and a packaging layer in a multi-part packaging housing, and sealing each housing portion of the packaging housing with material locking, wherein a flexible electrode extends from the packaging housing.

[0019] In some embodiments, the flexible electrode and each housing portion are preheated at least locally before material locking and sealing.

[0020] In some embodiments, the encapsulation method is used to manufacture an encapsulation structure for an implantable brain-computer interface according to any of the foregoing embodiments.

[0021] Other features and advantages of this disclosure will become clearer from the following detailed description of exemplary embodiments with reference to the accompanying drawings. Attached Figure Description

[0022] The accompanying drawings, which form part of this specification, illustrate embodiments of this disclosure and, together with the specification, serve to explain the principles of this disclosure.

[0023] This disclosure will become clearer with reference to the accompanying drawings and the following detailed description, wherein:

[0024] Figure 1 A schematic exploded view of a packaging structure for an implantable brain-computer interface according to some embodiments of the present disclosure is shown;

[0025] Figure 2 Schematic diagrams showing top and cross-sectional views of an internal device module of a packaging structure for an implantable brain-computer interface according to some embodiments of the present disclosure are shown.

[0026] Figure 3 Schematic diagrams of a circuit module for an implantable brain-computer interface packaging structure according to some embodiments of the present disclosure are shown from top, bottom, side and magnified views.

[0027] Figure 4 A schematic diagram from a perspective view of a circuit module of a packaging structure for an implantable brain-computer interface according to some embodiments of the present disclosure is shown.

[0028] Figure 5A top view schematic diagram of a circuit module of an encapsulation structure for an implantable brain-computer interface according to some embodiments of the present disclosure is shown, wherein the electrode substrate is transparently shown;

[0029] Figure 6 A schematic exploded view of the outer packaging shell of an implantable brain-computer interface packaging structure according to some embodiments of the present disclosure is shown; and

[0030] Figure 7 A schematic flowchart of a packaging method for an implantable brain-computer interface according to some embodiments of the present disclosure is shown.

[0031] Note that in the embodiments described below, the same reference numerals are sometimes used across different figures to denote the same parts or parts having the same function, and repeated descriptions are omitted. In this specification, similar reference numerals and letters are used to denote similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0032] For ease of understanding, the positions, dimensions, and extents of the structures shown in the accompanying drawings and other materials may not represent actual positions, dimensions, and extents. Therefore, the disclosed invention is not limited to the positions, dimensions, and extents disclosed in the accompanying drawings and other materials. Furthermore, the drawings are not necessarily drawn to scale, and some features may be enlarged to show details of specific components. Detailed Implementation

[0033] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of the present disclosure.

[0034] The terms "comprising," "including," or any other variations thereof as used herein are intended to cover a non-exclusive inclusion, such that a process, method, product, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, product, or apparatus. Without further limitation, the presence of other identical or equivalent elements in the process, method, product, or apparatus that includes said elements is not excluded. For example, the use of terms such as "first," "second," etc., to denote names does not indicate any particular order.

[0035] The same or similar parts between the various embodiments of this disclosure can be referred to mutually, and each embodiment focuses on describing the differences from other embodiments. In the description of this disclosure, the reference to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," "exemplary," etc., means that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this disclosure. In this disclosure, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. Furthermore, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this disclosure and the features of the different embodiments or examples.

[0036] Additionally, when used in this disclosure, the terms “here,” “above,” “below,” “below,” “in the following,” “overall,” and similar terms should refer to the entirety of this disclosure and not any particular part thereof. Furthermore, unless expressly stated otherwise or otherwise understood in the context in which they are used, conditional language used herein, such as “may,” “possibly,” “for example,” “like,” etc., is generally intended to express that certain embodiments include, while other embodiments do not, certain features, elements, and / or states. Therefore, such conditional language is not generally intended to imply that one or more embodiments require features, elements, and / or states in any way, or whether such features, elements, and / or states are included or performed in any particular embodiment.

[0037] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit this disclosure or its application or use. Those skilled in the art will understand that they merely illustrate exemplary ways that can be used to implement this disclosure, and are not exhaustive.

[0038] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0039] In order to overcome at least one of the defects of related technologies, such as large overall size of the encapsulation structure, complex structure, and large implantation trauma, this disclosure proposes an encapsulation structure for implantable brain-computer interfaces.

[0040] In some embodiments of this disclosure, such as Figure 1 As shown, the packaging structure for implantable brain-computer interfaces may include an internal device module 1 and an outer packaging shell 2.

[0041] The internal device module 1 carries electronic functions, while the outer encapsulation shell 2 houses the internal device module 1 and provides it with a sealed environment and protection for long-term stable operation within the biological body. Flexible electrodes 103, composed of electrode wires, extend from the outer encapsulation shell 2 to interact with the external environment. The flexible electrodes 103 can be used to interact with neural tissue, collecting or applying electrical signals. In some embodiments, the outer encapsulation shell 2 may be absent or other outer shells may be used; this is not a limitation.

[0042] In some embodiments, such as Figure 2 As shown, the internal device module 1 may include a circuit module 101 and an inner encapsulation layer 102 surrounding it. Flexible electrodes 103 of the circuit module 101 extend from the inner encapsulation layer 102.

[0043] The circuit module 101 can carry electronic functions, and the inner encapsulation layer 102 can provide a sealed environment and protection for the circuit module 101. The inner encapsulation layer 102 and the outer encapsulation housing 2 can advantageously form a double-sealed encapsulation structure together. In some embodiments, the inner encapsulation layer 102 may be absent or other inner encapsulation methods may be used, which is not limited here.

[0044] Figures 3 to 5 The circuit module 101 is schematically shown in different views. Among them, in... Figure 3 In the diagram, (a) is a bottom view of circuit module 101, (b) is a top view of circuit module 101, (c) is a side view of circuit module 101, and (d) is an enlarged view of the circled part of circuit module 101 in (c). Figure 4 This is a top-down perspective view of circuit module 101. Figure 5 This is a top view of the circuit module 101, in which the electrode substrate 1014 is transparently shown to reveal the chip 1015 covered by it.

[0045] In some embodiments, such as Figure 3 , Figure 4 and Figure 5 As shown, the circuit module 101 may include a chip 1015 in the form of a bare die, an electrode substrate 1014 connected to the flexible electrode 103, and a PCB 1011 serving as a circuit carrier substrate. The chip 1015 may be located between the electrode substrate 1014 and the PCB 1011, and the three are stacked on top of each other to form a sandwich structure.

[0046] The electrode substrate 1014 serves as a connection and support component between the flexible electrode 103 and the system circuit. The electrode substrate 1014 is preferably made of silicon and its thickness is typically between 0.3 mm and 1 mm. The electrode substrate 1014 has multiple pads (not shown) on its surface facing the chip 1015. The size of the pads can be designed to be between 0.1 mm and 0.5 mm to accommodate high-density interconnection with the chip 1015.

[0047] Chip 1015 can be used to deliver stimulating currents to nerves or to acquire neural electrical signals, or it can perform both functions; therefore, it can also be called a stimulation and / or acquisition chip. Chip 1015 can be a dedicated stimulation and / or acquisition chip that has undergone wafer-level rewiring processes such as fan-in, and it is integrated directly in its original chip form, that is, a bare chip or die without traditional packaging. The number of channels of chip 1015 can be designed from 32 channels to 20,000 channels, depending on requirements; of course, the number of channels can also be set more or less as needed, without any limitation here.

[0048] See Figure 5 The chip 1015 may have a square first bonding region Z1 and a strip-shaped second bonding region Z2 on its first surface facing the electrode substrate 1014. The first bonding region Z1 is covered by the electrode substrate 1014 and extends centrally over most of the first surface of the chip 1015. In other embodiments, the first bonding region Z1 may also be flush with some edges or corners of the chip 1015, without limitation. The second bonding region Z2 is not covered by the electrode substrate 1014 and extends along the periphery of the first surface of the chip 1015, specifically along its two side edges. A plurality of first pads 1016 are distributed on the first bonding region Z1, and the chip 1015 is flip-chip bonded to corresponding pads on the electrode substrate 1014 using its first pads 1016. A plurality of second pads 1018 are distributed on the second bonding region Z2, and the chip 1015 is wire-bonded to pads on the PCB 1011 using its second pads 1018. In some embodiments, the pad size of the first pad 1016 can be small, for example, with a diameter of 0.1 mm to 0.5 mm. The first pad 1016 can be configured or fabricated with micro bumps for flip-chip bonding with the electrode substrate 1014, while the pad size of the second pad 1018 can be large, for example, 0.5 mm x 0.5 mm, for wire bonding with the PCB 1011.

[0049] Solder can be applied to the first pad 1016 of the chip 1015 or to the pads of the electrode substrate 1014. The solder can be common solders such as solder balls or gold balls. The chip 1015 and the electrode substrate 1014 can be flip-chip bonded with solder, thereby simultaneously completing the mechanical and electrical connection. This achieves a direct, short-path interconnection between the signal chip 1015 and the electrode 103, avoiding the attenuation of the brain-computer interface's tiny signals in long paths.

[0050] like Figure 4 and Figure 5 As shown, PCB 1011 has pads 1019 in areas not covered by chip 1015. Pads 1019 can be located beside (or laterally to) chip 1015 or its second pad 1018. These pads 1019 are used to bond to the second pad 1018 on chip 1015 via flying leads 1017. The flying leads 1017 can be gold wire or other low-resistivity, high-ductility metal wires with a diameter between 0.01 mm and 0.05 mm. The flying leads 1017 enable stable and reliable fine-pitch interconnects for power and low-speed signal transmission.

[0051] In some embodiments, the chip 1015 can be fixed to, or bonded to, the PCB 1011 on its second side facing the PCB 1011 by an adhesive layer 1018. The adhesive layer 1018 can be formed of a thermally conductive adhesive with good thermal conductivity, such as epoxy resin or silicone adhesive filled with ceramic fillers such as alumina. The adhesive layer 1018 can conduct the heat generated by the chip 1015 during operation to the PCB 1011 and dissipate it, improving the long-term reliability of the system, thereby simultaneously achieving mechanical fixation and thermal management. In other embodiments, the chip 1015 can also be fixed to the PCB by other methods such as soldering, and other thermally conductive layers can be used instead of the adhesive layer 1018 between the chip 1015 and the PCB 1011, without limitation.

[0052] like Figures 3 to 5 As shown, the circuit module 101 may also include functional components 1012 mounted on the PCB 1011. These functional components 1012 may include electrical components (such as capacitors, resistors, etc.), control chips (such as microcontrollers), transceiver chips (such as wireless transceiver chips), etc. The functional components 1012 configured as chips can be soldered onto the PCB 1011 using conventional surface mount technology, such as solder balls, gold balls, etc.

[0053] like Figure 3As shown, the circuit module 101 may also include a battery 1013, such as a lithium battery, which may be integrated separately on the other side of the PCB 1011 to power the entire circuit module 101. In some embodiments, the positions of the battery 1013 and the functional element 1012 may be adjusted according to the shape and layout of the PCB 1011 and the chip 1015, and are not limited thereto.

[0054] Back Figure 2 The inner encapsulation layer 102 can be used to encapsulate the circuit module 101, covering the entire surface of the circuit module 101 except for the extended flexible electrodes 103, thereby forming a disk-shaped circuit module 101. The inner encapsulation layer 102 can be formed using different materials and processes. Here, three feasible solutions are provided as examples to ensure reliable internal protection:

[0055] Option 1: Epoxy resin encapsulant can be used, and the mixture can be molded using a vacuum potting process. This material has good electrical insulation and structural strength.

[0056] Option 2: Parylene-type polymer materials can be used to form a uniform, pinhole-free, and transparent coating on the surface of circuit module 101 through chemical vapor deposition. The coating thickness is controllable and has excellent permeability.

[0057] Option 3: Biocompatible silicone can be used, which is formed by precision injection molding or casting process. It has good flexibility and can effectively buffer stress.

[0058] Back Figure 1 The outer casing 2 can be used to externally encapsulate the internal device module 1, providing the outermost layer of physical protection and biological isolation for the internal device module 1. In some embodiments, such as Figure 6 As shown, the outer packaging shell 2 can be constructed in multiple parts, including an upper shell portion 201 and a lower shell portion 202. These parts can be joined by material locking, specifically by welding, to form a hermetically sealed package. The outer packaging shell 2 can be made of a material with biocompatibility, corrosion resistance, and sealing properties, such as polyetheretherketone, polychlorotrifluoroethylene, or other bio-inert medical polymer materials. During the sealing process, the internal device module 1, along with its flexible electrode 103, can be pre-placed between the upper and lower shell portions 201 and 202. Then, the joint area of ​​the upper and lower shell portions 201 and 202 is locally heated to melt and fuse them. After cooling, a robust sealing structure is formed. Preheating the electrode 103 and the shells 201 and 202 helps reduce thermal stress and ensures sealing quality. In other embodiments, the outer packaging shell 2 can also be divided into different shell portions in other ways to adapt to packaging needs; this is not limited here.

[0059] The technical effects achievable in the packaging structure for implantable brain-computer interfaces disclosed herein include, but are not limited to: by directly bonding the chip to the electrode substrate with solder on its first side and bonding it to the PCB with flying wires, and by directly (e.g., by bonding) fixing it to the PCB on its second side, miniaturization of the implantable device can be achieved. This eliminates the traditional packaging structure such as the substrate, lead frame, and molding compound, and eliminates the stacked welding space between components, thereby reducing the ineffective volume from a physical perspective. This allows the final package to be reduced in both thickness and area, thereby reducing the craniotomy area during implantation and reducing the initial trauma and long-term pressure on brain tissue.

[0060] By directly bonding the chip to the electrode substrate with solder, the fidelity of neural signal interaction and system performance can be improved. The signal transmission path can be shortened from multiple paths such as internal lead wires, external solder joints, and PCB traces in the traditional method to a near-direct connection. This can effectively reduce signal attenuation and crosstalk, and provide electrical performance guarantee for collecting weak EEG signals and applying precise stimulation.

[0061] The double-layer protection formed by the inner encapsulation layer and the outer encapsulation shell can enhance the long-term reliability of the implant, block the penetration of body fluids, and delay the corrosion of metal circuits.

[0062] Filling the gap between the chip and the PCB with thermally conductive adhesive can improve thermal management and extend the lifespan of the device.

[0063] According to another aspect of this disclosure, a packaging method for implantable brain-computer interfaces is also provided, such as... Figure 7 As shown, the encapsulation method disclosed herein may include the following steps:

[0064] S1: The electrode substrate 1014 and the chip 1015 are flip-bonded using solder.

[0065] Step S1 may include the following sub-steps:

[0066] S101: Solder is applied to the pads of the electrode substrate 1014 or to the first pad 1016 of the chip 1015.

[0067] S102: Use a high-precision placement device to precisely align the first pad 1016 on the first surface of the chip 1015 with the corresponding pad on the electrode substrate 1014.

[0068] S103: A robust electrical and mechanical connection between chip 1015 and electrode substrate 1014 is achieved through processes such as hot-press reflow soldering, forming a "chip-electrode substrate" sub-assembly.

[0069] S2: Attach and fix chip 1015 to PCB 1011.

[0070] Step S2 may include the following sub-steps:

[0071] S201: Place the “chip-electrode substrate” sub-assemblies completed in step S1 at predetermined positions on PCB1011 with a certain gap between them.

[0072] S202: Apply or print a high thermal conductivity adhesive in the form of glue to the gap between the second side of chip 1015 and PCB 1011.

[0073] Sub-step S202 can be performed before sub-step S201. That is, firstly, highly thermally conductive adhesive is applied or printed on the second side of chip 1015 or at a predetermined position on PCB 1011 to facilitate adhesive application. Then, the "chip-electrode substrate" sub-assembly is placed on the predetermined position on PCB 1011.

[0074] S203: The high thermal conductivity adhesive is cured through a curing process (thermal curing or UV curing) to form an adhesive layer 1018, thereby firmly bonding the chip 1015 to the PCB 1011.

[0075] S3: Connect chip 1015 to the PCB using a flying wire.

[0076] Step S3 may include the following sub-steps:

[0077] S301: Using an automatic gold wire bonding machine, one end of the flying wire 1017 (such as gold wire) is bonded to the second pad 1018 on the first side of the chip 1015, and the other end is bonded to the corresponding pad 1019 on the PCB 1011.

[0078] Step S3 completes the electrical connection of power supply, grounding and control signals between chip 1015 and PCB 1011.

[0079] S4: Encapsulate the circuit module 101 to form an inner encapsulation layer 102.

[0080] Step S4 may include the following sub-steps:

[0081] S401: After all circuit interconnections are completed, the entire circuit module 101 (which also integrates functional components 1012, battery 1013 and other components) is encapsulated in an inner shell to form an inner encapsulation layer 102, thereby forming an internal device module 1.

[0082] In step S4, depending on the material of the inner encapsulation layer 102, the inner encapsulation layer 102 can be formed by vacuum potting, chemical vapor deposition, precision injection molding or casting processes.

[0083] S5: Weld and seal the upper and lower housing parts 201 and 202 with the internal component module 1.

[0084] Step S5 may include the following sub-steps:

[0085] S501: The internally packaged internal device module 1, along with its flexible electrode 103, is placed at a predetermined position in the lower housing portion 202.

[0086] S502: Cover the upper housing portion 201, so that the flexible electrode 103 is clamped at the sealing interface of the upper and lower housing portions 201 and 202.

[0087] S503: The mating surfaces of the upper and lower shell parts 201 and 202 are heated and pressurized through processes such as hot pressing and ultrasonic welding, causing them to melt and fuse together. After cooling, a complete hermetically sealed outer shell 2 is formed. Thus, the packaging of the entire product is finally completed, forming the packaging structure of this disclosure.

[0088] In step S5, an additional sub-step can be set between sub-steps S502 and S503: preheating the flexible electrode 103 and the upper and lower housing parts 201 and 202 to reduce thermal stress and improve sealing quality.

[0089] The encapsulation method for implantable brain-computer interfaces described in the above embodiments can be used to manufacture the encapsulation structure for implantable brain-computer interfaces described in the above embodiments, and achieve the effects of the encapsulation structure for implantable brain-computer interfaces described in the above embodiments.

[0090] The encapsulation structure in the embodiments can itself be configured as an implantable brain-computer interface, which can be implanted into the brain of a human or animal to acquire neural electrical signals and / or electrically stimulate nerves.

[0091] The above description is merely an embodiment of one or more embodiments of this disclosure and is not intended to limit the scope of the one or more embodiments of this disclosure. Various modifications and variations can be made to the one or more embodiments of this disclosure by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the scope of the claims.

Claims

1. A packaging structure for an implantable brain-computer interface, comprising: A chip for emitting electrical stimulation to a nerve and / or acquiring electrical signals from a nerve, wherein the chip has a first side and a second side opposite to the first side, the chip has a first bonding area and a second bonding area on the first side, a plurality of first pads are arranged on the first bonding area, and a plurality of second pads are arranged on the second bonding area. An electrode substrate supporting a flexible electrode is disposed on a first surface of the chip and covers the first bonding area. The electrode substrate has multiple pads on its surface facing the chip, and the electrode substrate is bonded to the first pad of the chip using solder. The chip is fixed on the PCB with its second side. The PCB has multiple pads, and the PCB is bonded to the second pad of the chip via flying wires.

2. The packaging structure according to claim 1, wherein, The chip is fixed to the PCB with its second side bonded by thermally conductive adhesive.

3. The packaging structure according to claim 1 further includes: An encapsulation layer is configured to encapsulate a circuit module including the chip, the electrode substrate, and the PCB, and the flexible electrode extends from the encapsulation layer.

4. The packaging structure according to claim 3 further includes: A package housing configured to encapsulate an internal device module including the circuit module and the package layer outside the package layer, and the flexible electrode extending from the package housing.

5. The packaging structure according to claim 4, wherein, The encapsulation housing is composed of multiple parts, and the various housing parts of the encapsulation housing are sealed by material locking.

6. The packaging structure according to claim 3, wherein, The material of the encapsulation layer is selected from: epoxy resin encapsulants, phenelzine-based polymers, or biocompatible silicone.

7. The packaging structure according to claim 4, wherein, The encapsulation housing is formed of a biocompatible, corrosion-resistant and airtight material.

8. The packaging structure according to claim 1, wherein, Functional components are also mounted on the PCB, including at least one of electrical components, control chips, and transceiver chips.

9. The packaging structure according to claim 1, wherein, A battery is also mounted on the PCB, which is used to power the package structure.

10. A packaging method for implantable brain-computer interfaces, comprising the following steps: The electrode substrate carrying the flexible electrode is bonded to the chip using solder; Fix the chip on the PCB; The chip is bonded to the PCB using flying wires.

11. The packaging method according to claim 10, wherein, The chip is bonded to the PCB using thermally conductive adhesive.

12. The packaging method according to claim 10, further comprising the following steps: A circuit module comprising a chip, an electrode substrate, and a PCB is encapsulated on the outside using a material, wherein the flexible electrode extends from the encapsulation layer.

13. The packaging method according to claim 12, further comprising the following steps: An internal device module, including a circuit module and a packaging layer, is housed in a multi-part packaging housing, and the housing portions of the packaging housing are sealed with materials, wherein the flexible electrode extends from the packaging housing.

14. The packaging method according to claim 13, wherein, Before performing material locking and sealing, at least locally preheat the flexible electrodes and each housing part.

15. The packaging method according to claim 10, wherein, The encapsulation method is used to manufacture an encapsulation structure for an implantable brain-computer interface according to any one of claims 1 to 9.

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