A multi-scale copper sintering paste, a preparation method and application thereof
By using a copper sintering slurry composed of multi-scale copper particles and an organic system, the problems of high thermal conductivity and high temperature resistance in third-generation semiconductor chips have been solved, achieving high-strength and high-conductivity interconnection effects while reducing sintering temperature and cost.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHENZHEN RES INST OF NANKAI UNIV
- Filing Date
- 2025-12-31
- Publication Date
- 2026-06-23
AI Technical Summary
Existing technologies cannot meet the high thermal conductivity and high temperature resistance requirements of third-generation semiconductor chips. Traditional packaging interconnect materials suffer from low connection strength, poor conductivity, and high cost.
A copper sintering slurry composed of multi-scale copper particles and an organic system is used to achieve high thermal conductivity and high electrical conductivity interconnection through a low-temperature densification sintering process. The packing density is increased by using a mixture of nano, submicron and micron particles, and the preparation process is simplified by combining low-cost organic solvents and diluents.
It achieves high-strength, low-cost semiconductor chip interconnection, with high thermal conductivity and electrical conductivity, meeting the high-temperature service requirements of third-generation semiconductor chips, reducing sintering temperature and pressure, and improving connection performance.
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Figure CN122266848A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of electronic packaging interconnect technology, and in particular to a multi-scale copper sintering slurry, its preparation method, and its application. Background Technology
[0002] The rapid development of third-generation semiconductor chips, represented by silicon carbide (SiC) and gallium nitride (GaN) materials, has provided the conditions for significantly improving the power density, conversion efficiency, and maximum allowable operating temperature of power modules, showing very bright application prospects in fields such as electric vehicles, aerospace, 5G communications, military equipment, and power systems. However, at the same time, traditional packaging and interconnect materials and processes, such as conductive silver paste and tin-lead solder, cannot meet the application requirements of third-generation semiconductor power devices for high thermal conductivity (≥100 W / m·K) and high temperature resistance (≥250℃). Therefore, in the field of semiconductor chip interconnect and electronic packaging technology, the development of packaging and interconnect materials and technologies with low-temperature processes, high-temperature operation, and high thermal and electrical conductivity has significant application value.
[0003] In recent years, novel packaging interconnect technologies have been evolving from "brazing" to "sintering," with nano-silver sintered paste and interconnect technology being representative examples. These materials boast melting points exceeding 900℃ and thermal conductivity exceeding 100 W / m·K, representing a 2-3 fold improvement over traditional solder alloys. This has made them one of the preferred high-temperature interconnect materials and technologies for third-generation semiconductor power device packaging. However, nano-silver particles have high surface energy, making them prone to low-temperature agglomeration, leading to decreased connectivity. Furthermore, the higher material cost of nano-silver particles limits their large-scale engineering applications. Additionally, the high reactivity of nano-silver makes it susceptible to electrochemical migration in high-temperature, high-humidity, and salt spray environments, resulting in decreased reliability. Summary of the Invention
[0004] To address the problems of existing technologies, this invention provides a multi-scale co-sintering slurry, its preparation method, and its application. It utilizes the dense packing of multi-scale particles to achieve low-temperature dense sintering interconnection. By using low sintering process parameters, it solves the problems of low interconnection strength, poor thermal and electrical conductivity, inability to withstand high temperatures, and high cost in existing semiconductor chip interconnection technologies.
[0005] The technical solution of the present invention is as follows: In a first aspect, the present invention provides a multi-scale copper sintering slurry composed of 85 wt.% multi-scale copper particles and 15 wt.% organic raw materials, wherein the multi-scale is a mixture of nanoscale, submicron scale and micron scale.
[0006] Furthermore, the smaller-scale particles in the multi-scale copper particles can fill the gaps between the larger-scale particles, thereby increasing the packing density. This invention is based on... Figure 1The diagram shown illustrates the principle of multi-scale particle dense packing. Based on the dense packing model of multi-scale particles, the optimal mix ratio for achieving maximum packing density is calculated. Increasing particle packing density promotes low-temperature dense sintering, thereby improving sintering performance.
[0007] Furthermore, in the multi-scale copper particles, the nanoscale particles have a size of 50 nm and a mass of 50 wt.% of the multi-scale copper particles; the submicron-scale particles have a size of 0.2 μm and a mass of 30 wt.% of the multi-scale copper particles; and the micron-scale particles have a size of 1 μm and a mass of 20 wt.% of the multi-scale copper particles.
[0008] Further, the organic system includes a solvent, a diluent, a dispersant, and a binder. Further, the solvent is acetone, with a content of 15 wt.% of the organic system; the diluent is terpineol, with a content of 50 wt.% of the organic system; the dispersant is terpinene, with a content of 10 wt.% of the organic system; and the binder is polyethylene glycol, with a content of 25 wt.% of the organic system.
[0009] A second aspect of the present invention provides a method for preparing the multi-scale copper sintering slurry, which is simple and as shown in the attached figure. Figure 4 The schematic diagram shown illustrates the steps of a multi-scale copper sintering slurry preparation method. The preparation steps are as follows: S1: First, weigh the organic system; then, put the organic system into a high-speed mixer and stir for 5 minutes at a speed of 1000 r / min to fully dissolve the organic system and obtain a homogeneous organic system. S2: First, weigh out the multi-scale copper particles; second, mix the copper particles with the organic system, put them into a high-speed mixer and stir for 10 minutes at a speed of 1500 r / min to ensure that the slurry is completely and evenly mixed; finally, pour the slurry into a container, seal and store it to obtain the multi-scale sintered slurry product.
[0010] A third aspect of the present invention provides an application of the aforementioned multi-scale copper sintering paste in semiconductor chip packaging interconnects.
[0011] Furthermore, the application supports screen printing or dispensing printing methods for multi-scale copper sintering slurries.
[0012] Furthermore, the application supports both wet and dry chip bonding interconnection processes.
[0013] A fourth aspect of the present invention provides a sintering method using the aforementioned multi-scale copper sintering slurry.
[0014] Based on the multi-scale copper sintering slurry prepared above, it has the advantage of low sintering process parameters. Furthermore, the sintering process can be achieved as follows: the sintering atmosphere is nitrogen, the sintering heating rate is 5℃ / min, the sintering temperature is 220~250℃, the sintering time is 5~10min, and the sintering pressure is 10~20MPa.
[0015] A fifth aspect of the present invention provides a semiconductor chip packaging interconnection method, including a step of sintering using the aforementioned sintering method.
[0016] Further, the method includes coating a multi-scale copper sintering paste on a substrate, then placing the interconnecting material on the multi-scale copper sintering paste, and then sintering it using the aforementioned sintering method.
[0017] Furthermore, the substrate includes a copper-containing substrate.
[0018] Furthermore, the materials to be interconnected include silver-plated chips.
[0019] Furthermore, the coating methods include screen printing or dispensing.
[0020] Furthermore, the silver-plated chips are applied using either wet or dry bonding methods after the multi-scale copper sintering paste is applied.
[0021] Based on the aforementioned multi-scale copper sintering slurry and sintering process, interconnection with metals such as silver and copper can be achieved. This process offers advantages such as low process parameters and high interconnection performance, enabling sintered copper interconnect joints to achieve shear strength ≥90MPa, thermal conductivity ≥300W / m·K, and electrical conductivity ≥1×10⁻⁶. 7 S / m can meet the interconnect performance requirements of semiconductors for high strength, high thermal conductivity, and high electrical conductivity.
[0022] The present invention has the following advantages: (1) The present invention proposes a multi-scale copper sintering slurry, which is composed of multi-scale copper particles and an organic system. The multi-scale components can be a mixture of nanoscale, submicron-scale, and micron-scale components; the smaller-scale copper particles in the multi-scale components can fill the gaps between larger-scale particles, thereby increasing the packing density. The present invention is based on the appendix... Figure 1 The diagram shown illustrates the principle of multi-scale particle dense packing. Based on the multi-scale particle dense packing model, the optimal mix proportions for achieving maximum packing density are calculated. (Based on the attached diagram...) Figure 2 The schematic diagram of the low-temperature densification sintering principle of multi-scale particles shown shows that increasing the particle packing density is beneficial to promoting low-temperature densification sintering, thereby reducing process parameters such as sintering temperature, pressure and time, and improving thermal conductivity, electrical conductivity and mechanical bonding performance. (2) The present invention proposes a multi-scale copper sintering paste, wherein submicron and micron particles are less expensive than nanoparticles; wherein the organic system is selected from common, low-cost, and environmentally friendly organic materials. Furthermore, the proposed multi-scale copper paste has the advantages of low material cost, environmental friendliness, low sintering process parameters, and excellent performance, which can meet the industrial production and manufacturing needs of semiconductor chip interconnect packaging materials; (3) The method for preparing multi-scale copper sintering slurry proposed in this invention uses only common equipment such as balances and mixers, and has the advantages of simple process flow, low operation difficulty and low equipment cost, which can meet the industrial production and manufacturing of semiconductor chip interconnect packaging materials. (4) The multi-scale copper paste and its sintering process proposed in this invention can meet the requirements of low-temperature process and high-temperature service, and has the advantages of low process parameters and high interconnect performance; it can achieve ≥90 MPa, 300 W / m·K and 1×10 7 The S / m connection strength, thermal conductivity, and electrical conductivity can meet the interconnect material and technology requirements of semiconductor chips, especially third-generation semiconductor chips, for high strength, high thermal conductivity, and high electrical conductivity. Attached Figure Description
[0023] Figure 1 This is a schematic diagram of the multi-scale particle dense packing principle used in this invention; Figure 2 This is a schematic diagram of the multi-scale particle low-temperature densification sintering principle used in this invention; Figure 3 This is a schematic diagram of the sintering process parameters used in this invention; Figure 4 This is a schematic diagram of the steps in a multi-scale copper sintering slurry preparation method used in this invention; Figure 5 This is a schematic diagram of the planar microstructure of a multi-scale copper sintering slurry before sintering, as used in this invention. Figure 6 This is a schematic diagram of the planar microstructure of a multi-scale copper sintering slurry after sintering, as used in this invention. Figure 7 This is a schematic diagram of the cross-sectional microstructure of a multi-scale copper sintering slurry after sintering, which is used in this invention. Detailed Implementation
[0024] The present invention will now be described in further detail with reference to the embodiments and accompanying drawings. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of the invention. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention and not all of them.
[0025] Example 1: This embodiment provides a multi-scale copper sintering slurry, which is a 100g nano-submicron-micron three-scale copper sintering slurry composed of 85g of three-scale copper powder particles and 15g of organic system.
[0026] In the 85g of nano-submicron-micron multi-scale mixed copper powder particles, the size of the nano copper particles is 50nm and the mass is 42.5g; the size of the submicron copper particles is 0.2μm and the mass is 25.5g; and the size of the micron copper particles is 1μm and the mass is 17g.
[0027] The 15g organic system includes an organic solvent, a diluent, a dispersant, and a binder. Specifically, the solvent is 2.25g of acetone; the diluent is 7.5g of terpineol; the dispersant is 1.5g of terpinene; and the binder is 3.75g of polyethylene glycol.
[0028] The preparation method of the nano-submicron-micron multi-scale copper sintering slurry, with a mass of 100g, is as follows: Figure 4 As shown, the steps are as follows: S1: First, weigh 2.25g of acetone, 7.5g of terpineol, 1.5g of terpinene, and 3.75g of polyethylene glycol, and mix them to obtain 15g of organic system; then, put the mixed organic system into a high-speed mixer and stir for 5 minutes at a speed of 1000r / min to ensure that all organic systems are fully dissolved and mixed evenly. S2: First, weigh 42.5g of 50nm nano copper powder particles, 25.5g of 0.2μm submicron copper powder particles, and 17g of 1μm micron copper powder particles, and mix them to obtain 85g of multi-scale copper powder particles; second, mix the multi-scale copper powder particles with the organic system, and stir in a high-speed mixer for 15 minutes at a speed of 1500r / min to ensure that the slurry is completely and evenly mixed; finally, pour the slurry into a container, seal it, and store it to obtain 100g of nano-submicron-micron multi-scale copper sintering slurry product.
[0029] Example 2 This embodiment provides a sintering-based interconnection method, including placing a bare copper substrate at the bottom, and screen-printing an 80μm thick nano-submicron-micron multi-scale copper sintering paste onto the bare copper substrate. Then, a silver-plated chip is wet-mounted onto the paste, followed by sintering. The sintering conditions are as follows: Figure 3 The sintering process curve shown is as follows: sintering atmosphere is nitrogen, heating rate is 5℃ / min, sintering temperature is 250℃, sintering time is 5min, and sintering pressure is 20MPa.
[0030] The microstructure of the above-prepared nano-submicron-micron multi-scale copper paste before sintering is as follows: Figure 5 As shown. The microstructure of the sintered planar surface is as follows. Figure 6 As shown, the cross-sectional microstructure after sintering is as follows: Figure 7 As shown, multi-scale copper can achieve dense sintered neck connections between nano-, submicron, and micron particles. Dense interconnections can be achieved between the sintered copper and the top silver-plated copper chip (3mm × 3mm × 0.3mm) and the bottom bare copper substrate (20mm × 20mm × 1mm). The interconnect joints were tested using a multi-functional push-pull force tester (Dage 4000, UK), achieving an average shear strength of 92.5MPa; a thermal conductivity of 329W / m·K using a laser thermal conductivity meter (Netzsch LFA 467, Germany); and an electrical conductivity of 5×10⁻⁶ using the four-terminal resistance method (Keysight B2912B, Malaysia). 7 S / m has good bonding, thermal conductivity and electrical conductivity.
[0031] The above embodiments are preferred embodiments of the present invention, but the embodiments of the present invention are not limited to the above embodiments. Any changes, modifications, substitutions, combinations, or simplifications made without departing from the spirit and principle of the present invention shall be considered equivalent substitutions and shall be included within the protection scope of the present invention.
Claims
1. A multi-scale copper sintering slurry, characterized in that: It consists of raw materials comprising 85 wt.% multi-scale copper particles and 15 wt.% organic system, wherein the multi-scale is a mixture of nanoscale, submicron scale and micron scale.
2. The multi-scale copper sintering slurry according to claim 1, characterized in that: In the multi-scale copper particles, the nanoscale particles have a size of 50 nm and a mass of 50 wt.% of the multi-scale copper particles; the submicron-scale particles have a size of 0.2 μm and a mass of 30 wt.% of the multi-scale copper particles; and the micron-scale particles have a size of 1 μm and a mass of 20 wt.% of the multi-scale copper particles.
3. The multi-scale copper sintering slurry according to claim 1, characterized in that: The organic system includes solvents, diluents, dispersants, and binders.
4. The multi-scale copper sintering slurry according to claim 3, characterized in that: The solvent is acetone, with a content of 15 wt.% of the organic system; the diluent is terpineol, with a content of 50 wt.% of the organic system; the dispersant is terpinene, with a content of 10 wt.% of the organic system; and the binder is polyethylene glycol, with a content of 25 wt.% of the organic system.
5. The method for preparing the multi-scale copper sintering slurry according to any one of claims 1 to 4, characterized in that: The preparation steps are as follows: S1: First, weigh the organic system; then, put the organic system into a high-speed mixer and stir for 5 minutes at a speed of 1500 r / min to fully dissolve the organic system and obtain a homogeneous organic system. S2: First, weigh out the multi-scale copper particles; second, mix the copper particles with the organic system, put them into a high-speed mixer and stir for 10 minutes at a speed of 1500 r / min to ensure that the slurry is completely and evenly mixed; finally, pour the slurry into a container, seal and store it to obtain the multi-scale sintered slurry product.
6. The application of the multi-scale copper sintering paste according to any one of claims 1 to 4 in semiconductor chip packaging interconnects.
7. The application according to claim 6, characterized in that: The application supports screen printing or dispensing printing methods, or supports chip wet mounting or chip dry mounting interconnection processes.
8. A sintering method, characterized in that: Sintering is performed using the multi-scale copper sintering slurry as described in any one of claims 1 to 4.
9. The sintering method according to claim 8, characterized in that: The sintering atmosphere is nitrogen, the sintering heating rate is 5℃ / min, the sintering temperature is 220~250℃, the sintering time is 5~10min, and the sintering pressure is 10~20MPa.
10. A semiconductor chip packaging interconnection method, characterized in that: It includes the step of sintering using the sintering method according to any one of claims 8 to 9.