Semiconductor structure and method of manufacturing the same, image sensor

Abstract

This disclosure provides a semiconductor structure and its fabrication method, as well as an image sensor, relating to the field of image sensor technology, to improve the performance of image sensors. The semiconductor structure includes a substrate, a semiconductor layer, a photoelectric conversion section, a floating diffusion section, and at least one transport section. The semiconductor layer is disposed on the substrate, the photoelectric conversion section is disposed within the semiconductor layer, and the floating diffusion section is disposed within the semiconductor layer and located on one side of the photoelectric conversion section. The transport section is disposed on the side of the photoelectric conversion section or the floating diffusion section away from the substrate. The transport section includes a first sub-section and a second sub-section. The first sub-section is disposed on the side of the photoelectric conversion section or the floating diffusion section away from the substrate, and at least a portion of the second sub-section is disposed between the first sub-section and the photoelectric conversion section or the floating diffusion section. One of the first sub-section and the second sub-section is a P-type semiconductor, and the other is an N-type semiconductor. This semiconductor structure is used in an image sensor.

Description

Technical Field

[0001] This disclosure relates to the field of image sensor technology, and in particular to a semiconductor structure and its fabrication method, and an image sensor. Background Technology

[0002] Image sensors are a crucial component of digital cameras. Based on their components, image sensors can be broadly classified into two categories: CCD (Charge Coupled Device) and CMOS (Complementary Metal-Oxide Semiconductor). CMOS image sensors, with their advantages of small size and low power consumption, are gradually replacing CCD image sensors as the mainstream in the market.

[0003] CMOS image sensors primarily utilize silicon-based photodiodes, transmission gates, floating diffusion regions, and transistors to fabricate pixel arrays. As market demand for smaller pixels in CMOS image sensors continues to increase, the intense charge scattering in silicon-based photodiodes reduces the effective charge available for photoelectric signal conversion, thereby lowering photoelectric conversion efficiency and ultimately degrading the performance of CMOS image sensors. Summary of the Invention

[0004] This disclosure provides a semiconductor structure and its fabrication method, as well as an image sensor, to improve the performance of the image sensor.

[0005] In a first aspect, a semiconductor structure is provided, comprising a substrate, a semiconductor layer, a photoelectric conversion section, a floating diffusion section, and at least one transport section. The semiconductor layer is disposed on the substrate, the photoelectric conversion section is disposed within the semiconductor layer, and the floating diffusion section is disposed within the semiconductor layer and located on one side of the photoelectric conversion section. The transport section is disposed on the side of the photoelectric conversion section or the floating diffusion section away from the substrate. The transport section includes a first sub-section and a second sub-section. The first sub-section is disposed on the side of the photoelectric conversion section or the floating diffusion section away from the substrate, and at least a portion of the second sub-section is disposed between the first sub-section and the photoelectric conversion section or the floating diffusion section. One of the first sub-section and the second sub-section is a P-type semiconductor, and the other is an N-type semiconductor.

[0006] In this configuration, the first and second sub-units form a vertical PN junction, creating a built-in electric field. This field enables photogenerated carriers to migrate efficiently, improving photoelectric conversion efficiency. Specifically, under the same illumination conditions, the effective mobility of photogenerated carriers increases, thus preventing image tailing and enhancing the sensitivity of the image sensor 1000. Simultaneously, the image sensor can capture more light under weaker illumination conditions, generating brighter and clearer images and improving its contrast.

[0007] In some embodiments, the material of the transport section includes a two-dimensional material, which includes a transition metal chalcogenide.

[0008] In some embodiments, the transmission section further includes a Lewis acid layer disposed on the side of the first subsection away from the second subsection.

[0009] In some embodiments, the surface of the semiconductor layer away from the substrate is a first surface, and the surface of the transport portion near the substrate is located on the first surface or the surface of the transport portion away from the substrate is located on the first surface.

[0010] In some embodiments, the surface of the semiconductor layer away from the substrate is a first surface, and the surface of the transport portion away from the substrate is located on the first surface. The transport portion includes a first transport portion and a second transport portion, wherein the first transport portion is located on the side of the photoelectric conversion portion away from the substrate, and the second transport portion is located on the side of the floating diffusion portion away from the substrate.

[0011] In some embodiments, the semiconductor structure further includes a channel portion and a gate layer. The channel portion is disposed between the floating diffusion portion and the photoelectric conversion portion, and both ends of the channel portion are connected to the floating diffusion portion and the photoelectric conversion portion, respectively. The gate layer is located above the channel portion, and the projection of the gate layer on the first surface at least partially overlaps with the projection of the transmission portion on the first surface.

[0012] In a second aspect, an image sensor is provided. The image sensor includes the semiconductor structure described in the first aspect.

[0013] The image sensor described above has the same structure and beneficial technical effects as the semiconductor structure provided in the first aspect, and will not be described in detail here.

[0014] Thirdly, a method for fabricating a semiconductor structure is provided, used to fabricate the semiconductor structure provided in the first aspect. The fabrication method includes:

[0015] A substrate is provided on which a semiconductor layer is formed.

[0016] A photoelectric conversion section and a floating diffusion section are formed within the semiconductor layer, with the floating diffusion section located on one side of the photoelectric conversion section.

[0017] At least one transmission section is formed, the transmission section being disposed on the side of the photoelectric conversion section or the floating diffusion section away from the substrate; the transmission section includes a first sub-section and a second sub-section; the first sub-section is disposed on the side of the photoelectric conversion section or the floating diffusion section away from the substrate; at least a portion of the second sub-section is disposed between the first sub-section and the photoelectric conversion section or the floating diffusion section; one of the first sub-section and the second sub-section is a P-type semiconductor, and the other is an N-type semiconductor.

[0018] In some embodiments, forming at least one transmission unit includes:

[0019] An initial transport section is formed on the semiconductor layer, and the material of the initial transport section includes a two-dimensional material, which includes a transition metal chalcogenide.

[0020] A mask layer is formed on the semiconductor layer, the mask layer having an opening that exposes at least a portion of the initial transport portion.

[0021] Using the mask layer as a mask, a Lewis acid is formed in the opening; under the action of the Lewis acid, in the initial transport section, the side that is in contact with the Lewis acid and is relatively far away from the substrate forms the first sub-section, and the remaining part forms the second sub-section.

[0022] In some embodiments, forming at least one transmission unit includes:

[0023] A trench is formed on the semiconductor layer, and the bottom of the trench exposes the photoelectric conversion part or the floating diffusion part.

[0024] An initial transport section is formed within the trench, and the material of the initial transport section includes a two-dimensional material, which includes a transition metal chalcogenide.

[0025] A mask layer is formed on the semiconductor layer, the mask layer having an opening that exposes at least a portion of the initial transport portion.

[0026] Using the mask layer as a mask, a Lewis acid is formed in the opening; under the action of the Lewis acid, in the initial transport section, the side that is in contact with the Lewis acid and is relatively far away from the substrate forms the first sub-section, and the remaining part forms the second sub-section.

[0027] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and do not limit this application. Attached Figure Description

[0028] To more clearly illustrate the technical solutions in this disclosure, the accompanying drawings used in some embodiments of this disclosure will be briefly described below. Obviously, the drawings described below are only drawings of some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams and are not intended to limit the actual size of the product, the actual process of the method, etc. involved in the embodiments of this disclosure.

[0029] Figure 1 This is a structural diagram of an image sensor according to some embodiments;

[0030] Figure 2 for Figure 1 A sectional view along section line AA;

[0031] Figure 3 for Figure 1 Another sectional view along section line AA;

[0032] Figure 4 for Figure 1 Another sectional view along section line AA;

[0033] Figure 5 for Figure 1 Another sectional view along section line AA;

[0034] Figure 6 This is a flowchart of a method for fabricating a semiconductor structure according to some embodiments;

[0035] Figure 7 This is a flowchart of a method for fabricating another semiconductor structure according to some embodiments;

[0036] Figure 8 This is a flowchart of another method for fabricating a semiconductor structure according to some embodiments. Detailed Implementation

[0037] The technical solutions in some embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments provided in this disclosure are within the scope of protection of this disclosure.

[0038] Unless the context otherwise requires, throughout the specification and claims, the term "comprise" and its other forms, such as the third-person singular "comprises" and the present participle "comprising," are interpreted as open-ended and encompassing, meaning "including, but not limited to." In the description of the specification, terms such as "one embodiment," "some embodiments," "exemplary embodiments," "example," "specific example," or "some examples," etc., are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this disclosure. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned may be included in any suitable manner in any one or more embodiments or examples.

[0039] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more.

[0040] In describing some embodiments, the term "connection" and its derivative expressions may be used. The term "connection" should be interpreted broadly; for example, "connection" can be a mechanical connection or an electrical connection; it can be a fixed connection or a detachable connection, or an integral connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be a connection within two components. Those skilled in the art will understand the specific meaning of the above terms herein based on the specific circumstances.

[0041] "A and / or B" includes the following three combinations: A only, B only, and a combination of A and B.

[0042] As used herein, “parallel,” “perpendicular,” and “equal” include the described situation and situations that are similar to the described situation, within an acceptable range of deviation, which is determined by those skilled in the art taking into account the measurement under discussion and the error associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, “parallel” includes absolute parallelism and approximate parallelism, where an acceptable range of deviation for approximate parallelism may be, for example, within 5°; “perpendicular” includes absolute perpendicularity and approximate perpendicularity, where an acceptable range of deviation for approximate perpendicularity may also be, for example, within 5°; “equal” includes absolute equality and approximate equality, where an acceptable range of deviation for approximate equality may be, for example, a difference between the two equals being less than or equal to 5% of either one.

[0043] In this disclosure, terms such as “down,” “below,” “above,” and “up” are used to explain the relationships between components shown in the accompanying drawings. The terms may be relative concepts and described based on the directions shown in the drawings, or based on the sequence of process steps, but are not limited thereto.

[0044] This document describes exemplary embodiments with reference to cross-sectional views and / or plan views, which are idealized exemplary drawings. In the drawings, the thickness of layers and the area of ​​regions are enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as being limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing processes. For example, etched areas shown as rectangular would typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of the areas of the device, nor are they intended to limit the scope of the exemplary embodiments.

[0045] like Figure 1 and Figure 2 As shown, some embodiments of this disclosure provide an image sensor 1000, including a first semiconductor structure 100 and a second semiconductor structure 200. The first semiconductor structure 100 includes a substrate 10 and an isolation structure 20. The isolation structure 20 is disposed on the substrate 10 and isolates at least one photosensitive area PX on the substrate 10.

[0046] The substrate 10 can be made of a semiconductor material, which can be one or more of silicon, germanium, silicon-germanium compounds, and silicon-carbon compounds. In this embodiment, the substrate 10 is made of silicon. However, the use of silicon as the substrate 10 in this embodiment is for the convenience of those skilled in the art to understand the subsequent formation method and does not constitute a limitation.

[0047] It is understood that multiple photosensitive areas PX can be disposed on the substrate 10, and each photosensitive area PX may include at least one pixel area. A pixel area can be understood as the smallest photosensitive unit in the image sensor 1000. The multiple pixel areas are arranged in multiple rows and columns, with each row including at least two pixel areas arranged along the second direction X, and each column including at least two pixel areas arranged along the third direction Y.

[0048] It should be noted that the second direction X is the row direction of the arrangement of multiple pixel areas, and the third direction Y is the column direction of the arrangement of multiple pixel areas. The second direction X and the third direction Y intersect; for example, the second direction X and the third direction Y are perpendicular.

[0049] In addition, such as Figure 1 and Figure 2 As shown, the first semiconductor structure 100 further includes a semiconductor layer 30, a photoelectric conversion section PD, a floating diffusion section FD, and a channel section GD. The semiconductor layer 30 is disposed on the substrate 10. The photoelectric conversion section PD is disposed within the semiconductor layer 30 and located in the photosensitive region PX. The floating diffusion section FD is disposed within the semiconductor layer 30 and located on one side of the photoelectric conversion section PD. The channel section GD is disposed between the floating diffusion section FD and the photoelectric conversion section PD, and both ends of the channel section GD are connected to the floating diffusion section FD and the photoelectric conversion section PD, respectively.

[0050] The photoelectric conversion element formed by the photoelectric conversion unit PD and the semiconductor layer 30 is the core component of the image sensor 1000. Its main principle is that the incident light excites the photoelectric conversion unit PD with photons, causing the charges in the semiconductor layer 30 to transition and form photogenerated carriers, thus realizing photoelectric conversion. The charges generated by the photoelectric conversion unit PD are transferred to the floating diffuser FD through the channel unit GD. In the floating diffuser FD, these charges are converted into voltage signals and then output.

[0051] In some embodiments, such as Figure 1 and Figure 2 As shown, the first semiconductor structure 100 further includes a gate layer TG and a gate dielectric layer GI. The gate layer TG is disposed on the side of the channel portion GD away from the substrate 10, and the gate dielectric layer GI is disposed between the channel portion GD and the gate layer TG. It can be understood that by applying a voltage to the gate TG, a channel for charge carriers is formed in the portion of the channel portion GD near the gate layer TG, thereby controlling the conduction of the channel portion GD.

[0052] It should be noted that the material of the gate layer TG includes polysilicon containing doped ions, and the material of the gate dielectric layer GI includes silicon dioxide.

[0053] In some embodiments, such as Figure 1 and Figure 2As shown, along the thickness direction of the first semiconductor structure 100, the second semiconductor structure 200 is coupled to the side of the first semiconductor structure 100 away from the substrate 10. The second semiconductor structure 200 includes a plurality of transistors, such as a first transistor, a second transistor, and a third transistor.

[0054] It should be noted that the second semiconductor structure 200 may also be disposed on the same side of the substrate 10 as the first semiconductor structure 100, and this disclosure does not specifically limit the embodiments. The following describes some embodiments of this disclosure by taking as an example that the second semiconductor structure 200 is coupled to the side of the first semiconductor structure 100 away from the substrate 10 along the thickness direction of the first semiconductor structure 100.

[0055] In some examples, such as Figure 1 and Figure 2 As shown, the first transistor can be a reset transistor RX, which periodically resets the potential of the floating diffuser FD to the reference voltage VDD to clear residual charge from the previous signal transmission and avoid interference with new signal transmissions. The second transistor can be a source follower transistor DX, which amplifies the potential changes in the floating diffuser FD and outputs the amplified potential changes to other external circuits Vout. The third transistor can be a select transistor SX, used to control the signal output switch. The select transistor SX is turned on during the selection phase, allowing the signal to be transmitted from pixel area P to the external circuit, ensuring that the signal is output at the correct time and avoiding signal interference between different pixel areas P.

[0056] In some embodiments, such as Figure 1 and Figure 2 As shown, the image sensor 1000 also includes a lens unit 300, which is disposed on the side of the first semiconductor structure 100 away from the second semiconductor structure 200 and corresponds to the photosensitive area PX. The lens unit 300 can cover the photoelectric conversion unit PD in the first semiconductor structure 100, so that light from the external environment is focused onto the photoelectric conversion unit PD, which can further increase the amount of light entering the image sensor 1000, thereby improving the image quality of the image sensor 1000.

[0057] Currently, with the increasing demand for integrated image sensors, the size of the pixel area is constantly decreasing. In the first semiconductor structure made of silicon material, the silicon atoms themselves, as well as impurity atoms and lattice defects, will scatter the movement of photogenerated carriers, resulting in a reduction in the effective mobility of photogenerated carriers that can be used for photoelectric signal conversion, thereby reducing the photoelectric conversion efficiency and ultimately leading to a decline in the performance of the image sensor.

[0058] It should be noted that photoelectric conversion efficiency is an important indicator for measuring the performance of an image sensor. Photoelectric conversion efficiency refers to the efficiency of converting incident light into an electrical signal.

[0059] Based on this, such as Figure 2 , Figure 3 , Figure 4 and Figure 5 As shown, some embodiments of this disclosure provide a semiconductor structure, including the first semiconductor structure 100 of any of the above embodiments. The semiconductor structure 100 further includes at least one transport portion 40, which is disposed on the side of the photoelectric conversion portion PD or the floating diffusion portion FD away from the substrate 10. The transport portion 40 includes a first sub-portion 41 and a second sub-portion 42. The first sub-portion 41 is disposed on the side of the photoelectric conversion portion PD or the floating diffusion portion FD away from the substrate 10, and at least a portion of the second sub-portion 42 is disposed between the first sub-portion 41 and the photoelectric conversion portion PD or the floating diffusion portion FD. One of the first sub-portion 41 and the second sub-portion 42 is a P-type semiconductor, and the other is an N-type semiconductor.

[0060] In this configuration, the first sub-section 41 and the second sub-section 42 form a vertical PN junction, thereby creating a built-in electric field. This allows photogenerated carriers to migrate effectively under the influence of the built-in electric field, thus improving the photoelectric conversion efficiency. Specifically, under the same illumination conditions, the effective mobility of photogenerated carriers increases, preventing image tailing and improving the sensitivity of the image sensor 1000. Simultaneously, the image sensor 1000 can capture more light under weak illumination conditions, generating brighter and clearer images, thus improving the contrast of the image sensor 1000.

[0061] It should be noted that P-type semiconductors are also called hole-type semiconductors, meaning that the hole concentration is much greater than the free electron concentration in an odor semiconductor. N-type semiconductors are also called electron-type semiconductors, meaning that the free electron concentration is much greater than the hole concentration in an odor semiconductor.

[0062] For example, the first sub-part 41 is a P-type semiconductor and the second sub-part 42 is an N-type semiconductor. Alternatively, the first sub-part 41 is an N-type semiconductor and the second sub-part 42 is a P-type semiconductor. The following illustrative description uses the example of the first sub-part 41 being a P-type semiconductor and the second sub-part 42 being an N-type semiconductor, but the application is not limited thereto.

[0063] In some examples, such as Figure 2 and Figure 3As shown, the semiconductor structure 100 includes a transmission section 40 located on the side of the photoelectric conversion section PD away from the substrate 10. A first sub-section 41 is disposed on the side of the photoelectric conversion section PD away from the substrate 10, and at least a portion of a second sub-section 42 is disposed between the first sub-section 41 and the photoelectric conversion section PD. The first sub-section 41 is a P-type semiconductor, and the second sub-section 42 is an N-type semiconductor. In this case, the PN junction formed by the first sub-section 41 and the second sub-section 42 generates a built-in electric field, which allows photogenerated carriers generated in the photoelectric conversion section PD to migrate effectively under the influence of the built-in electric field, thereby improving photoelectric conversion efficiency, reducing reset noise, and preventing charge residue from the previous frame's exposure from affecting the next frame, thus avoiding image trailing and improving the sensitivity of the image sensor 1000. Simultaneously, the image sensor 1000 can capture more light under weak lighting conditions, generating brighter and clearer images, and improving the contrast of the image sensor 1000.

[0064] In some examples, such as Figure 4 As shown, the semiconductor structure 100 includes a transport section 40 located on the side of the floating diffusion section FD away from the substrate 10. A first sub-section 41 is disposed on the side of the floating diffusion section FD away from the substrate 10, and at least a portion of a second sub-section 42 is disposed between the first sub-section 41 and the floating diffusion section FD. One of the first sub-section 41 and the second sub-section 42 is a P-type semiconductor, and the other is an N-type semiconductor. In this case, the PN junction formed by the first sub-section 41 and the second sub-section 42 generates a built-in electric field, causing photogenerated carriers in the photoelectric conversion section PD to transfer more quickly through the channel section GD to the floating diffusion section FD under the influence of the built-in electric field, thereby improving the sensitivity of the image sensor 1000.

[0065] In some examples, such as Figure 5 As shown, the semiconductor structure 100 includes two transmission sections 40, each including a first transmission section 40a and a second transmission section 40b. The first transmission section 40a is located on the side of the photoelectric conversion section PD away from the substrate 10, and the second transmission section 40b is located on the side of the floating diffusion section FD away from the substrate 10. The first transmission section 40a includes a first sub-section 41 and a second sub-section 42. The first sub-section 41 is disposed on the side of the photoelectric conversion section PD away from the substrate 10, and at least a portion of the second sub-section 42 is disposed between the first sub-section 41 and the photoelectric conversion section PD. The first sub-section 41 is a P-type semiconductor, and the second sub-section 42 is an N-type semiconductor. The second transmission section 40b includes a third sub-section 43 and a fourth sub-section 44. The third sub-section 43 is disposed on the side of the floating diffusion section FD away from the substrate 10, and at least a portion of the fourth sub-section 44 is disposed between the first sub-section 41 and the floating diffusion section FD. The third sub-section 43 is a P-type semiconductor, and the fourth sub-section 44 is an N-type semiconductor. This configuration exhibits the same beneficial effects as described in the previous two embodiments, and will not be repeated here.

[0066] In some embodiments, the material of the transmission section 40 includes a two-dimensional material, which includes a transition metal chalcogenide. Exemplarily, the transition metal chalcogenide includes at least one of tungsten disulfide (WS2) and molybdenum disulfide (MoS2). Tungsten disulfide (WS2) and molybdenum disulfide (MoS2) are N-type semiconductors.

[0067] It is understandable that two-dimensional materials have a layered structure, with layers bonded by covalent bonds and interacting with each other by van der Waals forces. This structure is easily obtained as single-layer or few-layer two-dimensional materials through methods such as mechanical exfoliation and liquid-phase exfoliation. Furthermore, due to its smooth surface, it is easily composited with silicon materials via van der Waals forces to form heterostructures, allowing for better integration onto the silicon surface and thus improving photoelectric conversion efficiency. Simultaneously, transition metal chalcogenides (TMCs) exhibit characteristics such as an increasing band gap with decreasing layer count, no dangling bonds on the surface, and no lattice matching limitations. This allows two-dimensional materials to better match different wavelengths of light, achieving absorption over a wider spectral range and thus improving the spectral response range of the image sensor 1000. Moreover, TMCs possess high light absorption coefficients and high carrier mobility, making it easier for incident light to be absorbed and generate photogenerated carriers, increasing the mobility of photogenerated carriers, reducing energy loss, and further improving the photoelectric conversion efficiency of the image sensor 1000.

[0068] In some embodiments, the transport section 40 further includes a Lewis acid layer disposed on the side of the first sub-section 41 away from the second sub-section 42. Exemplarily, the Lewis acid includes at least one of boron trifluoride (BF3), aluminum trichloride (AlCl3), sulfur trioxide (SO3), and dichlorocarbene (CCl2).

[0069] It should be noted that this structure can be prepared by liquid-phase doping of transition metal chalcogenides with Lewis acids. For details, please refer to the preparation method below, which will not be repeated here.

[0070] Understandably, when a Lewis acid comes into contact with a transition metal chalcogenide (LMC), electrons transfer from the semiconductor valence band maximum (VBM) of the LMC to the lowest unoccupied molecular orbital (LUMO) of the Lewis acid. This results in hole accumulation in the region near the interface between the LMC and the Lewis acid, forming a P-type semiconductor, i.e., the first sub-section 41. The region where no electron transfer occurs is the second sub-section 42. Since the electron transfer process only occurs at the interface between the Lewis acid and the LMC, it does not introduce defects or lattice defects, thus facilitating the effective transfer of photogenerated carriers and improving photoelectric conversion efficiency. Simultaneously, after the Lewis acid interacts with the LMC surface, adsorption states are generated on the first sub-section 41. These adsorption states constitute the Lewis acid layer, which can serve as additional light absorption centers, enhancing the absorption efficiency of incident light.

[0071] In some embodiments, such as Figure 2 , Figure 3 , Figure 4 and Figure 5 As shown, the gate layer TG is located above the channel portion GD, and the projection of the gate layer TG on the first surface 31 at least partially overlaps with the projection of the transmission portion 40 on the first surface 31. This effectively controls the migration of photogenerated carriers between the transmission portion 40 and the channel portion GD, thereby improving the photoelectric conversion efficiency. The gate dielectric layer GI is located between the gate layer TG and the channel portion GD, and the gate dielectric layer GI at least covers a portion of the transmission portion 40, thus providing insulation and isolation between the transmission portion 40 and the gate layer TG.

[0072] In some embodiments, such as Figure 2 As shown, the surface of the semiconductor layer 30 furthest from the substrate 10 is the first surface 31, and the surface of the transport portion 40 closest to the substrate 10 is located on the first surface 31. In this case, the transport portion 40 can be directly formed on the semiconductor layer 30 by a deposition process to improve photoelectric conversion efficiency. For details, please refer to the fabrication method described below; further details will not be repeated here.

[0073] In some embodiments, such as Figure 3 and Figure 4 As shown, the surface of the semiconductor layer 30 away from the substrate 10 is the first surface 31, and the surface of the transport portion 40 away from the substrate 10 is located on the first surface 31. In this case, the transport portion 40 can be formed by etching trenches in the semiconductor layer 30 and then deposited within the trenches to improve photoelectric conversion efficiency. For details, please refer to the fabrication method below; further details will not be provided here.

[0074] In some embodiments, such as Figure 5 As shown, the surface of the semiconductor layer 30 away from the substrate 10 is the first surface 31, and the surface of the transmission section 40 away from the substrate 10 is located on the first surface 31. The transmission section 40 includes a first transmission section 40a and a second transmission section 40b. The first transmission section 40a is located on the side of the photoelectric conversion section PD away from the substrate 10, and the second transmission section 40b is located on the side of the floating diffusion section FD away from the substrate 10.

[0075] Some embodiments of this disclosure also provide a method for fabricating a semiconductor structure, such as... Figure 6 As shown, the preparation method includes steps S100 to S300.

[0076] S100: Provide a substrate 10, on which a semiconductor layer 30 is formed.

[0077] In the above steps, a substrate 10 is provided, and a semiconductor layer 30 is formed on the substrate 10 by a deposition process.

[0078] It should be noted that the deposition process includes any one of Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), and Atomic Layer Deposition (ALD).

[0079] S200: A photoelectric conversion section PD and a floating diffusion section FD are formed within the semiconductor layer 30, with the floating diffusion section FD located on one side of the photoelectric conversion section PD.

[0080] In the above steps, ion implantation is performed on the semiconductor layer 30 to form the photoelectric conversion part PD and the floating diffusion part FD, respectively.

[0081] S300: Form at least one transmission unit 40.

[0082] In the above steps, the transmission section 40 is disposed on the side of the photoelectric conversion section PD or the floating diffusion section FD away from the substrate 10. The transmission section 40 includes a first sub-section 41 and a second sub-section 42. The first sub-section 41 is disposed on the side of the photoelectric conversion section PD or the floating diffusion section FD away from the substrate 10, and at least a portion of the second sub-section 42 is disposed between the first sub-section 41 and the photoelectric conversion section PD or the floating diffusion section FD. One of the first sub-section 41 and the second sub-section 42 is a P-type semiconductor, and the other is an N-type semiconductor.

[0083] In some embodiments, such as Figure 7 As shown, in S300, the above preparation method may include S310 to S330.

[0084] S310: An initial transport section is formed on the semiconductor layer 30. The material of the initial transport section includes a two-dimensional material, which includes a transition metal chalcogenide compound.

[0085] In the above steps, an initial transport section is formed on semiconductor 30 by a deposition process.

[0086] S320: A mask layer is formed on the semiconductor layer 30, the mask layer having an opening that exposes at least a portion of the initial transport section.

[0087] In the above steps, the mask layer is, for example, a photoresist layer, which has an opening that exposes at least a portion of the initial transport portion.

[0088] S330: Using the mask layer as a mask, Lewis acid is formed in the opening; under the action of Lewis acid, in the initial transport section, the side that is in contact with Lewis acid and is relatively far away from the substrate 10 forms a first sub-section 41, and the remaining part forms a second sub-section 42.

[0089] In the above steps, using the mask layer as a mask, Lewis acid liquid phase doping is performed on the portion of the initial transport section exposed inside the opening through wet etching (WET).

[0090] In some embodiments, such as Figure 8 As shown, in S300, the above preparation method may also include S410 to S440.

[0091] S410: A trench is formed on the semiconductor layer 30, and the bottom of the trench exposes the photoelectric conversion part PD or the floating diffusion part FD.

[0092] In the above steps, the semiconductor layer 30 is etched to form trenches, and the bottom of the trenches exposes the photoelectric conversion part PD or the floating diffusion part FD.

[0093] S420: An initial transport section is formed in the trench, the material of the initial transport section including a two-dimensional material, the two-dimensional material including a transition metal chalcogenide.

[0094] In the above steps, the initial transport section is formed in the trench through a deposition process.

[0095] S430: A mask layer is formed on the semiconductor layer 30, the mask layer having an opening that exposes at least a portion of the initial transport section.

[0096] In the above steps, the mask layer is, for example, a photoresist layer, which has an opening that exposes at least a portion of the initial transport portion.

[0097] S440: Using the mask layer as a mask, a Lewis acid is formed in the opening; under the action of the Lewis acid, in the initial transport section, the side that is in contact with the Lewis acid and is relatively far away from the substrate 10 forms a first sub-section 41, and the remaining part forms a second sub-section 42.

[0098] In the above steps, using the mask layer as a mask, Lewis acid liquid phase doping is performed on the portion of the initial transport section exposed inside the opening through wet etching (WET).

[0099] In some embodiments, after S300, the above-described preparation method may further include: forming a channel portion GD, a gate layer TG, and a gate dielectric layer GI on the semiconductor layer 30.

[0100] In the above steps, the channel portion GD is disposed between the floating diffuser portion FD and the photoelectric conversion portion PD, and both ends of the channel portion GD are connected to the floating diffuser portion FD and the photoelectric conversion portion PD, respectively. The gate layer TG is located above the channel portion GD, and the projection of the gate layer TG on the first surface 31 at least partially overlaps with the projection of the transmission portion 40 on the first surface 31. The gate dielectric layer GI is located between the gate layer TG and the channel portion GD, and the gate dielectric layer GI at least covers a portion of the transmission portion 40.

[0101] The gate layer TG is made of polysilicon containing doped ions, and the gate dielectric layer GI is made of silicon dioxide.

[0102] Specifically, the semiconductor layer 30 is ion-doped to form the channel portion GD. Then, the gate dielectric layer GI and the gate layer TG are sequentially formed on the photoelectric conversion portion PD through a deposition process.

[0103] In the description of this specification, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0104] The above are merely specific embodiments of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A semiconductor structure, characterized in that, include: Substrate; A semiconductor layer is disposed on the substrate; A photoelectric conversion unit is disposed within the semiconductor layer; A floating diffusion section is disposed within the semiconductor layer and located on one side of the photoelectric conversion section; At least one transmission section is disposed on the side of the photoelectric conversion section or the floating diffusion section away from the substrate; the transmission section includes: The first sub-part is disposed on the side of the photoelectric conversion part or the floating diffusion part away from the substrate; The second sub-section is at least partially disposed between the first sub-section and the photoelectric conversion section or the floating diffusion section; one of the first sub-section and the second sub-section is a P-type semiconductor and the other is an N-type semiconductor.

2. The semiconductor structure according to claim 1, characterized in that, The material of the transmission section includes a two-dimensional material, which includes transition metal chalcogenides.

3. The semiconductor structure according to claim 2, characterized in that, The transmission section further includes a Lewis acid layer disposed on the side of the first subsection away from the second subsection.

4. The semiconductor structure according to claim 1, characterized in that, The surface of the semiconductor layer away from the substrate is the first surface, and the surface of the transmission part near the substrate is located on the first surface or the surface of the transmission part away from the substrate is located on the first surface.

5. The semiconductor structure according to claim 1, characterized in that, The surface of the semiconductor layer away from the substrate is a first surface, and the surface of the transmission portion away from the substrate is located on the first surface; The transmission section includes a first transmission section and a second transmission section. The first transmission section is located on the side of the photoelectric conversion section away from the substrate, and the second transmission section is located on the side of the floating diffusion section away from the substrate.

6. The semiconductor structure according to any one of claims 1 to 5, characterized in that, Also includes: A channel portion is disposed between the floating diffusion portion and the photoelectric conversion portion, and both ends of the channel portion are respectively connected to the floating diffusion portion and the photoelectric conversion portion; A gate layer is located above the channel portion, and the projection of the gate layer on the first surface at least partially overlaps with the projection of the transmission portion on the first surface.

7. An image sensor, characterized in that, Includes the semiconductor structure as described in any one of claims 1 to 6.

8. A method for fabricating a semiconductor structure, characterized in that, For preparing the semiconductor structure as described in any one of claims 1 to 6, comprising: A substrate is provided, on which a semiconductor layer is formed; A photoelectric conversion section and a floating diffusion section are formed within the semiconductor layer, with the floating diffusion section located on one side of the photoelectric conversion section; At least one transmission section is formed, the transmission section being disposed on the side of the photoelectric conversion section or the floating diffusion section away from the substrate; the transmission section includes a first sub-section and a second sub-section; the first sub-section is disposed on the side of the photoelectric conversion section or the floating diffusion section away from the substrate; at least a portion of the second sub-section is disposed between the first sub-section and the photoelectric conversion section or the floating diffusion section; one of the first sub-section and the second sub-section is a P-type semiconductor, and the other is an N-type semiconductor.

9. The method for preparing a semiconductor structure according to claim 8, characterized in that, The formation of at least one transmission unit includes: An initial transport section is formed on the semiconductor layer, and the material of the initial transport section includes a two-dimensional material, the two-dimensional material including a transition metal chalcogenide; A mask layer is formed on the semiconductor layer, the mask layer having an opening that exposes at least a portion of the initial transport portion; Using the mask layer as a mask, a Lewis acid is formed in the opening; under the action of the Lewis acid, in the initial transport section, the side that is in contact with the Lewis acid and is relatively far away from the substrate forms the first sub-section, and the remaining part forms the second sub-section.

10. The method for preparing a semiconductor structure according to claim 8, characterized in that, The formation of at least one transmission unit includes: A trench is formed on the semiconductor layer, and the bottom of the trench exposes the photoelectric conversion part or the floating diffusion part; An initial transport section is formed within the trench, and the material of the initial transport section includes a two-dimensional material, which includes a transition metal chalcogenide compound. A mask layer is formed on the semiconductor layer, the mask layer having an opening that exposes at least a portion of the initial transport portion; Using the mask layer as a mask, a Lewis acid is formed in the opening; under the action of the Lewis acid, in the initial transport section, the side that is in contact with the Lewis acid and is relatively far away from the substrate forms the first sub-section, and the remaining part forms the second sub-section.

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