Phase shifter with integrated electro-optic material layer
By designing a three-layer electro-optic material and dielectric material, combined with photolithography and etching processes, the problem of insufficient modulation phase efficiency and accuracy of existing phase shifters in photonic integrated circuits has been solved, achieving efficient phase control and high-speed modulation.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- GLOBALFOUNDRIES US INC
- Filing Date
- 2025-11-24
- Publication Date
- 2026-06-26
AI Technical Summary
There is room for improvement in existing phase shifter structures and their formation methods, especially in terms of the efficiency and accuracy of modulating optical phase in photonic integrated circuits.
It adopts a three-layer structure, in which the first and second layers are electro-optic materials, and the third layer is an electrically insulating dielectric material. The waveguide core is located on a part of the first layer. A specific pattern is formed by photolithography and etching processes, combined with wafer bonding process, to achieve efficient modulation of optical phase.
It improves the modulation efficiency and phase control accuracy of phase shifters in photonic integrated circuits, supports high-speed optical power modulation and phase difference generation, and is suitable for Mach-Zehnder interferometer modulators and ring modulators.
Smart Images

Figure CN122284151A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to photonic chips, and more specifically, to a phase shifter structure and a method for forming the same. Background Technology
[0002] Photonic chips are used in many applications and systems, including but not limited to data center communication systems and data computing systems. Photonic chips include photonic integrated circuits that include photonic components such as modulators, polarizers, and couplers, which are used to manipulate light received from light sources such as lasers or optical fibers.
[0003] A phase shifter is a photonic component used in photonic integrated circuits to modulate the phase of light propagating in a waveguide core. Operating via an electro-optic mechanism, a phase shifter controls the phase of light by changing the effective refractive index of the waveguide core.
[0004] The phase shifter structure and its formation method need improvement. Summary of the Invention
[0005] In one embodiment of the present invention, a structure for a phase shifter is provided. The structure includes a first layer, a second layer, and a third layer. The first layer includes a first electro-optic material, the second layer includes a second electro-optic material, and the third layer is located between the first and second layers. The third layer includes a dielectric material that is electrically insulated. A waveguide core is located on a portion of the first layer.
[0006] In one embodiment of the present invention, a method for forming a structure for a phase shifter is provided. The method includes forming a first layer comprising a first electro-optic material, forming a second layer comprising a second electro-optic material, and forming a third layer comprising a dielectric material that is an electrical insulator. The third layer is located between the first layer and the second layer. The method further includes forming a waveguide core located on a portion of the first layer. Attached Figure Description
[0007] The accompanying drawings, which are incorporated herein by reference as part of this specification, illustrate various embodiments of the invention and, together with the foregoing general description of the invention and the following detailed description of the embodiments, serve to explain the embodiments of the invention. In the drawings, the same reference numerals denote the same features in the various views.
[0008] Figure 1 This is a cross-sectional view of the structure of the initial manufacturing stage of the processing method according to an embodiment of the present invention.
[0009] Figure 2 yes Figure 1 A cross-sectional view of the structure during the manufacturing stage of the subsequent processing method.
[0010] Figure 3This is a top view of the structure according to an alternative embodiment of the present invention.
[0011] Figure 3A It is along Figure 3 The cross-sectional view taken from line 3A-3A in the diagram.
[0012] Figure 4 This is a top view of the structure according to an alternative embodiment of the present invention.
[0013] Figure 4A It is along Figure 4 The cross-sectional view taken from line 4A-4A in the diagram.
[0014] Figure 5 This is a cross-sectional view of the structure according to an alternative embodiment of the present invention.
[0015] Figure 6 This is a cross-sectional view of the structure according to an alternative embodiment of the present invention. Detailed Implementation
[0016] refer to Figure 1 According to embodiments of the present invention, structure 10 includes a substrate 12 and layers 14, 16, 18, and 20, which are arranged in a stacked manner on and cover the substrate 12. In one embodiment, layer 20 and substrate 12 may comprise a wide-bandgap semiconductor material (such as silicon carbide). In an alternative embodiment, layer 20 and / or substrate 12 may comprise different materials (such as silicon or silicon nitride). In an alternative embodiment, layer 20 and / or substrate 12 may comprise a III-V compound semiconductor material (such as gallium nitride).
[0017] Layers 14 and 18 may comprise materials that exhibit tunable or dynamic photonic properties in response to an applied stimulus, such as an electric field. In one embodiment, the materials constituting layers 14 and 18 may be electro-optic materials exhibiting an electric field-induced Pockels effect, wherein the refractive index varies proportionally with the intensity of the applied stimulus, such as an electric field, according to a characteristic electro-optic coefficient. In one embodiment, layers 14 and 18 may comprise crystalline materials lacking inversion symmetry, characterized by having an optical axis whose refractive index can be controlled by an applied electric field. In one embodiment, layers 14 and 18 may comprise the same electro-optic material. In one embodiment, layers 14 and 18 may comprise different electro-optic materials.
[0018] In one embodiment, the electro-optic material can be a two-dimensional material. In one embodiment, the two-dimensional material can be graphene, which can be formed by a sublimation process. In an alternative embodiment, the two-dimensional material can be a transition metal dichalcogenide, which includes transition metals such as molybdenum or tungsten and chalcogen elements such as sulfur, selenium, or tellurium. Representative transition metal dichalcogenides may include, but are not limited to, tungsten disulfide, molybdenum disulfide, hafnium disulfide, zirconium disulfide, tin sulfide, and tungsten diselenide.
[0019] In alternative embodiments, the electro-optic material may be lithium niobate, lithium tantalate, magnesium oxide-doped lithium niobate, or barium titanate. In alternative embodiments, the electro-optic material may be a binary or ternary III-V compound semiconductor material, such as gallium nitride, indium gallium nitride, indium phosphide, indium gallium arsenide, gallium arsenide, indium arsenide, or indium gallium phosphide. In alternative embodiments, the electro-optic material may be an electro-optic polymer. In alternative embodiments, the electro-optic material may be a phase change material.
[0020] In one embodiment, layer 16 may include a dielectric material as an electrical insulator. In one embodiment, layer 16 may include aluminum oxide. In an alternative embodiment, layer 16 may include silicon dioxide, hafnium oxide, or hexagonal boron nitride. In an alternative embodiment, a molecular crystal seeding layer for improving interface quality may be provided between layer 14 and layer 16 and / or between layer 16 and layer 18.
[0021] In one embodiment, the formation of structure 10 may include a wafer bonding process. Layers 14 and 18 have a set of principal dimensions (such as length and width) that may be significantly larger than their respective thicknesses. In one embodiment, layers 14 and 18 may each comprise a single atomic monolayer arranged in a sheet-like manner. In one embodiment, the sheets constituting layers 14 and 18 may each comprise about one to about three atomic monolayers. In one embodiment, the thickness of layers 14 and 18 may be less than about 10 nanometers.
[0022] refer to Figure 2 The same reference numerals in the figures indicate the same as those in the figures below. Figure 1 The same characteristics are present in layer 20 during subsequent manufacturing stages. Figure 1The waveguide core 22 can be patterned using photolithography and etching processes. In one embodiment, the patterning of layer 20 can be performed by the following steps: forming an etching mask using photolithography, and then removing segments not covered by the mask using etching. Layers 16 and 18 can be patterned using photolithography and etching processes. In one embodiment, the patterning of layers 16 and 18 can be performed by the following steps: forming an etching mask using photolithography, and then removing segments not covered by the mask using etching. Layers 16 and 18 may have stacked segments located between the waveguide core 22 and layer 14, and layers 16 and 18 may have stacked segments that laterally protrude from the segments of layers 16 and 18 below the waveguide core 22.
[0023] Layer 14 can be patterned using photolithography and etching processes after layers 16, 18, and 20 have been patterned. In one embodiment, the patterning of layer 14 can be performed by the following steps: forming an etching mask using a photolithography process, and then removing the sections not covered by the mask using an etching process. Layer 14 may have sections located below the sections of layers 16 and 18. Layer 14 may have sections that laterally protrude from the sections below the sections of layers 16 and 18.
[0024] Spacer 24 may be formed near the sidewall of waveguide core 22. Spacer 24 may contact protruding sections of layer 14. Spacer 24 may include a dielectric material (such as silicon dioxide) as an electrical insulator, and may be formed by depositing a conformal layer of dielectric material and anisotropically etching the conformal layer using a reactive ion etching process.
[0025] Contact element 26 can form a laterally protruding section of contact layer 14, and contact element 28 can form a section of contact layer 18 not covered by waveguide core 22. Spacer 24 can be laterally positioned between contact element 26 and layer 18. Modulation of light transmitted in waveguide core 22 can be achieved by applying a modulated electrical signal to layer 14 through contact element 26 and stimulating layer 18 through contact element 28.
[0026] Layers 14, 16, and 18 are located vertically between waveguide core 22 and substrate 12. From a vertical perspective, the cross-sectional area of patterned layer 14 can be larger than the cross-sectional area of patterned layer 16, and also larger than the cross-sectional area of patterned layer 18. From a vertical perspective, the cross-sectional area of waveguide core 22 can be smaller than the cross-sectional area of any of the patterned layers 14, 16, and 18.
[0027] In one embodiment, structure 10 can be deployed as a phase shifter in a photonic integrated circuit. In one embodiment, structure 10 can be deployed as a phase shifter in an arm of a Mach-Zehnder interference modulator. In one embodiment, structure 10 can be deployed as a phase shifter in a ring modulator. In one embodiment, structure 10 can be deployed as a phase shifter in an arm of a ring-assisted Mach-Zehnder interference modulator.
[0028] The electro-optic materials of layers 16 and 20 can achieve high-speed modulation of optical power through characteristics such as third-order nonlinearity and high-mobility electron-hole concentration. Additional photonic components incorporating the electro-optic materials of layers 16 and 20 can be formed using large-area-formed layers 14, 16, and 18. The electro-optic materials of layers 16 and 20 can support highly restricted optical modes due to factors such as the refractive index contrast with the waveguide core 22 material. The wide-bandgap semiconductor material of waveguide core 22 can exhibit significantly greater second-order nonlinearity than other materials (such as silicon), which can help enhance the optical field.
[0029] refer to Figure 3 , Figure 3A According to an alternative embodiment, the Mach-Zehnder interferometer modulator 30 may include an input optical coupler 34, an output optical coupler 36, and arms 38, 40 in the form of waveguide cores, the arms 38, 40 being routed separately from the input optical coupler 34 to the output optical coupler 36. The arms 38, 40 of the Mach-Zehnder interferometer modulator 30 extend between the optical couplers 34, 36, and in a representative embodiment, the optical couplers 34, 36 are directional optical couplers. A waveguide core 33 is coupled to the input optical coupler 34, and a waveguide core 35 is coupled to the output optical coupler 36. In one embodiment, an example of a phase shifter embodied in structure 10 may be included in a portion of the waveguide core representing one arm 38 of the Mach-Zehnder interferometer modulator 30. In one embodiment, an example of a phase shifter embodied in structure 10 may be included in a portion of the waveguide core representing the other arm 40 of the Mach-Zehnder interferometer modulator 30.
[0030] A phase shifter can be used to create a phase difference between light transmitted in arm 38 of the Mach-Zehnder interferometer modulator 30 and light transmitted in arm 40 of the Mach-Zehnder interferometer modulator 30 to generate modulated light emitted from the output optical coupler 36 of the Mach-Zehnder interferometer modulator 30. For example, modulated electrical signals can be applied to one or both of the electro-optic materials of layers 16 and 20 or the phase shifters via contacts 26 and 28 to generate modulated light. In an alternative embodiment, a sealed undercut can be formed beneath one or both instances of the phase shifters included in the Mach-Zehnder interferometer modulator 30.
[0031] The Mach-Zehnder interferometer modulator 30 can be integrated with a monolithic platform having a complete back-end-of-linestack. The Mach-Zehnder interferometer modulator 30 can also be integrated with complementary metal-oxide-semiconductor devices for RF and logic applications.
[0032] refer to Figure 4 , Figure 4A According to an alternative embodiment, structure 10 may be embodied in ring resonator 42. In one embodiment, ring resonator 42 may have a circular closed shape. A portion of bus waveguide core 44 is located near a portion of ring resonator 42. The portion of bus waveguide core 44 participates in optical coupling with the portion of ring resonator 42. In this respect, light can couple across the gap between ring resonator 42 and bus waveguide core 44.
[0033] In a representative embodiment, the bus waveguide core 44 may include a straight portion adjacent to the curved portion of the ring resonator 42. In an alternative embodiment, the bus waveguide core 44 may include a curved portion adjacent to the curved portion of the ring resonator 42. In an alternative embodiment, the ring resonator 42 may be elliptical or racetrack-shaped, wherein the straight side portion of the ring resonator 42 is located near the straight portion of the bus waveguide core 44.
[0034] The phase shifter embodied in structure 10 can be used to tune the resonance condition of the ring resonator.
[0035] refer to Figure 5 According to an alternative embodiment, substrate 12 can be bonded to semiconductor substrate 52 via dielectric layer 50. In one embodiment, dielectric layer 50 can be a buried insulating layer of silicon-on-insulator substrate. In one embodiment, dielectric layer 50 can include a dielectric material (such as silicon dioxide), and semiconductor substrate 52 can include a semiconductor material (such as single-crystal silicon).
[0036] refer to Figure 6 According to an alternative embodiment, layers 46 and 48 may be added to a layer stack including layers 14, 16, and 18. In one embodiment, layer 46 may comprise the same material as layer 18. In one embodiment, layer 48 may comprise the same electro-optic material as layers 16 and 20. In one embodiment, layer 48 may comprise an electro-optic material different from layers 16 and 20. In one embodiment, layer 46 may comprise the same dielectric material as layer 18. In one embodiment, layer 46 may comprise a dielectric material different from layer 18.
[0037] Layer 46 may be located between layers 18 and 48 in a layer stack, and layer 48 may be located between layers 16 and 46 in a layer stack. In one embodiment, layers 14, 16, 18 and layers 46, 48 may have uniform pitch and uniform thickness to represent a layer stack with a periodic arrangement. In an alternative embodiment, layers 14, 16, 18 and layers 46, 48 may have non-uniform pitch and / or non-uniform thickness to represent a layer stack with a non-periodic arrangement.
[0038] The methods described above are used to manufacture integrated circuit chips. The resulting integrated circuit chips can be distributed by the manufacturer in raw wafer form (such as a single wafer with multiple unpackaged chips), bare die form, or packaged form. The chips can be integrated with other chips, discrete circuit elements, and / or other signal processing devices as part of an intermediate or final product. The final product can be any product that includes the integrated circuit chip, such as a computer product with a central processing unit or a smartphone.
[0039] References to terms modified by approximate language (such as “about,” “approximate,” and “substantially”) herein are not limited to the specified exact values or exact conditions. In embodiments, approximate language may represent a range of ±10% of the value and / or the condition.
[0040] The use of terms such as “vertical” and “horizontal” in this document is for illustrative purposes rather than restrictive in establishing the reference frame. As used herein, the term “horizontal” is defined as a plane parallel to the conventional plane of the semiconductor substrate, regardless of its actual three-dimensional orientation. The terms “vertical” and “normal” refer to directions or planes within the reference frame that are perpendicular to the horizontal plane as defined above. The term “lateral” refers to a direction within the horizontal plane within the reference frame.
[0041] A feature being "connected" or "coupled" to or with another feature can be a direct connection or coupling to the other feature, or conversely, one or more intermediate features may exist. If no intermediate features exist, a feature can be "directly connected" or "directly coupled" to another feature. If at least one intermediate feature exists, a feature can be "indirectly connected" or "indirectly coupled" to another feature. A feature being "on" or "in contact" with another feature can be directly on or in contact with the other feature, or conversely, one or more intermediate features may exist. If no intermediate features exist, a feature can be "directly on" or "in direct contact" with another feature. If at least one intermediate feature exists, a feature can be "indirectly on" or "indirectly in contact" with the other feature. Different features can "overlap" if one feature extends beyond another feature and covers a portion of it. A feature can "cover" another feature if it is positioned "above" it.
[0042] The description of various embodiments of the invention is presented for illustrative purposes and is not intended to be exhaustive or to limit the invention to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is intended to best explain the principles of the embodiments, their practical application, or technical improvements to technologies found in the market, or to enable those skilled in the art to understand the disclosed embodiments.
Claims
1. A structure for a phase shifter, characterized in that, The structure includes: The first layer includes the first electro-optical material; The second layer includes a second electro-optic material; A third layer, located between the first and second layers, the third layer comprising a first dielectric material that is an electrical insulator; and The first waveguide core is located on the first part of the first layer.
2. The structure according to claim 1, characterized in that, Also includes: The first contact element is coupled to the second part of the first layer.
3. The structure according to claim 2, characterized in that, The second portion of the first layer protrudes laterally from the first portion of the first layer.
4. The structure according to claim 2, characterized in that, The first layer and the third layer are located on a first portion of the second layer, the second layer including a second portion that protrudes laterally from the first portion of the second layer, and further including: The second contact is coupled to the second portion of the second layer.
5. The structure according to claim 4, characterized in that, Also includes: A spacer, laterally positioned between the second contact and the first layer, the spacer comprising a second dielectric material that is an electrical insulator.
6. The structure according to claim 1, characterized in that, The first layer and the third layer are located on a first portion of the second layer, the second layer including a second portion that protrudes laterally from the first portion of the second layer, and further including: The contact element is coupled to the second portion of the second layer.
7. The structure according to claim 1, characterized in that, The first electro-optic material and the second electro-optic material include two-dimensional materials.
8. The structure according to claim 1, characterized in that, The first electro-optic material and the second electro-optic material include graphene.
9. The structure according to claim 1, characterized in that, The first electro-optic material and the second electro-optic material include lithium niobate, lithium tantalate, lithium niobate doped with magnesium oxide, or barium titanate.
10. The structure according to claim 1, characterized in that, The first dielectric material includes aluminum oxide.
11. The structure according to claim 1, characterized in that, Also includes: The fourth layer includes the third electro-optical material; as well as The fifth layer, located between the second and fourth layers, includes a second dielectric material.
12. The structure according to claim 11, characterized in that, The first layer, the second layer, the third layer, the fourth layer, and the fifth layer are arranged periodically.
13. The structure according to claim 11, characterized in that, The first electro-optic material, the second electro-optic material, and the third electro-optic material include graphene, and the first dielectric material and the second dielectric material include aluminum oxide.
14. The structure according to claim 1, characterized in that, Also includes: First optical coupler; as well as Second optical coupler; The first waveguide core extends from the first optical coupler to the second optical coupler.
15. The structure according to claim 14, characterized in that, Also includes: The second waveguide core extends from the first optical coupler to the second optical coupler.
16. The structure according to claim 15, characterized in that, Also includes: The fourth layer includes the third electro-optical material; The fifth layer includes the fourth electro-optical material; as well as A sixth layer, located between the fourth and fifth layers, comprises a second dielectric material that is an electrical insulator. The second waveguide core is located on a portion of the fourth first layer.
17. The structure according to claim 16, characterized in that, The first electro-optic material, the second electro-optic material, the third electro-optic material, and the fourth electro-optic material include graphene, and the first dielectric material and the second dielectric material include aluminum oxide.
18. The structure according to claim 15, characterized in that, The first waveguide core is the first arm of the Mach-Zehnder interferometer modulator, and the second waveguide core is the second arm of the Mach-Zehnder interferometer modulator.
19. The structure according to claim 1, characterized in that, The first layer, the second layer, the third layer, and the first waveguide core have a closed shape representing a ring resonator.
20. A method for forming a structure for a phase shifter, characterized in that, The method includes: Forming a first layer comprising a first electro-optic material; Forming a second layer comprising a second electro-optic material; Forming a third layer of dielectric material comprising an electrical insulator, wherein the third layer is located between the first layer and the second layer; and A waveguide core is formed on a portion of the first layer.