A high-performance vehicle chip design method, multi-domain fusion chip architecture and vehicle

Abstract

This invention discloses a high-performance automotive-grade chip design method, a multi-domain fusion chip architecture, and a vehicle. Based on the functional requirements of the target vehicle, this invention divides the design into multiple independent functional control modules; integrates these multiple functional control modules into a single high-performance system-on-a-chip (SoC); establishes a sharing mechanism within the SoC for real-time data exchange between the multiple functional control modules; and uses a pre-defined packaging process to manufacture and package the designed chip, forming an automotive-grade chip product. This achieves centralized computing power and reduces overall size and weight, as well as the number of operating system maintenance requirements and application software splitting, through integration.

Description

Technical Field

[0001] This invention relates to the field of automotive technology, specifically a high-performance automotive-grade chip design method, a multi-domain fusion chip architecture, and a vehicle. Background Technology

[0002] Currently, most intelligent vehicles adopt a domain controller-based electronic and electrical architecture. Compared to traditional distributed architectures, this architecture has achieved significant progress in areas such as autonomous driving and artificial intelligence. However, limited by the computing power of current chips, existing systems still struggle to meet the requirements for high computing power, real-time interactive response, and high communication bandwidth, thus failing to fully meet the computing power and performance requirements of fully autonomous driving. Summary of the Invention

[0003] This invention aims to at least solve one of the technical problems existing in the prior art. To this end, this invention provides a high-performance automotive-grade chip design method, a multi-domain fusion chip architecture, and a vehicle, which can significantly improve the computing power of the controller while reducing the development cost of the domain controller.

[0004] A high-performance automotive-grade chip design method according to a first aspect of an embodiment of the present invention includes: Based on the functional requirements of the target vehicle, multiple independent functional control modules are defined. The multiple functional control modules are architecturally integrated and incorporated into a single high-performance system-on-a-chip. Within the system-on-a-chip, a sharing mechanism is established for real-time data exchange between the multiple functional control modules; Using a pre-defined packaging process, the designed chip is manufactured and packaged to form an automotive-grade chip product.

[0005] The high-performance automotive-grade chip design method according to embodiments of the present invention has at least the following beneficial effects: This invention divides vehicle functions into multiple functional control modules, integrates them into a single high-performance chip, and achieves centralized computing power. Hardware integration is completed through a pre-defined packaging process, supporting data sharing between multiple modules. This design effectively reduces the overall system size and weight, and facilitates the development and maintenance of application software and operating systems.

[0006] According to some embodiments of the present invention, the multiple functional control modules include: a high-speed assisted driving control module, a vehicle dynamic control module, an intelligent cruise control module, and a cornering stability control module.

[0007] According to some embodiments of the present invention, the high-speed assisted driving control module is used to perform adaptive cruise control, lane centering, automatic lane change assist, automatic overtaking, and automatic entry / exit of ramps based on navigation paths.

[0008] According to some embodiments of the present invention, the vehicle dynamic control module is used to determine whether the actual driving trajectory of the vehicle is consistent with the driver's intention based on steering wheel angle, yaw rate and wheel speed information; and when understeering or oversteering is determined to occur, the vehicle returns to the expected trajectory by applying braking to one or more wheels and adjusting engine torque.

[0009] According to some embodiments of the present invention, the intelligent cruise control module is used to realize the automatic following function, including accelerating, decelerating or stopping with the vehicle in front.

[0010] According to some embodiments of the present invention, the cornering stability control module is used to monitor the vehicle status during the vehicle's cornering process; when it is predicted that there is a risk of understeer or sideslip, it applies braking to the inner wheel to generate a yaw moment to assist the vehicle in smoothly cornering.

[0011] According to a second aspect of the present invention, a multi-domain fusion chip architecture is designed using the aforementioned high-performance automotive-grade chip design method.

[0012] According to some embodiments of the present invention, the multi-domain fusion chip architecture includes a main controller, which integrates multiple functional control modules.

[0013] According to some embodiments of the present invention, the plurality of said functional control modules include: a high-speed assisted driving control module, a vehicle dynamic control module, an intelligent cruise control module, and a cornering stability control module.

[0014] A vehicle according to a third aspect of an embodiment of the present invention is characterized by comprising a multi-domain fusion chip architecture as described in any one of claims 7 to 9.

[0015] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. Attached Figure Description

[0016] The present invention will be further described below with reference to the accompanying drawings and embodiments, wherein: Figure 1 This is a flowchart of the high-performance automotive-grade chip design method of the present invention; Figure 2 This is a schematic diagram of the multi-domain fusion chip architecture of the present invention. Detailed Implementation

[0017] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0018] In the description of this invention, it should be understood that the orientation descriptions, such as up, down, etc., are based on the orientation or positional relationship shown in the drawings and are only for the convenience of describing this invention and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this invention.

[0019] In the description of this invention, "multiple" refers to two or more. The use of "first" and "second" is for distinguishing technical features only and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features or their sequential relationship.

[0020] In the description of this invention, unless otherwise explicitly defined, terms such as "set up," "install," and "connect" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this invention in conjunction with the specific content of the technical solution.

[0021] The technical solution of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described below are some embodiments of the present invention, not all embodiments.

[0022] This invention addresses the core requirement of the evolution of intelligent vehicle electronic and electrical architecture towards a centralized computing model, proposing a high-performance, multi-domain fusion automotive-grade chip development solution. While current mainstream domain controller architectures have improved performance, they still face bottlenecks in handling the extreme computing power, real-time performance, and system integration requirements of fully autonomous driving. This solution aims to fundamentally overcome these bottlenecks through high-level chip-level integration and computing power sharing.

[0023] like Figure 1 As shown, a high-performance automotive-grade chip design method of the present invention includes the following steps: Step S100: Based on the functional requirements of the target vehicle, divide the system into multiple independent functional control modules; Step S200: Integrate multiple functional control modules into a single high-performance system-on-a-chip (SoC) by architectural fusion. Step S300: Establish a sharing mechanism within the system-on-chip (SoC) for real-time data exchange between multiple functional control modules; Step S400: Using a preset packaging process, the designed chip is manufactured and packaged to form an automotive-grade chip product.

[0024] In step S100, based on the vehicle function decomposition, core function control modules are defined. According to the requirements of high-level autonomous driving and intelligent chassis control, key functions are decomposed and abstracted into multiple hardware-configurable function control modules. In this embodiment, this mainly includes: High-speed driving assistance control module (HAD): As the top-level intelligent driving unit, it is responsible for processing data from multiple sensors (cameras, radar, lidar, high-precision maps), completing environmental perception fusion, behavior decision-making, path planning, and ultimately controlling the steering, braking, and power system to coordinate the execution of complex functions such as adaptive cruise control, lane keeping, automatic lane changing, and navigation-guided driving (NOA).

[0025] Vehicle Dynamics Control (VDC): As the core of the chassis domain, it monitors signals such as steering wheel angle, yaw rate, and wheel speed in real time to determine the deviation between the vehicle's actual driving trajectory and the driver's intention. In the event of understeer or oversteer, it actively brakes one or more wheels and intervenes with engine torque to restore the vehicle to a stable driving trajectory.

[0026] Intelligent Cruise Control (ICC): As the foundation and subset of HAD functionality, it focuses on longitudinal following control. It enables automatic following, stops and starts with the vehicle in front, and can integrate navigation map curvature information for predictive deceleration, or mimic the trajectory of the vehicle in front to achieve a more human-like and smooth following strategy, thus improving comfort.

[0027] Cornering Stability Control (CSC): This can be seen as a specific optimization strategy for VDC in cornering scenarios. When the vehicle is cornering, it predicts the risk of understeer or sideslip in real time, and generates a yaw moment to assist steering by applying braking force to the inner wheels, making the cornering trajectory more precise and stable, and improving handling and driving confidence.

[0028] In step S200, multiple functional control modules are merged and integrated into a single high-performance chip architecture. The functional modules, such as HAD, VDC, ICC, and CSC, which originally belonged to different domain controllers, are deeply integrated during the chip architecture design phase. Through a unified instruction set, memory architecture, and on-chip interconnect network, they are integrated into a single high-performance SoC (System-on-a-Chip) chip, achieving a leap from "multiple controllers" to "single-chip multi-domain."

[0029] In step S300, an efficient data sharing mechanism between multiple modules is designed and implemented. Inside the chip, a real-time data exchange channel is established between the aforementioned functional modules through high-bandwidth, low-latency shared memory or a dedicated data path. This ensures that critical information such as sensing data, vehicle status, and control commands can be seamlessly and securely shared between modules such as HAD and VDC, eliminating the latency and reliability bottlenecks of traditional cross-controller communication and laying the foundation for collaborative control.

[0030] In step S400, advanced packaging technology is used to complete hardware integration manufacturing, and the final hardware implementation and packaging of the chip are completed according to the following process: Thinning and dicing: The fabricated wafer is thinned by back-side grinding to optimize heat dissipation; then, it is diced using a laser or diamond blade to separate individual bare chips.

[0031] Die bonding: Precisely placing the bare die onto the packaging substrate or lead frame and fixing it with epoxy resin or solder.

[0032] Interconnection: Establishing the electrical connection between the chip and the packaging substrate. This can be achieved using wire bonding (using gold / copper wires) or the more advanced flip-chip technology (direct bonding via chip bumps), the latter offering shorter interconnects, higher performance, and higher integration density.

[0033] Plastic encapsulation: The connected chip and substrate are placed in a mold, filled with epoxy molding compound and cured to form an encapsulation that provides mechanical support and environmental protection.

[0034] Post-processing includes cutting the continuous strip into independent packaging units, laser printing (identification information) on the surface of the package, and final electrical performance and reliability testing to ensure that the chip meets automotive-grade quality standards.

[0035] This invention divides vehicle functions into multiple functional control modules, integrates them into a single high-performance chip, and achieves centralized computing power. Hardware integration is completed through a pre-defined packaging process, supporting data sharing between multiple modules. This design effectively reduces the overall system size and weight, and facilitates the development and maintenance of application software and operating systems.

[0036] The core advantages of this invention: Increased computing power and optimized costs: Through multi-domain integration and computing power sharing, the available computing power of a single chip is greatly improved, while the overall system development and material costs are significantly reduced due to the reduction in the number of external controllers.

[0037] Enhanced real-time performance and reliability: In-chip data sharing eliminates communication latency and uncertainty, enabling faster and more reliable collaborative responses for cross-domain functions such as HAD decision-making and VDC execution.

[0038] System miniaturization and ease of development: High integration significantly reduces PCB area and system complexity, saves space and reduces weight for vehicle layout, and provides a unified and efficient hardware platform for upper-level application software development.

[0039] This invention proposes a multi-domain fusion chip architecture, designed using the aforementioned high-performance automotive-grade chip design method. Through the development of this multi-domain fusion chip architecture, this invention achieves centralized control of the vehicle's brain via a One-Box cockpit control domain controller. Chip computing power is further centralized, supporting data sharing. Integration reduces overall size and weight, decreases the amount of operating system maintenance required, and reduces application software fragmentation.

[0040] Among them, such as Figure 2 As shown, the multi-domain fusion chip architecture includes a main controller, which integrates multiple functional control modules.

[0041] Multiple functional control modules include a high-speed assisted driving control module, a vehicle dynamics control module, an intelligent cruise control module, and a cornering stability control module.

[0042] The present invention also proposes a vehicle comprising the aforementioned multi-domain fusion chip architecture.

[0043] It is understood that the content of the above multi-domain fusion chip architecture embodiments is applicable to this vehicle embodiment. The specific functions implemented in this vehicle embodiment are the same as those in the above multi-domain fusion chip architecture embodiments, and the beneficial effects achieved are also the same as those achieved in the above multi-domain fusion chip architecture embodiments.

[0044] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0045] The embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of the present invention.

Claims

1. A high-performance automotive-grade chip design method, characterized in that, include: Based on the functional requirements of the target vehicle, multiple independent functional control modules are defined. The multiple functional control modules are architecturally integrated and incorporated into a single high-performance system-on-a-chip. Within the system-on-a-chip, a sharing mechanism is established for real-time data exchange between the multiple functional control modules; Using a pre-defined packaging process, the designed chip is manufactured and packaged to form an automotive-grade chip product.

2. The high-performance automotive-grade chip design method according to claim 1, characterized in that, The multiple functional control modules include: high-speed assisted driving control module, vehicle dynamic control module, intelligent cruise control module, and cornering stability control module.

3. The high-performance automotive-grade chip design method according to claim 2, characterized in that, The high-speed assisted driving control module is used to perform adaptive cruise control, lane centering, automatic lane change assist, automatic overtaking, and automatic entry / exit of ramps based on navigation paths.

4. The high-performance automotive-grade chip design method according to claim 2, characterized in that, The vehicle dynamic control module is used to determine whether the actual driving trajectory of the vehicle is consistent with the driver's intention based on steering wheel angle, yaw rate and wheel speed information; and when understeering or oversteering is detected, it applies braking to one or more wheels and adjusts engine torque to make the vehicle return to the expected trajectory.

5. The high-performance automotive-grade chip design method according to claim 2, characterized in that, The intelligent cruise control module is used to realize the automatic following function, including accelerating, decelerating or stopping with the vehicle in front.

6. The high-performance automotive-grade chip design method according to claim 2, characterized in that, The cornering stability control module is used to monitor the vehicle's status during cornering; when it anticipates understeering or sideslip risk, it applies braking to the inner wheels to generate a yaw moment to assist the vehicle in smoothly cornering.

7. A multi-domain fusion chip architecture, characterized in that, It is designed using the high-performance automotive-grade chip design method as described in any one of claims 1 to 6.

8. The multi-domain fusion chip architecture according to claim 7, characterized in that, The multi-domain fusion chip architecture includes a main controller, which integrates multiple functional control modules.

9. The multi-domain fusion chip architecture according to claim 8, characterized in that, The multiple functional control modules include: a high-speed assisted driving control module, a vehicle dynamic control module, an intelligent cruise control module, and a cornering stability control module.

10. A vehicle, characterized in that, Including the multi-domain fusion chip architecture as described in any one of claims 7 to 9.

Images