A semiconductor detector quality screening system and screening method

Abstract

This application belongs to the field of semiconductor testing technology and relates to a semiconductor detector quality screening system. The system includes a support unit, an observation unit, a detection unit, a carrier unit, a light-emitting unit, and a testing unit. The support unit supports the observation unit and the detection unit. The observation unit observes the connection status between the detection unit and the chip under test (DUT). The detection unit forms an electrical connection with the DUT. The carrier unit is located below the detection unit and carries the DUT. The light-emitting unit provides an optical signal to the DUT. The testing unit is connected to the detection unit to test the photoelectric performance of the DUT and screens it based on its photoelectric performance. The quality screening system in this application significantly advances the quality screening point to before module assembly, avoiding the scrapping of the entire module due to core chip failure, greatly saving material costs and assembly time, and improving overall production efficiency and economic benefits.

Description

Technical Field

[0001] This application relates to the field of semiconductor testing technology, specifically to a semiconductor detector quality screening system and screening method. Background Technology

[0002] In fields such as particle physics, medical imaging, and high-energy physics experiments, the front-end module of a semiconductor detector is a core sensing component, typically consisting of a sensor, a dedicated readout chip, a bonding pad, mechanical supports, and cooling devices. Current fabrication processes generally involve first flip-chip bonding the sensor and the dedicated readout chip to form a chipset, then precisely assembling the chipset with the bonding pad, support structure, and cooling components to assemble a complete front-end module. Finally, the finished module is connected to a light source or beam testing device for performance testing to screen for qualified products.

[0003] The traditional "assemble first, test later" model has obvious drawbacks: if the final test finds problems such as faulty dedicated readout chips, dead pixels in sensors, or failure of flip-chip interconnects in the chipset, all the expensive peripheral components that have been assembled and a large amount of assembly time will be scrapped, resulting in serious waste of resources; complete module testing requires complex optical alignment, mechanical assembly and system integration, which occupies expensive resources such as beam current and anechoic chambers, resulting in long testing cycles and high overall costs; at the same time, when a module fails, it is difficult to quickly distinguish whether the fault originates from the core chipset, the assembly process, or peripheral components, making fault location and process optimization difficult.

[0004] As detectors develop towards larger size, higher density, and larger scale, existing testing processes can no longer meet the needs of efficient and low-cost production. There is an urgent need to achieve rapid and reliable screening of core electrical and optoelectronic performance before the final integration of chipsets and peripheral components, so as to eliminate defective products from the source, reduce losses, and improve production yield. Summary of the Invention

[0005] In view of the shortcomings of the prior art described above, the purpose of this application is to provide a semiconductor detector quality screening system and screening method. By advancing the quality screening point to before module assembly, the scrapping of the entire module due to the failure of the core chipset is avoided, which greatly saves material costs and assembly time, and improves overall production efficiency and economic benefits.

[0006] On the one hand, this application provides a semiconductor detector quality screening system, including a support unit, an observation unit, a detection unit, a carrier unit, a light-emitting unit, and a testing unit;

[0007] The observation unit is disposed on the support unit and is used to observe the connection status between the detection unit and the chip group under test.

[0008] The detection unit is disposed on the support unit and located below the observation unit. The detection unit includes a circuit board and a probe. The circuit board is provided with a first through hole. The probe is disposed on both sides opposite to the first through hole. The first through hole exposes the chip group under test. The two ends of the probe are electrically connected to the circuit board and the chip group under test, respectively.

[0009] The carrier unit is located below the detection unit and is used to place the chip group under test;

[0010] The light-emitting unit provides light signals to the chip group under test;

[0011] The test unit is connected to the detection unit to test the photoelectric performance of the chip group under test and to screen the chip group under test based on its photoelectric performance.

[0012] In an optional embodiment, the support unit includes a first bracket, a second bracket, a third bracket, and a fourth bracket;

[0013] The first bracket and the second bracket are arranged opposite to each other;

[0014] The third bracket is connected between the first bracket and the second bracket, and the third bracket is provided with a second through hole;

[0015] The fourth bracket is embedded in the second through hole. The fourth bracket is provided with a first groove. The bottom of the first groove is provided with a second groove. The bottom of the second groove is provided with a third through hole. The detection unit is placed in the second groove. The third through hole at least exposes the first through hole.

[0016] In an optional embodiment, the observation unit includes a microscope, a first moving part, and a second moving part. The microscope is used to observe the connection status between the probe and the chip group under test. The first moving part drives the microscope to move along a first direction, and the second moving part drives the microscope to move along a second direction. The first direction and the second direction are perpendicular to each other.

[0017] In an optional embodiment, the circuit board is provided with pads, and the probe is connected to the pads via wires to achieve an electrical connection with the circuit board.

[0018] In an optional embodiment, the carrying unit includes a first stage, a second stage, a vacuum device, a rotating part, a third moving part, a fourth moving part, and a fifth moving part;

[0019] The first stage is placed on the second stage, the first stage is provided with a third groove, the bottom of the third groove is provided with a fourth through hole, and the chip group to be tested is placed in the third groove;

[0020] The second stage is provided with a fourth groove, which is connected to the vacuum device to realize vacuum adsorption between the second stage and the first stage and between the first stage and the chip group under test.

[0021] The rotating part is connected to the second platform to drive the second platform to rotate;

[0022] The third moving part is connected to the rotating part to drive the second platform to move in a third direction;

[0023] The fourth moving part is connected to the third moving part to drive the second platform to move along the second direction;

[0024] The fifth moving part is connected to the fourth moving part to drive the second platform to move along the first direction;

[0025] The third direction is perpendicular to both the first direction and the second direction.

[0026] In an optional embodiment, the semiconductor detector quality screening system further includes a control unit connected to and controlling the first moving part, the second moving part, the third moving part, the fourth moving part, the fifth moving part, the rotating part, the microscope, and the vacuum device.

[0027] In an optional embodiment, the testing unit includes a parameter configuration unit and a data processing unit;

[0028] The parameter configuration unit provides operating voltage to the detection unit and the chip group under test, and provides configuration parameters to the chip group;

[0029] The data processing unit reads the test data from the detection unit, analyzes the photoelectric performance of the chip group under test, and filters it based on the photoelectric performance of the chip group under test.

[0030] In an optional embodiment, the semiconductor detector quality screening system further includes an equipment housing that forms a test space, in which the support unit, the observation unit, the detection unit, the carrier unit, and the light-emitting unit are placed.

[0031] In an optional embodiment, the light-emitting unit is a halogen lamp, an infrared lamp, or a high-intensity flashlight.

[0032] On the other hand, this application provides a semiconductor detector quality screening method, including the following steps:

[0033] A semiconductor detector quality screening system is provided according to any one of the above embodiments, wherein the detection unit is fixed on the support unit and the chip group under test is fixed on the carrier unit;

[0034] The connection status between the detection unit and the chip group under test is observed using the observation unit, and the probe is connected to the chip group under test.

[0035] The test unit and the light-emitting unit are activated to test the photoelectric performance of the chip group under test, and the chip group under test is screened based on its photoelectric performance.

[0036] As described above, compared with the prior art, the semiconductor detector quality screening system and method provided in this application have at least the following beneficial effects:

[0037] This application significantly reduces material and labor losses by screening the flip-chip assembly for electrical and optoelectronic performance before assembling the semiconductor detector front-end module, avoiding the scrapping of the entire module due to chip assembly defects, and greatly improving production efficiency and yield.

[0038] The semiconductor detector quality screening method of this application uses the above-mentioned semiconductor detector quality screening system to test and screen the photoelectric performance of the chipset under test, and therefore also has the above-mentioned beneficial effects. Attached Figure Description

[0039] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 The diagram shown is a structural schematic of a semiconductor detector quality screening system provided in Embodiment 1 of this application.

[0041] Figure 2 The diagram shown is a schematic diagram of a detection unit provided in Embodiment 1 of this application.

[0042] Figure 3 The diagram shown is a flowchart of a semiconductor detector quality screening method provided in Embodiment 2 of this application.

[0043] In the diagram: 11. First support; 12. Second support; 13. Third support; 14. Fourth support; 21. Microscope; 22. First moving part; 23. Second moving part; 31. Circuit board; 32. Probe; 33. First through hole; 34. Pad; 35. Wire; 41. First stage; 42. Second stage; 43. Rotating part; 44. Third moving part; 45. Fourth moving part; 46. Fifth moving part; 5. Equipment housing; 51. Test space. Detailed Implementation

[0044] To make the technical objectives, technical solutions, and technical effects of this application clearer, the technical solutions in this application will be clearly and completely described below in conjunction with embodiments. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0045] Therefore, the following detailed description of embodiments of this application is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0046] In the description of this application, it should be noted that the terms "center", "longitudinal", "lateral", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0047] In the description of this application, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly, for example, referring to both fixed connections and detachable connections. Furthermore, the descriptions using terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples" indicate that a specific feature, structure, material, or characteristic described in connection with an implementation or example is included in at least one implementation or example of this application. In this specification, illustrative expressions of the above terms do not necessarily refer to the same implementation or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more implementations or examples.

[0048] Example 1

[0049] To address the technical problems of severe resource waste, long testing cycles, and high overall costs in the existing technologies mentioned above, a semiconductor detector quality screening system and method are provided. By screening the flip-chip assembly for electrical and photoelectric performance before the assembly of the semiconductor detector front-end module, material and labor losses can be significantly reduced, the scrapping of the entire module due to chip assembly defects can be avoided, and production efficiency and yield can be greatly improved.

[0050] Reference Figure 1 and Figure 2 The semiconductor detector quality screening system provided in this embodiment includes a support unit 1, an observation unit 2, a detection unit 3, a carrier unit 4, a light-emitting unit, and a testing unit;

[0051] The observation unit 2 is mounted on the support unit 1 and is used to observe the connection status between the detection unit 3 and the chip group under test.

[0052] The detection unit 3 is disposed on the support unit 1 and located below the observation unit 2. The detection unit 3 includes a circuit board 31 and a probe 32. The circuit board 31 is provided with a first through hole 33. The probe 32 is disposed on both sides opposite to the first through hole 33. The first through hole 33 exposes the chip group under test. The two ends of the probe 32 are electrically connected to the circuit board 31 and the chip group under test, respectively.

[0053] The carrier unit 4 is located below the detection unit 3 and is used to carry the chip group under test;

[0054] The light-emitting unit provides light signals to the chipset under test;

[0055] The test unit is connected to the detection unit 3 to test the photoelectric performance of the chip group under test and to screen the chip group under test based on its photoelectric performance.

[0056] In practical applications, by screening the flip-chip assembly for electrical and photoelectric performance before assembling the semiconductor detector front-end module, material and labor losses can be significantly reduced, the entire module can be scrapped due to chip assembly defects, and production efficiency and yield can be greatly improved.

[0057] In this embodiment, the semiconductor detector quality screening system also includes an equipment housing 55, in which a test space 51 is formed. The support unit 1, observation unit 2, detection unit 3, light-emitting unit and carrier unit 4 are placed in the test space 51 to isolate external dust and debris, avoid contaminating the chip group under test and the probe 32, and reduce the interference of external airflow and vibration on precision alignment and testing.

[0058] In this embodiment, the definition is as follows: Figure 1The X-axis direction is the first direction, the Y-axis direction is the second direction, and the Z-axis direction is the third direction. The first direction and the second direction are perpendicular to each other, and the third direction is perpendicular to the first direction and the second direction.

[0059] In this embodiment, the support unit 1 includes a first bracket 11, a second bracket 12, a third bracket 13, and a fourth bracket 14. The first bracket 11 and the second bracket 12 are positioned opposite each other along a first direction within the test space 51 to support the observation unit 2. The third bracket 13 is positioned between the first bracket 11 and the second bracket 12, and its two ends along the first direction are fixedly connected to the first bracket 11 and the second bracket 12, respectively. The third bracket 13 has a second through hole, and the fourth bracket 14 is inserted into the second through hole and fixedly connected to the third bracket 13. The third bracket 13 and the fourth bracket 14 support the detection unit 3. The shape, size, material, and other parameters of the first bracket 11, the second bracket 12, and the third bracket 13 can be designed according to actual needs and are not specifically limited here. The shape of the second through hole should be adapted to the shape of the fourth bracket 14 so that the fourth bracket 14 can be inserted into the second through hole.

[0060] In this embodiment, a first groove is provided on the fourth bracket 14, a second groove is provided at the bottom of the first groove, and a third through hole is provided at the bottom of the second groove. The detection unit 3 is fixed to the bottom of the second groove, and the second groove limits the detection unit 3. The third through hole exposes at least the first through hole 33 on the circuit board 31 of the detection unit 3, and the first through hole 33 exposes at least the chip group under test. The combined design of the first groove, the second groove, the third through hole, and the first through hole 33 facilitates the electrical connection between the probes 32 provided on both sides of the first through hole 33 and the chip group under test placed on the carrier unit 4. In this embodiment, the shape and size of the first through hole 33 can be designed as needed according to the shape and size of the chip group under test, and the shape and size of the third through hole can be designed according to the shape and size of the first through hole 33. No specific limitation is made here.

[0061] In this embodiment, the design of the fourth bracket 14 enables the semiconductor detector quality screening system to be adapted to different sizes of chipsets under test. Technicians only need to select the fourth bracket 14 that is compatible with the chipset under test according to actual needs. This design effectively improves the testing efficiency of chipsets under test of different sizes and significantly shortens the testing cycle.

[0062] In an optional embodiment, a fifth through hole is also provided at the bottom of the first groove. The fifth through hole is provided on both sides opposite to the second groove and communicates with the third through hole provided at the bottom of the second groove, so as to facilitate the retrieval of the detection unit 3 in the second groove.

[0063] In this embodiment, the observation unit 2 includes a microscope 21, a first moving part 22, and a second moving part 23. The microscope 21 can be an optical microscope 21, an electron microscope 21, or other suitable microscopic imaging equipment to observe the connection status between the probe 32 in the detection unit 3 and the chip group under test, that is, to observe whether the probe 32 in the detection unit 3 and the pins on the chip in the chip group under test are precisely aligned. In this embodiment, the first moving part 22 and the second moving part 23 can be an electric linear displacement stage, a precision electric slide stage, or other suitable linear drive equipment. Its core structure is a drive structure of "motor + lead screw + guide rail + slider", wherein the motor is connected to the lead screw and drives the lead screw to rotate, and the slider is connected to the lead screw and the guide rail, and converts the rotation of the lead screw into linear motion along the extension direction of the guide rail, thereby realizing the movement of the microscope 21 along the first direction and the second direction.

[0064] In this embodiment, a first moving part 22 and two second moving parts 23 are provided. Both second moving parts 23 extend along a second direction and are respectively fixed to the first support 11 and the second support 12. The first moving part 22 extends along a first direction, and its two ends along the first direction are respectively fixed to the sliders of the two second moving parts 23. The microscope 21 is fixed to the slider of the first moving part 22. In actual operation, the motor in the second moving part 23 drives the slider in the second moving part 23 to move the first moving part 22 and the microscope 21 along the second direction. The motor in the first moving part 22 drives the slider in the first moving part 22 to move the microscope 21 along the first direction, thereby achieving precise control of the position of the microscope 21 in both the first and second directions.

[0065] In this embodiment, refer to Figure 2 The detection unit 3 includes a circuit board 31 and probes 32. The circuit board 31 has a first through-hole 33, exposing the chip assembly under test (DUT) on the carrier unit 4. Probes 32 are positioned on opposite sides of the first through-hole 33, with both ends electrically connected to the circuit board 31 and the DUT, respectively. In this embodiment, the circuit board 31 also has pads 34 for connecting to the internal circuitry. One end of the probe 32 is connected to the pads 34 via wires 35, and the other end is directly connected to a pin on the chip in the DUT, thus achieving electrical connection between the circuit board 31 and the DUT to collect test data. The shape and size of the first through-hole 33 can be designed according to the shape and size of the DUT, and the number of pads 34 and probes 32 can also be specifically designed according to the number of pins on the chip in the DUT; no specific limitation is made here.

[0066] In this embodiment, the support unit 4 includes a first stage 41, a second stage 42, a vacuum device, a rotating part 43, a third moving part 44, a fourth moving part 45, and a fifth moving part 46. The first stage 41 can be circular, square, or other suitable shapes; preferably, it is square. A third groove is provided on the first stage 41, and the chip assembly to be tested is placed in the third groove, which serves to limit the chip assembly. Several fourth through holes are provided at the bottom of the third groove, which serve as vacuum adsorption channels to adsorb and fix the chip assembly to be tested within the third groove of the first stage 41.

[0067] In this embodiment, the first stage 41 is designed as a square structure with a side length of 180mm, the third groove is designed as a square structure with a side length of 114.8mm, and the fourth through hole is arranged in a rectangular array at the bottom of the third groove to accommodate the size and shape of the chip group under test. In practical applications, the size, shape, and layout parameters of the first stage 41, the third groove, and the fourth through hole can be designed as needed according to the actual situation of the chip group under test, and are not specifically limited here.

[0068] A first stage 41 is placed on a second stage 42. The second stage 42 has several fourth grooves, which are connected to a vacuum device. These fourth grooves serve as vacuum adsorption channels, allowing the first stage 41 to be adsorbed and fixed onto the second stage 42. The second stage 42 can be circular, square, or other suitable shapes. Preferably, it is circular, as this design allows for a more uniform distribution of adsorption force and a more secure adsorption. The fourth grooves are arranged in a concentric circle, allowing technicians to adjust the adsorption area of ​​the fourth grooves according to the dimensions of the first stage 41, thus avoiding unnecessary energy consumption.

[0069] In this embodiment, the second stage 42 is designed as a circular structure with a radius of 101.6 mm, and the fourth groove is designed as a set of concentric circles with diameters of 154 mm, 114 mm, 74 mm, and 34 mm, respectively. Each circular groove in the fourth groove forms an independent connection channel with the vacuum device, so as to adapt and adjust the adsorption area of ​​the fourth groove according to the size of the first stage 41. In practical applications, the size, shape, and layout parameters of the second stage 42 and the fourth groove can be designed as needed according to the actual situation of the chip group under test and the first stage 41, and are not specifically limited here.

[0070] The dual-stage design of the first stage 41 and the second stage 42 allows technicians to adapt the first stage 41 to the shape and size of the chip group under test, thereby improving the compatibility of the semiconductor detector quality screening system with chip groups of different sizes and greatly improving work efficiency.

[0071] In this embodiment, the rotating part 43 can be a DD motor direct-drive rotary table, a precision electric rotary table, or other devices capable of rotational drive. The rotating part 43 is connected to the side of the second platform 42 away from the first platform 41 along a third direction, so as to realize the rotation of the second platform 42 in the circumferential direction.

[0072] In this embodiment, the third moving part 44, the fourth moving part 45, and the fifth moving part 46 can be an electric linear displacement stage, a precision electric slide, or other suitable linear drive equipment. Its core structure is a drive structure of "motor + lead screw + guide rail + slider". The motor is connected to the lead screw and drives the lead screw to rotate. The slider is connected to the lead screw and the guide rail and converts the rotation of the lead screw into linear motion along the extension direction of the guide rail, thereby realizing the movement of the chip group under test along the third direction, the second direction, and the first direction.

[0073] In this embodiment, the third moving part 44 is connected to the rotating part 43, the fourth moving part 45 is connected to the third moving part 44, and the fifth moving part 46 is connected to the fourth moving part 45. In practical applications, the third moving part 44 drives the rotating part 43 and the second stage 42 to move along a third direction, the fourth moving part 45 drives the third moving part 44, the rotating part 43, and the second stage 42 to move along a second direction, and the fifth moving part 46 drives the fourth moving part 45, the third moving part 44, the rotating part 43, and the second stage 42 to move along a first direction, ultimately realizing the movement of the chip group under test on the first stage 41 along the first direction, the second direction, and the third direction.

[0074] In this embodiment, the semiconductor detector quality screening system also includes a control unit, which is electrically connected to the observation unit 2 and the support unit 4. Specifically, the control unit is electrically connected to the microscope 21, the first moving part 22, and the second moving part 23 in the observation unit 2 to achieve electric control of the microscope 21 and its position; the control unit is electrically connected to the vacuum device, the rotating part 43, the third moving part 44, the fourth moving part 45, and the fifth moving part 46 in the support unit 4 to achieve adsorption and fixation of the chip group under test by controlling the vacuum device, to adjust the position of the chip group under test by controlling the third moving part 44, the fourth moving part 45, and the fifth moving part 46, and to control the rotation angle of the chip group under test by controlling the rotating part 43, so as to achieve precise docking between the pins of the chip group under test and the probe 32 in the detection unit 3.

[0075] In this embodiment, the travel range of the first moving part 22 and the second moving part 23 is 240~440mm, the repeatability is less than or equal to 5μm, and the resolution is ±2μm. Specifically, the travel of the first moving part 22 and the second moving part 23 can be 240mm, 290mm, 320mm, 370mm, 440mm or other suitable values. Preferably, the travel of the first moving part 22 and the second moving part 23 is 240mm.

[0076] The stroke range of the third moving part 44 is 20~40mm, the repeatability is less than or equal to 5μm, and the resolution is ±1μm. Specifically, the stroke of the third moving part 44 can be 20mm, 24mm, 35mm, 38mm, 40mm or other suitable values. Preferably, the stroke of the third moving part 44 is 30mm.

[0077] The stroke range of the fourth moving part 45 and the fifth moving part 46 is 200~400mm, the repeatability is less than or equal to 5μm, and the resolution is ±1μm. Specifically, the stroke of the fourth moving part 45 and the fifth moving part 46 can be 200mm, 240mm, 320mm, 370mm, 440mm or other suitable values. Preferably, the stroke of the fourth moving part 45 and the fifth moving part 46 is 200mm.

[0078] The rotating part 43 can achieve 360° circumferential rotation with an angular resolution of ±0.001°. The design of the first moving part 22, the second moving part 23, the third moving part 44, the fourth moving part 45, the fifth moving part 46, and the rotating part 43 enables high-precision and rapid positioning of the microscope 21 and the chip group under test, thereby improving testing efficiency and the accuracy of test data.

[0079] In this embodiment, the testing unit is connected to the detection unit 3 via a flexible cable to test the photoelectric performance of the chipset under test (DUT) and to screen DUT chipsets based on their photoelectric performance. The testing unit includes a parameter configuration unit and a data processing unit. In practical applications, the parameter configuration unit provides operating voltage to both the detection unit 3 and the DUT, and provides configuration parameters such as integration time, gain level, operating mode, sampling parameters, and calibration parameters to the DUT. This puts the chipset into a set testing state to ensure the accuracy of the test data. The data processing unit reads and analyzes the test data from the detection unit 3 to obtain the photoelectric performance of the DUT chipset and screens them based on their photoelectric performance.

[0080] In this embodiment, the light-emitting unit provides a light signal to the chip under test (DUT) to stimulate the sensor in the DUT. The light-emitting unit is placed on the third support 13 and can be a halogen lamp, infrared lamp, high-intensity flashlight, or other device that can provide a light signal. Preferably, the light-emitting unit is a halogen lamp, which is equipped with a prism to focus the light signal onto the DUT. Using a halogen lamp as the light-emitting unit replaces equipment such as X-ray machines that may be used in traditional testing, eliminating the burden of X-ray radiation safety management and potential health risks, making the testing environment safer and deployment more flexible.

[0081] Example 2

[0082] This embodiment provides a semiconductor detector quality screening method for efficiently testing and screening the photoelectric performance of semiconductor detectors.

[0083] Reference Figure 3 The semiconductor detector quality screening method provided in this embodiment includes the following steps:

[0084] First, the detection unit 3 is fixed on the support unit 1, and the chip group to be tested is fixed on the carrier unit 4.

[0085] In this step, this embodiment first selects a detection unit 3 that is compatible with the size of the chip group under test, and fixes it in the second groove of the fourth bracket 14 with screws. Then, the chip group under test is placed in the third groove of the first stage 41, and the vacuum equipment is started by the control system to adsorb and fix the chip group under test.

[0086] It should be noted that the chip under test consists of a sensor and a chip, and the sensor is connected to the chip via bump bonding. When the chip under test is placed on the carrier unit 4, the side with the bonded sensor faces upwards so that the sensor can receive the light signal from the light-emitting unit.

[0087] Next, the connection status between the detection unit 3 and the chip group under test is observed using the observation unit 2, so that the probe 32 is connected to the chip group under test.

[0088] In this step, this embodiment first needs to calibrate the zero-point positions of the first moving part 22, the second moving part 23, the rotating part 43, the third moving part 44, the fourth moving part 45, and the fifth moving part 46. Then, the control system controls the first moving part 22 and the second moving part 23 to move the microscope 21 directly above the first through hole 33 in the detection unit 3, and controls the third moving part 44, the fourth moving part 45, and the fifth moving part 46 to move the chip group under test directly below the first through hole 33 in the detection unit 3. The image in the microscope 21 is observed, and the first moving part 22, the second moving part 23, the rotating part 43, the third moving part 44, the fourth moving part 45, and the fifth moving part 46 are continuously adjusted to ensure that the pins on the chip in the chip group under test are connected one-to-one with the probes 32 in the detection system.

[0089] Next, the test unit and the light-emitting unit are activated to test the photoelectric performance of the chipset under test, and the chipset under test is screened based on its photoelectric performance.

[0090] In this step, the test unit is first activated, and the integration time, gain level, operating mode, sampling parameters, calibration parameters, etc., are configured to the chip under test (DUT) through the parameter configuration unit. Operating voltage is then provided to the DUT and the detection unit 3. In a dark environment where the light-emitting unit is not activated, the data processing unit reads the test data from the detection unit 3 and analyzes it to obtain the baseline, noise, and other dark-field performance characteristics of the DUT.

[0091] Subsequently, the light-emitting unit is activated to provide a light signal to the sensor in the chipset under test. The intensity of the light signal can be adjusted according to actual testing needs and is not specifically limited here. Then, the data processing unit reads the test data from the detection unit 3 and analyzes it using baseline subtraction to obtain the photoelectric performance of the chipset under test.

[0092] It should be noted that the number of chips bonded in the chip group under test can be set according to the actual situation. In this embodiment, the chip group under test consists of 1 sensor and 16 chips. The size of the first through hole 33 in this embodiment is adapted to the size of 2 chips in the chip group under test being tested at the same time. Therefore, after testing the chip group under test, the above test process needs to be repeated 8 times. After all 16 chips have been tested, the data processing unit is used to determine whether the photoelectric performance of the chip group under test is qualified, so as to complete the screening work.

[0093] In an optional embodiment, if more chips in the chipset under test are to be tested simultaneously, the size of the first via 33, the number of probes 32, and the number of pads 34 and circuits in the detection system need to be increased accordingly.

[0094] The design of the detection unit 3 in this application significantly advances the quality screening point of the semiconductor detector to before module assembly, avoiding the scrapping of the entire module due to the failure of the core chipset, greatly saving material costs and assembly time, improving overall production efficiency and economic benefits, and can be adapted to the testing of various types of detector chipsets, and can also realize rapid and batch testing of the chipset under test, thereby meeting the needs of large-scale production.

[0095] The above description is only a partial preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A semiconductor detector quality screening system, characterized in that, It includes a support unit, an observation unit, a detection unit, a load-bearing unit, a light-emitting unit, and a testing unit; The observation unit is disposed on the support unit and is used to observe the connection status between the detection unit and the chip group under test. The detection unit is disposed on the support unit and located below the observation unit. The detection unit includes a circuit board and a probe. The circuit board is provided with a first through hole. The probe is disposed on both sides opposite to the first through hole. The first through hole exposes the chip group under test. The two ends of the probe are electrically connected to the circuit board and the chip group under test, respectively. The carrier unit is located below the detection unit and is used to place the chip group under test; The light-emitting unit provides light signals to the chip group under test; The test unit is connected to the detection unit to test the photoelectric performance of the chip group under test and to screen the chip group under test based on its photoelectric performance.

2. The semiconductor detector quality screening system according to claim 1, characterized in that, The support unit includes a first bracket, a second bracket, a third bracket, and a fourth bracket; The first bracket and the second bracket are arranged opposite to each other; The third bracket is connected between the first bracket and the second bracket, and the third bracket is provided with a second through hole; The fourth bracket is embedded in the second through hole. The fourth bracket is provided with a first groove. The bottom of the first groove is provided with a second groove. The bottom of the second groove is provided with a third through hole. The detection unit is placed in the second groove. The third through hole at least exposes the first through hole.

3. The semiconductor detector quality screening system according to claim 1, characterized in that, The observation unit includes a microscope, a first moving part, and a second moving part. The microscope is used to observe the connection status between the probe and the chip group under test. The first moving part drives the microscope to move along a first direction, and the second moving part drives the microscope to move along a second direction. The first direction and the second direction are perpendicular to each other.

4. The semiconductor detector quality screening system according to claim 1, characterized in that, The circuit board has pads, and the probe is connected to the pads via wires to achieve electrical connection with the circuit board.

5. The semiconductor detector quality screening system according to claim 3, characterized in that, The supporting unit includes a first stage, a second stage, a vacuum device, a rotating part, a third moving part, a fourth moving part, and a fifth moving part; The first stage is placed on the second stage, the first stage is provided with a third groove, the bottom of the third groove is provided with a fourth through hole, and the chip group to be tested is placed in the third groove; The second stage is provided with a fourth groove, which is connected to the vacuum device to realize vacuum adsorption between the second stage and the first stage and between the first stage and the chip group under test. The rotating part is connected to the second platform to drive the second platform to rotate; The third moving part is connected to the rotating part to drive the second platform to move in a third direction; The fourth moving part is connected to the third moving part to drive the second platform to move along the second direction; The fifth moving part is connected to the fourth moving part to drive the second platform to move along the first direction; The third direction is perpendicular to both the first direction and the second direction.

6. The semiconductor detector quality screening system according to claim 5, characterized in that, The semiconductor detector quality screening system further includes a control unit, which is connected to and controls the first moving part, the second moving part, the third moving part, the fourth moving part, the fifth moving part, the rotating part, the microscope, and the vacuum device.

7. The semiconductor detector quality screening system according to claim 1, characterized in that, The testing unit includes a parameter configuration unit and a data processing unit; The parameter configuration unit provides operating voltage to the detection unit and the chip group under test, and provides configuration parameters to the chip group; The data processing unit reads the test data from the detection unit, analyzes the photoelectric performance of the chip group under test, and filters it based on the photoelectric performance of the chip group under test.

8. The semiconductor detector quality screening system according to claim 1, characterized in that, The semiconductor detector quality screening system also includes an equipment housing, which forms a test space, and the support unit, the observation unit, the detection unit, the carrier unit and the light-emitting unit are placed in the test space.

9. The semiconductor detector quality screening system according to claim 1, characterized in that, The light-emitting unit is a halogen lamp, an infrared lamp, or a high-intensity flashlight.

10. A method for screening the quality of a semiconductor detector, characterized in that, Includes the following steps: A semiconductor detector quality screening system according to any one of claims 1-9 is provided, wherein the detector unit is fixed on the support unit and the chip group under test is fixed on the carrier unit; The connection status between the detection unit and the chip group under test is observed using the observation unit, and the probe is connected to the chip group under test. The test unit and the light-emitting unit are activated to test the photoelectric performance of the chip group under test, and the chip group under test is screened based on its photoelectric performance.

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