Method of manufacturing an image sensor

Abstract

This invention discloses a method for manufacturing an image sensor. The method includes: forming a mesh structure on a substrate, the mesh structure comprising a patterned metal layer and a patterned top dielectric layer stacked on top of the metal layer; performing surface pretreatment on the mesh structure to form a metal nitride layer on the exposed surface of the metal layer; and depositing a protective liner layer on the mesh structure and the metal nitride layer. This invention enhances the adhesion and density of the protective liner layer by forming a metal nitride layer on the metal sidewalls through surface pretreatment, effectively preventing metal mesh corrosion and improving device reliability; simultaneously, the high-refractive-index protective liner layer forms a total internal reflection interface, improving the quantum efficiency of the image sensor.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method for manufacturing an image sensor. Background Technology

[0002] With the development of semiconductor technology, Complementary Metal-Oxide-Semiconductor (CMOS) image sensors (CIS) have been widely used in various electronic products. To improve the performance of image sensors, back-illuminated (BSI) process technology has seen significant advancements. In the BSI process of CMOS image sensors, a grid structure is typically used to block light from individual pixel areas, reducing crosstalk between pixels and improving image quality. This grid structure is usually composed of a stacked structure consisting of a metal layer (e.g., tungsten) and a top dielectric layer (e.g., a hard mask layer) above the metal layer. Between the metal layer and the underlying substrate dielectric, a diffusion barrier layer (e.g., titanium or titanium nitride) is usually placed to prevent metal diffusion.

[0003] In existing lattice structure manufacturing processes, etching is required to penetrate the top dielectric layer and metal layer to form a grid with a specific pattern. After etching, the sidewalls of the metal layer (e.g., tungsten) are directly exposed in the trenches. To protect the metal layer, conventional processes typically deposit a layer of pad oxide on the surface of the lattice structure. However, the pad oxide structure formed in existing processes is often relatively loose and cannot form a dense protective barrier around the lattice. This loose structure results in insufficient protection for the internal metal layer, allowing moisture from the external environment to easily penetrate the pad oxide layer and react with the exposed metal sidewalls, leading to corrosion or oxidation of the tungsten.

[0004] Corrosion of the metal layer not only disrupts the integrity of the mesh structure but also leads to corrosion defects in the image sensor pad areas, ultimately causing the entire device to fail. Furthermore, the optical properties (e.g., refractive index) of existing pad oxide materials do not match the underlying dielectric material ideally, limiting their ability to reduce incident light loss and further improve the quantum efficiency of image sensors using total internal reflection.

[0005] Therefore, there is an urgent need in the existing technology for a new method that can effectively prevent oxidation of the metal layer sidewalls, enhance the bonding force between the metal layer and the protective layer, and improve the reliability of the image sensor. Summary of the Invention

[0006] This invention provides a method for manufacturing an image sensor, aiming to solve the problem that in the existing BSI process of CMOS image sensors, the metal mesh (e.g., tungsten mesh) is prone to oxidation or corrosion after etching due to the loose structure of the sidewall protective layer, which leads to device reliability failure. At the same time, it also aims to solve the problem that the insufficient optical properties of existing protective layer materials limit the quantum efficiency of image sensors.

[0007] This invention provides a method for manufacturing an image sensor, the method comprising the following steps:

[0008] Step 1: Form a grid structure on the substrate. The grid structure includes a patterned metal layer and a patterned top dielectric layer stacked on top of the metal layer.

[0009] Step 2: Perform surface pretreatment on the mesh structure to form a metal nitride layer on the exposed surface of the metal layer;

[0010] Step 3: Deposit a protective liner layer on the grid structure and metal nitride layer.

[0011] Preferably, in step one, the material of the metal layer includes tungsten.

[0012] Preferably, in step one, the process of forming the mesh structure includes: providing a substrate, depositing a metal material layer and a top dielectric material layer sequentially on the substrate; patterning the top dielectric material layer and the metal material layer using photolithography and etching processes to form a mesh structure with trenches, thereby exposing the sidewalls of the metal layer; in step two, the exposed surface of the metal layer is the sidewall of the metal layer.

[0013] Preferably, in step one, the top dielectric layer serves as a hard mask in the etching process.

[0014] Preferably, in step one, the substrate includes a lower dielectric layer, and a diffusion barrier layer is disposed between the lower dielectric layer and the metal layer.

[0015] Preferably, in step two, the gas used for surface pretreatment includes a nitrogen-containing gas.

[0016] Preferably, the nitrogen-containing gas is selected from at least one of ammonia, nitrogen, and a mixture of nitrogen and hydrogen.

[0017] Preferably, in step two, the metal nitride layer includes a tungsten nitride layer that covers the sidewalls of the metal layer as an adhesion layer between the metal layer and the gasket protective layer.

[0018] Preferably, in step three, the material density of the liner protective layer is higher than that of the silicon oxide material.

[0019] Preferably, in step three, the material of the liner protective layer includes silicon nitride.

[0020] Preferably, in step three, the liner protective layer continuously covers the top surface of the top dielectric layer, the sidewalls of the top dielectric layer, the metal nitride layer, and the bottom of the trench.

[0021] Preferably, the image sensor is a back-illuminated complementary metal-oxide-semiconductor image sensor.

[0022] Preferably, the substrate includes a lower dielectric layer located below the metal layer; in step three, the refractive index of the gasket protective layer is higher than that of the lower dielectric layer, thereby forming a total reflection interface between the gasket protective layer and the lower dielectric layer.

[0023] Preferably, the material of the lower dielectric layer includes silicon oxide.

[0024] As described above, the method for manufacturing the image sensor of the present invention has the following beneficial effects:

[0025] This invention introduces a nitrogen-containing gas (e.g., ammonia) pretreatment after etching the metal mesh to generate a dense metal nitride (e.g., tungsten nitride) layer in situ on the metal (e.g., tungsten) surface. This metal nitride layer acts as a high-quality adhesion layer (gluten layer), significantly enhancing the bonding force between the subsequently deposited protective layer (e.g., silicon nitride) and the metal sidewalls, preventing interface delamination. Simultaneously, the use of a high-density protective layer effectively blocks moisture and oxygen from eroding the metal mesh, solving the reliability failure problem caused by metal corrosion. Furthermore, this invention utilizes the refractive index difference between the protective layer and the underlying dielectric layer to construct a total internal reflection interface, reducing light loss and thereby improving the quantum efficiency of the image sensor. Attached Figure Description

[0026] Figure 1 The diagram shows a process flow diagram of a method for manufacturing an image sensor according to the present invention.

[0027] Figure 2 The diagram shows a structural schematic after patterned photoresist is formed in a method for manufacturing an image sensor according to the present invention.

[0028] Figure 3 The diagram shows the structure after etching to form a grid structure in a method for manufacturing an image sensor according to the present invention.

[0029] Figure 4 The diagram shows the structure after forming a metal nitride layer in a method for manufacturing an image sensor according to the present invention.

[0030] Figure 5 The diagram shows the structure after the deposition of a protective liner layer in a method for manufacturing an image sensor according to the present invention. Detailed Implementation

[0031] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0032] A method for manufacturing an image sensor, characterized in that, as Figure 1 As shown, the manufacturing method includes the following steps.

[0033] Step 1, such as Figure 2 and Figure 3 As shown, a grid structure is formed on the substrate 101. The grid structure includes a patterned metal layer 105 and a patterned top dielectric layer 107 stacked on top of the metal layer 105.

[0034] In some embodiments, substrate 101 may be an elemental semiconductor substrate, such as silicon, diamond, or germanium with a crystalline structure; it may also be a compound semiconductor substrate, such as silicon carbide, gallium arsenide, indium arsenide, or indium phosphide; or an alloy semiconductor substrate, such as silicon germanium, silicon germanium carbide, gallium arsenide phosphide, or gallium indium phosphide. Substrate 101 may also be a silicon-on-insulator (SOI) structure, for example, with a semiconductor material such as silicon, germanium, or silicon-germanium on top of an insulator. The SOI substrate is fabricated by oxygen implantation isolation, wafer bonding, or other suitable methods. Substrate 101 may include various doping configurations depending on design requirements, such as p-type or n-type substrates, and various doped regions, such as p-wells or n-wells, may be formed within substrate 101. As an image sensor, a photosensitive region, such as a photodiode, pinned photodiode, or phototransistor, is formed within substrate 101 to convert incident radiation into electrical signals. In addition, peripheral circuits or pixel control circuits, including metal-oxide-semiconductor field-effect transistors (MOSFETs), complementary metal-oxide-semiconductor (CMOS) transistors, bipolar junction transistors (BJTs), high-voltage transistors, etc., can also be integrated on the substrate 101.

[0035] like Figure 2As shown, an isolation structure 102, such as shallow trench isolation (STI) or deep trench isolation (DTI), can also be provided in the substrate 101 to define and electrically isolate active regions. The formation process of the isolation structure 102 typically includes: forming trenches in the substrate 101 using photolithography and etching processes. The trenches can be formed using anisotropic dry etching. Subsequently, an insulating pad layer can be formed on the inner wall of the trench. The insulating pad layer can include thermally oxidized silicon oxide, or silicon oxide or silicon nitride formed by deposition processes. To repair etching damage and passivate interface states, a high-k dielectric layer, such as hafnium oxide (HfO2), aluminum oxide (Al2O3), tantalum oxide (Ta2O5), lanthanum oxide (La2O3), titanium oxide (TiO2), or combinations thereof, can also be deposited. Then, the trenches are filled with a dielectric material. Filler materials can include silicon oxide, silicon nitride, silicon oxynitride, fluorine-doped silica glass (FSG), low-k dielectric materials, spin-on dielectric (SOD), polysilicon, or combinations thereof. Filling processes can employ high-density plasma-enhanced chemical vapor deposition (HDP-CVD), flowable chemical vapor deposition (FCVD), or atomic layer deposition (ALD). Following filling, annealing is typically performed to densify the filler material, followed by chemical mechanical polishing (CMP) to remove excess dielectric material and planarize the surface. For deep trench isolation (DTI), which can be formed from the front or back of the substrate, it typically has a higher aspect ratio than shallow trench isolation and may include doped polysilicon or a metal grid to further enhance optical isolation. In back-illuminated (BSI) architectures, substrate 101 typically undergoes a back-side thinning process and may be stacked with another carrier wafer or an ASIC wafer containing logic circuitry via oxide-oxide bonding or hybrid bonding, with the grid structure formed on the back light-incident side of substrate 101.

[0036] like Figure 2As shown, a lead-out structure 106 can also be formed on the substrate 101 for realizing electrical connections of the device. The lead-out structure 106 is typically made of a conductive material. Possible materials include aluminum (Al), copper (Cu), aluminum-copper alloy (AlCu), tungsten (W), titanium (Ti), titanium nitride (TiN), tantalum (Ta), tantalum nitride (TaN), copper doped with aluminum, aluminum doped with silicon, or combinations thereof. The lead-out structure 106 can be a single-layer structure or a multi-layer stacked structure, for example, including a bottom barrier layer, a middle main conductive layer, and a top anti-reflective coating. The formation process of the lead-out structure 106 may include depositing a conductive layer, for example, through physical vapor deposition (PVD), sputtering, chemical vapor deposition (CVD), or electroplating processes. After deposition, the conductive layer is patterned using photolithography and etching processes to define the shape of the lead-out structure 106. Alternatively, the lead-out structure 106 can also be formed using an inlay process, which involves first depositing a dielectric layer, etching out openings, depositing a barrier layer and a seed layer, electroplating a filler metal, and finally performing chemical mechanical planarization (CMP). The lead-out structure 106 can be configured as a bonding pad for subsequent electrical connection to an external package via wire bonding, or as a test pad.

[0037] In some embodiments, the substrate includes a lower dielectric layer, and a diffusion barrier layer is disposed between the lower dielectric layer and the metal layer. For example... Figure 2As shown, the lower dielectric layer 103 is located above the substrate 101, and the diffusion barrier layer 104 is located between the lower dielectric layer 103 and the metal layer 105. The lower dielectric layer 103 can be formed of various dielectric materials, including but not limited to silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon carbonitride, and silicon carbonitride. Specific material sources or types can include oxides deposited using tetraethoxysilane (TEOS) as a precursor, undoped silicon glass (USG), and doped silicon glasses such as borosilicate glass (BSG), phosphosilicate glass (PSG), borosilicate-phosphosilicate glass (BPSG), and fluorosilicone glass (FSG). In addition, the lower dielectric layer 103 can also include low dielectric constant (low k) dielectric materials, such as xerogel, aerogel, amorphous fluorinated carbon, parylene, benzocyclobutene (BCB), polyimide, or combinations thereof. The lower dielectric layer 103 can be a single-layer structure or a composite stacked structure with different materials or different composition ratios. A diffusion barrier layer 104 is disposed between the metal layer 105 and the lower dielectric layer 103 to prevent the metal material from diffusing downwards and to improve its adhesion to the lower dielectric layer 103. The diffusion barrier layer 104 may include refractory metals and their nitrides, such as one or more combinations of titanium (Ti), titanium nitride (TiN), tantalum (Ta), tantalum nitride (TaN), tungsten (W), tungsten nitride (WN), titanium silicon nitride (TiSiN), or tantalum silicon nitride (TaSiN). The diffusion barrier layer 104 can be formed by processes such as physical vapor deposition (PVD), chemical vapor deposition (CVD), or atomic layer deposition (ALD).

[0038] In some embodiments, the material of the metal layer includes tungsten. Metal layer 105 is widely used due to its high density and good light-shielding ability. Alternatively, metal layer 105 may also comprise aluminum (Al), copper (Cu), titanium (Ti), tantalum (Ta), molybdenum (Mo), cobalt (Co), or alloys thereof, or a combination of conductive materials with low light transmittance. After deposition, metal layer 105 is typically subjected to a planarization process (such as chemical mechanical polishing, CMP) to provide a flat surface for subsequent photolithography.

[0039] In some embodiments, the process of forming a mesh structure includes: providing a substrate, and sequentially depositing a metal material layer and a top dielectric material layer on the substrate; patterning the top dielectric material layer and the metal material layer using photolithography and etching processes to form a mesh structure with trenches, thereby exposing the sidewalls of the metal layer; in step two, the exposed surface of the metal layer is the sidewall of the metal layer.

[0040] like Figure 2As shown, patterned photoresist 108 is formed on the top dielectric layer 107. The photolithography process includes photoresist coating (spin coating), soft baking, mask alignment, exposure, post-printing baking, photoresist development, rinsing, and drying (e.g., hard baking). Subsequently, as... Figure 3 As shown, etching is performed using photoresist 108 (or the patterned top dielectric layer 107) as a mask to remove part of the top dielectric layer 107 and the metal layer 105, thereby exposing the sidewalls of the metal layer 105. The photoresist 108 is then removed. The etching process can include dry etching (e.g., reactive ion etching, RIE), wet etching, or a combination of both. The etching gas can be selected depending on the material being etched; for example, for the tungsten metal layer 105, a fluorine-containing gas (such as SF6, NF3, CF4) or a chlorine-containing gas (such as Cl2, BCl3) can be used. Since the top dielectric layer 107 covers the top surface of the metal layer 105, and the lower dielectric layer 103 or diffusion barrier layer 104 covers the bottom surface of the metal layer 105, only the sidewalls are exposed to the processing environment.

[0041] In some embodiments, the top dielectric layer serves as a hard mask in the etching process. The top dielectric layer 107 can be a single-layer structure or a multi-layer composite structure, and its material includes silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon carbonitride, amorphous carbon, spin-on carbon (SOC), or silicon-rich oxide, etc. The use of a patterned hard mask helps to maintain control of the critical dimension (CD) when etching the thicker metal layer 105 and prevents the photoresist 108 from being completely consumed during long and intense metal etching processes.

[0042] Step Two, as follows Figure 4 As shown, the mesh structure undergoes surface pretreatment to form a metal nitride layer 109 on the exposed surface of the metal layer 105. This step is performed after the metal mesh etching is completed and it has been cleaned (e.g., wet cleaning to remove etching byproducts). The main purpose of the surface pretreatment is to passivate and modify the exposed sidewalls of the metal layer 105.

[0043] In some embodiments, the gas used for surface pretreatment in step two includes a nitrogen-containing gas.

[0044] In some embodiments, the nitrogen-containing gas is selected from at least one of ammonia, nitrogen, and a mixture of nitrogen and hydrogen. The process can be carried out in a plasma processing chamber or a thermal annealing furnace. If ammonia (NH3) plasma is used, the reactive nitrogen radicals react efficiently with the surface of the metal layer 105, forming a dense and uniform nitrogen-containing layer 109. Process conditions such as processing time, gas flow rate, radio frequency power, and chamber pressure are controlled to generate a layer of the desired thickness while avoiding over-reaction that could damage the linewidth of the metal mesh.

[0045] Specifically, the NH3 treatment can be performed in situ in the same reaction chamber before the deposition of the subsequent backing protective layer 110, or in different chambers of a connected vacuum assembly tool. This not only avoids secondary oxidation of the metal layer caused by exposure of the wafer to the atmosphere during transport, but also improves production efficiency. During the treatment, a grid structure is placed on a heated base within the reaction chamber. Ammonia (NH3) gas is introduced into the chamber at a controlled flow rate, and dilution gases such as nitrogen (N2), helium (He), or argon (Ar) can be mixed in as needed. The process gas is excited to generate plasma using a radio frequency (RF) power source, such as a capacitively coupled plasma (CCP) source or an inductively coupled plasma (ICP) source. Under the bombardment and chemical action of the high-energy particles in the plasma, the ammonia dissociates to produce a large number of highly reactive nitrogen-containing free radicals (such as N, NH, NH2) and hydrogen free radicals (H). Hydrogen radicals, with their reducing properties, effectively remove any natural oxides and residual polymers that may be present on the exposed sidewalls of the metal layer 105. Simultaneously, highly reactive nitrogen radicals diffuse into the interior of the metal layer 105 and react chemically with the surface metal atoms to form a dense metal nitride layer 109. This surface nitriding process typically exhibits self-limiting characteristics; as the thickness of the nitride layer increases, the diffusion resistance of nitrogen atoms increases, and the reaction rate decreases significantly. This results in the metal nitride layer 109 possessing excellent thickness uniformity and conformality, with the thickness typically controlled between a few angstroms and tens of angstroms. This provides sufficient adhesion and barrier properties while minimizing the impact on the critical dimension (CD) of the metal mesh.

[0046] In some embodiments, in step two, the metal nitride layer includes a tungsten nitride layer that covers the sidewalls of the metal layer, serving as an adhesion layer between the metal layer and the gasket protective layer. That is, as... Figure 4 As shown, the layer 109 formed on the sidewalls of the metal layer 105 is a metal nitride (e.g., tungsten nitride); while in other areas (such as the surface of the top dielectric layer 107), the layer 109 formed may be other forms of nitride-modified layers. In this embodiment, the focus is on the tungsten nitride layer covering the sidewalls of the metal layer 105. Tungsten nitride (WN) not only provides a physical barrier but also improves the interfacial energy due to its chemical properties, acting as an "adhesive layer" that significantly enhances the adhesion between the subsequently deposited dielectric material (such as the backing protective layer 110) and the sidewalls of the metal layer 105, preventing delamination.

[0047] Step 3, as follows Figure 5 As shown, a protective liner 110 is deposited on the grid structure and the metal nitride layer.

[0048] In some embodiments, in step three, the material density of the protective pad layer is higher than that of the silicon oxide material. The protective pad layer 110 is configured as a barrier layer, particularly against moisture and oxygen. Its density is typically achieved by selecting specific deposition techniques and precursors, such as applying a bias voltage during deposition to increase ion bombardment, thereby increasing film density. Compared to conventional loose silicon oxide pad layers, the high-density protective pad layer 110 provides superior hermetic encapsulation.

[0049] In some embodiments, in step three, the material of the protective layer includes silicon nitride. Besides silicon nitride, the material of the protective layer 110 may also include silicon oxynitride, silicon carbide, silicon carbonitride, aluminum oxide, hafnium oxide, or other dielectric materials with high dielectric constant (High-k) and good barrier properties. The deposition of the protective layer 110 may employ plasma-enhanced chemical vapor deposition (PECVD), high-density plasma-enhanced chemical vapor deposition (HDP-CVD), or atomic layer deposition (ALD) processes.

[0050] In some embodiments, in step three, the gasket protective layer continuously covers the top surface of the top dielectric layer, the sidewalls of the top dielectric layer, the metal nitride layer, and the bottom of the trench. That is, as... Figure 5 As shown, the gasket protective layer 110 extends along the top surface and sidewalls of the top dielectric layer 107, and the sidewalls of the metal layer 105 covered with the metal nitride layer 109, and covers the bottom of the trench (i.e., the exposed diffusion barrier layer 104 or the surface of the bottom dielectric layer 103). This conformal coverage ensures that the entire mesh structure is sealed, with no exposed metal surfaces coming into contact with subsequent filler material or the environment. The WN (i.e., the metal nitride layer 109) generated by NH3 treatment acts as an adhesion layer, allowing the gasket protective layer 110 to adhere tightly to the sidewalls of the metal mesh, preventing peeling or the formation of microcracks, thereby effectively solving the tungsten corrosion problem caused by insufficient sidewall protection.

[0051] In some embodiments, the image sensor is a back-illuminated complementary metal-oxide-semiconductor image sensor. The protective pad 110 not only provides protection in the back-illuminated process but also improves light transmission efficiency through optical refractive index matching.

[0052] In some embodiments, the substrate includes a lower dielectric layer 103 located below the metal layer 105; in step three, the refractive index of the pad protective layer 110 is higher than that of the lower dielectric layer 103, thereby forming a total internal reflection interface between the pad protective layer 110 and the lower dielectric layer 103. By adjusting the stoichiometry (e.g., silicon-rich silicon nitride) or doping concentration of the pad protective layer 110, its refractive index can be adjusted to be significantly higher than that of the lower dielectric layer, thereby constructing an optical waveguide effect similar to an optical fiber cladding structure. When light travels from the high-refractive-index pad protective layer 110 to the low-refractive-index bottom dielectric layer 103, total internal reflection occurs, confining photons in the optical path above the photodiode, reducing light scattering or absorption by the metal mesh, thereby significantly reducing light loss and improving the quantum efficiency of the image sensor.

[0053] In some embodiments, the material of the lower dielectric layer includes silicon oxide. As previously described, the material of the bottom dielectric layer 103 (including USG, FSG, BPSG, PSG, TEOS oxide, etc.) is an ideal low-refractive-index dielectric material due to its low refractive index, and together with high-refractive-index silicon nitride, forms an effective total internal reflection interface.

[0054] In summary, this embodiment, by introducing nitrogen-containing gas pretreatment after metal mesh etching, generates metal nitrides on the metal surface as an adhesion layer. Combined with a high-refractive-index, high-density pad protective layer and an underlying low-refractive-index dielectric layer, it not only solves the reliability failure problem caused by the easy corrosion of tungsten metal in the BSI process, but also improves the optical performance of the device by utilizing the principle of total internal reflection, thus achieving a dual improvement in reliability and performance.

[0055] In summary, this embodiment, by introducing nitrogen-containing gas pretreatment after metal mesh etching, generates metal nitrides on the metal surface as an adhesion layer. Combined with a high-refractive-index, high-density pad protective layer and an underlying low-refractive-index dielectric layer, it not only solves the reliability failure problem caused by the easy corrosion of tungsten metal in the BSI process, but also improves the optical performance of the device by utilizing the principle of total internal reflection, thus achieving a dual improvement in reliability and performance.

[0056] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0057] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method of manufacturing an image sensor, characterized by, At least including: Step 1: Form a grid structure on the substrate, the grid structure including a patterned metal layer and a patterned top dielectric layer stacked on top of the metal layer; Step 2: Perform surface pretreatment on the mesh structure to form a metal nitride layer on the exposed surface of the metal layer; Step 3: Deposit a protective liner layer on the grid structure and the metal nitride layer.

2. The method of manufacturing an image sensor according to claim 1, wherein: In step one, the material of the metal layer includes tungsten.

3. The method for manufacturing an image sensor according to claim 1, characterized in that: In step one, the process of forming the mesh structure includes: providing a substrate, and sequentially depositing a metal material layer and a top dielectric material layer on the substrate; using photolithography and etching processes to pattern the top dielectric material layer and the metal material layer to form the mesh structure with trenches, thereby exposing the sidewalls of the metal layer; in step two, the exposed surface of the metal layer is the sidewall of the metal layer.

4. The method for manufacturing an image sensor according to claim 1, characterized in that: In step one, the top dielectric layer serves as a hard mask in the etching process.

5. The method for manufacturing an image sensor according to claim 1, characterized in that: In step one, the substrate includes a lower dielectric layer, and a diffusion barrier layer is disposed between the lower dielectric layer and the metal layer.

6. The method for manufacturing an image sensor according to claim 1, characterized in that: In step two, the gas used for surface pretreatment includes nitrogen-containing gas.

7. The method for manufacturing an image sensor according to claim 6, characterized in that: The nitrogen-containing gas is selected from at least one of ammonia, nitrogen, and a mixture of nitrogen and hydrogen.

8. The method for manufacturing an image sensor according to claim 2, characterized in that: In step two, the metal nitride layer includes a tungsten nitride layer that covers the sidewalls of the metal layer and serves as an adhesion layer between the metal layer and the gasket protective layer.

9. The method for manufacturing an image sensor according to claim 1, characterized in that: In step three, the material density of the protective pad layer is higher than that of the silicon oxide material.

10. The method for manufacturing an image sensor according to claim 1, characterized in that: In step three, the material of the gasket protective layer includes silicon nitride.

11. The method for manufacturing an image sensor according to claim 1, characterized in that: In step three, the gasket protective layer continuously covers the top surface of the top dielectric layer, the sidewalls of the top dielectric layer, the metal nitride layer, and the bottom of the trench.

12. The method for manufacturing an image sensor according to claim 1, characterized in that: The image sensor is a back-illuminated complementary metal-oxide-semiconductor image sensor.

13. The method for manufacturing an image sensor according to claim 12, characterized in that: The substrate includes a lower dielectric layer located below the metal layer; in step three, the refractive index of the gasket protective layer is higher than that of the lower dielectric layer, thereby forming a total internal reflection interface between the gasket protective layer and the lower dielectric layer.

14. The method for manufacturing an image sensor according to claim 13, characterized in that: The material of the lower dielectric layer includes silicon oxide.

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