Power control method, storage device, storage system, and computer program product
By obtaining the predicted power value of the flash memory and calculating the remaining power value, the problem of inaccurate power control of storage devices is solved, thereby improving the reliability and heat dissipation capacity of storage devices.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHENZHEN LONGSYS ELECTRONICS CO LTD
- Filing Date
- 2025-01-08
- Publication Date
- 2026-07-10
AI Technical Summary
Existing technologies struggle to accurately control the power of storage devices, leading to heat dissipation and reliability issues.
By obtaining the predicted power value of the flash memory, calculating the remaining power value, and performing I/O operations when the predicted power value is less than or equal to the remaining power value, the power of the flash memory is ensured to remain below the power limit. The predicted power value calculation method includes the calculation of direction parameters and value parameters.
It enables accurate control of storage device power, improving the reliability and heat dissipation capabilities of storage devices.
Smart Images
Figure CN122363594A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of storage technology, specifically to a power control method, storage device, storage system, and computer program product. Background Technology
[0002] Storage devices are typically deployed on electronic devices. Since electronic devices have limited power supply and heat dissipation capabilities, the power consumption of each storage device must be controlled to remain below a certain limit to ensure heat dissipation and reliability. Because the power consumption of a storage device is positively correlated with read / write bandwidth, power consumption can be limited by restricting read / write bandwidth. However, this method has low accuracy and is difficult to meet reliability requirements. Summary of the Invention
[0003] This application provides a power control method, a storage device, a storage system, and a computer program product, aiming to solve the problem of how to accurately control the power of a storage device.
[0004] A first aspect of this application provides a power control method applied to a storage device, the storage device including flash memory. The method includes: in response to an I / O request, obtaining a predicted power value of the flash memory corresponding to the I / O request; calculating a remaining power value based on the flash memory's power ceiling and the used power value; and performing an I / O operation corresponding to the I / O request when the predicted power value is less than or equal to the remaining power value.
[0005] In this embodiment, the I / O operation corresponding to the I / O request is only executed when the predicted power value is less than or equal to the remaining power value. This ensures that the power of the flash memory is kept below the upper limit of the power. Since the power fluctuation of the storage device is mainly affected by the power fluctuation of the flash memory, controlling the power of the flash memory to be kept below the upper limit of the flash memory power can ensure that the power of the storage device is also kept below the upper limit of the storage device power, thereby improving the reliability of the storage device.
[0006] In one embodiment, obtaining the predicted power value of the flash memory corresponding to an I / O request includes: based on an initial power value of performing an I / O operation on the flash memory, measuring a first measured power value of the flash memory at a first time moment, and calculating a first difference between a power upper limit value and the first measured power value. Based on the initial power value and a disturbance power value, measuring a second measured power value of the flash memory at a second time moment, and calculating a second difference between the power upper limit value and the second measured power value. Determining a direction parameter based on the first difference, the second difference, and the disturbance power value. Determining a value parameter based on the first difference and the power upper limit value. Calculating a predicted power value based on the initial power value, the direction parameter, the value parameter, and the update rate parameter.
[0007] In another embodiment, determining the direction parameter based on the first difference, the second difference, and the disturbance power value includes: g = sign [ ( diff_Pj – diff_Pi ) / P0 ] Where g is the direction parameter, diff_Pi is the first difference, diff_Pj is the second difference, P0 is the disturbance power value, and P0 ≠ 0.
[0008] In another embodiment, determining the value parameter based on the first difference and the power upper limit includes: v = |Plm - Pi|, Pi <Plm v = exp ( Pi - Plm ) , Pi>Plm Where v is the value parameter, Plm is the upper limit of power, and Pi is the first measured power value.
[0009] In another embodiment, calculating the predicted power value based on the initial power value, direction parameter, value parameter, and update rate parameter includes: P1´ =P1 – u·g·v Where P1´ is the predicted power value, P1 is the initial power value, u is the update velocity parameter, u ≠ 0, g is the direction parameter, and v is the value parameter.
[0010] In another embodiment, after performing the I / O operation corresponding to the I / O request, the method further includes: releasing the predicted power value.
[0011] In another embodiment, the upper power limit corresponds to T power units, the used power value corresponds to X power units, and the predicted power value corresponds to M power units, where T, X, and M are all positive integers. When M ≤ (T - X), the I / O operation corresponding to the I / O request is executed.
[0012] A second aspect of this application provides a storage device including a controller and flash memory coupled to the controller. The controller is configured to: in response to an I / O request, acquire a predicted power value of the flash memory corresponding to the I / O request; calculate a remaining power value based on the flash memory's power ceiling and used power value; and perform an I / O operation corresponding to the I / O request when the predicted power value is less than or equal to the remaining power value.
[0013] A third aspect of this application provides a storage system including a host and a storage device coupled to the host. The storage device includes flash memory. The host is configured to: in response to an I / O request, obtain a predicted power value of the flash memory corresponding to the I / O request; calculate a remaining power value based on the flash memory's power ceiling and used power value; and control the storage device to perform an I / O operation corresponding to the I / O request when the predicted power value is less than or equal to the remaining power value.
[0014] A fourth aspect of this application provides a computer program product including computer instructions that, when executed by a processor, implement the method provided in the first aspect.
[0015] It is understood that the beneficial effects of the storage device provided in the second aspect, the storage system provided in the third aspect, and the computer program product provided in the fourth aspect of the embodiments of this application are substantially the same as the beneficial effects of the method provided in the first aspect, and will not be repeated here. Attached Figure Description
[0016] Figure 1 This is a schematic diagram of the structure of a storage device provided as an example.
[0017] Figure 2 This is a flowchart of a power control method provided as an example.
[0018] Figure 3 This is a schematic diagram illustrating the interaction between the power manager and the power pool, provided as an example.
[0019] Figure 4 This is a flowchart illustrating an example method for calculating predicted power values.
[0020] Figure 5 This is a schematic diagram of the structure of a storage system provided as an example. Detailed Implementation
[0021] It should be noted that in the embodiments of this application, "several" refers to one or more, and "multiple" refers to two or more. The terms "first," "second," etc., in the specification, claims, and drawings of this application are used to distinguish similar objects, not to describe a specific order or sequence. The methods disclosed in the embodiments of this application, or the methods shown in the flowcharts, include one or more steps for implementing the method. Without departing from the scope of the claims, the execution order of multiple steps can be interchanged, and some steps can also be deleted.
[0022] In the embodiments of this application, the storage device includes, but is not limited to, solid state disk (SSD), enterprise solid state disk (ESSD), universal flash storage (UFS), embedded multi media card (eMMC), and secure digital (SD) card.
[0023] For example, such as Figure 1As shown, the storage device includes a controller 110, an energy storage element 120, a communication interface 130, a dynamic random access memory (DRAM) 140, and several NAND flash memory units 150.
[0024] The controller 110 is electrically connected to the communication interface 130, the dynamic random access memory 140, and several NAND flash memory units 150. The controller 110 performs input / output (I / O) operations on the several NAND flash memory units 150 based on instructions or data from the communication interface 130, or performs I / O operations on the several NAND flash memory units 150 based on instructions or data stored in the dynamic random access memory 140. The I / O operations may include read operations, write operations, and erase operations.
[0025] Energy storage element 120 is electrically connected to controller 110, dynamic random access memory 140, and several NAND flash memory units 150. Energy storage element 120 is charged when the storage device is powered on and supplies power to controller 110, dynamic random access memory 140, and several NAND flash memory units 150 in the event of an abnormal power failure. Energy storage element 120 may include a capacitor.
[0026] Based on the structure of the storage device described above, the power of the storage device can be calculated using formula (1).
[0027] Ps = Pc + Pe + Pd + Pf (1) Wherein, Ps is the power of the storage device, Pc is the power of the controller 110, Pe is the power of the energy storage element 120, Pd is the power of the dynamic random access memory 140, and Pf is the power of the NAND flash memory 150.
[0028] When the storage device is working normally, the power Pe of the energy storage element 120 is negligible, and the power Pc of the controller 110 and the power Pd of the dynamic random access memory 140 are both constant values. Therefore, formula (1) can be simplified to formula (2).
[0029] Ps = Pf + Pb (2) Wherein, Pb is a constant value, representing the sum of the power Pe of the energy storage element 120, the power Pc of the controller 110, and the power Pd of the dynamic random access memory 140.
[0030] The power Pf of the non-flash memory 150 is related to the memory cell and I / O operations. The power required to perform read, write, and erase operations on a single-level cell (SLC) and a triple-level cell (TLC) may differ. Therefore, the power Pf of the non-flash memory 150 can be calculated using formula (3).
[0031] Pf=Nsr·Psr + Nsw·Psw + Nse·Pse + Ntr·Ptr + Ntw·Ptw + Nte·Pte(3) Where Nsr represents the number of read operations currently being performed on the SLC, and Psr represents the power consumption of each read operation on the SLC. Nsw represents the number of write operations currently being performed on the SLC, and Psw represents the power consumption of each write operation on the SLC. Nse represents the number of erase operations currently being performed on the SLC, and Pse represents the power consumption of each erase operation on the SLC. Ntr represents the number of read operations currently being performed on the TLC, and Ptr represents the power consumption of each read operation on the TLC. Ntw represents the number of write operations currently being performed on the TLC, and Ptw represents the power consumption of each write operation on the TLC. Nte represents the number of erase operations currently being performed on the TLC, and Pte represents the power consumption of each erase operation on the TLC.
[0032] As can be seen from formula (2), when the upper limit of the power of the storage device is determined, the upper limit of the power of the non-flash 150 is also determined. As can be seen from formula (3), when the power values of performing I / O operations on SLC and TLC are measured respectively, and the upper limit of the power of the non-flash 150 is determined, the power of the storage device can be controlled to remain below the upper limit of the power, thereby improving the reliability of the storage device.
[0033] The power control method of this application embodiment is described in detail below.
[0034] Power control methods can be applied to storage devices, such as Figure 1 The storage device shown. For example, as... Figure 2 As shown, the power control method includes the following steps: S101. In response to an I / O request, obtain the predicted power value of the flash memory corresponding to the I / O request.
[0035] I / O requests are used to request I / O operations to be performed on the storage cells of flash memory.
[0036] In this embodiment, the storage device stores a power meter, which includes I / O requests and predicted power values of the flash memory corresponding to the I / O requests. For example, when an I / O request is used to request a read operation on the SLC, the predicted power value is A. When an I / O request is used to request a write operation on the SLC, the predicted power value is B. When an I / O request is used to request an erase operation on the SLC, the predicted power value is C. When an I / O request is used to request a read operation on the TLC, the predicted power value is D. When an I / O request is used to request a write operation on the TLC, the predicted power value is E. When an I / O request is used to request an erase operation on the TLC, the predicted power value is F.
[0037] S102. Calculate the remaining power value based on the flash memory's power limit and the power used.
[0038] The power consumption value refers to the power consumed by a task performing I / O operations on a flash memory storage cell.
[0039] In this embodiment, the remaining power value can be calculated using formula (4).
[0040] Psp = Plm – Pue (4) Where Psp is the remaining power value, Plm is the power limit value, and Pue is the power used value.
[0041] S103. Determine whether the predicted power value is less than or equal to the remaining power value.
[0042] If yes, proceed to steps S104-S105; otherwise, return to steps S102-S103.
[0043] S104. Execute the I / O operation corresponding to the I / O request.
[0044] In this embodiment, the I / O operation corresponding to the I / O request is only executed when the predicted power value is less than or equal to the remaining power value, which can ensure that the power of the flash memory is kept below the power limit.
[0045] S105, Release the predicted power value.
[0046] In this embodiment, after the I / O operation corresponding to the I / O request is completed, the predicted power value is released to increase the remaining power value, thereby reserving more remaining power to handle subsequent tasks.
[0047] In some embodiments, the storage device includes a power manager for managing power cells within a power pool of the flash memory. The power pool is a storage space that stores power information of the flash memory. The power pool includes several power cells, each corresponding to a basic power value. All power cells within the power pool correspond to the upper power limit of the flash memory.
[0048] For example, such as Figure 3 As shown, after obtaining the predicted power value of the flash memory corresponding to the I / O request, the power manager requests M power units corresponding to the predicted power value from the power pool. The power pool includes T power units corresponding to the upper power limit and X power units corresponding to the power value used, where T, X, and M are all positive integers. When M ≤ (T - X), the power pool allocates M power units to the power manager. After obtaining the M power units, the power manager performs the I / O operation corresponding to the I / O request on the storage units of the flash memory.
[0049] To accurately obtain the predicted power value, the calculation method for the predicted power value is described in detail below.
[0050] For example, such as Figure 4 As shown, the method for calculating the predicted power value includes the following steps: S201. Based on the initial power value of performing I / O operations on the flash memory, measure the first measured power value of the flash memory at the first moment, and calculate the first difference between the upper limit power value and the first measured power value.
[0051] S202. Based on the initial power value and the disturbance power value, measure the second measured power value of the flash memory at the second time point, and calculate the second difference between the upper limit power value and the second measured power value.
[0052] In this embodiment, a power sensor can be used to measure a first measured power value and a second measured power value of the flash memory. The initial power value and the disturbance power value can be set as needed.
[0053] S203. Determine the directional parameters based on the first difference, the second difference, and the disturbance power value.
[0054] In this embodiment, the direction parameter can be calculated using formula (5).
[0055] g = sign [ ( diff_Pj – diff_Pi ) / P0 ] (5) Where g is the direction parameter, diff_Pi is the first difference, diff_Pj is the second difference, P0 is the disturbance power value, and P0 ≠ 0.
[0056] It is understandable that when (diff_Pj – diff_Pi) / P0 > 0, g = 1; when (diff_Pj – diff_Pi) / P0 < 0, g = -1.
[0057] S204. Determine the value parameters based on the first difference and the upper limit of power.
[0058] In this embodiment, the value parameters can be calculated using formulas (6) and (7).
[0059] v = |Plm - Pi|, Pi <plm (6) v="exp" ( pi - plm ) ,>Plm (7) Where v is the value parameter, Plm is the upper limit of power, and Pi is the first measured power value.
[0060] S205. Calculate the predicted power value based on the initial power value, direction parameter, value parameter, and update rate parameter.
[0061] In this embodiment, the predicted power value can be calculated using formula (8).
[0062] P1´ =P1 – u·g·v (8) Where P1´ is the predicted power value, P1 is the initial power value, u is the update velocity parameter, u ≠ 0, g is the direction parameter, and v is the value parameter. The value of u can be set as needed.
[0063] Taking an erase operation on an SLC as an example, assuming the initial power value for the erase operation on the SLC is 3W and the upper limit of flash memory power is 10W, and the first measured power value is 9W at the first moment, then the first difference is calculated to be 1W. A perturbation of 0.2W is added to the initial power value, and the second measured power value is 8.5W at the second moment, then the second difference is calculated to be 1.5W. The direction parameter g = 1 and the value parameter v = 1 are calculated. When the update speed parameter u = 1, the predicted power value P1´ = 2W.
[0064] Understandably, the predicted power value calculation method can calculate the predicted power value for various operating conditions. By updating the power table using the predicted power value for various operating conditions, the power of the flash memory can be controlled more accurately to keep it below the upper limit.
[0065] The power control method has been explained in detail above. This method can also be applied to storage systems and computer software products. Storage systems and computer software products are briefly described below.
[0066] For example, such as Figure 5 As shown, the storage system includes a host 100 and a storage device 200. The host 100 is coupled to the storage device 200. The storage device 200 includes flash memory 210. The host 100 includes a processor 110 and memory 120, which implement the various steps of the power control method in this embodiment when the processor 110 executes computer instructions stored in the memory 120.
[0067] For example, host 100 may be configured to: in response to an I / O request, obtain a predicted power value of the flash memory corresponding to the I / O request; calculate a remaining power value based on the flash memory's power limit and the used power value; and control storage device 200 to perform an I / O operation corresponding to the I / O request when the predicted power value is less than or equal to the remaining power value.
[0068] Host 100 may include, but is not limited to, smartphones, tablets, personal computers (PCs), e-book readers, workstations, servers, and personal digital assistants (PDAs).
[0069] The computer program product includes computer instructions that, when executed by a processor, implement the various steps of the power control method in the embodiments of this application.
[0070] The embodiments of this application have been described in detail above with reference to the accompanying drawings. However, this application is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of this application.< / plm>
Claims
1. A power control method applied to a storage device, characterized in that, The storage device includes flash memory, and the method includes: In response to an I / O request, obtain the predicted power value of the flash memory corresponding to the I / O request; Calculate the remaining power value based on the power limit and power usage value of the flash memory; When the predicted power value is less than or equal to the remaining power value, perform the I / O operation corresponding to the I / O request.
2. The method as described in claim 1, characterized in that, The step of obtaining the predicted power value of the flash memory corresponding to the I / O request includes: Based on the initial power value of performing the I / O operation on the flash memory, a first measured power value of the flash memory is measured at a first moment, and a first difference between the upper power limit value and the first measured power value is calculated. Based on the initial power value and the disturbance power value, the second measured power value of the flash memory is measured at the second time point, and the second difference between the upper power limit value and the second measured power value is calculated. The directional parameters are determined based on the first difference, the second difference, and the disturbance power value. The value parameter is determined based on the first difference and the upper power limit value; The predicted power value is calculated based on the initial power value, the direction parameter, the value parameter, and the update rate parameter.
3. The method as described in claim 2, characterized in that, The step of determining the direction parameter based on the first difference, the second difference, and the disturbance power value includes: g = sign [ ( diff_Pj – diff_Pi ) / P0 ] Wherein, g is the direction parameter, diff_Pi is the first difference, diff_Pj is the second difference, P0 is the disturbance power value, and P0 ≠ 0.
4. The method as described in claim 2, characterized in that, The step of determining the value parameter based on the first difference and the power upper limit value includes: v = |Plm - Pi|, Pi < Plm v = exp ( Pi - Plm ) , Pi > Plm Where v is the value parameter, Plm is the upper limit of power, and Pi is the first measured power value.
5. The method as described in claim 2, characterized in that, The calculation of the predicted power value based on the initial power value, the direction parameter, the value parameter, and the update rate parameter includes: P1´ =P1 – u·g·v Wherein, P1´ is the predicted power value, P1 is the initial power value, u is the update speed parameter, u ≠ 0, g is the direction parameter, and v is the value parameter.
6. The method according to any one of claims 1-5, characterized in that, After completing the I / O operation corresponding to the I / O request, the method further includes: Release the predicted power value.
7. The method according to any one of claims 1-5, characterized in that, The upper limit power value corresponds to T power units, the used power value corresponds to X power units, and the predicted power value corresponds to M power units, where T, X, and M are all positive integers; When M ≤ (T - X), perform the I / O operation corresponding to the I / O request.
8. A storage device, characterized in that, It includes a controller and flash memory coupled to the controller, the controller being configured to: In response to an I / O request, obtain the predicted power value of the flash memory corresponding to the I / O request; Calculate the remaining power value based on the power limit and power usage value of the flash memory; When the predicted power value is less than or equal to the remaining power value, perform the I / O operation corresponding to the I / O request.
9. A storage system, characterized in that, It includes a host and a storage device coupled to the host, the storage device including flash memory, and the host is configured to: In response to an I / O request, obtain the predicted power value of the flash memory corresponding to the I / O request; Calculate the remaining power value based on the power limit and power usage value of the flash memory; When the predicted power value is less than or equal to the remaining power value, the storage device is controlled to perform the I / O operation corresponding to the I / O request.
10. A computer program product, characterized in that, It includes computer instructions that, when executed by a processor, implement the method as described in any one of claims 1-7.