A GNSS chip working mode switching circuit

Abstract

This invention provides a GNSS chip operating mode switching circuit. The circuit includes an application processor, an operating mode switching unit, and a GNSS chip. The application processor is equipped with first GPIO, second GPIO, and third GPIO input ports, which can be configured as output or input modes to control the operating mode switching of the GNSS chip. The application processor is responsible for setting the level states of the first GPIO, second GPIO, and third GPIO input ports to indicate the desired operating mode. The operating mode switching unit acts as an intermediary, receiving GPIO signals from the application processor and converting these signals into appropriate level states, which are then transmitted to the GNSS chip. Based on the monitored level changes, the GNSS chip adjusts its current operating mode, thereby enabling the GNSS chip to switch between upgrade mode and normal operating mode without the need for a level conversion IC. This also eliminates the need for external control I / O, resulting in low cost. The timing of this application is simple and can be adapted to GNSS modules from different manufacturers.

Description

Technical Field

[0001] This invention relates to the field of signal processing technology, and more specifically, to a GNSS chip-based operating mode switching circuit. Background Technology

[0002] GNSS chips are mainly used in products that require positioning, such as vehicles, logistics, and personal consumer products. Because GNSS chips are bare chips without any internal programs when they leave the factory, they need to be upgraded after being used in a product. Only after the upgrade can the GNSS chip work properly. If a new version is released later, it will also need to be upgraded again.

[0003] Generally, GNSS chips that are already attached to a product need to be upgraded via serial port by another processor. The pin voltage of a typical GNSS chip is 3.3V, while the voltage of a processor is usually 1.8V or 3.3V. In addition to the serial port, the reset pin and function pin usually need to be synchronized.

[0004] Currently, there are two main solutions for scenarios where the processor's pin voltage differs from that of GNSS: one is through a level conversion chip, but this solution is expensive; the other is through an NMOS transistor with a pull-up resistor, but this solution has a drawback: the functional pin has a pull-up resistor in the default state, which prevents the pin from floating, thus preventing the GNSS mode from entering UPG upgrade mode. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a low-cost GNSS chip-based working mode switching circuit to address the shortcomings of the above-mentioned technical solutions.

[0006] This invention provides a GNSS chip-based working mode switching circuit, the circuit including an application processor for processing data tasks on mobile devices and other smart electronic devices, controlling the user interface, processing graphics and audio, and managing network communication, a working mode switching unit, and a GNSS chip;

[0007] The application processor is provided with a first GPIO input port, a second GPIO input port and a third GPIO input port. One end of the working mode switching unit is electrically connected to the first GPIO input port, the second GPIO input port and the third GPIO input port, and the other end is electrically connected to the GNSS chip.

[0008] The working mode switching unit is used to transmit the level values ​​of the first GPIO input port, the second GPIO input port and the third GPIO input port to the GNSS chip;

[0009] The GNSS chip is used to monitor the level values ​​of the first GPIO input port, the second GPIO input port, and the third GPIO input port through the working mode switching unit; when the level in the working mode switching unit changes from high level to low level, or from low level to high level, or is in a high impedance state, or is a floating input, the current working mode of the GNSS chip is adjusted.

[0010] In the GNSS chip-based working mode switching circuit of the present invention, the working modes include an upgrade mode and a normal working mode, wherein the upgrade mode includes a BOOT download upgrade mode and a UPG download upgrade mode.

[0011] In the GNSS chip-based working mode switching circuit of the present invention, the working mode switching unit includes a first switch circuit, a second switch circuit, and a third switch circuit. One end of the first switch circuit is connected to the first GPIO input port, and the other end is electrically connected to the third switch circuit. One end of the second switch circuit is connected to the second GPIO input port, and the other end is electrically connected to the third switch circuit. The third switch circuit is electrically connected to the GNSS chip. When the GNSS chip detects that the first GPIO input port and the second GPIO input port are at a low level and the third GPIO input port is at a high level through the first switch circuit, the second switch circuit, and the third switch circuit, the third switch circuit switches from a high level to a low level, and the GNSS chip automatically enters the normal working mode.

[0012] In the GNSS chip-based working mode switching circuit of the present invention, the working mode switching unit further includes a current limiting circuit and a fourth switching circuit. The current limiting circuit and the fourth switching circuit are connected in series, with one end connected to the third GPIO input port and the other end electrically connected to the GNSS chip. When the GNSS chip detects that the first GPIO input port is at a low level, the second GPIO input port is at a high level, and the third GPIO input port is at a high level through the first switching circuit, the second switching circuit, the third switching circuit, and the fourth switching circuit, the fourth switching circuit switches from a high level to a low level; the GNSS chip automatically enters the BOOT download and upgrade mode.

[0013] In the GNSS chip working mode switching circuit described in this invention, when the GNSS chip detects that the first GPIO input port, the second GPIO input port, and the third GPIO input port are all at a high level through the first switch circuit, the second switch circuit, the third switch circuit, and the fourth switch circuit, the GNSS chip automatically enters the UPG download and upgrade mode.

[0014] In the GNSS chip working mode switching circuit described in this invention, when the GNSS chip detects through the first switch circuit, the second switch circuit, the third switch circuit, and the fourth switch circuit that the first GPIO input port is at a low level, the second GPIO input port and the third GPIO input port are at a high level, and the BOOT pin of the GNSS chip is in a floating state, the GNSS chip automatically enters the UPG download and upgrade mode.

[0015] In the GNSS chip-based working mode switching circuit of the present invention, the first switching circuit includes a first switching transistor, a first pull-up resistor, and a second pull-up resistor; one end of the first pull-up resistor is electrically connected to the first GPIO input port, and the other end is electrically connected to the gate of the first switching transistor; the source of the first switching transistor is electrically connected to the first pull-up resistor, and the gate of the first switching transistor is electrically connected to a voltage of 1.8V; one end of the second pull-up resistor is electrically connected to a voltage of 3.3V, and the other end is electrically connected to the drain of the first switching transistor.

[0016] In the GNSS chip-based working mode switching circuit of the present invention, the second switching circuit includes a second switching transistor and a third pull-up resistor; one end of the third pull-up resistor is electrically connected to the second GPIO input port, and the other end is electrically connected to the gate of the second switching transistor; the source of the second switching transistor is electrically connected to the second pull-up resistor, and the gate of the second switching transistor is electrically connected to a voltage of 1.8V; the drain of the first switching transistor is electrically connected to the third switching circuit.

[0017] In the GNSS chip-based working mode switching circuit of the present invention, the third switching circuit includes a third switching transistor and a fourth pull-up resistor; one end of the fourth pull-up resistor is electrically connected to a 3.3V voltage, and the other end is electrically connected to the common terminal of the drain of the second switching transistor and the source of the third switching transistor; the drain of the third switching transistor is electrically connected to the BOOT pin of the GNSS chip.

[0018] In the GNSS chip-based working mode switching circuit of the present invention, the fourth switching circuit includes a fourth switching transistor and a fifth pull-up resistor; one end of the fifth pull-up resistor is electrically connected to a 3.3V voltage, and the other end is electrically connected to the drain of the fourth switching transistor; the source of the fourth switching transistor is grounded, and the gate of the fourth switching transistor is electrically connected to a current limiting circuit; the drain of the fourth switching transistor is electrically connected to the RESET pin of the GNSS chip.

[0019] The GNSS chip operating mode switching circuit of this invention is equipped with a first GPIO, a second GPIO, and a third GPIO input port via an application processor. These ports can be configured to control the operating mode switching of the GNSS chip as either output or input modes. The application processor is responsible for setting the level states (high level, low level, high impedance) of the first GPIO, second GPIO, and third GPIO input ports to indicate the desired operating mode. The operating mode switching unit acts as an intermediary, receiving GPIO signals from the application processor and converting these signals into appropriate level states to be transmitted to the GNSS chip. Based on the monitored level changes (rising edge, falling edge, high impedance, or floating input), the GNSS chip adjusts its current operating mode, thereby enabling the GNSS chip to switch between upgrade mode and normal operating mode without the need for a level conversion IC. This also eliminates the need for external control I / O, resulting in low cost. This application has a simple timing, is compatible with GNSS modules from different manufacturers, and is not only simple in structure and easy to manufacture, but also safe and reliable in use, facilitating implementation and widespread application. Attached Figure Description

[0020] Figure 1 This is a circuit schematic diagram of the GNSS chip working mode switching circuit of the present invention;

[0021] Figure 2 This is a timing diagram of the GNSS chip entering normal working mode in the GNSS chip working mode switching circuit of the present invention;

[0022] Figure 3 This is a timing diagram of the GNSS chip entering the BOOT download and upgrade mode in the GNSS chip working mode switching circuit of the present invention;

[0023] Figure 4 This is a timing diagram of the GNSS chip entering UGP upgrade and download mode in the GNSS chip working mode switching circuit of this invention. Detailed Implementation

[0024] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0025] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0026] like Figure 1-4 As shown, where, Figure 1 This is a circuit schematic diagram of an embodiment of a GNSS chip-based working mode switching circuit according to the present invention. A GNSS chip-based working mode switching circuit is provided, the circuit including an application processor for processing data tasks on mobile devices and other intelligent electronic devices, controlling the user interface, processing graphics and audio, and managing network communications, a working mode switching unit, and a GNSS chip;

[0027] The application processor is provided with a first GPIO input port, a second GPIO input port and a third GPIO input port. One end of the working mode switching unit is electrically connected to the first GPIO input port, the second GPIO input port and the third GPIO input port, and the other end is electrically connected to the GNSS chip.

[0028] The working mode switching unit is used to transmit the level values ​​of the first GPIO input port, the second GPIO input port and the third GPIO input port to the GNSS chip;

[0029] The GNSS chip is used to monitor the level values ​​of the first GPIO input port, the second GPIO input port, and the third GPIO input port through the working mode switching unit; when the level in the working mode switching unit changes from high level to low level, or from low level to high level, or is in a high impedance state, or is a floating input, the current working mode of the GNSS chip is adjusted.

[0030] In one embodiment, the operating mode includes an upgrade mode and a normal operating mode, wherein the upgrade mode includes a BOOT download upgrade mode and a UPG download upgrade mode.

[0031] In one embodiment, the operating mode switching unit includes a first switch circuit, a second switch circuit, and a third switch circuit; one end of the first switch circuit is connected to the first GPIO input port, and the other end is electrically connected to the third switch circuit; one end of the second switch circuit is connected to the second GPIO input port, and the other end is electrically connected to the third switch circuit; the third switch circuit is electrically connected to the GNSS chip; when the GNSS chip detects through the first switch circuit, the second switch circuit, and the third switch circuit that the first GPIO input port and the second GPIO input port are at a low level, and the third GPIO input port is at a high level, the third switch circuit switches from a high level to a low level; the GNSS chip automatically enters the normal operating mode.

[0032] In one embodiment, the operating mode switching unit further includes a current limiting circuit and a fourth switching circuit. The current limiting circuit and the fourth switching circuit are connected in series, with one end connected to the third GPIO input port and the other end electrically connected to the GNSS chip. When the GNSS chip detects that the first GPIO input port is at a low level, the second GPIO input port is at a high level, and the third GPIO input port is at a high level through the first switching circuit, the second switching circuit, the third switching circuit, and the fourth switching circuit, the fourth switching circuit switches from a high level to a low level; the GNSS chip automatically enters the BOOT download and upgrade mode.

[0033] In one embodiment, when the GNSS chip detects that the first GPIO input port, the second GPIO input port, and the third GPIO input port are all at a high level through the first switch circuit, the second switch circuit, the third switch circuit, and the fourth switch circuit, the GNSS chip automatically enters the UPG download and upgrade mode.

[0034] In one embodiment, when the GNSS chip detects through the first switch circuit, the second switch circuit, the third switch circuit, and the fourth switch circuit that the first GPIO input port is at a low level, the second GPIO input port and the third GPIO input port are at a high level, and the BOOT pin of the GNSS chip is in a floating state, the GNSS chip automatically enters the UPG download and upgrade mode.

[0035] In one embodiment, the first switching circuit includes a first switching transistor, a first pull-up resistor, and a second pull-up resistor; one end of the first pull-up resistor is electrically connected to the first GPIO input port, and the other end is electrically connected to the gate of the first switching transistor; the source of the first switching transistor is electrically connected to the first pull-up resistor, and the gate of the first switching transistor is electrically connected to a voltage of 1.8V; one end of the second pull-up resistor is electrically connected to a voltage of 3.3V, and the other end is electrically connected to the drain of the first switching transistor.

[0036] In one embodiment, the second switching circuit includes a second switching transistor and a third pull-up resistor; one end of the third pull-up resistor is electrically connected to the second GPIO input port, and the other end is electrically connected to the gate of the second switching transistor; the source of the second switching transistor is electrically connected to the second pull-up resistor, and the gate of the second switching transistor is electrically connected to a voltage of 1.8V; the drain of the first switching transistor is electrically connected to the third switching circuit.

[0037] In one embodiment, the third switching circuit includes a third switching transistor and a fourth pull-up resistor; one end of the fourth pull-up resistor is electrically connected to a 3.3V voltage, and the other end is electrically connected to the common terminal of the drain of the second switching transistor and the source of the third switching transistor; the drain of the third switching transistor is electrically connected to the BOOT pin of the GNSS chip.

[0038] In one embodiment, the fourth switching circuit includes a fourth switching transistor and a fifth pull-up resistor; one end of the fifth pull-up resistor is electrically connected to a 3.3V voltage, and the other end is electrically connected to the drain of the fourth switching transistor; the source of the fourth switching transistor is grounded, and the gate of the fourth switching transistor is electrically connected to a current limiting circuit; the drain of the fourth switching transistor is electrically connected to the RESET pin of the GNSS chip.

[0039] The application processor is an integrated circuit chip used to process data tasks on mobile devices and other intelligent electronic devices, control the user interface, process graphics and audio, and manage network communications. In this application, the application processor's I / O levels are all 1.8V. The first and third GPIO input ports are ordinary pins that can be used for output functions, while the second GPIO input port, in addition to ordinary output, can also be multiplexed as a UART TX function to send serial data and upgrade package data to the GNSS chip.

[0040] A GNSS chip is a global navigation satellite system chip used to receive and process signals from multiple satellites to achieve high-precision and stable positioning services. The pin voltage of a GNSS chip is typically 3.3V. The application processor can receive positioning data output by the GNSS chip through the second GPIO input port as a UART port, and can also perform program upgrades on the GNSS chip through the second GPIO input port. The different operating modes of the GNSS chip are mainly determined by the different states of the BOOT and RESET pins.

[0041] In this application, the first pull-up resistor R1, the second pull-up resistor R2, the third pull-up resistor R3, the fourth pull-up resistor R4, and the fifth pull-up resistor R6 are used to provide a high level to the pin; R5 is a current-limiting resistor to prevent overcurrent at the gate of the fourth switching transistor Q4.

[0042] In this application, the GNSS chip is powered by 3.3V, and the BOOT and RESET pins of the GNSS chip are also at 3.3V level; the BOOT and RESET pins of the application processor are powered by 1.8V.

[0043] In this application, the first switch Q1, the second switch Q2 and the fourth switch Q4 are NMOS transistors, which will only conduct when the gate-source voltage Vgs is higher than the threshold voltage Vgs(th); the third switch Q3 is a PMOS transistor, which will only conduct when the gate-source voltage Vgs is lower than the threshold voltage Vgs(th).

[0044] GNSS chips have an upgrade mode and a normal operating mode. The upgrade mode includes BOOT download upgrade mode and UPG download upgrade mode. The BOOT download upgrade mode erases and upgrades the entire memory of the GNSS chip, while the UPG download upgrade mode only upgrades a portion of the memory.

[0045] In practical applications, when the system is powered on, the 1.8V and 3.3V voltages in this application are normal.

[0046] In normal operating mode, the software first sets the first and second GPIO input ports to low level (0V), while simultaneously setting the third GPIO input port to high level (1.8V). At this time, the first switch Q1's VGS is greater than the threshold voltage Vgs(th), causing it to conduct. The gate (G) of the third switch Q3 is pulled low (0V). The source (S) of the second switch Q2 is set low (0V), and since its gate voltage is 1.8V and VGS is greater than the threshold voltage Vgs(th), Q2 conducts. The source (S) of the third switch Q3 is pulled low (0V), and its gate (G) is also low. Because its VGS is greater than the threshold voltage Vgs(th), it is turned off. Due to the body diode in the third switch Q3, the GNSS chip's BOOT pin is pulled low. With the third GPIO input port high and the source terminal (S) of the fourth switch Q4 low, the fourth switch Q4 is turned on. The RESET pin of the GNSS chip is low, so the GNSS chip begins its reset. After waiting 50ms, the third GPIO input port is pulled low, completing the GNSS chip reset. During the reset process, the GNSS chip detects the BOOT pin is low. After the reset is complete, the GNSS chip automatically enters normal operating mode. At this time, the application processor's second GPIO input port is multiplexed as the UART's TX function to send data or commands to the GNSS chip.

[0047] In BOOT download and upgrade mode, the software first sets the first GPIO input port to low and the second GPIO input port to high. The first switching transistor Q1 will conduct, and the gate (G) of the third switching transistor Q3 will be pulled low. The source (S) voltage of the second switching transistor Q2 is 1.8V, and the gate voltage is also 1.8V. Since Vgs is less than the threshold voltage Vgs(th), the second switching transistor Q2 will be turned off. Simultaneously, the source (S) of the third switching transistor Q3 is pulled high to 3.3V by the fourth pull-up resistor R4, while the gate (G) of the third switching transistor Q3 is low, so the third switching transistor Q3 will conduct, and the BOOT pin of the GNSS chip will be pulled high to 3.3V. With the third GPIO input port high and the source (S) of the fourth switching transistor Q4 low, the fourth switching transistor Q4 will conduct, and the RESET pin of the GNSS chip will be low, thus initiating the GNSS reset. After waiting 50ms, the level of the third GPIO input port is pulled low, and the GNSS chip reset is complete. During the reset process, the GNSS chip detects that the BOOT pin is high, and the reset is complete at this time.

[0048] After a 20ms wait, the level of the second GPIO input port is pulled low. The source (S) of the second switch Q2 is set to low (0V), and the gate (G) is 1.8V. Since VGS is greater than the threshold voltage Vgs(th), Q2 is turned on. The source (S) of the third switch Q3 is pulled low (0V), and the gate (G) is also low. Since VGS is less than the threshold voltage Vgs(th), Q3 is turned off. Due to the body diode in Q3, the GNSS chip's BOOT pin is ultimately pulled low. After a 50ms wait, the software sets the second GPIO input port to the UART's TX function. The GNSS chip will then enter BOOT upgrade mode, at which point the application processor can send a BOOT upgrade packet to the GNSS chip through the second GPIO input port.

[0049] The BOOT download and upgrade mode is similar to the normal operation mode, but after the reset is completed, the second GPIO input port is pulled low again, causing the BOOT pin to be pulled low through the body diode, thereby triggering the GNSS chip to enter the BOOT download and upgrade mode, allowing the application processor to send the BOOT upgrade package.

[0050] In UPG download upgrade mode, the first and third GPIO input ports are initially set to high level, while the second GPIO input port remains high and idle as a UART. This causes the GNSS chip's BOOT pin to be in a floating state. Upon detecting this state during the reset process, the GNSS chip enters UPG download upgrade mode, at which point it can send UPG upgrade packets through the second GPIO input port. Specifically, in UPG download upgrade mode, the first and third GPIO input ports are both high, while the UART of the second GPIO input port remains idle, i.e., the second GPIO input port is high. With the first GPIO input port high, the first switch Q1 is not turned on, and the gate (G) of the third switch Q3 is pulled high by the second pull-up resistor R2. The second GPIO input port outputs a high level, the second switch Q2 is not turned on, and the source (S) of the third switch Q3 is pulled high to 3.3V by the fourth pull-up resistor R4, so the third switch Q3 is not turned on, ultimately causing the GNSS chip's BOOT pin to be in a floating state. The third GPIO input port is high, and the source terminal of the fourth switch Q4 is low, so the fourth switch Q4 is turned on. The RESET pin of the GNSS chip is low, so the GNSS starts to reset.

[0051] After a 50ms wait, the third GPIO input port is pulled low, completing the GNSS chip reset. Simultaneously, the first GPIO input port is set low, turning on the first switch Q1 and pulling the gate (G) of the third switch Q3 low. During the reset process, the GNSS chip detects the BOOT pin is floating, at which point it enters UPG download / upgrade mode. Once in UPG download / upgrade mode, the second GPIO input port can send the UPG upgrade package to the GNSS chip via the UART's TX function.

[0052] The beneficial effects of the GNSS chip operating mode switching circuit provided in this embodiment of the invention are at least as follows:

[0053] 1. This application only requires an additional IO port to control the GNSS chip to enter three modes: normal operation, BOOT download and upgrade, and UPG download and upgrade.

[0054] 2. This application does not require a level conversion IC for conversion, and can also eliminate the need for external control I / O, thus reducing resources and costs.

[0055] 3. The timing of this application is simple and can be adapted to GNSS modules from different manufacturers.

[0056] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that the present invention is not limited to the described order of actions, because according to the present invention, some steps can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to the present invention.

[0057] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0058] Therefore, the above description is only a preferred embodiment of the present invention, and the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention. The scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A GNSS chip-based working mode switching circuit, the circuit comprising an application processor for processing data tasks on mobile devices and other intelligent electronic devices, controlling the user interface, processing graphics and audio, and managing network communications, a working mode switching unit, and a GNSS chip; The application processor is provided with a first GPIO input port, a second GPIO input port and a third GPIO input port. One end of the working mode switching unit is electrically connected to the first GPIO input port, the second GPIO input port and the third GPIO input port, and the other end is electrically connected to the GNSS chip. The working mode switching unit is used to transmit the level values ​​of the first GPIO input port, the second GPIO input port and the third GPIO input port to the GNSS chip; The GNSS chip is used to monitor the level values ​​of the first GPIO input port, the second GPIO input port, and the third GPIO input port through the working mode switching unit; when the level in the working mode switching unit changes from high level to low level, or from low level to high level, or is in a high impedance state, or is a floating input, the current working mode of the GNSS chip is adjusted.

2. The GNSS chip-based working mode switching circuit according to claim 1, characterized in that, The operating modes include an upgrade mode and a normal operating mode, wherein the upgrade mode includes a BOOT download upgrade mode and a UPG download upgrade mode.

3. The GNSS chip-based working mode switching circuit according to claim 2, characterized in that, The operating mode switching unit includes a first switch circuit, a second switch circuit, and a third switch circuit. One end of the first switch circuit is connected to the first GPIO input port, and the other end is electrically connected to the third switch circuit. One end of the second switch circuit is connected to the second GPIO input port, and the other end is electrically connected to the third switch circuit. The third switch circuit is electrically connected to the GNSS chip. When the GNSS chip detects that the first GPIO input port and the second GPIO input port are at a low level and the third GPIO input port is at a high level through the first switch circuit, the second switch circuit, and the third switch circuit, the third switch circuit switches from a high level to a low level, and the GNSS chip automatically enters the normal operating mode.

4. The GNSS chip-based operating mode switching circuit according to claim 3, characterized in that, The working mode switching unit further includes a current limiting circuit and a fourth switching circuit. The current limiting circuit and the fourth switching circuit are connected in series, with one end connected to the third GPIO input port and the other end electrically connected to the GNSS chip. When the GNSS chip detects that the first GPIO input port is at a low level, the second GPIO input port is at a high level, and the third GPIO input port is at a high level through the first switching circuit, the second switching circuit, the third switching circuit, and the fourth switching circuit, the fourth switching circuit switches from a high level to a low level; the GNSS chip automatically enters the BOOT download and upgrade mode.

5. The GNSS chip-based operating mode switching circuit according to claim 4, characterized in that, When the GNSS chip detects that the first GPIO input port, the second GPIO input port, and the third GPIO input port are all at a high level through the first switch circuit, the second switch circuit, the third switch circuit, and the fourth switch circuit, the GNSS chip automatically enters the UPG download and upgrade mode.

6. The GNSS chip-based working mode switching circuit according to claim 5, characterized in that, When the GNSS chip detects that the first GPIO input port is low and the second and third GPIO input ports are high through the first, second, third, and fourth switching circuits, and the BOOT pin of the GNSS chip is floating, the GNSS chip automatically enters the UPG download and upgrade mode.

7. The GNSS chip-based operating mode switching circuit according to claim 6, characterized in that, The first switching circuit includes a first switching transistor, a first pull-up resistor, and a second pull-up resistor; one end of the first pull-up resistor is electrically connected to the first GPIO input port, and the other end is electrically connected to the gate of the first switching transistor; the source of the first switching transistor is electrically connected to the first pull-up resistor, and the gate of the first switching transistor is electrically connected to a voltage of 1.8V; one end of the second pull-up resistor is electrically connected to a voltage of 3.3V, and the other end is electrically connected to the drain of the first switching transistor.

8. The GNSS chip-based operating mode switching circuit according to claim 7, characterized in that, The second switching circuit includes a second switching transistor and a third pull-up resistor; one end of the third pull-up resistor is electrically connected to the second GPIO input port, and the other end is electrically connected to the gate of the second switching transistor; the source of the second switching transistor is electrically connected to the second pull-up resistor, and the gate of the second switching transistor is electrically connected to a voltage of 1.8V; the drain of the first switching transistor is electrically connected to the third switching circuit.

9. The GNSS chip-based working mode switching circuit according to claim 8, characterized in that, The third switching circuit includes a third switching transistor and a fourth pull-up resistor; one end of the fourth pull-up resistor is electrically connected to a 3.3V voltage, and the other end is electrically connected to the common terminal of the drain of the second switching transistor and the source of the third switching transistor; the drain of the third switching transistor is electrically connected to the BOOT pin of the GNSS chip.

10. The GNSS chip-based operating mode switching circuit according to claim 9, characterized in that, The fourth switching circuit includes a fourth switching transistor and a fifth pull-up resistor; one end of the fifth pull-up resistor is electrically connected to a 3.3V voltage, and the other end is electrically connected to the drain of the fourth switching transistor; the source of the fourth switching transistor is grounded, and the gate of the fourth switching transistor is electrically connected to a current limiting circuit; the drain of the fourth switching transistor is electrically connected to the RESET pin of the GNSS chip.

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