A rectifier circuit for a wide input voltage range of a communication power supply

Abstract

This application belongs to the field of communication power supply technology and discloses a rectifier circuit with a wide input voltage range for communication power supplies. The circuit includes: a protection circuit for overcurrent, overvoltage, and electromagnetic interference protection of the input voltage; a PFC rectifier circuit, with its input terminal connected to the output terminal of the protection circuit, for rectifying the input voltage; an isolation circuit, with its input terminal connected to the output terminal of the PFC rectifier circuit, for electrically isolating the rectified input voltage; an output filter circuit, with its input terminal connected to the output terminal of the isolation circuit, for filtering the electrically isolated input voltage and outputting a DC voltage; and a control circuit electrically connected to the protection circuit, PFC rectifier circuit, isolation circuit, and output filter circuit, for generating a PWM drive signal based on the filtered input voltage to control the operating mode of each circuit. This application enables stable and efficient operation of the communication power supply within a range from 85V ultra-low voltage to 264V high voltage.

Description

Technical Field

[0001] This application belongs to the field of communication power supply technology, and specifically relates to a rectifier circuit with a wide input voltage range for communication power supplies. Background Technology

[0002] Traditional communication power supply rectifier circuits typically employ fixed topologies with narrow input voltage ranges, making it difficult to adapt to different regional AC input voltage standards (such as 110V AC and 220V AC systems). This is especially problematic when the input voltage fluctuates significantly or is at extremely low voltages (such as below 85V AC), exhibiting the following shortcomings: First, traditional rectifier bridges generate a fixed voltage drop of approximately 1.4V under low-voltage, high-current conditions, leading to a significant decrease in PFC stage efficiency and concentrated thermal stress, limiting the circuit's minimum operating voltage boundary. Second, the fixed isolation stage topology lacks secondary-side voltage multiplication or primary-side gain regulation capabilities, making it prone to output voltage drops when the input voltage is too low, hindering stable output. Third, the single resonant network cannot simultaneously achieve high gain and high efficiency over a wide voltage range, resulting in insufficient voltage adaptability. Fourth, the simple control strategy lacks adaptive mode switching capabilities based on input voltage detection, failing to automatically reconfigure the circuit's operating mode to match different input conditions. In summary, traditional solutions struggle to simultaneously achieve high power factor, low harmonic distortion, high efficiency, and ultra-low voltage stability under wide input voltage conditions. Furthermore, their systemic protection against overcurrent, overvoltage, and electromagnetic interference is inadequate, limiting their reliable application in complex power grid environments. Therefore, there is an urgent need for a rectifier circuit capable of automatically reconfiguring its operating mode based on input voltage levels and possessing wide input voltage adaptability, in order to improve the versatility and operational reliability of communication power supplies.

[0003] In view of the above problems, there is an urgent need for a rectifier circuit that can automatically reconfigure the working mode according to the input voltage level and has a wide input voltage adaptability, so as to improve the versatility and operational reliability of communication power supplies. Summary of the Invention

[0004] In view of the shortcomings of the prior art, the purpose of this application is to provide a rectifier circuit with a wide input voltage range for communication power supplies. This application aims to achieve stable output voltage, high power factor and high efficiency operation over a wide input range from ultra-low voltage to high voltage.

[0005] To achieve the above objectives, this application provides the following technical solution: A rectifier circuit with a wide input voltage range for communication power supplies, the circuit comprising: a protection circuit for overcurrent, overvoltage, and electromagnetic interference protection of the input voltage; a PFC rectifier circuit, with its input terminal connected to the output terminal of the protection circuit, for rectifying the input voltage; an isolation circuit, with its input terminal connected to the output terminal of the PFC rectifier circuit, for electrically isolating the rectified input voltage; an output filter circuit, with its input terminal connected to the output terminal of the isolation circuit, for filtering the electrically isolated input voltage and outputting a DC voltage; and a control circuit electrically connected to the protection circuit, the PFC rectifier circuit, the isolation circuit, and the output filter circuit, for generating a PWM drive signal based on the filtered input voltage to control the operating mode of each circuit.

[0006] Optionally, the protection circuit includes: a thermistor, a fuse, a first X capacitor, a second X capacitor, a first Y capacitor, a second Y capacitor, a first ferrite bead, a second ferrite bead, a varistor, and a gas discharge tube. The first end of the fuse is connected to the AC input live wire, and the second end is connected to the first end of the thermistor. The second end of the thermistor is connected to the first end of the first X capacitor to form a first node. The second end of the first X capacitor is connected to the AC input neutral wire. The first end of the first Y capacitor is connected to the first node, and the second end is connected to protective ground. The first end of the second X capacitor is connected to the first node, and the second end is connected to the AC input neutral wire and simultaneously to the first end of the second Y capacitor. The second end of the second Y capacitor is connected to protective ground. The first end of the first ferrite bead is connected to the first node, and the second end serves as the output live wire. The first end of the second ferrite bead is simultaneously connected to the AC input neutral wire and the first end of the second Y capacitor, and the second end serves as the output neutral wire. The varistor is connected between the output live wire and the output neutral wire. The first end of the first gas discharge tube is connected to protective ground, and the second end is connected to the output live wire.

[0007] Optionally, the PFC rectifier circuit includes: a first branch, which is a high-frequency branch, including a first MOSFET, a second MOSFET, a first high-frequency inductor, a first pull-down resistor, a second pull-down resistor, a first fast recovery diode, and a second fast recovery diode. The first terminal of the first high-frequency inductor is connected to the output live wire of the protection circuit, and the second terminal is connected to the drain of the first MOSFET to form a second node. The source of the first MOSFET is connected to the negative terminal of the PFC bus, and the gate is connected to the first drive signal output terminal of the control circuit. The first pull-down resistor is connected in parallel between the gate and source of the first MOSFET. The drain of the second MOSFET is connected to the positive terminal of the PFC bus, the source is connected to the second node, and the gate is connected to the second drive signal output terminal of the control circuit. The second pull-down resistor is connected in parallel between the gate and source of the second MOSFET. The anode of the first fast recovery diode is connected to the negative terminal of the PFC bus, and the cathode is connected to the second node. The anode of the second fast recovery diode is connected to the second node, and the cathode is connected to the positive terminal of the PFC bus.

[0008] Optionally, the PFC rectifier circuit further includes: a second branch, which is a power frequency branch, including a third MOSFET, a fourth MOSFET, a third pull-down resistor, and a fourth pull-down resistor, wherein the drain of the third MOSFET is connected to the output live wire of the protection circuit, the source is connected to the negative terminal of the PFC bus, and the gate is connected to the third drive signal output terminal of the control circuit; the third pull-down resistor is connected in parallel between the gate and the source of the third MOSFET; the drain of the fourth MOSFET is connected to the output neutral wire of the protection circuit, the source is connected to the negative terminal of the PFC bus, and the gate is connected to the fourth drive signal output terminal of the control circuit; the fourth pull-down resistor is connected in parallel between the gate and the source of the fourth MOSFET.

[0009] Optionally, the isolation circuit includes: a primary-side reconfigurable inverter network, comprising: a transformer, a first switch, a second switch, a third switch, and a fourth switch, wherein the drain of the first switch is connected to the positive terminal of the PFC bus, the source of the first switch is connected to the drain of the second switch to form a third node, and the gate of the first switch is connected to the fifth drive signal output terminal of the control circuit; the source of the second switch is connected to the negative terminal of the PFC bus, and the gate of the second switch is connected to the sixth drive signal output terminal of the control circuit; the drain of the third switch is connected to the positive terminal of the PFC bus, the source of the third switch is connected to the drain of the fourth switch to form a fourth node, and the gate of the third switch is connected to the seventh drive signal output terminal of the control circuit; the source of the fourth switch is connected to the negative terminal of the PFC bus, and the gate of the fourth switch is connected to the eighth drive signal output terminal of the control circuit; the first end of the primary side of the transformer is connected to the third node, and the second end is connected to the fourth node.

[0010] Optionally, the isolation circuit further includes: a secondary-side reconfigurable rectifier network, comprising: a fifth switch, a first voltage doubler capacitor, a second voltage doubler capacitor, and a rectifier bridge, wherein the rectifier bridge includes a third diode, a fourth diode, a fifth diode, and a sixth diode; the cathode of the third diode is connected to the positive output terminal, the anode of the fourth diode is connected to the negative output terminal, and the anodes of the third and fourth diodes are simultaneously connected to the first terminal of the transformer secondary winding; the cathode of the fifth diode is connected to the positive output terminal of the rectifier bridge, the anode of the sixth diode is connected to the negative output terminal of the rectifier bridge, and the anodes of the fifth and sixth diodes are simultaneously connected to the second terminal of the transformer secondary winding; the first and second voltage doubler capacitors are connected in series, the first terminal of the first voltage doubler capacitor is connected to the positive output terminal of the rectifier bridge, the first terminal of the second voltage doubler capacitor is connected to the negative output terminal of the rectifier bridge, the drain of the fifth switch is connected to the center tap of the transformer secondary winding, the source is connected to the junction of the second terminals of the first and second voltage doubler capacitors, and the gate is connected to the ninth drive signal output terminal of the control circuit.

[0011] Optionally, the isolation circuit further includes a dual resonant cavity, comprising: a first resonant capacitor, a second resonant capacitor, a first resonant inductor, and a second resonant inductor, wherein the first resonant capacitor and the first resonant inductor are connected in series to form a first resonant branch, which is connected across the third node and the first end of the primary side of the transformer; the second resonant capacitor and the second resonant inductor are connected in series to form a second resonant branch, which is connected across the fourth node and the second end of the primary side of the transformer.

[0012] Optionally, the output filtering circuit includes: a synchronous rectification unit, a filter inductor, a first filter capacitor, a second filter capacitor, a dynamic discharge switch, and a discharge resistor. The synchronous rectification unit includes a first synchronous rectifier diode and a second synchronous rectifier diode. The drain of the first synchronous rectifier diode is connected to the first terminal of the secondary side of the transformer, and its source is connected to the positive output terminal of the rectifier bridge. The drain of the second synchronous rectifier diode is connected to the second terminal of the secondary side of the transformer, and its source is connected to the negative output terminal of the rectifier bridge. The gates of the first and second synchronous rectifier diodes are respectively connected to the tenth and eleventh drive signal output terminals of the control circuit. The first terminal of the filter inductor is connected to the positive output terminal of the rectifier bridge, and the second terminal is connected to the first terminal of the first filter capacitor. The second terminal of the first filter capacitor is connected to the negative output terminal of the rectifier bridge. The second filter capacitor and the dynamic discharge switch are connected in series and then in parallel across the two ends of the first filter capacitor. The discharge resistor is connected in parallel across the two ends of the second filter capacitor.

[0013] Optionally, the control circuit includes: a main controller, which is electrically connected to an input voltage detection unit, a mode switching logic unit, and a current detection unit. The input voltage detection unit is used to acquire the AC voltage at the output of the protection circuit in real time and convert it into a digital signal for the control circuit to determine the current input voltage range. The mode switching logic unit is used to automatically switch the operating mode of the rectifier circuit by comparing the voltage value fed back by the input voltage detection unit with a preset threshold. The current detection unit is used to acquire the PFC bus current and the rectified output current before the output filter circuit in real time, providing the control circuit with the current feedback signal required for overcurrent protection and closed-loop regulation.

[0014] Optionally, the input voltage detection unit includes: a first voltage divider resistor and a second voltage divider resistor, wherein the first end of the first voltage divider resistor is connected to the output live wire of the protection circuit, the second end is connected to the output neutral wire of the protection circuit via the second voltage divider resistor, and the connection point of the first voltage divider resistor and the second voltage divider resistor is connected to the first ADC input pin of the main controller for real-time acquisition of input voltage.

[0015] Compared with the prior art, the beneficial effects of this application are as follows: This application achieves stable and efficient operation of communication power supplies from 85V ultra-low voltage to 264V high voltage through the coordinated operation of four aspects: PFC rectification to reduce low voltage loss, transformer secondary voltage multiplication to improve low voltage output capability, primary reconfigurable resonant cavity to adapt to different gain requirements, and intelligent sensing and automatic switching of control circuit. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the overall structure of a rectifier circuit with a wide input voltage range for a communication power supply, provided in one embodiment of this application. Figure 2 yes Figure 1 A schematic diagram of the circuit structure of the intermediate protection circuit; Figure 3 yes Figure 1 A schematic diagram of the PFC rectifier circuit in the middle; Figure 4 yes Figure 1 A schematic diagram of the circuit structure of the intermediate isolation circuit; Figure 5 yes Figure 1 A schematic diagram of the output filter circuit. Figure 6 yes Figure 1 A schematic diagram of the circuit structure of the input voltage detection unit of the control circuit; Figure 7 yes Figure 1 A schematic diagram of the circuit structure of the current detection unit in the control circuit. Detailed Implementation

[0017] Specific embodiments of this application will now be described in detail with reference to the accompanying drawings. While specific embodiments of this application are shown in the drawings, it should be understood that this application can be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of this application and to fully convey the scope of this application to those skilled in the art.

[0018] It should be noted that certain terms are used in the specification and claims to refer to specific components. Those skilled in the art will understand that different terms may be used to refer to the same component. This specification and claims do not distinguish components based on differences in terminology, but rather on differences in function. The terms "comprising" or "including" used throughout the specification and claims are open-ended and should be interpreted as "comprising but not limited to." The following descriptions in the specification are preferred embodiments for carrying out this application; however, these descriptions are for the purpose of understanding the general principles of the specification and are not intended to limit the scope of this application. The scope of protection of this application shall be determined by the appended claims.

[0019] To facilitate understanding of the embodiments of this application, the following will provide further explanation and description with reference to the accompanying drawings and specific embodiments, and the accompanying drawings do not constitute a limitation on the embodiments of this application.

[0020] Figure 1 This is a schematic diagram of the overall structure of a rectifier circuit with a wide input voltage range for communication power supply according to one embodiment of this application, as shown below. Figure 1 As shown, the rectifier circuit includes: a protection circuit for overcurrent, overvoltage, and electromagnetic interference protection of the input voltage; a PFC rectifier circuit, with its input terminal connected to the output terminal of the protection circuit, for rectifying the input voltage; an isolation circuit, with its input terminal connected to the output terminal of the PFC rectifier circuit, for electrically isolating the rectified input voltage; an output filter circuit, with its input terminal connected to the output terminal of the isolation circuit, for filtering the electrically isolated input voltage and outputting a DC voltage; and a control circuit, electrically connected to the protection circuit, PFC rectifier circuit, isolation circuit, and output filter circuit, for generating a PWM drive signal based on the filtered input voltage to control the operating mode of each circuit.

[0021] The aforementioned rectifier circuit, by sequentially connecting a PFC rectifier circuit, an isolation circuit, and an output filter circuit after the protection circuit, and combining them with a control circuit electrically connected to each stage of the circuit, achieves stable, efficient, and reliable operation over a wide input voltage range. Specifically, the protection circuit provides overcurrent, overvoltage, and electromagnetic interference protection to improve grid adaptability; the PFC rectifier circuit reduces input current harmonics and improves the power factor; the isolation circuit utilizes a reconfigurable topology to automatically switch operating modes based on input voltage levels, maintaining stable output voltage and high efficiency over a wide range from ultra-low to high voltage; the output filter circuit further smooths the voltage and suppresses ripple; and the control circuit precisely generates PWM drive signals by sampling voltage and current in real time to coordinate the operating modes of each circuit. Overall, this circuit overcomes the problems of low efficiency and poor stability of PFC in traditional solutions under large voltage fluctuations or ultra-low voltage conditions, contributing to improved versatility and operational reliability of communication power supplies.

[0022] In another exemplary embodiment, such as Figure 2As shown, the protection circuit includes a thermistor NTC, a fuse F1, a first X capacitor Cx1, a second X capacitor Cx2, a first Y capacitor Cy1, a second Y capacitor Cy2, a first ferrite bead FB1, a second ferrite bead FB2, a varistor MOV, and a gas discharge tube GDT. The first terminal of fuse F1 is connected to the AC input live wire L, and the second terminal is connected to the first terminal of the thermistor NTC. The second terminal of the thermistor NTC is connected to the first terminal of the first X capacitor Cx1 to form a first node N1. The second terminal of the first X capacitor Cx1 is connected to the AC input neutral wire N. The first terminal of the first Y capacitor Cy1 is connected to the first node N1, and the second terminal is connected to the protective ground PE. The second X capacitor... The first end of capacitor Cx2 is connected to the first node N1, and the second end is connected to the AC input neutral line N and simultaneously connected to the first end of the second Y capacitor Cy2. The second end of the second Y capacitor Cy2 is connected to the protective ground PE. The first end of the first ferrite bead FB1 is connected to the first node N1, and the second end serves as the output live line Lout. The first end of the second ferrite bead FB2 is connected to both the AC input neutral line N and the first end of the second Y capacitor Cy2. The second end of the second ferrite bead FB2 serves as the output neutral line Nout. The varistor MOV is connected between the output live line Lout and the output neutral line Nout. The first end of the first gas discharge tube GDT is connected to the protective ground PE, and the second end is connected to the output live line Lout.

[0023] In this embodiment, the protection circuit constructs multi-level protection between the AC input terminal and the subsequent rectifier circuit. At the instant the power supply is powered on, the thermistor NTC is in a cold state with a large resistance, effectively suppressing the inrush current. After the power supply operates normally, the current in the AC input live wire L flows sequentially through the fuse F1 and the thermistor NTC. At this time, the resistance of the NTC decreases due to self-heating, reducing normal losses. Subsequently, the current is output as live wire Lout through the first node N1 and the first ferrite bead FB1, while the neutral wire N current is output as neutral wire Nout through the second ferrite bead FB2. Simultaneously, the first X capacitor Cx1 and the second X capacitor Cx2 are connected across L / N or the equivalent terminals of Lout / Nout, forming a differential-mode and common-mode filter network together with the first Y capacitor Cy1 and the second Y capacitor Cy2 (connected to protective ground PE) to suppress electromagnetic interference. When an overvoltage occurs, the varistor MOV connected between the output live wire Lout and the output neutral wire Nout quickly presents a low impedance, bypassing the overvoltage energy. Simultaneously, the gas discharge tube GDT connected between the output live wire Lout and the protective ground PE will conduct under higher surge voltages, discharging the common-mode surge current on the live wire to the protective ground. If a severe overcurrent or short circuit occurs in subsequent circuits, the fuse F1 will blow, cutting off the input and achieving overcurrent protection. Furthermore, the first ferrite bead FB1 and the second ferrite bead FB2 can further suppress the conduction of high-frequency interference.

[0024] This protection circuit integrates a thermistor (NTC), fuse F1, X capacitors (Cx1, Cx2), Y capacitors (Cy1, Cy2), ferrite beads (FB1, FB2), varistor (MOV), and gas discharge tube (GDT), forming a multi-level, multi-path systematic protection architecture. The NTC and fuse are connected in series at the live input terminal to suppress startup surges and interrupt overcurrent faults, respectively. The X capacitor is connected between the live and neutral lines, and the Y capacitor connects the live and neutral lines to the protective ground, forming a differential-mode and common-mode electromagnetic interference filtering network with the ferrite beads. The varistor is connected between the output live and neutral lines, and the gas discharge tube connects the output live line to the protective ground, achieving graded bypassing and discharge of different levels of overvoltage. This protection circuit effectively suppresses power-on inrush current and high-frequency electromagnetic interference after normal operation, and provides rapid protection against overcurrent, short circuits, and various levels of overvoltage (differential-mode and common-mode surges), improving the safety and electromagnetic compatibility of the rectifier circuit in complex power grid environments.

[0025] In summary, this protection circuit achieves systematic protection against overcurrent, overvoltage, and electromagnetic interference for the rectifier circuit through the coordinated operation of the thermistor, X capacitor, Y capacitor, ferrite bead, varistor, and gas discharge tube.

[0026] In another exemplary embodiment, such as Figure 3As shown, the PFC rectifier circuit includes: a first branch and a second branch. The first branch is a high-frequency branch, including a first MOSFET Q1, a second MOSFET Q2, a first high-frequency inductor L1, a first pull-down resistor R1, a second pull-down resistor R2, a first fast recovery diode D1, and a second fast recovery diode D2. The second branch is a power frequency branch, including a third MOSFET Q3, a fourth MOSFET Q4, a third pull-down resistor R3, and a fourth pull-down resistor R4. The first terminal of the first high-frequency inductor L1 is connected to the output live wire Lout of the protection circuit, and the second terminal is connected to the drain of the first MOSFET Q1 to form a second node N2. The source of the first MOSFET Q1 is connected to the negative terminal PFC- of the PFC bus, and the gate is connected to the first drive signal output terminal PWM_H1 of the control circuit. The first pull-down resistor R1 is connected in parallel between the gate and source of the first MOSFET Q1. The drain of the second MOSFET Q2 is connected to the positive terminal PFC+ of the PFC bus, the source is connected to the second node N2, and the gate is connected to the second drive signal output terminal PWM_H2 of the control circuit. The second pull-down resistor R2 is connected in parallel between the second MOSFET Q1 and the second MOSFET Q2. The gate and source of Q2 are connected; the anode of the first fast recovery diode D1 is connected to the negative terminal PFC- of the PFC bus, and the cathode is connected to the second node N2 (in reverse parallel with Q1); the anode of the second fast recovery diode D2 is connected to the second node N2, and the cathode is connected to the positive terminal PFC+ of the PFC bus (in reverse parallel with Q2); the drain of the third MOSFET Q3 is connected to the output live wire Lout of the protection circuit, the source is connected to the negative terminal PFC- of the PFC bus, and the gate is connected to the third drive signal output terminal PWM_L1 (power frequency square wave signal) of the control circuit; the third pull-down resistor R3 is connected in parallel between the gate and source of the third MOSFET Q3; the drain of the fourth MOSFET Q4 is connected to the output neutral wire Nout of the protection circuit, the source is connected to the negative terminal PFC- of the PFC bus, and the gate is connected to the fourth drive signal output terminal PWM_L2 (power frequency square wave signal) of the control circuit; the fourth pull-down resistor R4 is connected in parallel between the gate and source of the fourth MOSFET Q4.

[0027] In this embodiment, the PFC rectifier circuit achieves input current shaping and power factor correction through the coordinated operation of the high-frequency branch and the power frequency branch. In the power frequency branch, the third MOSFET Q3 and the fourth MOSFET Q4 receive power frequency square wave signals PWM_L1 and PWM_L2, respectively. During the positive half-cycle of the AC input, the third MOSFET Q3 is turned on, and during the negative half-cycle, the fourth MOSFET Q4 is turned on, selectively connecting the input live wire Lout or the neutral wire Nout to the negative terminal PFC- of the PFC bus, thereby providing a low-frequency commutation path for the current. In the high-frequency branch, the first high-frequency inductor L1, the first MOSFET Q1, the second MOSFET Q2, and the first fast recovery diode D1 and the second fast recovery diode D2 connected in reverse parallel form a boost topology. The control circuit controls the high-frequency switches Q1 and Q2 through PWM_H1 and PWM_H2, enabling the first high-frequency inductor L1 to store and release energy. When the input is in the positive half-cycle and the third MOSFET Q3 is turned on, the current path is: Lout → L1 → N2 → flowing at high frequency through the second MOSFET Q2 or the second fast recovery diode D2 to PFC+, then through the load, PFC-, and the third MOSFET Q3 back to Lout, achieving positive half-cycle PFC. When the input is in the negative half-cycle and the fourth MOSFET Q4 is turned on, the current path is: Nout → Q4 → PFC- → load → PFC+ → flowing at high frequency through the first MOSFET Q1 or the first fast recovery diode D1, through the first high-frequency inductor L1 in reverse direction → Lout, achieving negative half-cycle PFC. Pull-down resistors R1~R4 ensure that each corresponding MOSFET remains off when the drive signal is missing.

[0028] This PFC rectifier circuit, by employing a bridgeless topology (with high-frequency branches Q1 / Q2 connected in parallel with power frequency branches Q3 / Q4), eliminates the on-state voltage drop of the rectifier bridge, thereby improving conversion efficiency at low input voltages (such as 85V AC) (the loss corresponding to approximately 1.4V voltage drop is eliminated, resulting in an efficiency improvement of 1%~3%). It also effectively reduces the thermal stress and temperature rise of power devices such as MOSFETs. Simultaneously, due to the voltage encroachment of the rectifier bridge, the actual usable input voltage amplitude of the rectifier circuit is higher, which can widen the minimum operating voltage boundary to 75V~85V AC, enhancing the operational stability under ultra-low voltage power grids. Furthermore, the separation of high-frequency chopping and power frequency commutation functions simplifies the PWM control strategy, helps reduce the resource overhead of the main controller, and enables the PFC stage to maintain a high power factor (PF>0.99) and low harmonic distortion (THD<5%) across the entire voltage range of 85V~264V, thus achieving efficient and reliable operation across all operating conditions from ultra-low voltage to high voltage.

[0029] In another exemplary embodiment, such as Figure 4As shown, the isolation circuit includes a primary-side reconfigurable inverter network and a secondary-side reconfigurable rectifier network. The primary-side reconfigurable inverter network includes a transformer T1, a first switch S1, a second switch S2, a third switch S3, and a fourth switch S4. The drain of the first switch S1 is connected to the positive terminal PFC+ of the PFC bus, and its source is connected to the drain of the second switch S2 to form a third node N3. Its gate is connected to the fifth drive signal output terminal PWM_S1 of the control circuit. The source of the second switch S2 is connected to the negative terminal PFC- of the PFC bus, and its gate is connected to the sixth drive signal output terminal of the control circuit. The signal output terminal is PWM_S2; the drain of the third switch S3 is connected to the positive terminal PFC+ of the PFC bus, and its source is connected to the drain of the fourth switch S4 to form the fourth node N4. The gate is connected to the seventh drive signal output terminal PWM_S3 of the control circuit; the source of the fourth switch S4 is connected to the negative terminal PFC- of the PFC bus, and its gate is connected to the eighth drive signal output terminal PWM_S4 of the control circuit; the first end of the primary side of the transformer T1 is connected to the third node N3, and the second end is connected to the fourth node N4; the secondary side reconfigurable rectifier network includes the fifth switch S5 and the first voltage multiplier capacitor CB1. The second voltage multiplier capacitor CB2 and the rectifier bridge, wherein the rectifier bridge includes a third diode D3, a fourth diode D4, a fifth diode D5, and a sixth diode D6. The cathode of the third diode D3 is connected to the positive output terminal Vout+, and the anode of the fourth diode D4 is connected to the negative output terminal Vout-. The anodes of the third diode D3 and the cathodes of the fourth diode D4 are simultaneously connected to the first terminal A of the secondary winding of transformer T1. The cathode of the fifth diode D5 is connected to the positive output terminal Vout+ of the rectifier bridge, and the anode of the sixth diode D6 is connected to the negative output terminal Vout- of the rectifier bridge. The anode and the cathode of the sixth diode D6 are simultaneously connected to the second terminal B of the secondary winding of transformer T1; the first voltage doubler capacitor CB1 and the second voltage doubler capacitor CB2 are connected in series, the first terminal of the first voltage doubler capacitor CB1 is connected to the positive output Vout+ of the rectifier bridge, the first terminal of the second voltage doubler capacitor CB2 is connected to the negative output Vout- of the rectifier bridge, the drain of the fifth switching transistor S5 is connected to the center tap of the secondary winding of transformer T1, the source is connected to the junction of the second terminal of the first voltage doubler capacitor CB1 and the second terminal of the second voltage doubler capacitor CB2, and the gate is connected to the ninth drive signal output terminal PWM_S5 of the control circuit.

[0030] In this embodiment, the isolation circuit converts the PFC bus voltage into a high-frequency AC square wave or quasi-square wave through a primary-side reconfigurable inverter network. This wave is then coupled to the secondary side via transformer T1, and finally converted into the required DC output voltage by the secondary-side reconfigurable rectifier network. In the primary-side inverter network, the first switch S1 and the second switch S2 form the first half-bridge arm, and the third switch S3 and the fourth switch S4 form the second half-bridge arm. The four switches are driven by high-frequency PWM signals (PWM_S1~PWM_S4) provided by the control circuit. They are typically switched diagonally (S1+S4 or S2+S3), generating high-frequency AC pulses with an amplitude equal to the PFC bus voltage at both ends (N3, N4) of the transformer primary side. Voltage gain can be adjusted by changing the phase, frequency, or duty cycle of the drive signals. In the secondary-side rectifier network, the third diode D3, the fourth diode D4, the fifth diode D5, and the sixth diode D6 form a full-bridge rectifier to rectify the transformer secondary voltage. Meanwhile, the first voltage doubler capacitor CB1 and the second voltage doubler capacitor CB2 are connected in series across the positive and negative terminals of the rectified output. The fifth switch S5 is connected between the center tap of the transformer secondary and the midpoint of the series connection of the two capacitors. The control circuit controls the switching of the fifth switch S5 via PWM_S5 according to the input voltage level. For example, when the input voltage is high, the fifth switch S5 remains off, and the circuit operates in normal full-bridge rectification mode; when the input voltage is low (such as ultra-low voltage), the fifth switch S5 is turned on, causing the circuit to switch from normal full-bridge rectification mode to voltage doubler rectification mode. This allows the secondary side of transformer T1 to double the voltage when the output is insufficient, ensuring a stable DC output voltage even with ultra-low input (such as below 85V AC), thus effectively preventing the output voltage from dropping due to excessively low input.

[0031] In summary, this isolation circuit adopts a dual-sided reconfigurable architecture combining a primary-side reconfigurable inverter network and a secondary-side reconfigurable rectifier network. The primary side consists of two sets of half-bridge arms (S1 / S2, S3 / S4) and the primary side of transformer T1, forming a full-bridge inverter. This inverter can be reconfigured into different operating modes (such as full-bridge resonance, half-bridge resonance, or quasi-square wave drive) by changing the drive logic (e.g., phase shifting, frequency modulation, or selecting single-arm operation). The secondary side, based on the traditional full-bridge rectification (D3~D6), adds a voltage doubler reconfiguration network consisting of the fifth switch S5 and series voltage doubler capacitors (CB1, CB2). The switching on and off of the fifth switch S5 can switch between normal rectification mode and voltage doubler rectification mode. In this isolation circuit, the primary side's reconfiguration capability enables the isolation circuit to optimize voltage gain and soft-switching range based on the input voltage level, while the secondary side's voltage multiplier reconfiguration can automatically boost the output voltage when the input voltage is low. Through their synergistic effect, the two can achieve high-efficiency, high-gain stable output over an ultra-wide input voltage range (such as 85V~264V AC).

[0032] In another exemplary embodiment, please continue to refer to Figure 4 The isolation circuit also includes a dual resonant cavity, which includes a first resonant capacitor Cr1, a second resonant capacitor Cr2, a first resonant inductor Lr1, and a second resonant inductor Lr2. The first resonant capacitor Cr1 and the first resonant inductor Lr1 are connected in series to form a first resonant branch, which is connected between the third node N3 and the first terminal of the primary side of the transformer T1. The second resonant capacitor Cr2 and the second resonant inductor Lr2 are connected in series to form a second resonant branch, which is connected between the fourth node N4 and the second terminal of the primary side of the transformer T1.

[0033] In this embodiment, the isolation circuit introduces a symmetrical dual-resonant cavity structure between the primary-side inverter network and the primary side of transformer T1. The first resonant capacitor Cr1 and the first resonant inductor Lr1 are connected in series to form the first resonant branch, which is connected across the third node N3 and the first terminal of the primary side of the transformer. The second resonant capacitor Cr2 and the second resonant inductor Lr2 are connected in series to form the second resonant branch, which is connected across the fourth node N4 and the second terminal of the primary side of the transformer. During operation, the high-frequency AC square wave voltage generated by the primary-side inverter network is applied to the two resonant branches, forming a resonant network together with the magnetizing inductance and leakage inductance of transformer T1. This makes the current flowing through the primary side approximately sinusoidal, thereby creating soft-switching conditions for the switching transistor to achieve zero-voltage turn-on (ZVS) or zero-current turn-off (ZCS). Depending on the input voltage, the control circuit can reconfigure the operating mode of the resonant cavity: when the input voltage is high, only one resonant branch is activated (such as disconnecting the other branch or detuning it), and it operates as a single resonant cavity LLC to obtain higher voltage gain and efficiency; when the input voltage is low, both resonant branches are activated simultaneously, so that the resonant network presents a lower equivalent impedance and a higher voltage gain to compensate for insufficient input voltage.

[0034] This dual resonant cavity structure can reduce the switching loss of the primary-side switching transistor and improve the conversion efficiency at high frequencies. In addition, it can achieve constant voltage gain over a wide input voltage range through mode switching, thus avoiding the problem of traditional circuits simply adjusting the switching frequency to very low or very high in order to maintain voltage.

[0035] In another exemplary embodiment, such as Figure 5As shown, the output filter circuit includes a synchronous rectification unit, a filter inductor Lf, a first filter capacitor Cf1, a second filter capacitor Cf2, a dynamic discharge switch Sf, and a discharge resistor Rf. The synchronous rectification unit includes a first synchronous rectifier diode SR1 and a second synchronous rectifier diode SR2. The drain of the first synchronous rectifier diode SR1 is connected to the first terminal A of the transformer secondary side, and its source is connected to the positive output terminal Vout+ of the rectifier bridge. The drain of the second synchronous rectifier diode SR2 is connected to the second terminal B of the transformer secondary side, and its source is connected to the negative output terminal Vout- of the rectifier bridge. The first synchronous rectifier diode SR1 and the second synchronous rectifier diode SR2... The gates of the two synchronous rectifier diodes SR2 are connected to the tenth drive signal output terminal PWM_SR1 and the eleventh drive signal output terminal PWM_SR2 of the control circuit, respectively; the first end of the filter inductor Lf is connected to the positive output terminal Vout+ of the rectifier bridge, and the second end is connected to the first end of the first filter capacitor Cf1. The second end of the first filter capacitor Cf1 is connected to the negative output terminal Vout- of the rectifier bridge; the second filter capacitor Cf2 and the dynamic discharge switch Sf are connected in series and then in parallel across the two ends of the first filter capacitor Cf1, and the discharge resistor Rf is connected in parallel across the two ends of the second filter capacitor Cf2.

[0036] In this embodiment, the output filter circuit receives the pulsating DC voltage after rectification on the secondary side of the isolation circuit. It achieves a stable, low-ripple DC output through synchronous rectification, inductor-capacitor filtering, and dynamic discharge. In the synchronous rectification unit, the first synchronous rectifier SR1 and the second synchronous rectifier SR2 are connected to the two ends (A, B) of the transformer secondary side and the output of the rectifier bridge, respectively. The control circuit provides complementary PWM drive signals (PWM_SR1, PWM_SR2) according to the polarity of the transformer secondary voltage, ensuring that the first synchronous rectifier SR1 and the second synchronous rectifier SR2 conduct synchronously during the conduction range of their body diodes, thereby reducing rectification voltage drop losses. The rectified voltage is smoothed into a low-ripple DC voltage by an LC low-pass filter composed of a filter inductor Lf and a first filter capacitor Cf1. The second filter capacitor Cf2 is connected in series with the dynamic discharge switch Sf and then in parallel across the first filter capacitor Cf1. A discharge resistor Rf is connected in parallel across the second filter capacitor Cf2. When the load suddenly switches from heavy load to light load or no load, the output voltage may rise instantaneously. The control circuit can briefly turn on the dynamic discharge switch Sf, connecting the second filter capacitor Cf2 to the filter network to increase the equivalent capacitance and absorb overshoot energy. Once the output voltage stabilizes, the dynamic discharge switch Sf turns off, and the discharge resistor Rf provides a slow discharge path for the second filter capacitor Cf2, preventing it from storing voltage for a long time. By reducing conduction losses through synchronous rectification, suppressing ripple through LC filtering, and suppressing voltage overshoot through dynamic capacitor switching, this filter circuit can provide a stable, efficient, and dynamically responsive DC output voltage over a wide load range.

[0037] In another exemplary embodiment, the control circuit includes a main controller U1 (such as a TI UCD3138 or STM32G4). The main controller U1 is electrically connected to an input voltage detection unit, a mode switching logic unit, and a current detection unit. The input voltage detection unit is used to collect the AC voltage at the output of the protection circuit in real time and convert it into a digital signal for the control circuit to determine the current input voltage range. The mode switching logic unit is used to automatically switch the operating mode of the rectifier circuit by comparing the voltage value fed back by the input voltage detection unit with a preset threshold. The current detection unit is used to collect the PFC bus current and the rectified output current before the output filter circuit in real time, providing the control circuit with the current feedback signal required for overcurrent protection and closed-loop regulation.

[0038] In this embodiment, the control circuit is centered on the main controller U1, and electrically connected to the input voltage detection unit, the mode switching logic unit, and the current detection unit. During operation, the input voltage detection unit collects the AC voltage at the output of the protection circuit in real time and converts it into a digital signal. The main controller uses this signal to determine the current input voltage range. The mode switching logic unit compares this voltage value with internal preset thresholds (such as 220V, 110V, 85V), automatically selects and switches to the appropriate operating mode (such as high-voltage single resonance, low-voltage double resonance, ultra-low-voltage quasi-square wave, etc.) through a state machine, and adjusts the PWM drive signal strategy sent to each power switch accordingly. Simultaneously, the current detection unit collects the PFC bus current and the rectified output current in real time, feeding them back to the main controller for closed-loop regulation (such as voltage regulation and power factor correction) and overcurrent fault protection. By guiding mode switching through voltage detection and participating in closed-loop control through current detection, this control circuit achieves adaptive and efficient operation and system protection across the entire input voltage range.

[0039] In another exemplary embodiment, such as Figure 6 As shown, the input voltage detection unit includes a first voltage divider resistor Rin1 and a second voltage divider resistor Rin2. The first end of the first voltage divider resistor Rin1 is connected to the output live wire Lout of the protection circuit, and the second end is connected to the output neutral wire Nout of the protection circuit via the second voltage divider resistor Rin2. The connection between the first voltage divider resistor Rin1 and the second voltage divider resistor Rin2 is connected to the first ADC input pin ADC1 of the main controller U1 for real-time acquisition of the input voltage.

[0040] In this embodiment, the input voltage detection unit adopts a resistor divider sampling structure to achieve real-time detection of the AC input voltage. The first end of the first voltage divider resistor Rin1 is connected to the output live wire Lout of the protection circuit, and the second end is connected to the output neutral wire Nout via the second voltage divider resistor Rin2, forming a series voltage divider network. Since the AC input voltage (e.g., 85V~264V AC) is much higher than the ADC input range of the main controller U1 (usually 0~3.3V or 0~5V), by selecting an appropriate ratio of the first voltage divider resistor Rin1 to the second voltage divider resistor Rin2, the voltage division amplitude across the second voltage divider resistor Rin2 is attenuated to within the safe linear range of the ADC. In addition, the connection point of the first voltage divider resistor Rin1 and the second voltage divider resistor Rin2 is directly connected to the first ADC input pin ADC1 of the main controller U1. The main controller U1 performs analog-to-digital conversion on this pin at a fixed sampling frequency to obtain a digital quantity proportional to the instantaneous value of the input voltage.

[0041] In summary, this voltage divider circuit has a simple structure and fast response. It can provide a real-time and accurate input voltage reference for mode switching and PWM regulation of the control circuit without the need for isolation amplifiers or Hall sensors.

[0042] In another exemplary embodiment, the mode switching logic unit is integrated inside the main controller U1, including a comparator and a state machine. The comparator is used to receive the voltage value sampled by the input voltage detection unit in real time and compare it with its internally preset first threshold Vth_high (e.g., 220V AC), second threshold Vth_mid (e.g., 110V AC), and third threshold Vth_low (e.g., 85VAC). The state machine executes state transition logic according to the comparison result between the current working mode and the comparator output. The state machine includes four states: high voltage single resonant mode M1, low voltage dual resonant mode M2, ultra-low voltage quasi-square wave mode M3, and fault protection mode M4.

[0043] In this embodiment, when the state machine is in high-voltage single-resonant mode M1, if the comparator feedback input voltage drops below the first threshold Vth_high and remains there for a confirmation time Td (e.g., 10ms), the state machine transitions from high-voltage single-resonant mode M1 to low-voltage dual-resonant mode M2. When the state machine is in low-voltage dual-resonant mode M2, if the comparator feedback input voltage exceeds the first threshold Vth_high, the state machine transitions back to high-voltage single-resonant mode M1. If the input voltage drops below the third threshold Vth_low, the state machine transitions from low-voltage dual-resonant mode M2 ​​to ultra-low-voltage quasi-square wave mode M3. When the state machine is in ultra-low-voltage quasi-square wave mode M3, if the comparator feedback input voltage exceeds the first threshold Vth_high, the state machine transitions back to high-voltage single-resonant mode M1. If the input voltage drops below the third threshold Vth_low, the state machine transitions from low-voltage dual-resonant mode M2 ​​to ultra-low-voltage quasi-square wave mode M3. When the comparator feedback input voltage rises above the second threshold Vth_mid, the state machine transitions from the ultra-low voltage quasi-square wave mode M3 back to the low voltage dual-resonance mode M2. When the protection unit triggers a fault signal, the state machine unconditionally jumps to the fault protection mode M4, blocking all PWM outputs. The state machine outputs corresponding control signals in each mode: in the high voltage single-resonance mode M1, it outputs a high-level control signal to make the dual resonant cavity work in the single resonant branch mode; in the low voltage dual-resonance mode M2, it outputs a high-level control signal to make the dual resonant cavity work in the dual resonant branch mode to increase the voltage gain; and in the ultra-low voltage quasi-square wave mode M3, it outputs a high-level control signal to make the isolation circuit work in the quasi-square wave drive mode.

[0044] In another exemplary embodiment, such as Figure 7 As shown, the current detection unit includes a first current transformer CT1 and a second current transformer CT2. The first connection terminal of the primary side of the first current transformer CT1 is connected to the positive terminal PFC+ of the PFC bus, and the second connection terminal is connected to the drain S3_D of the third switch S3 in the primary-side inverter network of the isolation circuit. The first connection terminal of the secondary side of the first current transformer CT1 is connected to the second ADC input pin ADC2 of the main controller U1, and the second connection terminal is connected to the first analog ground AGND1. The first connection terminal of the primary side of the second current transformer CT2 is connected to the positive output Vout+ of the rectifier bridge, and the second connection terminal is connected to the first terminal of the filter inductor Lf. The first connection terminal of the secondary side of the second current transformer CT2 is connected to the third ADC input pin ADC3 of the main controller U1, and the second connection terminal is connected to the second analog ground AGND2.

[0045] In this embodiment, the current detection unit uses two current transformers to perform isolated sampling of the PFC bus current and the rectified output current, respectively. The primary side of the first current transformer CT1 is connected in series between the positive terminal PFC+ of the PFC bus and the drain of the third switch S3 in the primary-side inverter network of the isolation circuit. The PFC bus current flowing through it generates an alternating magnetic field in the primary winding, inducing a current proportional to the primary current in the secondary winding. This current is converted into a voltage signal by a terminating resistor (usually a built-in or external sampling resistor) and then sent to the second ADC input pin ADC2 of the main controller U1, with the reference ground being the first analog ground AGND1, thereby achieving real-time monitoring of the PFC stage input current. The primary side of the second current transformer CT2 is connected in series between the positive output Vout+ of the rectifier bridge and the first terminal of the filter inductor Lf, detecting the pulsating DC current after rectification. The current induced on its secondary side is converted and then connected to the third ADC input pin ADC3 of U1, with the reference ground being the second analog ground AGND2. The controller obtains these two current feedback values ​​through ADC sampling, which can be used to complete control functions such as power factor correction closed-loop control, output voltage constant current / constant voltage regulation, overcurrent fault protection, and efficiency optimization.

[0046] The above embodiments are only for illustrating the technical concept and features of this application, and are intended to enable those skilled in the art to understand the content of this application and implement it accordingly. They should not be construed as limiting the scope of protection of this application. All equivalent changes or modifications made in accordance with the spirit and essence of this application should be included within the scope of protection of this application.

Claims

1. A rectifier circuit with a wide input voltage range for communication power supplies, characterized in that, The circuit includes: Protection circuit, used to protect the input voltage from overcurrent, overvoltage and electromagnetic interference; The PFC rectifier circuit has its input terminal connected to the output terminal of the protection circuit and is used to rectify the input voltage. An isolation circuit, with its input terminal connected to the output terminal of the PFC rectifier circuit, is used to electrically isolate the rectified input voltage. The output filter circuit has its input terminal connected to the output terminal of the isolation circuit. It is used to filter the electrically isolated input voltage and output a DC voltage. The control circuit, which is electrically connected to the protection circuit, PFC rectifier circuit, isolation circuit and output filter circuit, is used to generate PWM drive signals based on the filtered input voltage to control the operating mode of each circuit.

2. The rectifier circuit according to claim 1, characterized in that, The protection circuit includes: The thermistor, fuse, first X capacitor, second X capacitor, first Y capacitor, second Y capacitor, first ferrite bead, second ferrite bead, varistor, and gas discharge tube, among which, The first end of the fuse is connected to the AC input live wire, the second end is connected to the first end of the thermistor, the second end of the thermistor is connected to the first end of the first X capacitor to form the first node, and the second end of the first X capacitor is connected to the AC input neutral wire. The first terminal of the first Y capacitor is connected to the first node, and the second terminal is connected to the protective ground. The first end of the second X capacitor is connected to the first node, the second end is connected to the AC input neutral line and simultaneously connected to the first end of the second Y capacitor, and the second end of the second Y capacitor is connected to the protective ground. The first end of the first magnetic bead is connected to the first node, and the second end serves as the output live wire; The first end of the second ferrite bead is connected to both the AC input neutral line and the first end of the second Y capacitor, while the second end serves as the output neutral line. A varistor is connected across the output live wire and the output neutral wire; The first end of the first gas discharge tube is connected to the protective ground, and the second end is connected to the output live wire.

3. The rectifier circuit according to claim 1, characterized in that, The PFC rectifier circuit includes: The first branch, which is a high-frequency branch, includes a first MOSFET, a second MOSFET, a first high-frequency inductor, a first pull-down resistor, a second pull-down resistor, a first fast recovery diode, and a second fast recovery diode. The first end of the first high-frequency inductor is connected to the output live wire of the protection circuit, and the second end is connected to the drain of the first MOSFET to form a second node; The source of the first MOSFET is connected to the negative terminal of the PFC bus, and the gate is connected to the first drive signal output terminal of the control circuit. The first pull-down resistor is connected in parallel between the gate and source of the first MOSFET; The drain of the second MOSFET is connected to the positive terminal of the PFC bus, the source is connected to the second node, and the gate is connected to the second drive signal output terminal of the control circuit. The second pull-down resistor is connected in parallel between the gate and source of the second MOSFET; The anode of the first fast recovery diode is connected to the negative terminal of the PFC bus, and the cathode is connected to the second node; The anode of the second fast recovery diode is connected to the second node, and the cathode is connected to the positive terminal of the PFC bus.

4. The rectifier circuit according to claim 3, characterized in that, The PFC rectifier circuit also includes: The second branch, which is the power frequency branch, includes the third MOSFET, the fourth MOSFET, the third pull-down resistor, and the fourth pull-down resistor. The drain of the third MOSFET is connected to the output live wire of the protection circuit, the source is connected to the negative terminal of the PFC bus, and the gate is connected to the third drive signal output terminal of the control circuit. The third pull-down resistor is connected in parallel between the gate and source of the third MOSFET; The drain of the fourth MOSFET is connected to the output neutral line of the protection circuit, the source is connected to the negative terminal of the PFC bus, and the gate is connected to the fourth drive signal output terminal of the control circuit. The fourth pull-down resistor is connected in parallel between the gate and source of the fourth MOSFET.

5. The rectifier circuit according to claim 1, characterized in that, The isolation circuit includes: Primary-side reconfigurable inverter networks include: Transformer, first switch transistor, second switch transistor, third switch transistor, fourth switch transistor, among which, The drain of the first switching transistor is connected to the positive terminal of the PFC bus, the source is connected to the drain of the second switching transistor to form a third node, and the gate is connected to the fifth drive signal output terminal of the control circuit. The source of the second switching transistor is connected to the negative terminal of the PFC bus, and the gate is connected to the sixth drive signal output terminal of the control circuit. The drain of the third switch is connected to the positive terminal of the PFC bus, the source is connected to the drain of the fourth switch to form the fourth node, and the gate is connected to the seventh drive signal output terminal of the control circuit. The source of the fourth switch is connected to the negative terminal of the PFC bus, and the gate is connected to the eighth drive signal output terminal of the control circuit. The first end of the primary side of the transformer is connected to the third node, and the second end is connected to the fourth node.

6. The rectifier circuit according to claim 5, characterized in that, The isolation circuit also includes: Secondary-side reconfigurable rectifier networks include: The fifth switching transistor, the first voltage multiplier capacitor, the second voltage multiplier capacitor, and the rectifier bridge, among which, The rectifier bridge includes a third diode, a fourth diode, a fifth diode, and a sixth diode. The cathode of the third diode is connected to the positive output terminal, and the anode of the fourth diode is connected to the negative output terminal. The anode of the third diode and the cathode of the fourth diode are both connected to the first terminal of the transformer secondary winding. The cathode of the fifth diode is connected to the positive output of the rectifier bridge, and the anode of the sixth diode is connected to the negative output of the rectifier bridge. The anode of the fifth diode and the cathode of the sixth diode are both connected to the second terminal of the transformer secondary winding. The first voltage multiplier capacitor and the second voltage multiplier capacitor are connected in series. The first end of the first voltage multiplier capacitor is connected to the positive output of the rectifier bridge, and the first end of the second voltage multiplier capacitor is connected to the negative output of the rectifier bridge. The drain of the fifth switching transistor is connected to the center tap of the secondary winding of the transformer, the source is connected to the junction of the second end of the first voltage multiplier capacitor and the second end of the second voltage multiplier capacitor, and the gate is connected to the ninth drive signal output terminal of the control circuit.

7. The rectifier circuit according to claim 6, characterized in that, The isolation circuit further includes a dual resonant cavity, which comprises: The first resonant capacitor, the second resonant capacitor, the first resonant inductor, and the second resonant inductor, wherein... The first resonant capacitor and the first resonant inductor are connected in series to form the first resonant branch, which is connected across the third node and the first terminal of the primary side of the transformer. The second resonant capacitor and the second resonant inductor are connected in series to form the second resonant branch, which is connected between the fourth node and the second terminal of the primary side of the transformer.

8. The rectifier circuit according to claim 6, characterized in that, The output filtering circuit includes: The components include a synchronous rectification unit, a filter inductor, a first filter capacitor, a second filter capacitor, a dynamic discharge switch, and a discharge resistor. The synchronous rectification unit includes a first synchronous rectifier tube and a second synchronous rectifier tube. The drain of the first synchronous rectifier tube is connected to the first terminal of the secondary side of the transformer, and the source is connected to the positive output terminal of the rectifier bridge. The drain of the second synchronous rectifier is connected to the second terminal of the transformer secondary side, and the source is connected to the negative output terminal of the rectifier bridge. The gates of the first and second synchronous rectifiers are respectively connected to the tenth drive signal output terminal and the eleventh drive signal output terminal of the control circuit. The first end of the filter inductor is connected to the positive output of the rectifier bridge, the second end is connected to the first end of the first filter capacitor, and the second end of the first filter capacitor is connected to the negative output of the rectifier bridge. The second filter capacitor is connected in series with the dynamic discharge switch and then connected in parallel across the two ends of the first filter capacitor. The discharge resistor is connected in parallel across the two ends of the second filter capacitor.

9. The rectifier circuit according to claim 1, characterized in that, The control circuit includes: The main controller is electrically connected to an input voltage detection unit, a mode switching logic unit, and a current detection unit. The input voltage detection unit is used to collect the AC voltage at the output of the protection circuit in real time and convert it into a digital signal for the control circuit to determine the current input voltage range. The mode switching logic unit is used to automatically switch the operating mode of the rectifier circuit by comparing the voltage value fed back by the input voltage detection unit with a preset threshold. The current detection unit is used to collect the PFC bus current and the rectified output current before the output filter circuit in real time, providing the current feedback signal required for overcurrent protection and closed-loop regulation of the control circuit.

10. The rectifier circuit according to claim 9, characterized in that, The input voltage detection unit includes: The first voltage divider resistor and the second voltage divider resistor, wherein... The first end of the first voltage divider resistor is connected to the output live wire of the protection circuit, and the second end is connected to the output neutral wire of the protection circuit via the second voltage divider resistor. The connection between the first voltage divider resistor and the second voltage divider resistor is connected to the first ADC input pin of the main controller for real-time acquisition of input voltage.

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