A solar cell

Abstract

The present disclosure relates to the field of photovoltaic technology, and discloses a solar cell. The cell comprises a substrate layer, a passivation contact layer, a first conductive structure and a second conductive structure. The passivation contact layer is arranged on the substrate layer, and comprises a first part and a second part. The thickness of the first part is greater than that of the second part. The first conductive structure is arranged on the first part to be combined with the first part, and the second conductive structure is arranged on the second part, adapted to connect the first conductive structure and lead out current. According to different types of the first conductive structure and the second conductive structure, the present disclosure designs the passivation contact layer with different thicknesses in local areas, taking into account both electrical performance and optical performance. The thickness of the first part for sintering with the first conductive structure is relatively thick, ensuring contact performance. The thickness of the second part for arranging the second conductive structure and without sintering with the passivation contact layer is less than that of the first part, which helps to reduce parasitic absorption and improve optical performance.

Description

Technical Field

[0001] This disclosure relates to the field of photovoltaic technology, specifically to a solar cell. Background Technology

[0002] In the field of photovoltaic technology, solar cells, as the core device for converting solar energy into electrical energy, have always been a focus of research and industry attention in terms of efficiency improvement. Currently, TOPCon (Tunnel Oxide Passivated Contact) cells are gradually becoming one of the mainstream technologies due to their high efficiency and low degradation. Their main characteristic is the use of a composite passivation film on the back side, composed of a tunneling oxide layer and a doped polycrystalline silicon layer. This full passivation effectively reduces the recombination rate of charge carriers on the back side of the cell, thereby improving the open-circuit voltage and conversion efficiency. However, such composite passivation films, especially the doped polycrystalline silicon layer, have a high doping concentration and a large number of free charge carriers, resulting in severe parasitic absorption problems that affect the cell's optical performance and overall conversion efficiency. Therefore, reducing the parasitic absorption of the doped polycrystalline silicon layer has become one of the key issues in improving the efficiency of TOPCon cells.

[0003] Currently, there are two main methods for reducing parasitic absorption in doped polycrystalline silicon layers: thinning the film and reducing the doping amount. However, both methods have limitations in practical applications. While thinning the film can reduce parasitic absorption, it severely degrades the contact performance of the gate lines, especially under high current density conditions. Increased contact resistance between the gate lines and the doped polycrystalline silicon layer leads to increased carrier transport losses, potentially reducing overall battery performance. Conversely, reducing the doping amount reduces the number of free carriers, thus lowering parasitic absorption. However, this raises the carrier transport barrier, hindering carrier transport from the silicon substrate to the doped polycrystalline silicon layer. Simultaneously, the field-effect passivation of the film weakens, leading to increased interfacial recombination rates, which also negatively impacts battery performance. Summary of the Invention

[0004] This disclosure provides a solar cell to address the problem that the parasitic absorption of the passivation film layer in existing solar cells is too large, which affects the photoelectric conversion efficiency and overall performance of the cell.

[0005] In a first aspect, this disclosure provides a solar cell, comprising: a substrate layer, a passivation contact layer, a first conductive structure, and a second conductive structure. The passivation contact layer is disposed on one side surface of the substrate layer and includes a first portion and a second portion, wherein the thickness of the first portion is greater than the thickness of the second portion. The first conductive structure is disposed on the first portion to be combined with the first portion, and the second conductive structure is disposed on the second portion and is adapted to connect to the first conductive structure and conduct current.

[0006] Beneficial Effects: This disclosure designs a passivation contact layer with varying thicknesses in different regions based on the first and second conductive structures with different functional types, i.e., varying thicknesses in local areas, thus balancing contact performance and optical performance. Specifically, the portion of the passivation contact layer used to form an ohmic contact with the first conductive structure is designed as a first segment. The first segment is thicker, which helps to fully collect carriers from the substrate layer, reduce the bulk resistance of the passivation contact layer, especially the doped polysilicon layer, and reduce carrier losses within the doped polysilicon layer. This helps to ensure good contact performance between the first conductive structure and the passivation contact layer, while preventing metal paste particles from the first conductive structure from penetrating the passivation contact layer and entering the substrate layer. The portion of the passivation contact layer used to set the second conductive structure, which does not need to be sintered with the passivation contact layer, is designed as a second segment. The second segment is thinner than the first segment. Since the area of ​​the second conductive structure is also larger than that of the first conductive structure, the relatively thinner second segment helps to reduce parasitic absorption in this portion and the overall passivation contact layer, while improving optical performance.

[0007] In one alternative embodiment, the passivation contact layer further includes a third portion that surrounds the first and second portions, the thickness of the third portion being less than the thickness of the second portion.

[0008] Beneficial effects: The first and second portions constitute the contact area of ​​the passivation contact layer, which fully collects the charge carriers in the substrate layer and realizes the charge carrier output between the first and second conductive structures; the third portion of the passivation contact layer, in addition to the first and second portions, constitutes the non-contact area, which does not directly contact the first and second conductive structures. The thickness of the third portion is the thinnest among the three, which helps to further reduce the parasitic absorption of the passivation contact layer and improve the overall optical performance and power generation efficiency of the battery.

[0009] In one alternative embodiment, the sidewall surface of the first portion near the third portion is a first vertical surface, a first ramp surface, or a second curved surface; and / or, the sidewall surface of the second portion near the third portion is a second vertical surface, a second ramp surface, or a second curved surface.

[0010] Beneficial effects: The sidewalls of the first and second sections can be formed as vertical surfaces, or as sloping or curved surfaces. Vertical sidewalls are easier to form and help simplify the manufacturing process. Sloping and curved surfaces help eliminate abnormalities such as accumulation and blockage of charge carriers at abrupt corners during lateral transport, thus improving the transport and collection performance of charge carriers.

[0011] In one alternative embodiment, in the passivation contact layer, the doping concentration of the first portion is greater than that of the third portion, and / or the doping concentration of the second portion is greater than that of the third portion.

[0012] Beneficial effects: Setting the doped polycrystalline silicon layer in the contact area that is in contact with the gate line as a highly doped region ensures sufficient carrier transport and collection, while setting a low doped region in the non-contact area that is not in contact with the gate line helps to further reduce the parasitic absorption of the film layer as a whole, thereby balancing electrical and optical performance, optimizing the photoelectric conversion efficiency of the battery, and improving power generation performance.

[0013] In one alternative embodiment, the surface of the substrate layer includes a central region and an edge region, the edge region surrounding the central region; the first portion includes a first sub-portion and a second sub-portion, the first sub-portion being located in the central region and the second sub-portion being located in the edge region, the thickness of the first sub-portion being greater than the thickness of the second sub-portion; and / or, the second portion includes a third sub-portion and a fourth sub-portion, the third sub-portion being located in the central region and the fourth sub-portion being located in the edge region, the thickness of the third sub-portion being greater than the thickness of the fourth sub-portion.

[0014] Beneficial effects: On the one hand, regardless of whether it is the central region or the edge region, the thickness of the first, second, and third sections decreases sequentially. That is, the thickness of the first sub-section of the first section, the third sub-section of the second section, and the third section of the third section in the central region decreases sequentially; the thickness of the second sub-section of the first section, the fourth sub-section of the second section, and the third section of the third section in the edge region decreases sequentially. On the other hand, in the first section, the thickness of the first sub-section in the central region is greater than the thickness of the second sub-section in the edge region; in the second section, the thickness of the third sub-section in the central region is greater than the thickness of the fourth sub-section in the edge region. In other words, setting different thicknesses of the passivation contact layer in the central and edge regions achieves a match between structure and process, which helps to further improve the parasitic absorption characteristics of the film layer and improve the overall performance of the battery.

[0015] In one optional embodiment, the first conductive structure includes sub-gate lines, and the second conductive structure includes main gate lines and pads; a plurality of sub-gate lines are spaced apart along a second direction, and any one sub-gate line extends along a first direction, with the first and second directions forming a preset angle; a plurality of main gate lines are spaced apart along the first direction, and any one main gate line extends along the second direction; one end of a sub-gate line that is opposite to it in the first direction is connected to a main gate line, and the other end is freely disposed; the pads are adapted to be disposed on the main gate lines.

[0016] In one alternative implementation, the thickness of the first portion gradually increases in the direction from one end relatively far from the second portion to one end relatively close to the second portion; and / or, the thickness of the second portion gradually increases in the direction from one end relatively far from the pad to one end relatively close to the pad.

[0017] Beneficial effects: The thickness of both the first and second sections can be gradually set, specifically, the thickness gradually increases along the direction of charge carrier output, thereby improving the charge carrier transmission performance and enhancing the electrical contact performance.

[0018] In one alternative implementation, the thickness of the sub-gate line gradually increases in the direction from one end relatively far from the main gate line to the end connected to the main gate line; and / or, the thickness of the main gate line gradually increases in the direction from one end relatively far from the pad to the end connected to the pad.

[0019] Beneficial effects: The thickness of the main grid line and the sub-grid line can be gradually increased, specifically, the thickness gradually increases along the direction of carrier output. The carrier transport path in the battery is: carriers in the substrate layer → doped polysilicon layer at the bottom of the sub-grid line (i.e., the first section) → sub-grid line → main grid line. Therefore, within the distance from the end of the doped polysilicon layer at the bottom of the sub-grid line to the main grid line, the thickness of both the doped polysilicon layer (i.e., the first section) and the sub-grid line increases. This ensures that both the grid line and the doped polysilicon layer have more carriers closer to the main grid line. This allows for a greater thickness of the doped polysilicon layer and a greater height of the grid line in areas with a higher number of carriers, thereby reducing carrier losses within the doped polysilicon layer and the grid line, and improving the battery's electrical performance. Furthermore, gradually increasing the thickness of the main grid line and its corresponding second section along the carrier transport path can further improve electrical performance.

[0020] In one alternative embodiment, the first conductive structure employs a highly corrosive slurry, the resistivity of which in contact with the substrate layer is less than 10 mΩ·cm. 2 The second conductive structure uses a low-corrosion or non-corrosion slurry, and the resistivity of the low-corrosion or non-corrosion slurry in contact with the substrate layer is greater than or equal to 10 mΩ / cm. 2 .

[0021] Beneficial effects: On the one hand, highly corrosive pastes help precisely control the corrosion depth during the sintering process of the sub-busbars, ensuring minimal contact resistance; low-corrosive or non-corrosive pastes help improve the conductivity and adhesion of the main busbars and pads during sintering. On the other hand, the main busbars are usually located on the outermost side of the cell, directly exposed to the environment or encapsulation materials. Using a weakly corrosive paste can reduce the risk of material degradation during long-term use and improve durability. Furthermore, at the module encapsulation end, the solder strips connecting the main busbars and pads may be made of different metals, such as copper or tin-plated copper. Using highly corrosive pastes can cause electrochemical corrosion between different metals; therefore, the corrosivity of the main busbar paste must be controlled to ensure compatibility.

[0022] In one optional embodiment, the passivation contact layer includes: an alternately spaced first passivation contact structure and a second passivation contact structure, wherein the first passivation contact structure and the second passivation contact structure have opposite conductivity types; the first conductive structure includes a first sub-gate and a second sub-gate, wherein the first sub-gate is disposed on the first passivation contact structure and the second sub-gate is disposed on the second passivation contact structure; the width of the first sub-gate is in the range of 5~30 μm and the width of the second sub-gate is in the range of 5~50 μm.

[0023] Beneficial effects: Different line widths are set for grid structures with different conductivity types, enabling precise and efficient electrical discharge in different areas. Attached Figure Description

[0024] To more clearly illustrate the technical solutions in the specific embodiments of this disclosure or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0025] Figure 1 This is a cross-sectional structural diagram of a solar cell according to an embodiment of the present disclosure; Figure 2 This is a top view of the solar cell structure according to an embodiment of the present disclosure; Figure 3 This is a schematic diagram of the structure of the first and second portions of the solar cell located in the central region, the first conductive structure, and the second conductive structure according to an embodiment of the present disclosure. Figure 4 This is a schematic diagram of the structure of the first and second portions of the solar cell located in the edge region, the first conductive structure, and the second conductive structure according to an embodiment of the present disclosure. Figure 5 This is a schematic diagram of the structure of the first part of the solar cell in an embodiment of the present disclosure, where the side surface is a slope. Figure 6 This is a comparative schematic diagram of a first sub-section of a first portion located in the central region and a second sub-section of a first portion located in the edge region of a solar cell according to an embodiment of the present disclosure; Figure 7 This is a comparative schematic diagram of the third sub-section of the second division located in the central region and the fourth sub-section of the second division located in the edge region in a solar cell according to an embodiment of the present disclosure; Figure 8 This is a schematic diagram of the structure of a solar cell with increasing thickness in the first section according to an embodiment of the present disclosure; Figure 9 This is a schematic diagram showing the increasing thickness of the first portion and the first conductive structure in a solar cell according to an embodiment of the present disclosure.

[0026] Explanation of reference numerals in the attached figures: 1. Basal layer; 101. Central region; 102. Peripheral region; 21. First division; 211. First vertical plane; 212. First ramp surface; 2101. First sub-division; 2102. Second sub-division; 22. Second division; 221. Second vertical plane; 2201. Third sub-division; 2202. Fourth sub-division; 23. Third division; 201. First passivation contact structure; 2011. First tunneling oxide layer; 2012. First doped polysilicon layer; 202. Second passivation contact structure; 2021. Second tunneling oxide layer; 2022. Second doped polysilicon layer; 3. First conductive structure; 3011. First sub-gate; 3012. Second sub-gate; 4. Second conductive structure; 401, main gate line; 4011, first main gate; 4012, second main gate; 402, pad; 4021, first pad; 4022, second pad; 5. Transparent conductive layer; 6. Passivation and anti-reflection layer. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0028] In related technologies, how to reduce parasitic absorption in composite passivation films of solar cells while ensuring effective carrier transport and passivation performance has become a pressing technical challenge in the current photovoltaic field. Based on this, this disclosure provides a crystalline silicon solar cell structure that reduces parasitic absorption in composite passivation films by optimizing the structural design of the passivation contact layer, such as a doped polycrystalline silicon layer, and the corresponding electrode grid lines, thereby improving the cell's photoelectric conversion efficiency and overall performance.

[0029] like Figures 1 to 9As shown, this disclosure provides a solar cell, including: a substrate layer 1, a passivation contact layer, a first conductive structure 3, and a second conductive structure 4. The passivation contact layer is disposed on one side surface of the substrate layer 1, and includes a first portion 21 and a second portion 22. The thickness of the first portion 21 is greater than the thickness of the second portion 22. The first conductive structure 3 is disposed on the first portion 21 to be combined with the first portion 21, and the second conductive structure 4 is disposed on the second portion 22, adapted to connect the first conductive structure 3 and conduct current.

[0030] For example, the substrate 1 can be a silicon substrate, the passivation contact layer can be a composite passivation film layer composed of a tunneling oxide layer and a doped polysilicon layer, the first conductive structure 3 and the second conductive structure 4 can be different metal gate lines, for example, the first conductive structure 3 can be a sub-gate line, and the second conductive structure 4 can be a main gate line 401. The first conductive structure 3 and the doped polysilicon layer of the passivation contact layer are directly sintered to form an ohmic contact, and the second conductive structure 4 serves to connect the first conductive structure 3 and to conduct current.

[0031] Based on this, this disclosure designs a passivation contact layer with varying thicknesses in different regions, i.e., varying thicknesses in local areas, according to the first conductive structure 3 and the second conductive structure 4, which have different functional types, thus balancing contact performance and optical performance. Specifically, as... Figure 3 and Figure 4 As shown, the passivation contact layer used to form an ohmic contact with the first conductive structure 3 is designed as a first portion 21. The first portion 21 is relatively thick, which helps to fully collect the carriers of the substrate layer 1, reduce the bulk resistance of the passivation contact layer, especially the doped polysilicon layer, reduce the loss of carriers in the doped polysilicon layer, and help to ensure good contact performance between the first conductive structure 3 and the passivation contact layer. At the same time, it prevents the metal paste particles of the first conductive structure 3 from penetrating the passivation contact layer and entering the substrate layer 1. The passivation contact layer used to set the second conductive structure 4, which does not need to be sintered with the passivation contact layer, is designed as a second portion 22. The thickness of the second portion 22 is less than the thickness of the first portion 21. Since the area of ​​the second conductive structure 4 is also larger than the area of ​​the second conductive structure 4, the relatively thin second portion 22 helps to reduce the parasitic absorption of this part and the entire passivation contact layer, and at the same time improves the optical performance.

[0032] In some embodiments, the solar cell described above can be a TOPCon cell. The light-receiving surface and the back-light-receiving surface of the substrate 1 are respectively provided with passivation film layers of different conductivity types. For example, the passivation contact layer described above can be provided as an n-type passivation contact structure layer on the back-light-receiving side, and a p-type doped region is formed on the light-receiving side through boron diffusion to form a pn junction with the n-type substrate 1. At this time, the first conductive structure 3 and the second conductive structure 4 are provided on both the passivation contact layer on the back-light-receiving side and the p-type doped region on the light-receiving side.

[0033] In other embodiments, the solar cell described above can also be a TOPCon passivated type back-contact solar cell, such as... Figure 1 and Figure 2 As shown, the passivation contact layer forms a first passivation contact structure 201 and a second passivation contact structure 202 with an interdigitated distribution on the back side of the substrate layer 1. One of them is n-type doped and the other is p-type doped. The first passivation contact structure 201 includes a first tunneling oxide layer 2011 and a first doped polysilicon layer 2012 stacked together. The second passivation contact structure 202 includes a second tunneling oxide layer 2021 and a second doped polysilicon layer 2022 stacked together. At this time, both the first conductive structure 3 and the second conductive structure 4 are disposed on one side of the backlight surface. The first conductive structure 3 includes a first sub-gate 3011 and a second sub-gate 3012, and the second conductive structure 4 includes a first main gate 4011 and a second main gate 4012. The first sub-gate 3011 and the first main gate 4011 are disposed on the first passivation contact structure 201, and the second sub-gate 3012 and the second main gate 4012 are disposed on the second passivation contact structure 202. In addition, the first conductive structure 3 also includes pads 402, which include first pads 4021 and second pads 4022. The first pads 4021 are disposed on the first main gate 4011, and the second pads 4022 are disposed on the second main gate 4012. A plurality of first sub-gates 3011 are connected to the first main gate 4011, and a plurality of second sub-gates 3012 are connected to the second main gate 4012. Of course, to facilitate connection with the solder strip, the pads 402 on the outermost main gate line 401 can also be moved inward by a certain distance. The solar cell disclosed herein also includes a transparent conductive layer 5 between the passivation contact layer and the grid lines to enhance carrier collection and transport performance; and a passivation anti-reflection layer 6 is also provided on the outermost layer of the light-receiving surface to improve the absorption of sunlight.

[0034] In some embodiments, the passivation contact layer described above further includes a third portion 23, which surrounds the first portion 21 and the second portion 22, and the thickness of the third portion 23 is less than the thickness of the second portion 22.

[0035] Specifically, such as Figure 3 and Figure 4 As shown, the first portion 21 and the second portion 22 constitute the contact area of ​​the passivation contact layer, which fully collects the charge carriers in the substrate layer 1 and realizes the charge carrier output between the first conductive structure 3 and the second conductive structure 4. The third portion 23 of the passivation contact layer, in addition to the first portion 21 and the second portion 22, constitutes the non-contact area and does not directly contact the first conductive structure 3 and the second conductive structure 4. The thickness of the third portion 23 is the thinnest among the three, which helps to further reduce the parasitic absorption of the passivation contact layer and improve the overall optical performance and power generation efficiency of the battery.

[0036] In some embodiments, the sidewall surface of the first portion 21 near the third portion 23 is a first vertical surface 211 or a first ramp surface 212 or a first curved surface; and / or, the sidewall surface of the second portion 22 near the third portion 23 is a second vertical surface 221 or a second ramp surface or a second curved surface.

[0037] like Figure 3 (a1) and Figure 4 As shown in (a2), the sidewall of the first portion 21 can be formed as a first vertical surface 211, that is, the angle between the sidewall and the surface of the passivation contact layer is a right angle; similarly, as shown in (a2), the sidewall can be formed as a first vertical surface 211, that is, the angle between the sidewall and the surface of the passivation contact layer is a right angle; similarly, the sidewall can be formed as a vertical surface 211, that is, the side Figure 3 (b1) and Figure 4 As shown in (b2), the sidewall of the second portion 22 can be formed as a second vertical surface 221. A vertical sidewall facilitates forming and simplifies the manufacturing process. Alternatively, the sidewalls of the first portion 21 and the second portion 22 can also be formed as sloping surfaces or curved surfaces to eliminate abnormalities such as carrier accumulation and blockage at abrupt corners during lateral transport, thereby improving carrier transport and collection performance. Figure 5 The first part 21 is shown as an example, where its sidewall is formed as a first sloping surface 212.

[0038] In some embodiments, the doping concentration of each region of the passivation contact layer can be set to be different. For example, the contact region can be set to be a highly doped region and the non-contact region to be a low-doped region. That is, in the passivation contact layer, the doping concentration of the first part 21 is set to be greater than the doping concentration of the third part 23, and the doping concentration of the second part 22 is set to be greater than the doping concentration of the third part 23.

[0039] It is known that a higher concentration of doped atoms in a polycrystalline silicon layer helps to reduce contact resistance and bulk resistance, thereby reducing carrier transport losses. However, it also increases surface / bulk recombination. Furthermore, a higher concentration of doped atoms results in a higher number of free carriers generated by ionization, leading to increased light absorption by these free carriers and severe parasitic absorption. This disclosure sets the doped polycrystalline silicon layer in the contact region with the gate line as a highly doped region to ensure sufficient carrier transport and collection, while setting a low-doped region in the non-contact region that does not contact the gate line helps to further reduce the overall parasitic absorption of the film layer, thus balancing electrical and optical performance, optimizing the photoelectric conversion efficiency of the battery, and improving power generation performance.

[0040] Of course, it is also possible to set only the doping concentration of the first part 21 to be greater than the doping concentration of the third part 23, or to set only the doping concentration of the second part 22 to be greater than the doping concentration of the third part 23. The doping concentrations of the first part 21 and the second part 22 can be the same or different. When the doping concentrations are different, the doping concentration of the first part 21 can be greater than the doping concentration of the second part 22.

[0041] In some embodiments, such as Figure 2 As shown, the surface of the aforementioned base layer 1 includes a central region 101 and an edge region 102 in the horizontal direction, with the edge region 102 surrounding the central region 101. Based on this, the first portion 21 includes a first sub-portion 2101 and a second sub-portion 2102, with the first sub-portion 2101 located in the central region 101 and the second sub-portion 2102 located in the edge region 102, and the thickness of the first sub-portion 2101 being greater than the thickness of the second sub-portion 2102; and / or, the second portion 22 includes a third sub-portion 2201 and a fourth sub-portion 2202, with the third sub-portion 2201 located in the central region 101 and the fourth sub-portion 2202 located in the edge region 102, and the thickness of the third sub-portion 2201 being greater than the thickness of the fourth sub-portion 2202.

[0042] Specifically, on the one hand, regardless of whether it is the central region 101 or the edge region 102, the thickness of the first section 21, the second section 22, and the third section 23 decreases sequentially, that is, as Figure 3 As shown in (a1) and (b1), the thicknesses of the first sub-section 2101 of the first division 21, the third sub-section 2201 of the second division 22, and the third division 23 located in the central region 101 decrease sequentially; as Figure 4 As shown in (a2) and (b2), the thicknesses of the second sub-section 2102 of the first portion 21, the fourth sub-section 2202 of the second portion 22, and the third portion 23 located in the edge region 102 decrease sequentially. On the other hand, as... Figure 6 As shown in (a1) and (a2), in the first division 21, the thickness of the first sub-division 2101 located in the central region 101 is greater than the thickness of the second sub-division 2102 located in the edge region 102; as Figure 7 As shown in (b1) and (b2), in the second portion 22, the thickness of the third sub-part 2201 located in the central region 101 is greater than the thickness of the fourth sub-part 2202 located in the edge region 102. This is because during the sintering process of the grid line paste, the position of the resistance wire heating lamp is closer to the central region 101 of the silicon wafer and farther from the edge region 102, resulting in a lower sintering temperature for the paste in the edge region 102 compared to the central region 101. Based on this characteristic, in this embodiment, the passivation contact layer thicknesses of the central region 101 and the edge region 102 are set to be different to achieve a match between the structure and the process, which helps to further improve the parasitic absorption characteristics of the film layer and enhance the overall performance of the battery.

[0043] The width of the aforementioned edge region 102 is typically around 3 mm, meaning that the area within 3 mm inward from the outermost edge of the base layer 1 can be considered the edge region 102, while the remaining portion is the central region 101. Figure 2 As shown in the dashed box a.

[0044] In this disclosure, the passivation contact layer can be designed with different thicknesses in different regions by thinning the doped polycrystalline silicon layers of the second portion 22 and the third portion 23. Specifically, thinning can be achieved directly by laser removal, or by using ultraviolet laser oxidation combined with wet cleaning.

[0045] In some embodiments, such as Figure 2 As shown, the first conductive structure 3 includes sub-gate lines, and the second conductive structure 4 includes main gate lines 401 and pads 402; wherein, a plurality of sub-gate lines are arranged at intervals along a second direction, and any sub-gate line extends along a first direction, with the first and second directions forming a preset angle; a plurality of main gate lines 401 are arranged at intervals along the first direction, and any main gate line 401 extends along the second direction; one end of a sub-gate line is connected to a main gate line 401 and the other end is freely disposed; the pads 402 are adapted to be disposed on the main gate lines 401.

[0046] Specifically, the first direction and the second direction are perpendicular to each other. Multiple main gate lines 401 are spaced apart along the first direction and extend along the second direction. Multiple sub-gate lines are arranged between adjacent main gate lines 401, spaced apart along the second direction and extending along the first direction. One end of the sub-gate line is connected to the main gate line 401. The sub-gate line collects carriers in the substrate layer 1 and the passivation contact layer and transmits them to the main gate line 401. Then, they are discharged through external structures such as solder strips. The main gate line 401 is also provided with solder pads 402 to facilitate reliable connection with solder strips.

[0047] In some alternative embodiments, the thickness of the first portion 21 gradually increases in the direction from one end relatively far from the second portion 22 to one end relatively close to the second portion 22; and / or, the thickness of the second portion 22 gradually increases in the direction from one end relatively far from the pad 402 to one end relatively close to the pad 402.

[0048] That is, the thickness of both the first section 21 and the second section 22 can be gradually set, specifically, the thickness gradually increases along the direction of carrier output. Figure 8 The thickness variation of the first section 21 is shown.

[0049] In some alternative embodiments, the thickness of the sub-gate line gradually increases in the direction from one end relatively far from the main gate line 401 to the end connected to the main gate line 401; and / or, the thickness of the main gate line 401 gradually increases in the direction from one end relatively far from the pad 402 to the end connected to the pad 402.

[0050] That is, the thickness of the main gate line 401 and the sub-gate line can also be set gradually, specifically, the thickness gradually increases along the direction of carrier output. Figure 9 It is shown that the thickness of both the sub-gate line and the first section 21 increases along the carrier transport direction.

[0051] In summary, the carrier transport path in the battery is: carriers in the substrate layer 1 → doped polysilicon layer at the bottom of the sub-gate line (i.e., the first portion 21) → sub-gate line → main gate line 401. Therefore, in this disclosure, within the distance from the end of the doped polysilicon layer at the bottom of the sub-gate line to the main gate line 401, the thickness of both the doped polysilicon layer (i.e., the first portion 21) and the sub-gate line increases progressively. This ensures that both the gate line and the doped polysilicon layer have more carriers closer to the main gate line 401, resulting in a greater thickness of the doped polysilicon layer and a greater gate line height in areas with a higher number of carriers. This reduces carrier losses within the doped polysilicon layer and the gate line, improving the battery's electrical performance. Furthermore, by gradually increasing the thickness of the main gate line 401 and the corresponding second portion 22 along the carrier transport path, the electrical performance can be further improved.

[0052] In some embodiments, the first conductive structure 3 described above is made of a highly corrosive slurry, and the resistivity of the highly corrosive slurry in contact with the substrate layer 1 is less than 10 mΩ / cm. 2 The second conductive structure 4 uses a low-corrosion or non-corrosion slurry, and the resistivity of the low-corrosion or non-corrosion slurry in contact with the substrate layer 1 is greater than or equal to 10 mΩ / cm. 2 .

[0053] Specifically, the first conductive structure 3, i.e., the sub-gate line, uses a highly corrosive paste. This helps ensure that the paste penetrates the passivation contact film on the silicon substrate surface during sintering, and also ensures that the paste forms a silver-silicon alloy with the surface layer of the silicon substrate, achieving ohmic contact and minimizing contact resistance. As the main components for current convergence and transmission, the main gate line 401 and pad 402 require high conductivity and mechanical stability. The primary task of their paste is to ensure reliable connection with the sub-gate and external conductors, rather than penetrating deep into the material. Therefore, strong corrosion should be avoided to prevent damage to the metallization or passivation layer of the battery. Thus, the second conductive structure 4 uses a low-corrosive or non-corrosive paste. In other words, the sintering process of the sub-gate line requires precise control of the corrosion depth to minimize contact resistance, making a highly corrosive paste more effective in this process. However, the sintering of the main gate line 401 and pad 402 focuses more on conductivity and adhesion, thus eliminating the need for strong corrosion. On the other hand, the main busbar 401 is typically located on the outermost side of the cell, directly exposed to the environment or encapsulation materials. Using a mildly corrosive paste can reduce the risk of material degradation during long-term use and improve durability. Furthermore, at the module encapsulation end, the solder strips connecting the main busbar 401 and the pads 402 may be made of different metals, such as copper or tin-plated copper. Using a highly corrosive paste could trigger electrochemical corrosion between these different metals. Therefore, the corrosivity of the paste used for the main busbar 401 needs to be controlled to ensure compatibility.

[0054] Whether it is the n-type main grid line 401 or the p-type main grid line 401, the linewidth ranges from 100 to 300 μm. Therefore, the materials of the highly corrosive slurry all contain: aluminum-free or low-aluminum silver powder, resin binder and solvent. Among them, the aluminum content of the low-aluminum silver powder is less than or equal to 0.5 wt%, the resin binder can be dispersible latex powder or modified resin, and the solvent can be ethylenediaminetetraacetic acid disodium salt, stearic acid, etc.

[0055] In some embodiments, the passivation contact layer includes: a first passivation contact structure 201 and a second passivation contact structure 202 that are alternately spaced, wherein the first passivation contact structure 201 and the second passivation contact structure 202 have opposite conductivity types; the first conductive structure 3 includes a first sub-gate 3011 and a second sub-gate 3012, wherein the first sub-gate 3011 is disposed on the first passivation contact structure 201 and the second sub-gate 3012 is disposed on the second passivation contact structure 202.

[0056] Specifically, n-type and p-type subgrid lines have structural differences. The linewidth of n-type subgrid lines ranges from 5 to 30 μm, such as 5 μm, 10 μm, 15 μm, 25 μm, 30 μm, etc., which can be selected according to different production requirements. Its highly corrosive slurry includes nano silver powder, glass powder with low softening point oxides, and solvent. Low softening point oxides include PbO, Bi2O3, TeO2, etc., of which the content of PbO is usually less than 60 wt%, the size of the glass powder is generally greater than 2 μm, and the solvent can be terpineol, methyl formate, etc.

[0057] Because the surface slurry contact characteristics of the n-region differ from those of the p-region, the corresponding surface sub-gate corrosive slurry properties of the p-region are also different. The linewidth range of the p-region sub-gate line is 5~50 μm, for example, it can be 5 μm, 15 μm, 25 μm, 30 μm, 40 μm, 45 μm, 50 μm, etc., which can be selected according to different production requirements. Its highly corrosive slurry includes nano silver powder, glass powder with low softening point oxides and solvents. Low softening point oxides include B2O3, Na2O, and SiO2, of which the content of B2O3 is less than 30%. The size of the glass powder is generally greater than 2 μm, and the solvents selected are diethylene glycol butyl ether, polyacrylate, etc.

[0058] The solar cell disclosed herein can be used to prepare solar cell modules, taking into account both electrical and optical performance, which helps to improve the overall performance at the module level and expand industrialization efficiency.

[0059] Further functional descriptions of the above structures are the same as those of the corresponding embodiments described above, and will not be repeated here.

[0060] Although embodiments of the present disclosure have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the present disclosure, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. A solar cell, characterized in that, include: Basal layer (1); A passivation contact layer is disposed on one side surface of the base layer (1); the passivation contact layer includes a first portion (21) and a second portion (22), wherein the thickness of the first portion (21) is greater than the thickness of the second portion (22); A first conductive structure (3) and a second conductive structure (4) are provided on the first portion (21) to be combined with the first portion (21), and the second conductive structure (4) is provided on the second portion (22) to be adapted to connect the first conductive structure (3) and conduct current.

2. The solar cell according to claim 1, characterized in that, The passivation contact layer further includes a third portion (23) that surrounds the first portion (21) and the second portion (22), and the thickness of the third portion (23) is less than the thickness of the second portion (22).

3. The solar cell according to claim 2, characterized in that, The sidewall of the first portion (21) near the third portion (23) is a first vertical surface (211) or a first ramp surface (212) or a first curved surface; and / or, the sidewall of the second portion (22) near the third portion (23) is a second vertical surface (221) or a second ramp surface or a second curved surface.

4. The solar cell according to claim 2, characterized in that, In the passivated contact layer, the doping concentration of the first portion (21) is greater than the doping concentration of the third portion (23), and / or the doping concentration of the second portion (22) is greater than the doping concentration of the third portion (23).

5. The solar cell according to any one of claims 1 to 4, characterized in that, The surface of the base layer (1) includes a central region (101) and an edge region (102), the edge region (102) surrounding the central region (101). The first portion (21) includes a first sub-portion (2101) and a second sub-portion (2102), the first sub-portion (2101) being located in the central region (101) and the second sub-portion (2102) being located in the edge region (102), the thickness of the first sub-portion (2101) being greater than the thickness of the second sub-portion (2102); and / or, the second portion (22) includes a third sub-portion (2201) and a fourth sub-portion (2202), the third sub-portion (2201) being located in the central region (101) and the fourth sub-portion (2202) being located in the edge region (102), the thickness of the third sub-portion (2201) being greater than the thickness of the fourth sub-portion (2202).

6. The solar cell according to claim 1, characterized in that, The first conductive structure (3) includes a sub-gate line, and the second conductive structure (4) includes a main gate line (401) and a pad (402). Multiple sub-gate lines are spaced apart along a second direction, and any one of the sub-gate lines extends along a first direction, with the first direction and the second direction forming a preset angle; multiple main gate lines (401) are spaced apart along the first direction, and any one of the main gate lines (401) extends along the second direction; one end of each sub-gate line is connected to the main gate line (401) and the other end is freely disposed; the pad (402) is adapted to be disposed on the main gate line (401).

7. The solar cell according to claim 6, characterized in that, The thickness of the first portion (21) gradually increases in the direction from one end relatively far from the second portion (22) to one end relatively close to the second portion (22); and / or, the thickness of the second portion (22) gradually increases in the direction from one end relatively far from the pad (402) to one end relatively close to the pad (402).

8. The solar cell according to claim 6 or 7, characterized in that, The thickness of the sub-gate line gradually increases in the direction from one end relatively far from the main gate line (401) to the end connected to the main gate line (401); and / or, the thickness of the main gate line (401) gradually increases in the direction from one end relatively far from the pad (402) to the end connected to the pad (402).

9. The solar cell according to claim 1, characterized in that, The first conductive structure (3) uses a highly corrosive slurry, and the resistivity of the highly corrosive slurry in contact with the substrate layer (1) is less than 10 mΩ / cm. 2 ; The second conductive structure (4) uses a low-corrosion slurry or a non-corrosion slurry, and the resistivity of the low-corrosion slurry or the non-corrosion slurry in contact with the substrate layer (1) is greater than or equal to 10 mΩ / cm. 2 .

10. The solar cell according to claim 8, characterized in that, The passivation contact layer includes: a first passivation contact structure (201) and a second passivation contact structure (202) arranged alternately, wherein the first passivation contact structure (201) and the second passivation contact structure (202) have opposite conductivity types; The first conductive structure (3) includes a first sub-gate (3011) and a second sub-gate (3012). The first sub-gate (3011) is disposed on the first passivation contact structure (201), and the second sub-gate (3012) is disposed on the second passivation contact structure (202). The width of the first sub-gate (3011) is in the range of 5~30 μm, and the width of the second sub-gate (3012) is in the range of 5~50 μm.

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