Event scheduling method for digital circuit simulators

CN122389781BActive Publication Date: 2026-08-14成都融见软件科技有限公司 +1
View PDF 2 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2026-06-11
Publication Date
2026-08-14

AI Technical Summary

Technical Problem

[0003]然而,在实际仿真中,一个设计往往只会用到标准中定义的部分调度区域,例如仅使用到3-4个常用的调度区域,从而导致大部分调度区域的事件队列在绝大多数时间内为空

Benefits of technology

本发明通过在新事件插入时以事件节点形式动态地建立或更新非空调度区域之间的链接,将所有待处理的事件节点组织成单一且线性的调度链,使得事件执行阶段可以仅通过简单的单重循环遍历调度链即可完成事件调度,完全避免了现有技术中为了确定下一个需要执行的事件而进行的复杂多重嵌套循环和无效空队列检测,从而显著提升了事件调度与执行的效率。

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN122389781B_ABST
    Figure CN122389781B_ABST
Patent Text Reader

Abstract

This application relates to the field of electronic design automation technology, and in particular to an event scheduling method for digital circuit simulators. This method dynamically establishes or updates links between non-air-conditioned regions in the form of event nodes when a new event is inserted, organizing all event nodes to be processed into a single and linear scheduling chain. This allows the event execution phase to complete event scheduling simply by traversing the scheduling chain in a single loop, completely avoiding the complex multi-nested loops and invalid empty queue detection required in the prior art to determine the next event to be executed, thereby significantly improving the efficiency of event scheduling and execution.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of electronic design automation technology, and in particular to an event scheduling method for digital circuit simulators. Background Technology

[0002] The event scheduler is a core component in event-driven digital circuit simulators, responsible for managing events generated during simulation and ensuring their orderly execution according to the complex rules defined by hardware description languages ​​(such as System Verilog). In existing technologies, standard scheduler implementations typically maintain a set of ordered scheduling regions; for example, the IEEE STD 1800-2025 standard defines 17 scheduling regions. When executing events within the same time slot, the scheduler repeatedly traverses these scheduling regions, and after processing events in each region, sequentially checks if the event queue of the next region is empty, until a non-empty event queue is found and its events are processed.

[0003] However, in actual simulations, a design often only uses a portion of the scheduling regions defined in the standard, such as only 3-4 commonly used scheduling regions. This results in the event queues of most scheduling regions being empty for the vast majority of the time. However, in real-world simulation scenarios, the scheduler's implementation mechanism causes it to perform numerous invalid empty queue checks each time a scheduling region is switched. Especially in scenarios where simulation events are sparse or discretely distributed, the time consumed by this cyclical idle process increases significantly, becoming a key bottleneck restricting simulation performance and resulting in low event scheduling efficiency for the event scheduler.

[0004] To address the aforementioned issues, existing technologies have proposed optimization schemes by tailoring scheduling region types or generating customized schedulers on demand at compile time. However, tailoring scheduling region types sacrifices the scheduler's support for full-featured simulation behavior, while customized schedulers introduce complex static analysis and compile-time overhead, and still cannot completely eliminate invalid detection of inactive regions.

[0005] Therefore, improving the event scheduling efficiency of the event scheduler has become an urgent problem to be solved. Summary of the Invention

[0006] To address the aforementioned technical problems, the technical solution adopted by this invention is as follows: An event scheduling method for a digital circuit simulator, the method comprising the following steps: S1, When a new event node is generated, the event node is added to the corresponding scheduling region, and the event node is used as the tail node of the corresponding scheduling region; S2, if the scheduling region corresponding to the event node is empty, then take the event node as the head node of the corresponding scheduling region and determine whether the preceding scheduling regions of the scheduling region corresponding to the event node are not empty. S3. If the preceding scheduling regions of the scheduling region corresponding to the event node are not empty, then the successor pointer corresponding to the nearest preceding non-empty scheduling region is adjusted to point to the event node, and it is determined whether the following scheduling regions of the scheduling region corresponding to the event node are not empty. S4. If there are several non-empty subsequent scheduling regions in the scheduling region corresponding to the event node, then the successor pointer of the scheduling region corresponding to the event node is adjusted to point from the event node to the head node of the nearest non-empty scheduling region in the subsequent order. S5. A scheduling chain is formed based on the event nodes contained in each scheduling region and the successor pointers corresponding to each scheduling region. S6, execute each event node according to the scheduling chain.

[0007] Compared with the prior art, the present invention has significant advantages. Through the above technical solution, the event scheduling method for digital circuit simulators provided by the present invention achieves considerable technical progress and practicality, and has broad industrial application value. It has at least the following advantages: This invention dynamically establishes or updates links between non-air-cooled regions in the form of event nodes when a new event is inserted, organizing all pending event nodes into a single and linear scheduling chain. This allows the event execution phase to complete event scheduling simply by traversing the scheduling chain in a single loop, completely avoiding the complex multi-nested loops and invalid empty queue detection required in the prior art to determine the next event to be executed, thereby significantly improving the efficiency of event scheduling and execution. Attached Figure Description

[0008] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0009] Figure 1 This is a flowchart illustrating an event scheduling method for a digital circuit simulator provided in an embodiment of the present invention. Detailed Implementation

[0010] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0011] This embodiment provides an event scheduling method for a digital circuit simulator. See [link to documentation]. Figure 1 The above is a flowchart illustrating an event scheduling method for a digital circuit simulator provided by an embodiment of the present invention. The method includes the following steps: S1, When a new event node is generated, the event node is added to the corresponding scheduling region, and the event node is used as the tail node of the corresponding scheduling region; S2, if the scheduling region corresponding to the event node is empty, then take the event node as the head node of the corresponding scheduling region and determine whether the preceding scheduling regions of the scheduling region corresponding to the event node are not empty. S3. If the preceding scheduling regions of the scheduling region corresponding to the event node are not empty, then the successor pointer corresponding to the nearest preceding non-empty scheduling region is adjusted to point to the event node, and it is determined whether the following scheduling regions of the scheduling region corresponding to the event node are not empty. S4. If there are several non-empty subsequent scheduling regions in the scheduling region corresponding to the event node, then the successor pointer of the scheduling region corresponding to the event node is adjusted to point from the event node to the head node of the nearest non-empty scheduling region in the subsequent order. S5. A scheduling chain is formed based on the event nodes contained in each scheduling region and the successor pointers corresponding to each scheduling region. S6, execute each event node according to the scheduling chain.

[0012] Each event node corresponds to one event. The event serves as the basic unit for scheduling by the scheduler. When a new event is inserted into the event scheduler, it is considered as generating a new event node.

[0013] A scheduling region refers to a set of events that are logically executed in a specific order at the same simulation moment. For example, a scheduling region can be an active region, an inactive region, a non-blocking assignment update region, etc. Each scheduling region corresponds to an event queue, which contains several events in a sequential order. In this embodiment, it can be understood that a single scheduling region contains several event nodes in a sequential order. The first event node in a single scheduling region is the head node of that scheduling region, and the last event node in a single scheduling region is the tail node of that scheduling region.

[0014] An empty scheduling region means that the scheduling region does not contain any event nodes.

[0015] The successor pointer is a reference to another event node, used to link event nodes in different scheduling regions.

[0016] A scheduling chain is a singly linear linked list formed by event nodes in all non-air-cooled regions. In this embodiment, the traversal order of the scheduling chain can follow the event execution order defined by the standard.

[0017] Specifically, for a specified scheduling area, its preceding scheduling area refers to the scheduling area that precedes the specified scheduling area in the standard-defined scheduling order, and its following scheduling area refers to the scheduling area that follows the specified scheduling area in the standard-defined scheduling order.

[0018] When forming a scheduling chain, for any event node, if the event node is the head node of the corresponding scheduling region, the event node preceding and adjacent to the event node can be determined according to the successor pointer of the nearest non-air-cooling region in the preceding order. Otherwise, the event node preceding and adjacent to the event node in the same scheduling region can be determined according to the order of the event node in the corresponding scheduling region. If the event node is the tail node of the corresponding scheduling region, the event node following and adjacent to the event node can be determined according to the successor pointer of the corresponding scheduling region. Otherwise, the event node following and adjacent to the event node in the same scheduling region can be determined according to the order of the event node in the corresponding scheduling region. It can be seen that each event node can determine its adjacent other event nodes, thus forming a unidirectional linear scheduling chain.

[0019] In one specific implementation, for any scheduling region, when there are several non-empty subsequent scheduling regions, the successor pointer corresponding to the scheduling region points from the tail node of the scheduling region to the head node of the nearest non-empty scheduling region in the subsequent order. When all the subsequent scheduling regions of the scheduling region are empty, the successor pointer corresponding to the scheduling region points from the tail node of the scheduling region to a preset stage transition node.

[0020] In this context, a stage transition node refers to a pre-defined special event node. A stage transition node does not belong to any scheduling region and is used to connect two different scheduling stages. A scheduling stage includes several scheduling regions.

[0021] Specifically, when the execution reaches the stage transition node, it usually means that all the event nodes in a scheduling stage have been executed. The scheduler will execute the stage switching logic, select the next scheduling stage to be executed, and jump to the first event node in that scheduling stage.

[0022] In this embodiment, when the subsequent scheduling regions of the scheduling region are all empty, the successor pointer corresponding to the scheduling region points from the tail node of the scheduling region to the preset stage transition node. That is, the tail node in the scheduling chain must be the stage transition node. In the event execution phase, if all stage transition nodes have been executed, it means that all events have been executed.

[0023] In one specific implementation, step S2 further includes: If the scheduling region corresponding to the event node is not empty, then directly determine whether the subsequent scheduling regions of the scheduling region corresponding to the event node are not empty.

[0024] When the scheduling region corresponding to an event node is not empty, the event node can be directly added to the end of the event queue of the corresponding scheduling region. At this time, the event node is definitely not the head node of the corresponding scheduling region. There is no need to consider whether there is a previous non-air-conditioned scheduling region, nor is there any need to consider the update of the successor pointer of the previous non-air-conditioned scheduling region. It is only necessary to determine whether several subsequent scheduling regions are not empty in order to determine the direction of the successor pointer of the corresponding scheduling region.

[0025] In one specific implementation, step S3 further includes: If the preceding scheduling regions of the scheduling region corresponding to the event node are all empty, then directly determine whether the following scheduling regions of the scheduling region corresponding to the event node are not empty.

[0026] When the preceding scheduling regions of the scheduling region corresponding to the event node are all empty, there are no preceding non-air-conditioned scheduling regions. Therefore, there is no need to consider updating the successor pointer of the preceding non-air-conditioned scheduling region. It is only necessary to determine whether the following scheduling regions are not empty in order to determine the direction of the successor pointer of the corresponding scheduling region.

[0027] Specifically, in the event scheduling phase, which is the phase where event nodes are not executed but scheduling chains are constructed, the event node is the head node of the scheduling chain when the preceding scheduling regions of the scheduling region corresponding to the event node are all empty.

[0028] In one specific implementation, step S4 further includes: If the subsequent scheduling regions of the scheduling region corresponding to the event node are all empty, then the successor pointer of the scheduling region corresponding to the event node is adjusted to point to the stage transition node.

[0029] In this embodiment, when several subsequent scheduling regions corresponding to the scheduling region of the event node are all empty, the subsequent pointer of the scheduling region corresponding to the event node is adjusted to the stage transition node.

[0030] In one specific implementation, if there are several non-empty subsequent scheduling regions in the scheduling region corresponding to the event node, adjusting the successor pointer of the scheduling region corresponding to the event node to point from the event node to the head node of the nearest subsequent non-empty scheduling region includes: If several subsequent scheduling regions of the scheduling region corresponding to the event node are not empty, and the scheduling region corresponding to the event node and the nearest subsequent non-air conditioning region belong to different scheduling stages, then the successor pointer of the scheduling region corresponding to the event node is adjusted to point from the event node to the stage transition node, and the successor pointer of the stage transition node is pointed to the head node of the nearest subsequent non-air conditioning region.

[0031] The scheduling phase refers to a set of ordered scheduling regions in terms of logical function. According to the language specification, all events in a scheduling phase must be executed completely before the next scheduling phase can be entered.

[0032] In one specific implementation, when the scheduling chain executes each event node, the currently executing event node is determined according to the scheduling pointer corresponding to the scheduling chain; The method further includes the following steps: If the scheduling region corresponding to the generated event node is before the scheduling region pointed to by the scheduling pointer, and the scheduling region corresponding to the generated event node and the scheduling region pointed to by the scheduling pointer belong to the same scheduling stage, then the successor pointer of the scheduling region pointed to by the scheduling pointer will be adjusted to point to the event node.

[0033] This embodiment provides a method for updating the scheduling chain when a new event node is generated during the event execution phase.

[0034] The scheduling pointer is a pointer to the currently executing event node in the scheduling chain. It is used to retrieve the corresponding event node from the scheduling chain and execute it. After execution, it moves to the next event node in the scheduling chain.

[0035] In one specific implementation, the method further includes the following steps: If the scheduling region corresponding to the generated event node is before the scheduling region pointed to by the scheduling pointer, and the scheduling region corresponding to the generated event node does not belong to the same scheduling stage as the scheduling region pointed to by the scheduling pointer, then the successor pointer of the nearest subsequent stage transition node of the scheduling region pointed to by the scheduling pointer is adjusted to point to the event node.

[0036] The scheduling chain update method provided in this embodiment enables the scheduling chain to update the event execution order that conforms to the standard definition during execution.

[0037] For example, suppose there are three scheduling phases P1, P2, and P3. P1 includes four scheduling regions: R1, R2, R3, and R4. P2 includes three scheduling regions: R5, R6, and R7. P3 includes ten scheduling regions: R8 to R17. The order of declaration of each scheduling phase and scheduling region in the above assumption is the same as the execution order defined by the standard. For example, scheduling phase P2 can only be executed after all event nodes in scheduling phase P1 have been executed, and scheduling phase P3 can only be executed after all event nodes in scheduling phase P2 have been executed.

[0038] Further assuming the event layout, R1 includes E11, E12 and E13, R4 includes E41 and E42, R6 includes E61 and R16 includes E161. If this event layout is generated during the event scheduling phase rather than the event execution phase, then the initial scheduling chain is E11-E12-E13-E41-E42-SW-E61-SW-E161-SW, where SW is the phase transition node, and the scheduling pointer of the scheduling chain initially points to the head node E11.

[0039] If the event layout is the event layout at a certain moment in the event execution phase, and a new event node E14 is generated at that moment, then E14 is added to R1 as the tail node of R1. Since R1 is not empty, we directly check if the subsequent scheduling regions of R1 are not empty. R4, R6, and R16 are all not empty, and R1 and R4 are in the same scheduling phase. Therefore, the successor pointer of R1 is adjusted so that E14 points to the head node E41 of the nearest subsequent non-air-cooled scheduling region R4. The scheduling chain is then updated as follows: E11-E12-E13-E14-E41-E42-SW-E61-SW-E161-SW.

[0040] If the event layout is the event layout at a certain moment in the event execution phase, and a new event node E21 is generated at that moment, then E21 is added to R2 and becomes the tail node of R2. Since R2 is empty, E21 also becomes the head node of R2. If the preceding scheduling region R1 is not empty, then the successor pointer of R1 is adjusted from E13 to E21. Next, it is determined whether several subsequent scheduling regions of R2 are not empty. R4, R6, and R16 are all not empty, and R2 and R4 are in the same scheduling phase. Therefore, the successor pointer of R2 is adjusted from E21 to the head node E41 of the nearest subsequent non-air-cooled scheduling region R4. The scheduling chain is then updated as follows: E11-E12-E13-E21-E41-E42-SW-E61-SW-E161-SW.

[0041] If the event layout is the event layout at a certain moment in the event execution phase, and a new event node E62 is generated at that moment, then E62 is added to R6 as the tail node of R6. Since R6 is not empty, it is checked whether the subsequent scheduling regions of R2 are not empty. R16 is not empty, and R6 and R16 are not in the same scheduling phase. Therefore, the successor pointer of R6 is adjusted so that E62 points to the phase transition node, and the successor pointer of the phase transition node points to the head node E161 of the nearest subsequent non-air-cooled scheduling region R16. The scheduling chain is then updated as follows: E11-E12-E13-E21-E41-E42-SW-E61-E62-SW-E161-SW.

[0042] Using the above assumptions and the initial state of the scheduling chain, if the event layout at a certain moment in the event execution phase is as follows: At the moment E41-E42-SW-E61-SW-E161-SW, a new event node E14 is generated, and the scheduling pointer points to E41, which is also R4. The successor pointer of R4 is adjusted so that E42 points to E14, and the scheduling chain is updated as follows: E41-E42-E14-SW-E61-SW-E161-SW.

[0043] Using the above assumptions and the initial state of the scheduling chain, if the event layout at a certain moment in the event execution phase is as follows: At point E61-SW-E161-SW, a new event node E14 is generated simultaneously. The scheduling pointer points to E61, which is also R6. The successor pointer of the nearest subsequent stage transition node after R6 is adjusted to point to E14. The scheduling chain is then updated as follows: E61-SW-E14-SW-E161-SW.

[0044] In this embodiment, by dynamically establishing or updating links between non-air-cooled regions in the form of event nodes when a new event is inserted, all event nodes to be processed are organized into a single and linear scheduling chain. This allows the event execution phase to complete event scheduling simply by traversing the scheduling chain in a single loop. This completely avoids the complex multi-nested loops and invalid empty queue detection required in the prior art to determine the next event to be executed, thereby significantly improving the efficiency of event scheduling and execution.

[0045] While specific embodiments of the invention have been described in detail by way of example, those skilled in the art should understand that the examples are for illustrative purposes only and not intended to limit the scope of the invention. Those skilled in the art should also understand that various modifications can be made to the embodiments without departing from the scope and spirit of the invention. The scope of this invention is defined by the appended claims.

Claims

1. An event scheduling method for a digital circuit simulator, characterized in that, The method includes the following steps: S1, When a new event node is generated, the event node is added to the corresponding scheduling region, and the event node is used as the tail node of the corresponding scheduling region; S2, if the scheduling region corresponding to the event node is empty, then take the event node as the head node of the corresponding scheduling region and determine whether the preceding scheduling regions of the scheduling region corresponding to the event node are not empty. S3. If the preceding scheduling regions of the scheduling region corresponding to the event node are not empty, then the successor pointer corresponding to the nearest preceding non-empty scheduling region is adjusted to point to the event node, and it is determined whether the following scheduling regions of the scheduling region corresponding to the event node are not empty. S4. If there are several non-empty subsequent scheduling regions in the scheduling region corresponding to the event node, then the successor pointer of the scheduling region corresponding to the event node is adjusted to point from the event node to the head node of the nearest non-empty scheduling region in the subsequent order. S5. A scheduling chain is formed based on the event nodes contained in each scheduling region and the successor pointers corresponding to each scheduling region. S6, execute each event node according to the scheduling chain.

2. The event scheduling method for a digital circuit simulator according to claim 1, characterized in that, For any scheduling region, when there are several non-empty subsequent scheduling regions, the successor pointer of the scheduling region is pointed from the tail node of the scheduling region to the head node of the nearest non-empty scheduling region in the next order. When there are several empty subsequent scheduling regions, the successor pointer of the scheduling region is pointed from the tail node of the scheduling region to the preset stage transition node.

3. The event scheduling method for a digital circuit simulator according to claim 1, characterized in that, Step S2 also includes: If the scheduling region corresponding to the event node is not empty, then directly determine whether the subsequent scheduling regions of the scheduling region corresponding to the event node are not empty.

4. The event scheduling method for a digital circuit simulator according to claim 1, characterized in that, Step S3 also includes: If the preceding scheduling regions of the scheduling region corresponding to the event node are all empty, then directly determine whether the following scheduling regions of the scheduling region corresponding to the event node are not empty.

5. The event scheduling method for a digital circuit simulator according to claim 2, characterized in that, Step S4 also includes: If the subsequent scheduling regions of the scheduling region corresponding to the event node are all empty, then the successor pointer of the scheduling region corresponding to the event node is adjusted to point to the stage transition node.

6. The event scheduling method for a digital circuit simulator according to claim 2, characterized in that, If the scheduling region corresponding to the event node has several non-empty subsequent scheduling regions, then the successor pointer of the scheduling region corresponding to the event node is adjusted to point from the event node to the head node of the nearest non-empty scheduling region in the subsequent order, including: If several subsequent scheduling regions of the scheduling region corresponding to the event node are not empty, and the scheduling region corresponding to the event node and the nearest subsequent non-air conditioning region belong to different scheduling stages, then the successor pointer of the scheduling region corresponding to the event node is adjusted to point from the event node to the stage transition node, and the successor pointer of the stage transition node is pointed to the head node of the nearest subsequent non-air conditioning region.

7. The event scheduling method for a digital circuit simulator according to claim 2, characterized in that, When the scheduling chain executes each event node, the currently executing event node is determined according to the scheduling pointer corresponding to the scheduling chain; The method further includes the following steps: If the scheduling region corresponding to the generated event node is before the scheduling region pointed to by the scheduling pointer, and the scheduling region corresponding to the generated event node and the scheduling region pointed to by the scheduling pointer belong to the same scheduling stage, then the successor pointer of the scheduling region pointed to by the scheduling pointer will be adjusted to point to the event node.

8. The event scheduling method for a digital circuit simulator according to claim 7, characterized in that, The method further includes the following steps: If the scheduling region corresponding to the generated event node is before the scheduling region pointed to by the scheduling pointer, and the scheduling region corresponding to the generated event node does not belong to the same scheduling stage as the scheduling region pointed to by the scheduling pointer, then the successor pointer of the nearest subsequent stage transition node of the scheduling region pointed to by the scheduling pointer is adjusted to point to the event node.

Citation Information

Patent Citations

  • Scheduling method and system applied to wireless communication system simulation

    CN103929769A

  • Method and system for modular circuit behavior simulation

    CN117131833A