Programmable BMS charging and discharging circuit
By using a programmable BMS charging and discharging circuit, combined with a battery monitoring SOC chip and a passive balancing circuit, the shortcomings of existing BMS charging and discharging control solutions in the low-end market in terms of safety and energy efficiency, as well as the high algorithm complexity and expensive hardware design in the high-end market, are solved, achieving more intelligent, energy-saving and economical cell protection.
Patent Information
- Application Number
- CN202610341866.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-03-19
- Publication Date
- 2026-07-14
AI Technical Summary
Existing BMS charging and discharging control solutions have shortcomings in safety and energy efficiency in the low-end market, while in the high-end market they face problems such as high algorithm complexity, expensive hardware design and insufficient maturity.
The programmable BMS charging and discharging circuit is adopted, including a battery monitoring SOC chip, a passive balancing circuit, a charger, an electronic load, a flat-top cylindrical lithium battery, and a charging and discharging protection module. Through the combination of hardware design of NMOS transistors, balancing resistors, diodes, and filter capacitors, combined with the voltage/temperature measurement and monitoring software of the BQ76920 chip, it can quickly identify and protect the battery cells from overvoltage, undervoltage, overcurrent, and overtemperature.
It achieves more accurate and faster cell status identification, quickly switches between charge and discharge MOS switches to avoid thermal runaway, and features a more intelligent, energy-efficient, and economical hardware design. It is suitable for different cell counts and current-limiting resistor sizes and provides adjustable output power protection.
Smart Images

Figure CN122394149A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of electrical technology, and more specifically, to a programmable BMS charging and discharging circuit. Background Technology
[0002] With the continuous improvement of battery cell energy density and the increasing complexity of application scenarios, battery cell safety has become a key factor restricting the industry's development. Abnormal operating conditions such as overcharging, over-discharging, overcurrent, and overtemperature can all trigger thermal runaway, seriously threatening personal and property safety. Therefore, the Battery Management System (BMS), as a core component ensuring the safe operation of battery cells, has matured in tandem. Its core functional module—the charge and discharge control circuit—directly determines the BMS's ability to control the battery cells, making its safety, reliability, and the economics of its hardware design crucial. Currently, BMS charge and discharge control technology exhibits a polarized development trend: on the one hand, traditional low-end consumer electronics products, such as some toys, small appliances, and portable lighting devices, generally adopt simplified solutions, using only resistors, power MOSFETs, and simple analog logic to control the charge and discharge of the battery cells. On the other hand, mid-to-high-end BMS systems, especially in electric vehicles and large-scale energy storage applications, generally adopt a distributed daisy-chain topology, using dedicated AFE (analog front-end) chips to achieve voltage monitoring and equalization control of multiple battery cells connected in series. To improve energy utilization efficiency and cell voltage consistency, such systems often introduce active balancing technology and use complex algorithms to estimate the state of charge (SOC), such as Kalman filtering and its derivative algorithms, ampere-hour integration method, extended Kalman filtering, etc.
[0003] Existing BMS charging and discharging control solutions have shortcomings in safety and energy efficiency in the low-end market, while in the high-end market they face the dilemma of high algorithm complexity, expensive hardware design and insufficient maturity. Summary of the Invention
[0004] This invention aims to address the shortcomings of existing BMS charge and discharge control schemes in terms of safety and energy efficiency in the low-end market, while in the high-end market they face problems such as high algorithm complexity, expensive hardware design, and insufficient maturity.
[0005] To address the above problems, this invention provides a programmable BMS charging and discharging circuit, including a battery monitoring SOC chip, a passive balancing circuit, a charger, an electronic load, a flat-top cylindrical lithium battery, and a charging and discharging protection module. The positive terminal of the charger is connected to the main positive terminal of the battery compartment in sequence through PCB soldering terminal P5, diode D1, and pin 4 of PCB soldering terminal P1. The negative terminal of the charger is connected to the main negative terminal of the battery compartment in sequence through PCB soldering terminal P3 and the charge / discharge protection module; The positive terminal of the electronic load is connected to the main positive terminal of the battery compartment via PCB soldering terminal P4; The negative terminal of the electronic load is connected to the main negative terminal of the battery compartment via PCB soldering terminal P3 and the charge / discharge protection module. The positive terminal of the flat-top cylindrical lithium battery is connected to the PCB soldering terminal P4. The negative and positive terminals of the flat-top cylindrical lithium battery are connected to the input terminals of the charge / discharge protection module; Each tap of the flat-top cylindrical lithium battery is connected to one end of the passive equalization circuit, and the other end of the passive equalization circuit is connected to the Battery monitoring SOC chip.
[0006] The present invention provides a programmable BMS charging and discharging circuit, which, compared with the prior art, has the following beneficial effects, but is not limited to: The BQ76920 chip of this invention has internal hardware modules for voltage, current and temperature measurement. For example, it uses a 14-bit ADC to measure cell voltage and temperature, and a 16-bit integrating ADC (coulomb counter - CC) to sample current. With the threshold set by the monitoring software, it can detect whether there are overvoltage, undervoltage, overcurrent and overtemperature conditions. Passive balancing circuit: This hardware design, combining an NMOS transistor, balancing resistor, diode, and filter capacitor, along with voltage / temperature measurement using a BQ76920 and cell voltage / temperature calculation using accompanying monitoring software, enables the discharge of excess charge from a battery cell when its voltage or temperature is detected to be too high or too high. The core principle is to utilize the switching characteristics of the NMOS transistor to control the on / off state of the balancing circuit, use a resistor to dissipate excess energy, use a diode to ensure unidirectional current flow, and use a capacitor to enhance circuit stability. Charge and discharge control circuit: In the charge and discharge control circuit, the source and drain pins are placed in different directions because of the difference between charging and discharging, which in turn leads to the different directions of their parasitic diodes. This ensures that only one of them can conduct under the control of the gate of each of them through the programmable pin, forming a negative conduction circuit. This allows the charging and discharging operations to perform their respective functions. Otherwise, there would be a problem where neither charging nor discharging can be performed because no conduction path can be formed on the negative circuit during programmable control. This invention controls the BMS hardware to more accurately and quickly identify potential problems such as overvoltage, undervoltage, overcurrent, and overtemperature in the battery cells, and quickly switches the charge / discharge MOS switch to cut off potential thermal runaway issues. This programmable BMS charge / discharge hardware design is more intelligent, energy-efficient, and stable and reliable than traditional consumer electronics products, while being more economical and practical than common mid-to-high-end BMS charge / discharge control measures. It can provide a BMS control and protector with adjustable output power by changing the number of battery cells and the size of the current-limiting resistor.
[0007] Furthermore, the Battery monitoring SOC chip is chip U2; the passive equalization circuit includes MOSFETs Q11, Q2, Q7, Q8, and Q9, resistors R7, R10, R13, R44, and R51. Pin 12 of the chip U2 is connected to one end of resistor R54, and the other end of resistor R54 is connected to pin 6 of PCB soldering terminal P1. Pin 13 of chip U2 is connected to one end of resistor R53, and the other end of resistor R53 is connected to pin 5 of PCB soldering terminal P1. A capacitor C10 is connected in parallel between pin 12 and pin 13 of chip U2; One end of resistor R52 is connected to the connection point between pin 13 of chip U2 and capacitor C10, and the other end of resistor R52 is connected to the negative terminal of diode D16. The positive terminal of diode D16 is connected to pin 5 of PCB soldering terminal P1. The cathode of diode D16 is connected to the gate of MOSFET Q9. The drain of MOSFET Q9 is connected to pin 6 of PCB soldering terminal P1 through resistor R51. The source of MOSFET Q9 is connected to pin 5 of PCB soldering terminal P1. The source of MOSFET Q9 is connected to the anode of diode D11, and the cathode of diode D11 is connected to the gate of MOSFET Q9. Pin 14 of chip U2 is connected to one end of resistor R50, and the other end of resistor R50 is connected to pin 4 of PCB soldering terminal P1. A capacitor C9 is connected in parallel between pin 14 and pin 13 of chip U2; One end of resistor R45 is connected to the connection point between pin 14 of chip U2 and capacitor C9, and the other end of resistor R45 is connected to the negative terminal of diode D15. The positive terminal of diode D15 is connected to pin 4 of PCB soldering terminal P1. The cathode of diode D15 is connected to the gate of MOSFET Q8, the drain of MOSFET Q8 is connected to pin 5 of PCB soldering terminal P1 through resistor R44, and the source of MOSFET Q8 is connected to pin 4 of PCB soldering terminal P1. The source of MOSFET Q8 is connected to the anode of diode D10, and the cathode of diode D10 is connected to the gate of MOSFET Q8. Pin 15 of chip U2 is connected to one end of resistor R43, and the other end of resistor R43 is connected to pin 3 of PCB soldering terminal P1. A capacitor C8 is connected in parallel between pin 15 and pin 14 of chip U2; One end of resistor R14 is connected to the connection point between pin 15 of chip U2 and capacitor C8, and the other end of resistor R14 is connected to the negative terminal of diode D14. The positive terminal of diode D14 is connected to pin 3 of PCB soldering terminal P1. The cathode of diode D14 is connected to the gate of MOSFET Q7. The drain of MOSFET Q7 is connected to pin 4 of PCB soldering terminal P1 through resistor R13. The source of MOSFET Q7 is connected to pin 3 of PCB soldering terminal P1. The source of MOSFET Q7 is connected to the anode of diode D9, and the cathode of diode D9 is connected to the gate of MOSFET Q7. Pin 16 of chip U2 is connected to one end of resistor R12, and the other end of resistor R12 is connected to pin 2 of PCB soldering terminal P1. A capacitor C5 is connected in parallel between pin 15 and pin 16 of chip U2; One end of resistor R11 is connected to the connection point between pin 16 of chip U2 and capacitor C5, and the other end of resistor R11 is connected to the negative terminal of diode D13. The positive terminal of diode D13 is connected to pin 2 of PCB soldering terminal P1. The cathode of diode D13 is connected to the gate of MOSFET Q2, the drain of MOSFET Q2 is connected to pin 3 of PCB soldering terminal P1 through resistor R10, and the source of MOSFET Q2 is connected to pin 2 of PCB soldering terminal P1. The source of MOSFET Q2 is connected to the anode of diode D2, and the cathode of diode D2 is connected to the gate of MOSFET Q2. Pin 17 of chip U2 is connected to one end of resistor R15, and the other end of resistor R15 is connected to pin 1 of PCB soldering terminal P1. A capacitor C29 is connected in parallel between pin 17 and pin 16 of chip U2; One end of resistor R30 is connected to the connection point between pin 17 of chip U2 and capacitor C29, and the other end of resistor R30 is connected to the negative terminal of diode D7. The positive terminal of diode D7 is connected to pin 1 of PCB soldering terminal P1. The cathode of diode D7 is connected to the gate of MOSFET Q11, the drain of MOSFET Q11 is connected to pin 2 of PCB soldering terminal P1 through resistor R7, and the source of MOSFET Q11 is connected to pin 1 of PCB soldering terminal P1. The source of MOSFET Q11 is connected to the anode of diode D12, and the cathode of diode D12 is connected to the gate of MOSFET Q11.
[0008] Furthermore, pin 17 of the chip U2 is connected to one end of capacitor C13, and the other end of capacitor C13 is grounded; The source of MOSFET Q11 is connected to one end of OR resistor R29, and the other end of OR resistor R29 is grounded.
[0009] Furthermore, pin 4 of chip U2 is connected to a 3.3V power supply via resistor R32; pin 5 of chip U2 is connected to a 3.3V power supply via resistor R31. Pin 3 of chip U2 is grounded.
[0010] Furthermore, pin 6 of the chip U2 is connected to one end of switch KEY1, and the other end of switch KEY1 is connected to signal CELL1 through resistor R24; Pin 6 of chip U2 is connected to the cathode of diode D5, and the anode of diode D5 is connected to the WakeUp signal through resistor R24; Pin 6 of chip U2 is connected to one end of capacitor C35, and the other end of C35 is grounded; Pin 6 of chip U2 is connected to one end of the thermistor P6, and the other end of the thermistor P6 is grounded.
[0011] Furthermore, pin 7 of the chip U2 is connected to one end of capacitor C36, and the other end of C36 is grounded.
[0012] Furthermore, pin 8 of the chip U2 is connected to one end of capacitor C38, and the other end of C38 is grounded; Pin 8 of chip U2 is connected to the positive terminal of LED1 through resistor R25, and the negative terminal of LED1 is grounded.
[0013] Furthermore, pins 9 and 10 of the chip U2 are simultaneously connected to one end of resistor R28, the other end of resistor R28 is connected to the negative terminal of diode D17, and the positive terminal of diode D17 is connected to pin 6 of PCB soldering terminal P1.
[0014] Furthermore, the charge / discharge protection module includes a high-speed switching diode D18, a MOSFET Q1, a MOSFET Q6, a MOSFET Q3, and a MOSFET Q9; Pin 18 of the chip U2 is connected to the common terminal of the high-speed switching diode D18, and pin 19 of the chip U2 is connected to the cathode and anode of the high-speed switching diode D18. The common terminal of the high-speed switching diode D18 is connected to one end of the capacitor C30, and the other end of the capacitor C30 is grounded. The cathode of the high-speed switching diode D18 is connected to one end of the capacitor C32, and the other end of the capacitor C32 is grounded. A capacitor C31 is connected in parallel between the common terminal and the cathode of the high-speed switching diode D18. One end of resistor R16 is connected to the connection point between capacitors C30 and C31, and the other end of resistor R16 is connected to PCB soldering terminal P2. PCB soldering terminal P2 is connected to the positive terminal of diode D6, and the negative terminal of diode D6 is connected to PCB soldering terminal P3. One end of resistor R17 is connected to the connection point between capacitors C32 and C31, and the other end of resistor R17 is connected to one end of resistor R18. The other end of resistor R18 is connected to PCB soldering terminal P2. Pin 1 of chip U2 is connected to the gate of MOSFET Q6, and the source of MOSFET Q6 is connected to PCB soldering terminal P2. A resistor R20 is provided between the gate and source of MOSFET Q6; The drain of MOSFET Q6 is connected to the drain of MOSFET Q1; Pin 2 of chip U2 is connected to the source of MOSFET Q3. The gate of MOSFET Q3 is grounded. The drain of MOSFET Q3 is connected to the anode of diode D3 through resistor R21. The cathode of diode D3 is connected to the gate of MOSFET Q1. A resistor R22 is connected in parallel across the two ends of diode D3; The gate of MOSFET Q1 is connected to the negative terminal of diode D4, and the positive terminal of diode D4 is connected to the source of MOSFET Q1. A resistor R23 is connected in parallel across diode D4; The source of MOSFET Q1 is connected to one end of capacitor C34, the other end of capacitor C34 is connected to one end of capacitor C33, and the other end of capacitor C33 is connected to the source of MOSFET Q6. The source of MOSFET Q1 is connected to PCB soldering terminal P4; Furthermore, the source of the MOS transistor Q1 is connected to the anode of the diode D1, and the cathode of the diode D1 is connected to the PCB soldering terminal P5; the PCB soldering terminal P5 is connected to the PCB soldering terminal P3; and capacitors C41 and C39 are connected in series between the PCB soldering terminals P5 and P4. Attached Figure Description
[0015] Figure 1 The circuit diagram of the programmable BMS charging and discharging circuit according to an embodiment of the present invention is shown below. Figure 2 This is a specific circuit diagram of the passive equalization circuit in an embodiment of the present invention; Figure 3 This is a peripheral circuit diagram of the Battery monitoring SOC chip in an embodiment of the present invention; Figure 4 This is a circuit diagram of the charge / discharge protection module in an embodiment of the present invention; Figure 5 This is a circuit diagram showing the connection of the flat-top cylindrical lithium battery in an embodiment of the present invention. Detailed Implementation
[0016] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings showing multiple embodiments according to this application. It should be understood that the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. All other embodiments obtained by those skilled in the art based on the embodiments described in this application without creative effort will fall within the scope of protection of this application.
[0017] Unless otherwise defined, all technical and scientific terms used in this application have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used in the specification of this application is for the purpose of describing specific embodiments only and is not intended to limit this application; the terms "comprising," "including," "having," "containing," etc., in the specification, claims, and accompanying drawings of this application are open-ended terms. Therefore, "comprising," "including," or "having" refers to, for example, a method or apparatus having one or more steps or elements, but is not limited to having only these one or more elements. The terms "first," "second," etc., in the specification, claims, or accompanying drawings of this application are used to distinguish different objects, not to describe a specific order or hierarchy. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined with "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, unless otherwise stated, "a plurality of" means two or more.
[0018] In the description of this invention, it should be understood that the terms "upper", "lower", "left", "right", "front", "rear", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.
[0019] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," and "attachment" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal communication between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.
[0020] It should be emphasized that when the term "comprising / including" is used in this specification, it is used to explicitly indicate the presence of the stated feature, integer, step, or component, but does not exclude the presence or addition of one or more other features, integers, steps, parts, or groups of features, integers, steps, or parts.
[0021] In this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, in this application, the character " / " generally indicates that the preceding and following related objects have an "or" relationship.
[0022] See Figures 1-5 An embodiment of the present invention provides a programmable BMS charging and discharging circuit, which includes a battery monitoring SOC chip, a passive balancing circuit, a charger, an electronic load, a flat-top cylindrical lithium battery, and a charging and discharging protection module. The positive terminal of the charger is connected to the main positive terminal of the battery compartment in sequence through PCB soldering terminal P5, diode D1, and pin 4 of PCB soldering terminal P1. The negative terminal of the charger is connected to the main negative terminal of the battery compartment in sequence through PCB soldering terminal P3 and the charge / discharge protection module; The positive terminal of the electronic load is connected to the main positive terminal of the battery compartment via PCB soldering terminal P4; The negative terminal of the electronic load is connected to the main negative terminal of the battery compartment via PCB soldering terminal P3 and the charge / discharge protection module. The positive terminal of the flat-top cylindrical lithium battery is connected to the PCB soldering terminal P4. The negative and positive terminals of the flat-top cylindrical lithium battery are connected to the input terminals of the charge / discharge protection module; Each tap of the flat-top cylindrical lithium battery is connected to one end of the passive equalization circuit, and the other end of the passive equalization circuit is connected to the Battery monitoring SOC chip.
[0023] The BQ76920 chip of this invention has internal hardware modules for voltage, current and temperature measurement. For example, it uses a 14-bit ADC to measure cell voltage and temperature, and a 16-bit integrating ADC (coulomb counter - CC) to sample current. With the threshold set by the monitoring software, it can detect whether there are overvoltage, undervoltage, overcurrent and overtemperature conditions. Passive balancing circuit: This hardware design, combining an NMOS transistor, balancing resistor, diode, and filter capacitor, along with voltage / temperature measurement using a BQ76920 and cell voltage / temperature calculation using accompanying monitoring software, enables the function of "discharging excess charge through a resistor when an overvoltage / overtemperature condition is detected in a battery cell." The core principle is to utilize the switching characteristics of the NMOS transistor to control the on / off state of the balancing circuit, use a resistor to dissipate excess energy, use a diode to ensure unidirectional current flow, and use a capacitor to enhance circuit stability. Charge and discharge control circuit: In the charge and discharge control circuit, the source and drain pins are placed in different directions because of the difference between charging and discharging, which in turn leads to the different directions of their parasitic diodes. This ensures that only one of them can conduct under the control of the gate of each of them through the programmable pin, forming a negative conduction circuit. This allows the charging and discharging operations to perform their respective functions. Otherwise, there would be a problem where neither charging nor discharging can be performed because no conduction path can be formed on the negative circuit during programmable control. The charger, lithium battery, and electronic load are all complete and usable individual products available on the market. This invention controls the BMS hardware to more accurately and quickly identify potential problems such as overvoltage, undervoltage, overcurrent, and overtemperature in the battery cells, and quickly switches the charge / discharge MOS switch to cut off potential thermal runaway issues. This programmable BMS charge / discharge hardware design is more intelligent, energy-efficient, and stable and reliable than traditional consumer electronics products, while being more economical and practical than common mid-to-high-end BMS charge / discharge control measures. It can provide a BMS control and protector with adjustable output power by changing the number of battery cells and the size of the current-limiting resistor.
[0024] Furthermore, the Battery monitoring SOC chip is chip U2; the passive equalization circuit includes MOSFETs Q11, Q2, Q7, Q8, and Q9, resistors R7, R10, R13, R44, and R51. Pin 12 of the chip U2 is connected to one end of resistor R54, and the other end of resistor R54 is connected to pin 6 of PCB soldering terminal P1. Pin 13 of chip U2 is connected to one end of resistor R53, and the other end of resistor R53 is connected to pin 5 of PCB soldering terminal P1. A capacitor C10 is connected in parallel between pin 12 and pin 13 of chip U2; One end of resistor R52 is connected to the connection point between pin 13 of chip U2 and capacitor C10, and the other end of resistor R52 is connected to the negative terminal of diode D16. The positive terminal of diode D16 is connected to pin 5 of PCB soldering terminal P1. The cathode of diode D16 is connected to the gate of MOSFET Q9. The drain of MOSFET Q9 is connected to pin 6 of PCB soldering terminal P1 through resistor R51. The source of MOSFET Q9 is connected to pin 5 of PCB soldering terminal P1. The source of MOSFET Q9 is connected to the anode of diode D11, and the cathode of diode D11 is connected to the gate of MOSFET Q9. Pin 14 of chip U2 is connected to one end of resistor R50, and the other end of resistor R50 is connected to pin 4 of PCB soldering terminal P1. A capacitor C9 is connected in parallel between pin 14 and pin 13 of chip U2; One end of resistor R45 is connected to the connection point between pin 14 of chip U2 and capacitor C9, and the other end of resistor R45 is connected to the negative terminal of diode D15. The positive terminal of diode D15 is connected to pin 4 of PCB soldering terminal P1. The cathode of diode D15 is connected to the gate of MOSFET Q8, the drain of MOSFET Q8 is connected to pin 5 of PCB soldering terminal P1 through resistor R44, and the source of MOSFET Q8 is connected to pin 4 of PCB soldering terminal P1. The source of MOSFET Q8 is connected to the anode of diode D10, and the cathode of diode D10 is connected to the gate of MOSFET Q8. Pin 15 of chip U2 is connected to one end of resistor R43, and the other end of resistor R43 is connected to pin 3 of PCB soldering terminal P1. A capacitor C8 is connected in parallel between pin 15 and pin 14 of chip U2; One end of resistor R14 is connected to the connection point between pin 15 of chip U2 and capacitor C8, and the other end of resistor R14 is connected to the negative terminal of diode D14. The positive terminal of diode D14 is connected to pin 3 of PCB soldering terminal P1. The cathode of diode D14 is connected to the gate of MOSFET Q7. The drain of MOSFET Q7 is connected to pin 4 of PCB soldering terminal P1 through resistor R13. The source of MOSFET Q7 is connected to pin 3 of PCB soldering terminal P1. The source of MOSFET Q7 is connected to the anode of diode D9, and the cathode of diode D9 is connected to the gate of MOSFET Q7. Pin 16 of chip U2 is connected to one end of resistor R12, and the other end of resistor R12 is connected to pin 2 of PCB soldering terminal P1. A capacitor C5 is connected in parallel between pin 15 and pin 16 of chip U2; One end of resistor R11 is connected to the connection point between pin 16 of chip U2 and capacitor C5, and the other end of resistor R11 is connected to the negative terminal of diode D13. The positive terminal of diode D13 is connected to pin 2 of PCB soldering terminal P1. The cathode of diode D13 is connected to the gate of MOSFET Q2, the drain of MOSFET Q2 is connected to pin 3 of PCB soldering terminal P1 through resistor R10, and the source of MOSFET Q2 is connected to pin 2 of PCB soldering terminal P1. The source of MOSFET Q2 is connected to the anode of diode D2, and the cathode of diode D2 is connected to the gate of MOSFET Q2. Pin 17 of chip U2 is connected to one end of resistor R15, and the other end of resistor R15 is connected to pin 1 of PCB soldering terminal P1. A capacitor C29 is connected in parallel between pin 17 and pin 16 of chip U2; One end of resistor R30 is connected to the connection point between pin 17 of chip U2 and capacitor C29, and the other end of resistor R30 is connected to the negative terminal of diode D7. The positive terminal of diode D7 is connected to pin 1 of PCB soldering terminal P1. The cathode of diode D7 is connected to the gate of MOSFET Q11, the drain of MOSFET Q11 is connected to pin 2 of PCB soldering terminal P1 through resistor R7, and the source of MOSFET Q11 is connected to pin 1 of PCB soldering terminal P1. The source of MOSFET Q11 is connected to the anode of diode D12, and the cathode of diode D12 is connected to the gate of MOSFET Q11.
[0025] When U2 detects that the voltage of a certain cell, such as the first cell, is too high, its pin 17 outputs a high level, which reaches the gate of Q11 through R30 and D7, turning on the negative terminal of the first cell of Q11, i.e., pin 1 of P1 → Q11 channel → equalization resistor R7 → pin 2 of P1, i.e., the positive terminal of the first cell → back to the negative terminal of the cell to form a circuit. The cell discharges through R7, the voltage drops, and equalization is achieved.
[0026] If an abnormally high voltage is detected in a cell during the equalization process, U2 can shut down the charge / discharge MOS via the DSG / CHG pin to achieve protection. Voltage sampling data is also the basic input for SOC estimation. The temperature sensing thermistor P6, together with the voltage sensing, constitutes a complete cell status monitoring system.
[0027] This invention implements a physical layer interface for voltage monitoring, implements a passive balancing actuator, provides fault isolation protection, supports software-configurable balancing strategies, and achieves a compact modular design.
[0028] Furthermore, pin 17 of the chip U2 is connected to one end of capacitor C13, and the other end of capacitor C13 is grounded; The source of MOSFET Q11 is connected to one end of OR resistor R29, and the other end of OR resistor R29 is grounded.
[0029] Capacitor C13 provides local energy storage for the chip, handles transient current demands, filters high-frequency noise on the power line, prevents interference introduced through the power line from affecting chip operation, stabilizes the chip's internal reference voltage, and ensures the accuracy of precision analog circuits such as the ADC. Resistor OR acts as a fuse to protect the secondary circuitry.
[0030] Furthermore, pin 4 of chip U2 is connected to a 3.3V power supply via resistor R32; pin 5 of chip U2 is connected to a 3.3V power supply via resistor R31. Pin 3 of chip U2 is grounded.
[0031] In this invention, pin 4 (SDA) of chip U2 is pulled up to 3.3V through resistor R32, pin 5 (SCL) is pulled up to 3.3V through resistor R31, and pin 3 (VSS) is directly grounded. These three parts constitute the basic power supply and communication interface for the normal operation of the BQ76920 chip.
[0032] Furthermore, pin 6 of the chip U2 is connected to one end of switch KEY1, and the other end of switch KEY1 is connected to signal CELL1 through resistor R24; Pin 6 of chip U2 is connected to the negative terminal of diode D5, and the positive terminal of diode D5 is connected to the signal WakeUp through resistor R24; Pin 6 of chip U2 is connected to one end of capacitor C35, and the other end of C35 is grounded; Pin 6 of chip U2 is connected to one end of the thermistor P6, and the other end of the thermistor P6 is grounded.
[0033] The P6 in this invention is a negative temperature coefficient NTC thermistor, whose resistance decreases as the temperature rises, thus serving as a temperature sensor. At the same time, the chip usually has a constant current source or pull-up resistor inside, which together with the P6 form a voltage divider, and the temperature is calculated by measuring the voltage at pin 6.
[0034] Furthermore, pin 7 of the chip U2 is connected to one end of capacitor C36, and the other end of C36 is grounded.
[0035] In this invention, capacitor C36 is a filter capacitor connected between the output of the internal voltage regulator and ground.
[0036] Furthermore, pin 8 of the chip U2 is connected to one end of capacitor C38, and the other end of C38 is grounded; Pin 8 of chip U2 is connected to the positive terminal of LED1 through resistor R25, and the negative terminal of LED1 is grounded.
[0037] In this invention, capacitor C38 is an output filter capacitor that filters out high-frequency noise, provides a clean power supply for the digital circuit, and provides transient current. When the LED is lit, C38 provides instantaneous energy.
[0038] Furthermore, pins 9 and 10 of the chip U2 are simultaneously connected to one end of resistor R28, the other end of resistor R28 is connected to the negative terminal of diode D17, and the positive terminal of diode D17 is connected to pin 6 of PCB soldering terminal P1.
[0039] Resistor R28 limits the current that may flow from pin 6 of P1 (the negative terminal of the battery, VC0) into pins 9 / 10 of U2. When D17 breaks down or an abnormally high voltage occurs at pin 6 of P1, R28 limits the current, protects the U2 chip, provides appropriate input impedance, and works in conjunction with the internal circuitry of the chip.
[0040] Diode D17 only allows current to flow from pin 6 of P1 to pin 9 / 10 of U2, preventing reverse current and preventing the voltage of pin 9 / 10 of U2 from flowing back to pin 6 of P1, interfering with battery voltage measurement; when the voltage of pin 6 of P1 is higher than the voltage of pin 9 / 10 of U2, D17 conducts and transmits the signal; otherwise, it is cut off and isolates.
[0041] Furthermore, the charge / discharge protection module includes a high-speed switching diode D18, a MOSFET Q1, a MOSFET Q6, a MOSFET Q3, and a MOSFET Q9; Pin 18 of the chip U2 is connected to the common terminal of the high-speed switching diode D18, and pin 19 of the chip U2 is connected to the cathode and anode of the high-speed switching diode D18. The common terminal of the high-speed switching diode D18 is connected to one end of the capacitor C30, and the other end of the capacitor C30 is grounded. The cathode of the high-speed switching diode D18 is connected to one end of the capacitor C32, and the other end of the capacitor C32 is grounded. A capacitor C31 is connected in parallel between the common terminal and the cathode of the high-speed switching diode D18. One end of resistor R16 is connected to the connection point between capacitors C30 and C31, and the other end of resistor R16 is connected to PCB soldering terminal P2. PCB soldering terminal P2 is connected to the positive terminal of diode D6, and the negative terminal of diode D6 is connected to PCB soldering terminal P3. One end of resistor R17 is connected to the connection point between capacitors C32 and C31, and the other end of resistor R17 is connected to one end of resistor R18. The other end of resistor R18 is connected to PCB soldering terminal P2. Pin 1 of chip U2 is connected to the gate of MOSFET Q6, and the source of MOSFET Q6 is connected to PCB soldering terminal P2. A resistor R20 is provided between the gate and source of MOSFET Q6; The drain of MOSFET Q6 is connected to the drain of MOSFET Q1; Pin 2 of chip U2 is connected to the source of MOSFET Q3. The gate of MOSFET Q3 is grounded. The drain of MOSFET Q3 is connected to the anode of diode D3 through resistor R21. The cathode of diode D3 is connected to the gate of MOSFET Q1. A resistor R22 is connected in parallel across the two ends of diode D3; The gate of MOSFET Q1 is connected to the negative terminal of diode D4, and the positive terminal of diode D4 is connected to the source of MOSFET Q1. A resistor R23 is connected in parallel across diode D4; The source of MOSFET Q1 is connected to one end of capacitor C34, the other end of capacitor C34 is connected to one end of capacitor C33, and the other end of capacitor C33 is connected to the source of MOSFET Q6. The source of MOSFET Q1 is connected to PCB soldering terminal P4.
[0042] This invention includes current detection and signal conditioning, namely high-speed switching diode D18 + capacitors C30 / C31 / C32 + resistors R16 / R17 / R18; a charge / discharge MOSFET pair, namely Q1 / Q6 + auxiliary transistors Q3 / Q9; and charge / discharge control and protection logic, which is driven through pins 1 / 2 of U2. This invention translates the intelligent decision-making of U2—namely, the voltage / current / temperature monitoring results—into actual physical actions—opening and closing the charging and discharging circuit to protect the battery from damage caused by abnormal operating conditions. Through the back-to-back series design of Q1 / Q6, independent charging and discharging control and bidirectional blocking are achieved, ensuring reliable circuit disconnection under any fault condition.
[0043] Furthermore, the source of the MOS transistor Q1 is connected to the anode of the diode D1, and the cathode of the diode D1 is connected to the PCB soldering terminal P5; the PCB soldering terminal P5 is connected to the PCB soldering terminal P3; and capacitors C41 and C39 are connected in series between the PCB soldering terminals P5 and P4.
[0044] During normal charging, the charger's positive terminal is connected to P5, and the current direction is P5 → D1 positive terminal → D1 negative terminal → P4 → battery pack positive terminal. D1 conducts in the forward direction, with a voltage drop of approximately 0.5~1.0V. In reverse connection, the charger's positive terminal is connected to P3, and the negative terminal is connected to P5. P5 is at a low potential, and P4 is at a high potential. D1 withstands the reverse voltage and is cut off, preventing current flow and protecting the circuit. This is the most basic hardware-level protection for the BMS, forming redundancy with the software protection, i.e., the MOS shutdown controlled by U2. Even if the MCU or U2 fails, D1 can still provide reverse connection protection.
[0045] The charging phase of this invention involves the following steps: The charger is connected to charging ports P5 and P4. First, the input power is filtered by C41 / C39, then connected to the positive terminal of the battery compartment. The negative terminal of the battery compartment is formed by the parasitic diode of Q6 (NMOS) and the Q3 (NMOS) connected to Q9 (PMOS) via a program-controlled circuit. The charging management module detects the charging current around pins such as SRP / SRN, and monitors the current magnitude in real time through the current sensing resistor R18. Combined with the BMS monitoring software, this ensures that overcurrent does not occur during charging. Switching devices such as NMOS transistors in the charging circuit are controlled to turn on / off, completing constant current and constant voltage charging phases.
[0046] Discharge phase: When external power is required, the discharge control circuit detects the system status, such as whether the battery voltage is sufficient and whether there is an overcurrent risk. If the discharge conditions are met, the matching BMS monitoring software will control the Q6 transistor to conduct. The battery power forms a negative path with the external electronic load through the forward parasitic diodes of Q6 and Q3, allowing the electronic load to draw power from the battery compartment at a specific power. Similarly, the current sensing resistor R18 continuously monitors the discharge current. Once an overcurrent occurs (exceeding the rated value of about 20A), the protection mechanism will be triggered, turning off the MOSFET and stopping the discharge to protect the battery and the circuit.
[0047] Protection mechanisms are implemented throughout the entire process: from surge protection, reverse voltage protection, and overcurrent protection to electrostatic discharge protection, multiple levels of protection ensure the safety of the battery and circuit during charging and discharging.
[0048] While the present invention has been disclosed above, its scope of protection is not limited thereto. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, and all such changes and modifications will fall within the scope of protection of the present invention.
Claims
1. A programmable BMS charging and discharging circuit, characterized in that, Includes battery monitoring SOC chip, passive balancing circuit, charger, electronic load, flat-top cylindrical lithium battery, and charge / discharge protection module; The positive terminal of the charger is connected to the main positive terminal of the battery compartment in sequence through PCB soldering terminal P5, diode D1, and pin 4 of PCB soldering terminal P1. The negative terminal of the charger is connected to the main negative terminal of the battery compartment in sequence through PCB soldering terminal P3 and the charge / discharge protection module; The positive terminal of the electronic load is connected to the main positive terminal of the battery compartment via PCB soldering terminal P4; the negative terminal of the electronic load is connected to the main negative terminal of the battery compartment via PCB soldering terminal P3 and the charge / discharge protection module. The positive terminal of the flat-top cylindrical lithium battery is connected to the PCB soldering terminal P4; the negative and positive terminals of the flat-top cylindrical lithium battery are connected to the input terminals of the charge and discharge protection module; each tap of the flat-top cylindrical lithium battery is connected to one end of the passive equalization circuit, and the other end of the passive equalization circuit is connected to the Battery monitoring SOC chip.
2. The programmable BMS charging and discharging circuit according to claim 1, characterized in that, The Battery monitoring SOC chip is chip U2; the passive equalization circuit includes MOSFETs Q11, Q2, Q7, Q8, and Q9, resistors R7, R10, R13, R44, and R51. Pin 12 of the chip U2 is connected to one end of resistor R54, and the other end of resistor R54 is connected to pin 6 of PCB soldering terminal P1. Pin 13 of chip U2 is connected to one end of resistor R53, and the other end of resistor R53 is connected to pin 5 of PCB soldering terminal P1. A capacitor C10 is connected in parallel between pin 12 and pin 13 of chip U2; One end of resistor R52 is connected to the connection point between pin 13 of chip U2 and capacitor C10, and the other end of resistor R52 is connected to the negative terminal of diode D16. The positive terminal of diode D16 is connected to pin 5 of PCB soldering terminal P1. The cathode of diode D16 is connected to the gate of MOSFET Q9. The drain of MOSFET Q9 is connected to pin 6 of PCB soldering terminal P1 through resistor R51. The source of MOSFET Q9 is connected to pin 5 of PCB soldering terminal P1. The source of MOSFET Q9 is connected to the anode of diode D11, and the cathode of diode D11 is connected to the gate of MOSFET Q9. Pin 14 of chip U2 is connected to one end of resistor R50, and the other end of resistor R50 is connected to pin 4 of PCB soldering terminal P1. A capacitor C9 is connected in parallel between pin 14 and pin 13 of chip U2; One end of resistor R45 is connected to the connection point between pin 14 of chip U2 and capacitor C9, and the other end of resistor R45 is connected to the negative terminal of diode D15. The positive terminal of diode D15 is connected to pin 4 of PCB soldering terminal P1. The cathode of diode D15 is connected to the gate of MOSFET Q8, the drain of MOSFET Q8 is connected to pin 5 of PCB soldering terminal P1 through resistor R44, and the source of MOSFET Q8 is connected to pin 4 of PCB soldering terminal P1. The source of MOSFET Q8 is connected to the anode of diode D10, and the cathode of diode D10 is connected to the gate of MOSFET Q8. Pin 15 of chip U2 is connected to one end of resistor R43, and the other end of resistor R43 is connected to pin 3 of PCB soldering terminal P1. A capacitor C8 is connected in parallel between pin 15 and pin 14 of chip U2; One end of resistor R14 is connected to the connection point between pin 15 of chip U2 and capacitor C8, and the other end of resistor R14 is connected to the negative terminal of diode D14. The positive terminal of diode D14 is connected to pin 3 of PCB soldering terminal P1. The cathode of diode D14 is connected to the gate of MOSFET Q7. The drain of MOSFET Q7 is connected to pin 4 of PCB soldering terminal P1 through resistor R13. The source of MOSFET Q7 is connected to pin 3 of PCB soldering terminal P1. The source of MOSFET Q7 is connected to the anode of diode D9, and the cathode of diode D9 is connected to the gate of MOSFET Q7. Pin 16 of chip U2 is connected to one end of resistor R12, and the other end of resistor R12 is connected to pin 2 of PCB soldering terminal P1. A capacitor C5 is connected in parallel between pin 15 and pin 16 of chip U2; One end of resistor R11 is connected to the connection point between pin 16 of chip U2 and capacitor C5, and the other end of resistor R11 is connected to the negative terminal of diode D13. The positive terminal of diode D13 is connected to pin 2 of PCB soldering terminal P1. The cathode of diode D13 is connected to the gate of MOSFET Q2, the drain of MOSFET Q2 is connected to pin 3 of PCB soldering terminal P1 through resistor R10, and the source of MOSFET Q2 is connected to pin 2 of PCB soldering terminal P1. The source of MOSFET Q2 is connected to the anode of diode D2, and the cathode of diode D2 is connected to the gate of MOSFET Q2. Pin 17 of chip U2 is connected to one end of resistor R15, and the other end of resistor R15 is connected to pin 1 of PCB soldering terminal P1. A capacitor C29 is connected in parallel between pin 17 and pin 16 of chip U2; One end of resistor R30 is connected to the connection point between pin 17 of chip U2 and capacitor C29, and the other end of resistor R30 is connected to the negative terminal of diode D7. The positive terminal of diode D7 is connected to pin 1 of PCB soldering terminal P1. The cathode of diode D7 is connected to the gate of MOSFET Q11, the drain of MOSFET Q11 is connected to pin 2 of PCB soldering terminal P1 through resistor R7, and the source of MOSFET Q11 is connected to pin 1 of PCB soldering terminal P1. The source of MOSFET Q11 is connected to the anode of diode D12, and the cathode of diode D12 is connected to the gate of MOSFET Q11.
3. The programmable BMS charging and discharging circuit according to claim 2, characterized in that, Pin 17 of the chip U2 is connected to one end of capacitor C13, and the other end of capacitor C13 is grounded. The source of MOSFET Q11 is connected to one end of OR resistor R29, and the other end of OR resistor R29 is grounded.
4. The programmable BMS charging and discharging circuit according to claim 3, characterized in that, Pin 4 of chip U2 is connected to a 3.3V power supply via resistor R32; pin 5 of chip U2 is connected to a 3.3V power supply via resistor R31. Pin 3 of chip U2 is grounded.
5. The programmable BMS charging and discharging circuit according to claim 4, characterized in that, Pin 6 of the chip U2 is connected to one end of the switch KEY1, and the other end of the switch KEY1 is connected to the signal CELL1 through resistor R24; Pin 6 of chip U2 is connected to the cathode of diode D5, and the anode of diode D5 is connected to the WakeUp signal through resistor R24; Pin 6 of chip U2 is connected to one end of capacitor C35, and the other end of C35 is grounded; Pin 6 of chip U2 is connected to one end of the thermistor P6, and the other end of the thermistor P6 is grounded.
6. The programmable BMS charging and discharging circuit according to claim 5, characterized in that, Pin 7 of the chip U2 is connected to one end of capacitor C36, and the other end of C36 is grounded.
7. The programmable BMS charging and discharging circuit according to claim 6, characterized in that, Pin 8 of the chip U2 is connected to one end of capacitor C38, and the other end of C38 is grounded; Pin 8 of chip U2 is connected to the positive terminal of LED1 through resistor R25, and the negative terminal of LED1 is grounded.
8. The programmable BMS charging and discharging circuit according to claim 7, characterized in that, Pins 9 and 10 of the chip U2 are connected to one end of resistor R28, the other end of resistor R28 is connected to the negative terminal of diode D17, and the positive terminal of diode D17 is connected to pin 6 of PCB soldering terminal P1.
9. The programmable BMS charging and discharging circuit according to claim 1, characterized in that, The charge / discharge protection module includes a high-speed switching diode D18, a MOSFET Q1, a MOSFET Q6, a MOSFET Q3, and a MOSFET Q9; Pin 18 of the chip U2 is connected to the common terminal of the high-speed switching diode D18, and pin 19 of the chip U2 is connected to the cathode and anode of the high-speed switching diode D18. The common terminal of the high-speed switching diode D18 is connected to one end of the capacitor C30, and the other end of the capacitor C30 is grounded. The cathode of the high-speed switching diode D18 is connected to one end of the capacitor C32, and the other end of the capacitor C32 is grounded. A capacitor C31 is connected in parallel between the common terminal and the cathode of the high-speed switching diode D18. One end of resistor R16 is connected to the connection point between capacitors C30 and C31, and the other end of resistor R16 is connected to PCB soldering terminal P2. PCB soldering terminal P2 is connected to the positive terminal of diode D6, and the negative terminal of diode D6 is connected to PCB soldering terminal P3. One end of resistor R17 is connected to the connection point between capacitors C32 and C31, and the other end of resistor R17 is connected to one end of resistor R18. The other end of resistor R18 is connected to PCB soldering terminal P2. Pin 1 of chip U2 is connected to the gate of MOSFET Q6, and the source of MOSFET Q6 is connected to PCB soldering terminal P2. A resistor R20 is provided between the gate and source of MOSFET Q6; The drain of MOSFET Q6 is connected to the drain of MOSFET Q1; Pin 2 of chip U2 is connected to the source of MOSFET Q3. The gate of MOSFET Q3 is grounded. The drain of MOSFET Q3 is connected to the anode of diode D3 through resistor R21. The cathode of diode D3 is connected to the gate of MOSFET Q1. A resistor R22 is connected in parallel across the two ends of diode D3; The gate of MOSFET Q1 is connected to the negative terminal of diode D4, and the positive terminal of diode D4 is connected to the source of MOSFET Q1. A resistor R23 is connected in parallel across diode D4; The source of MOSFET Q1 is connected to one end of capacitor C34, the other end of capacitor C34 is connected to one end of capacitor C33, and the other end of capacitor C33 is connected to the source of MOSFET Q6. The source of MOSFET Q1 is connected to PCB soldering terminal P4.
10. The programmable BMS charging and discharging circuit according to claim 9, characterized in that, The source of the MOSFET Q1 is connected to the positive terminal of the diode D1, and the negative terminal of the diode D1 is connected to the PCB soldering terminal P5; the PCB soldering terminal P5 is connected to the PCB soldering terminal P3; and capacitors C41 and C39 are connected in series between the PCB soldering terminals P5 and P4.
