Display panel

Abstract

The application discloses a display panel, which improves the display effect of the display panel. The display panel comprises a substrate, a first metal layer, a second metal layer and a first light shielding structure. The first metal layer is located on the substrate and comprises a first common electrode. The first common electrode has a first orthographic projection on the substrate. The second metal layer is located on the substrate, located on a side of the first metal layer away from the substrate and / or between the first metal layer and the substrate, and comprises one or more drain electrodes. At least one drain electrode has a second orthographic projection on the substrate, and the second orthographic projection is arranged adjacent to and spaced from the first orthographic projection. The first light shielding structure is located on the substrate. The first light shielding structure has a third orthographic projection on the substrate, and at least part of the third orthographic projection is located between the first orthographic projection and the second orthographic projection.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to a display panel. Background Technology

[0002] Liquid crystal displays (LCDs) are widely used in devices such as television screens due to their low power consumption and long lifespan. However, deformation of an LCD under external force can cause moving murmurs during use, degrading its display performance. Summary of the Invention

[0003] This application provides a display panel to at least partially solve the above-mentioned technical problems.

[0004] To achieve the above objectives, according to a first aspect of this application, a display panel is provided, comprising a substrate, a first metal layer, and a second metal layer. The first metal layer is located on the substrate and includes a first common electrode. The first common electrode has a first orthographic projection on the substrate. The second metal layer is located on the substrate, on the side of the first metal layer opposite to the substrate and / or between the first metal layer and the substrate, and includes one or more drain electrodes; at least one of the drain electrodes has a second orthographic projection on the substrate, the second orthographic projection being adjacent to and spaced apart from the first orthographic projection. A first light-shielding structure is located on the substrate; wherein the first light-shielding structure has a third orthographic projection on the substrate, at least a portion of the third orthographic projection being located between the first orthographic projection and the second orthographic projection.

[0005] Optionally, the first light-shielding structure is located in at least one of the first metal layer and the second metal layer.

[0006] Optionally, at least a portion of the first light-shielding structure is conductive and is in a floating state.

[0007] Optionally, the first light-shielding structure includes a first light-shielding portion and a second light-shielding portion, wherein the first light-shielding portion is located in the first metal layer and is electrically insulated from the first common electrode, and the second light-shielding portion is located in the second metal layer and is electrically insulated from one or more of the drain electrodes.

[0008] Optionally, the third orthographic projection includes a first sub-projection of the first light-shielding portion on the substrate and a second sub-projection of the second light-shielding portion on the substrate; Wherein, at least a portion of the first sub-projection is located between the second sub-projection and the second orthographic projection, and / or, at least a portion of the second sub-projection is located between the first sub-projection and the first orthographic projection.

[0009] Optionally, the first sub-projection repeats at least a portion of the second sub-projection.

[0010] Optionally, the first sub-projection overlaps with at least a portion of the second orthographic projection, and / or the second sub-projection overlaps with at least a portion of the first orthographic projection.

[0011] Optionally, at least one of the first light-shielding portion and the second light-shielding portion includes a straight edge.

[0012] Optionally, the display panel further includes: Opposing substrate, disposed opposite to the substrate; A light-shielding layer, located on the opposing substrate, includes a second light-shielding structure and has a light-transmitting opening; the second light-shielding structure overlaps with one or more of the drain electrodes and the first light-shielding structure; and A pixel electrode layer, located on the substrate, includes a plurality of pixel electrodes; one of the pixel electrodes is connected to the corresponding drain electrode and overlaps with the light-transmitting opening.

[0013] Optionally, the first metal layer further includes a gate, the gate having a fourth orthographic projection on the substrate; the display panel further includes a third light-shielding structure, the third light-shielding structure being located on the substrate and having a fifth orthographic projection on the substrate, the fifth orthographic projection being located between the fourth orthographic projection and the second orthographic projection.

[0014] In the display panel of this application embodiment, the second orthographic projection of at least one drain electrode is adjacent to and spaced apart from the first orthographic projection of the first common electrode, thereby improving the problem of parasitic capacitance caused by the overlap between the drain electrode and the first common electrode, and thus improving the problem of display abnormalities caused by parasitic capacitance. Furthermore, at least a portion of the third orthographic projection of the first light-shielding structure is located between the first and second orthographic projections, so that the first light-shielding structure provides light shielding for the gap between adjacent drain electrodes and the first common electrode, improving the light leakage problem caused by the lack of shielding at the gap under process fluctuations and external forces, thereby improving the problem of moving murmur caused by light leakage during display and enhancing the display effect of the display panel. Attached Figure Description

[0015] Figure 1 This is a cross-sectional structural diagram of a display panel provided in an exemplary embodiment of this application; Figure 2 This is provided in an exemplary embodiment of the present application. Figure 1 A simplified diagram of a pixel driving circuit in a display panel is shown. Figure 3 This is provided in an exemplary embodiment of this application. Figure 2The diagram shows a planar layout between the pixel driving circuit and the pixel electrode. Figure 4 This is provided in an exemplary embodiment of the present application. Figure 1 Another simplified diagram of the pixel driving circuit in the display panel shown; Figure 5 This is provided in an exemplary embodiment of this application. Figure 4 The diagram shows a planar layout between the pixel driving circuit and the pixel electrode. Figure 6 The exemplary embodiments provided in this application employ Figure 4 The pixel driving circuit shown is a partial planar layout diagram of the first metal layer, the second metal layer, and the light-shielding layer. Figure 7 The exemplary embodiments provided in this application employ Figure 4 The pixel driving circuit shown is another partial planar layout diagram of the first metal layer, the second metal layer and the light-shielding layer; Figure 8 The exemplary embodiments provided in this application employ Figure 4 The pixel driving circuit shown is another partial planar layout diagram of the first metal layer, the second metal layer, and the light-shielding layer.

[0016] Explanation of reference numerals in the attached figures: 100. Display panel; 10. Array substrate; 11. Substrate; 12. Driving circuit layer; 121. Pixel driving circuit; T0. Transistor; T1. First transistor; T2. Second transistor; T3. Third transistor; Data. Data line; Scan. Scan line; 13. Semiconductor layer; 14. First metal layer; 141. First common electrode; 142. Gate electrode; 15. Second metal layer; 151. Drain; 152. Source; 16. Pixel electrode layer; 161. Pixel electrode; 162. Main pixel electrode; 163. Secondary pixel electrode; 17. Voltage divider conductive structure; 181. First insulating layer; 182. Second insulating layer; 20. Opposite substrate; 21. Light-shielding layer; 211. Second light-shielding structure; 212. Light-transmitting opening; 22. Second common electrode; 30. First light-shielding structure; 301. First light-shielding part; 302. Second light-shielding part; 31. Third light-shielding structure; 311. Third light-shielding part; 312. Fourth light-shielding part; S1, S2, gap; X, the first direction; Y, the second direction. Detailed Implementation

[0017] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the protection scope of this application.

[0018] Please see Figure 1 This application provides a display panel 100, which includes an array substrate 10, which includes a substrate 11, a driving circuit layer 12, and a pixel electrode layer 16.

[0019] The substrate 11 may include at least one of a glass substrate and a flexible substrate. In one example, the substrate 11 includes a glass substrate.

[0020] The driving circuit layer 12 is located on the substrate 11 and includes a plurality of pixel driving circuits 121. The pixel electrode layer 16 is located on the side of the driving circuit layer 12 away from the substrate 11 and includes a plurality of pixel electrodes 161, each pixel electrode 161 being connected to a corresponding pixel driving circuit 121.

[0021] In some embodiments, please refer to Figure 2 and Figure 3 The pixel driving circuit 121 may include a transistor T0, the source and drain of which are connected between the data line Data and the pixel electrode 161, and the gate of which is connected to the scan line Scan. The pixel electrode 161 may be located in the light-emitting area of ​​the display panel 100, and the orthographic projection of the transistor T0 on the substrate may be located on one side of the orthographic projection of the pixel electrode 161 on the substrate and in the light-shielding area of ​​the display panel 100.

[0022] It should be noted that, in this application, orthographic projection refers to projection from a plane perpendicular to the plane containing the substrate 11.

[0023] In other embodiments, please refer to Figure 4 and Figure 5The pixel driving circuit 121 may include a first transistor T1, a second transistor T2, a third transistor T3, a data line Data, and a scan line Scan. Each pixel electrode 161 includes a main pixel electrode 162 and a secondary pixel electrode 163. The orthographic projections of the first transistor T1, the second transistor T2, and the third transistor T3 of a pixel driving circuit 121 onto the substrate 11 are located between the orthographic projections of the main pixel electrode 162 and the secondary pixel electrode 163 onto the substrate 11, and are also located in the light-shielding area of ​​the display panel 100. The first source of the first transistor T1 and the second source of the second transistor T2 are both connected to the data line Data, and the first drain 151 of the first transistor T1 is connected to the main pixel electrode 162 (…). Figure 4 Cst_main is the main storage capacitor and includes the main pixel electrode 162. The second drain of the second transistor T2 is connected to the sub-pixel electrode 163. Figure 4 In the middle, Cst_sub is the secondary storage capacitor and includes the main pixel electrode 162. The third source and third drain of the third transistor T3 are connected between the second drain of the second transistor T2 and the voltage divider structure 17. By controlling the voltage of the voltage divider structure 17, the first data voltage output to the main pixel electrode 162 when the first transistor T1 is turned on is different from the second data voltage output to the secondary pixel electrode 163 when the second transistor T2 is turned on. The first data voltage and the common voltage generate a first voltage difference, and the second data voltage and the common voltage generate a second voltage difference. The electric field generated by the first voltage difference drives the liquid crystal to deflect at an angle different from the electric field generated by the second voltage difference, so as to compensate for brightness and color shift at different viewing angles.

[0024] Please refer to it again. Figure 1 From the perspective of film layers, the driving circuit layer 12 includes a semiconductor layer 13, a first metal layer 14, and a second metal layer 15, with at least a portion of the pixel driving circuit 121 located within the semiconductor layer 13, the first metal layer 14, and the second metal layer 15. The first metal layer 14 and the second metal layer 15 are located on the substrate 11. The second metal layer 15 is located on the side of the first metal layer 14 facing away from the substrate 11 and / or between the first metal layer 14 and the substrate 11. Both the first metal layer 14 and the second metal layer 15 may include at least one of molybdenum, aluminum, titanium, copper, and silver. The semiconductor layer 13 may include at least one of amorphous silicon, low-temperature polycrystalline silicon, and metal oxide.

[0025] In some embodiments, please refer to Figure 1 The semiconductor layer 13 may include the active layer of a transistor. The first metal layer 14 includes the gate 142 of one or more transistors. The second metal layer 15 may also include the source 152 of one or more transistors.

[0026] In some embodiments, the second metal layer 15 is located on the side of the first metal layer 14 away from the substrate 11 to simplify the process of connecting the source 152 and drain electrode of the transistor T0 to the active layer. When the second metal layer 15 is located on the side of the first metal layer 14 away from the substrate 11, the semiconductor layer 13 can be located on the substrate 11 and between the first metal layer 14 and the second metal layer 15, in which case the transistor is a bottom-gate transistor T0.

[0027] In some embodiments, the second metal layer 15 is located on the semiconductor layer 13 and is in contact with the surface of the semiconductor layer 13 facing away from the substrate 11. In this way, the second metal layer 15 and the semiconductor layer 13 can be patterned in the same exposure, development and etching process, reducing the total number of photomasks required to manufacture the array substrate 10 and reducing the manufacturing cost of the array substrate 10.

[0028] In some other embodiments, when the second metal layer 15 is located on the side of the first metal layer 14 away from the substrate 11, the first metal layer 14 may be located between the semiconductor layer 13 and the second metal layer 15, and the transistor is a top-gate transistor T0.

[0029] In some embodiments, please refer to Figure 1 The array substrate 10 further includes a first insulating layer 181 and a second insulating layer 182. The first insulating layer 181 is located between the first metal layer 14 and the semiconductor layer 13. The second insulating layer 182 may be located between the second metal layer 15 and the pixel electrode layer 16.

[0030] Please see Figure 1 and Figure 6 The first metal layer 14 further includes a first common electrode 141, meaning that the gate electrode 142 and the first common electrode 141 are located in the same metal layer. The first common electrode 141 is used to transmit a common voltage. The first common electrode 141 is located in the light-emitting region and overlaps vertically with the pixel electrode 161 to form a storage capacitor. The first common electrode 141 has a first orthographic projection on the substrate 11. The second metal layer 15 further includes one or more drain electrodes 151. At least one drain electrode 151 has a second orthographic projection on the substrate 11, and the second orthographic projection is adjacent to and spaced apart from the first orthographic projection. This improves the problem of parasitic capacitance caused by the overlap between the drain electrode 151 and the first common electrode 141, thereby improving the display abnormality problem caused by parasitic capacitance.

[0031] In some embodiments, please refer to Figure 1 and Figure 6The display panel 100 further includes a first light-shielding structure 30, which is located on the substrate 11, i.e., on the array substrate 10. The first light-shielding structure 30 has a third orthographic projection on the substrate 11, at least a portion of which lies between the first orthographic projection and the second orthographic projection. Thus, the first light-shielding structure 30 blocks light from the gap S1 between adjacent drain electrodes 151 and the first common electrode 141, mitigating light leakage caused by the lack of shielding at the gap due to process fluctuations and external forces. This improves the problem of moving murmur caused by light leakage during display of the display panel 100, enhancing its display performance.

[0032] In some embodiments, at least a portion of the first light-shielding structure 30 is conductive and is in a floating state. Thus, when at least a portion of the first light-shielding structure 30 is directional, the floating state avoids the formation of parasitic capacitances between the at least portion of the first light-shielding structure 30 and other structures in the first metal layer 14 and the second metal layer 15 when the first light-shielding structure 30 is connected to a potential, thereby improving the problem of flickering at variable refresh rates caused by fluctuations in the capacitance value of parasitic capacitance.

[0033] In some embodiments, the first light-shielding structure 30 is located in at least one of the first metal layer 14 and the second metal layer 15. Thus, by using at least one of the first metal layer 14 and the second metal layer 15 to form the first light-shielding structure 30, no additional film layer is required to form the first light-shielding structure 30, simplifying the manufacturing process of the display panel 100.

[0034] In other embodiments, along the direction from the substrate to the driving circuit layer 12, the first light-shielding structure 30 may be located on one side of each of the first metal layer 14 and the second metal layer 15, i.e., the first light-shielding structure 30 and each of the first metal layer 14 and the second metal layer 15 are located in different film layers. When the first light-shielding structure 30 and each of the first metal layer 14 and the second metal layer 15 are located in different film layers, the first light-shielding structure 30 may be located on the side of the first metal layer 14 and the second metal layer 15 facing away from the substrate 11; and / or, the first light-shielding structure 30 may be located between the first metal layer 14 and the second metal layer 15; and / or, the first light-shielding structure 30 may be located between the first metal layer 14 and the substrate 11. Furthermore, when the first light-shielding structure 30 and each of the first metal layer 14 and the second metal layer 15 are located in different film layers, the first light-shielding structure 30 may include at least one of a light-shielding metal, a light-shielding metal oxide, and a light-shielding organic material.

[0035] In some embodiments, please refer to Figure 1The first light-shielding structure 30 includes a first light-shielding portion 301 and a second light-shielding portion 302. The first light-shielding portion 301 is located in the first metal layer 14 and is electrically insulated from the first common electrode 141. The second light-shielding portion 302 is located in the second metal layer 15 and is electrically insulated from one or more drain electrodes 151. In this way, light is simultaneously shielded by the first light-shielding portion 301 in the first metal layer 14 and the second light-shielding portion 302 in the second metal layer 15. This allows for better and more flexible shielding of the gap between adjacent drain electrodes 151 and the first common electrode 141, even when the first light-shielding structure 30 is not connected to the first metal layer 14 and the second metal layer 15.

[0036] In some embodiments, the first light-shielding structure 30 may also be located in the first metal layer 14 or the second metal layer 15.

[0037] In some embodiments, the third orthographic projection includes a first sub-projection of the first light-shielding portion 301 on the substrate 11 and a second sub-projection of the second light-shielding portion 302 on the substrate 11. At least a portion of the first sub-projection is located between the second sub-projection and the second orthographic projection; and / or, at least a portion of the second sub-projection is located between the first sub-projection and the first orthographic projection.

[0038] When at least a portion of the first sub-projection is located between the second sub-projection and the second orthographic projection, the first light-shielding portion 301 in the first metal layer 14 is positioned closer to the drain electrode 151 in the second metal layer 15 than the second light-shielding portion 302 in the second metal layer 15. Since the first light-shielding portion 301 and the drain electrode 151 are located on different layers, the risk of connection between the first light-shielding portion 301 and the drain electrode 151 is reduced, allowing the first light-shielding portion 301 to be in a floating state. Furthermore, when at least a portion of the second sub-projection is located between the first sub-projection and the first orthographic projection, the second light-shielding portion 302 in the second metal layer 15 is positioned closer to the first common electrode 141 than the first light-shielding portion 301 in the first metal layer 14. Since the second light-shielding portion 302 and the first common electrode 141 are located on different layers, the risk of connection between the second light-shielding portion 302 and the first common electrode 141 is reduced, allowing the second light-shielding portion 302 to be in a floating state.

[0039] In some embodiments, please refer to Figure 1 The first sub-projection overlaps with at least part of the second sub-projection, reducing the risk of light leakage due to gaps between the first light-shielding part 301 and the second light-shielding part 302 under process fluctuations.

[0040] In some embodiments, please refer to Figure 1The first sub-projection overlaps with at least a portion of the second orthographic projection, and / or the second sub-projection overlaps with at least a portion of the first orthographic projection. When the first sub-projection overlaps with at least a portion of the second orthographic projection, the risk of light leakage due to a gap between the first light-shielding portion 301 and the drain electrode 151 under process fluctuations is reduced. Furthermore, when the second sub-projection overlaps with at least a portion of the first orthographic projection, the gap between the second light-shielding portion 302 and the first common electrode 141 under process fluctuations is reduced.

[0041] In some embodiments, please refer to Figure 6 At least one of the first light-shielding portion 301 and the second light-shielding portion 302 includes a straight edge to simplify the manufacturing process of the first light-shielding portion 301 and the second light-shielding portion 302.

[0042] In some embodiments, please refer to Figure 6 At least one of the first light-shielding portion 301 and the second light-shielding portion 302 is strip-shaped to simplify the forming process of the first light-shielding portion 301 and the second light-shielding portion 302.

[0043] In some embodiments, please refer to Figure 6 Along the first direction X, at least a portion of the third orthographic projection is located between the first orthographic projection and the second orthographic projection, such that the first light-shielding structure 30 provides light-shielding to the gap between the adjacent drain electrode 151 and the first common electrode 141 in the first direction X. At this time, both the first light-shielding portion 301 and the second light-shielding portion 302 can extend along the first direction X.

[0044] In some embodiments, please refer to Figure 7 Along the first direction X and the second direction Y intersecting the first direction X, at least a portion of the third orthographic projection is located between the first orthographic projection and the second orthographic projection, such that the first light-shielding structure 30 provides light-shielding for the gap S1 between adjacent drains 151 and the first common electrode 141 in both the first and second directions X and Y. At this time, the first light-shielding portion 301 of the first light-shielding structure 30 may include a first portion extending along the first direction X and a second portion extending along the second direction Y, with the first portion connected to the second portion; the second light-shielding portion 302 may include a third portion extending along the first direction X and a fourth portion extending along the second direction Y, with the third portion connected to the fourth portion.

[0045] In some embodiments, please refer to Figure 8The gate 142 has a fourth orthographic projection on the substrate 11. The display panel 100 also includes a third light-shielding structure 31, which is located on the substrate 11 and has a fifth orthographic projection on the substrate 11. The fifth orthographic projection is located between the fourth orthographic projection and the second orthographic projection. Thus, the third light-shielding structure 31 can block the gap S2 between adjacent gates 142 and drains 151, improving the light leakage problem caused by the lack of blocking at the gap due to process fluctuations and external forces. This improves the problem of moving murmur caused by light leakage when the display panel 100 is displayed, and enhances the display effect of the display panel 100.

[0046] In some embodiments, the third light-shielding structure 31 may include a third light-shielding portion 311 and a fourth light-shielding portion 312. The third light-shielding portion 311 may be located in the first metal layer 14, and the fourth light-shielding portion 312 may be located in the second metal layer 15. The fifth orthogonal projection may include a third sub-projection of the third light-shielding portion 311 on the substrate 11 and a fourth sub-projection of the fourth light-shielding portion 312 on the substrate 11. At least a portion of the third sub-projection is located between the fourth sub-projection and the second orthogonal projection, so that the third light-shielding portion 311 performs a light-shielding function, while reducing the risk of potential connection between the third light-shielding portion 311 and the gate 142. At least a portion of the fourth sub-projection is located between the third sub-projection and the fourth orthogonal projection, so that the fourth light-shielding portion 312 performs a light-shielding function, while reducing the risk of potential connection between the fourth light-shielding portion 312 and the drain 151.

[0047] In some embodiments, please refer to Figure 1 as well as Figures 6-8 The display panel 100 also includes an opposing substrate 20 and a light-shielding layer 21. The opposing substrate 20 is disposed opposite to the substrate 11. The light-shielding layer 21 is located on the opposing substrate 20, includes a second light-shielding structure 211 and is provided with a light-transmitting opening 212. The light-transmitting opening 212 overlaps with the pixel electrode 161 to ensure that the area corresponding to the pixel electrode 161 can emit light. The second light-shielding structure 211 overlaps with the source 152 and drain 151 of one or more transistors, the data line Data, and the scan line Scan, so as to block the one or more transistors, the data line Data, and the scan line Scan. The second light-shielding structure 211 can also overlap with the first light-shielding structure 30 and the third light-shielding structure 31. In this way, when the display panel 100 is subjected to external force and process fluctuations, causing the second light-shielding structure 211 to shift and fail to provide light protection for the transistor and the gap between the transistor and the first common electrode, the first light-shielding structure 30 can provide light protection for the gap between the adjacent drain 151 and the first common electrode 141, and the third light-shielding structure 31 can provide light protection for the gap between the adjacent drain 151 and the gate 142.

[0048] In some embodiments, please refer to Figure 1 The display panel 100 also includes a second common electrode 22, which may be located on the opposing substrate 20 and connected to the first common electrode 141 to transmit a common voltage.

[0049] In other embodiments, the second common electrode 22 may also be located on the substrate 11, for example, on the side of the pixel electrode layer 16 away from the substrate 11, or between the pixel electrode layer 16 and the driving circuit layer 12.

[0050] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0051] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0052] The embodiments, implementation methods, and related technical features of this application can be combined and substituted for each other without conflict.

[0053] The above are merely preferred embodiments of this application and are not intended to limit this application in any way. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of this application without departing from the scope of the technical solution of this application shall still fall within the scope of the technical solution of this application.

Claims

1. A display panel, characterized in that, include: substrate; A first metal layer, located on the substrate, includes a first common electrode; The first common electrode has a first orthographic projection on the substrate; A second metal layer is located on the substrate, on the side of the first metal layer away from the substrate and / or between the first metal layer and the substrate, and includes one or more drain electrodes; At least one of the drain electrodes has a second orthographic projection on the substrate, the second orthographic projection being adjacent to and spaced apart from the first orthographic projection; as well as A first light-shielding structure is located on the substrate; wherein the first light-shielding structure has a third orthographic projection on the substrate, and at least a portion of the third orthographic projection is located between the first orthographic projection and the second orthographic projection.

2. The display panel according to claim 1, characterized in that, The first light-shielding structure is located in at least one of the first metal layer and the second metal layer.

3. The display panel according to claim 1, characterized in that, At least a portion of the first light-shielding structure is conductive and is in a floating state.

4. The display panel according to claim 2, characterized in that, The first light-shielding structure includes a first light-shielding part and a second light-shielding part. The first light-shielding part is located in the first metal layer and is electrically insulated from the first common electrode. The second light-shielding part is located in the second metal layer and is electrically insulated from one or more of the drain electrodes.

5. The display panel according to claim 4, characterized in that, The third orthographic projection includes a first sub-projection of the first light-shielding part on the substrate and a second sub-projection of the second light-shielding part on the substrate; Wherein, at least a portion of the first sub-projection is located between the second sub-projection and the second orthographic projection, and / or, at least a portion of the second sub-projection is located between the first sub-projection and the first orthographic projection.

6. The display panel according to claim 5, characterized in that, The first sub-projection repeats at least part of the second sub-projection.

7. The display panel according to claim 5, characterized in that, The first sub-projection overlaps with at least a portion of the second orthographic projection, and / or the second sub-projection overlaps with at least a portion of the first orthographic projection.

8. The display panel according to claim 4, characterized in that, At least one of the first light-shielding portion and the second light-shielding portion includes a straight edge.

9. The display panel according to any one of claims 1 to 8, characterized in that, Also includes: Opposing substrate, disposed opposite to the substrate; A light-shielding layer, located on the opposing substrate, includes a second light-shielding structure and is provided with a light-transmitting opening; The second light-shielding structure overlaps with one or more of the drain electrodes and the first light-shielding structure; as well as A pixel electrode layer, located on the substrate, includes a plurality of pixel electrodes; one of the pixel electrodes is connected to the corresponding drain electrode and overlaps with the light-transmitting opening.

10. The display panel according to claims 1 to 8, characterized in that, The first metal layer further includes a gate, the gate having a fourth orthographic projection on the substrate; The display panel further includes a third light-shielding structure, which is located on the substrate and has a fifth orthographic projection on the substrate, the fifth orthographic projection being located between the fourth orthographic projection and the second orthographic projection.

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