Unsupervised visual inspection method for industrial structural assembly anomalies and related devices

Abstract

Embodiments of the present application provide an unsupervised visual detection method for assembly abnormalities of industrial structural parts and related equipment, relating to the technical field of industrial visual detection. The method comprises: extracting local patch features and constructing a memory bank through a normal sample training set, reconstructing features based on the memory bank, generating a memory index histogram descriptor for representing local statistical structures, simultaneously constructing a feature similarity graph and performing graph enhancement processing to obtain a graph-enhanced reconstructed feature representation, and then constructing an associated memory index histogram memory bank and a global feature memory bank; performing the same processing on the image to be detected, obtaining the candidate normal sample most similar to the structure of the image to be detected through two-stage candidate sample screening, performing similarity matching based on the global feature memory bank to obtain a logical abnormality score, and fusing it with the local abnormality score obtained based on the local patch memory bank to obtain the final abnormality detection result. The present application has the advantages of high detection accuracy, strong robustness, and no need for abnormal samples.

Description

Technical Field

[0001] This application relates to the field of industrial visual inspection technology, and in particular to an unsupervised visual inspection method and related equipment for assembly anomalies of industrial structural components. Background Technology

[0002] In modern industrial manufacturing, products are typically composed of various assembly components such as cables, connectors, and clips. Problems such as misconnections, misalignments, omissions, excess components, or foreign matter contamination during assembly can lead to decreased product performance and even safety hazards. Currently, these assembly defects are mainly identified manually, which is inefficient, susceptible to subjective factors, and makes it difficult to guarantee stability and reliability.

[0003] Unlike structural anomalies such as surface scratches and stains, assembly anomalies often lack significant local visual differences. They are primarily manifested in errors in the relationships between components, such as abnormal cable connection order, misaligned connector positions, missing critical components, or the presence of redundant components. These types of problems are essentially logical anomalies, relying on the spatial layout, connection topology, and quantity relationships between components, and are difficult to distinguish through local appearance or low-level textures.

[0004] Currently, anomaly detection methods for assembled structural components are mainly divided into two categories: supervised and unsupervised. Supervised methods (such as YOLO and Mask R-CNN) can detect significant anomalies of known categories, but they require fine annotation of components in the assembly scenario and rely on samples with anomaly categories for training. They are difficult to effectively identify logical anomalies that depend on spatial relationships, such as missing parts or misconnections, and have limited generalization ability.

[0005] Unsupervised anomaly detection methods do not rely on anomalous samples; instead, they locate deviations by learning the distribution of normal samples. Early feature embedding-based methods (such as SPADE and PatchCore) performed well on structural anomalies, but due to their limitation to local patch modeling and lack of global relationship representation across components, they were prone to missing topological anomalies such as misconnections and misalignments. While methods targeting logical anomalies (such as EfficientAD, PSAD, and CSAD) have been explored, EfficientAD's logical branches rely on low-resolution features and are not sensitive enough to fine-grained topological changes. Methods like PSAD and CSAD rely on component-level annotation or reliable unsupervised segmentation. However, in complex assembly scenarios with multiple cables and connectors, such as battery packs, the large number of components and significant scale differences make reliable segmentation difficult to obtain, resulting in a lack of scalability for these methods. Summary of the Invention

[0006] The main objective of this application is to propose an unsupervised visual inspection method, system, electronic device, storage medium, and program product for assembly anomalies of industrial structural components, aiming to solve the problems in the prior art such as the difficulty in modeling logical anomalies in industrial assembly scenarios and the inability of existing local embedding methods to express cross-component topological relationships.

[0007] To achieve the above objectives, one aspect of this application proposes an unsupervised visual inspection method for assembly anomalies in industrial structural components, the method comprising: Training phase: A training image set consisting of normal samples is obtained, the intermediate layer feature maps of each training image in the training image set are extracted, and the intermediate layer feature maps are patched to obtain a local patch feature embedding set. Based on the aforementioned local patch feature embedding set, a local patch feature memory is constructed. Based on the local patch feature memory, feature reconstruction is performed on the local patch feature embedding of the training image to obtain the reconstructed feature representation of the training image; Based on the reconstructed feature representation, a memory index histogram descriptor for characterizing the local statistical structure is generated; Based on the reconstructed feature representation, a feature similarity map is constructed, and graph augmentation processing is performed on the feature similarity map to obtain a graph-augmented reconstructed feature representation; Based on the memory index histogram descriptor and the graph-enhanced reconstructed feature representation, an associated memory index histogram memory and a global feature memory are constructed. Testing phase: The image to be detected is acquired, and the same feature extraction, feature reconstruction, memory index histogram generation, and graph augmentation processing as in the training phase are performed to obtain the local patch features to be tested, the memory index histogram to be tested, and the graph augmentation reconstruction feature representation to be tested. Based on the memory index histogram to be tested and the memory index histogram memory bank, candidate normal samples are selected; Based on the global feature memory corresponding to the candidate normal sample, the graph augmentation reconstruction feature representation to be tested is matched with the graph augmentation reconstruction feature representation of the candidate normal sample to obtain a logical anomaly score. The final anomaly detection result is obtained by fusing the logical anomaly score with the local anomaly score obtained based on the local patch feature memory and the local patch features to be tested.

[0008] In some embodiments, the step of reconstructing features from the local patch feature embeddings of the training image to obtain a reconstructed feature representation of the training image includes: For each local patch feature embedding in the local patch feature embedding set, multiple similar memory feature embeddings are retrieved from the local patch feature memory. The multiple similar memory feature embeddings are fused to obtain the reconstructed feature vector at that position; The reconstructed feature vectors of all locations are arranged according to their spatial positions to form the reconstructed feature representation.

[0009] In some embodiments, generating a memory index histogram descriptor for characterizing local statistical structures includes: A sliding window is defined on the reconstructed feature representation, with each window covering multiple spatial locations; Obtain the memory indexes corresponding to the multiple spatial locations during the feature reconstruction process; The memory index is statistically analyzed and normalized to generate a histogram corresponding to the window. Arrange the histograms of all windows according to their spatial positions to form the memory index histogram descriptor.

[0010] In some embodiments, constructing a feature similarity map based on the reconstructed feature representation includes: The feature at each spatial location in the reconstructed feature representation is embedded as a node in the graph; For each node, retrieve at least one nearest neighbor node from the remaining nodes based on feature similarity; Using the feature similarity between the node and its nearest neighbor as the edge weight, an edge is constructed between the node and its nearest neighbor to obtain the feature similarity graph.

[0011] In some embodiments, performing graph augmentation on the feature similarity map to obtain a graph-augmented reconstructed feature representation includes: For each node in the feature similarity graph, a graph attention mechanism is applied to aggregate the feature information of its neighboring nodes in order to update the feature embedding of that node. All updated node feature embeddings are arranged in their original spatial positions to form the graph-enhanced reconstructed feature representation.

[0012] In some embodiments, constructing an associated memory index histogram memory and a global feature memory based on the memory index histogram descriptor and the graph-enhanced reconstructed feature representation includes: A downsampling operation is performed on the memory index histogram descriptors of all training images in the training image set to construct the memory index histogram memory. The graph-enhanced reconstructed feature representations corresponding to each sample in the memory index histogram memory are associated and stored to construct the global feature memory.

[0013] In some embodiments, the step of filtering candidate normal samples based on the memory index histogram to be tested and the memory index histogram memory includes: Calculate the histogram distance between the histogram of the memory index to be tested and each sample in the memory index histogram memory bank, and select the first number of samples with the smallest distance as the initial candidate sample set; For each sample in the initial candidate sample set, obtain its corresponding graph augmentation reconstruction feature representation in the global feature memory, and calculate its overall similarity with the graph augmentation reconstruction feature representation to be tested; Based on the overall similarity, a second number of samples are selected from the initial candidate sample set as candidate normal samples, wherein the second number is less than the first number.

[0014] In some embodiments, obtaining the logical anomaly score includes: The distance between the graph augmentation and reconstruction feature representation of the image to be tested and the graph augmentation and reconstruction feature representation of each sample in the candidate normal samples is measured pixel by pixel to obtain the logical anomaly score map corresponding to each candidate sample. The logical anomaly score graphs corresponding to each candidate sample are aggregated to obtain the aggregated logical anomaly score graph. The similarity between the memory index histogram to be tested and the memory index histogram corresponding to the candidate normal sample is used as the global structural similarity score. The aggregated logical anomaly score graph is fused with the global structural similarity score to obtain the final logical anomaly score.

[0015] In some embodiments, fusing the logical anomaly score with the local anomaly score obtained based on the local patch feature memory and the local patch features to be tested to obtain the final anomaly detection result includes: Obtain a set of verification images composed of normal samples, statistically analyze the distribution of local anomaly scores and logical anomaly scores, and calculate the corresponding quantile thresholds based on the distributions. Based on the quantile threshold, the local anomaly score and logical anomaly score of the image to be detected are normalized, and the normalized scores are fused to obtain the final anomaly score map.

[0016] To achieve the above objectives, another aspect of this application proposes an unsupervised visual inspection system for assembly anomalies of industrial structural components, characterized by comprising: The feature extraction and reconstruction module is used to acquire a training image set composed of normal samples, extract intermediate layer feature maps and perform patching processing to construct a local patch feature memory; and reconstruct image features based on the local patch feature memory to obtain reconstructed feature representations. The statistical descriptor generation module is used to generate a memory index histogram descriptor for characterizing the local statistical structure based on the reconstructed feature representation. The graph enhancement module is used to construct a feature similarity graph based on the reconstructed feature representation, and to perform graph enhancement processing on the feature similarity graph to obtain a graph-enhanced reconstructed feature representation; The global memory construction module is used to construct an associated memory index histogram memory and a global feature memory based on the memory index histogram descriptor and the graph-enhanced reconstructed feature representation; The candidate sample screening module is used to screen out candidate normal samples during the detection stage based on the test memory index histogram of the image to be detected and the memory index histogram memory. The logical anomaly scoring module is used to perform similarity matching between the graph augmentation reconstruction feature representation of the image to be detected and the graph augmentation reconstruction feature representation of the candidate normal sample based on the global feature memory corresponding to the candidate normal sample, so as to obtain a logical anomaly score. An anomaly fusion module is used to fuse the logical anomaly score with the local anomaly score obtained based on the local patch feature memory to obtain the final anomaly detection result.

[0017] To achieve the above objectives, another aspect of this application provides an electronic device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the method described above.

[0018] To achieve the above objectives, another aspect of the embodiments of this application proposes a computer-readable storage medium storing a computer program that, when executed by a processor, implements the method described above.

[0019] To achieve the above objectives, another aspect of this application provides a computer program product, including a computer program that, when executed by a processor, implements the method described above.

[0020] Compared with the prior art, this application has the following beneficial effects: (1) By constructing a histogram descriptor based on memory index, the statistical structure of local regions can be effectively represented, thereby capturing the spatial layout and co-occurrence relationship between components, solving the problem that traditional local features cannot model logical relationships.

[0021] (2) By constructing a feature similarity graph and performing graph augmentation, feature representations within the same component or functional unit can be adaptively aggregated, weakening interfering features that are only similar in appearance but have inconsistent spatial relationships, and improving the semantic purity of feature representations.

[0022] (3) Through a two-stage candidate sample screening mechanism, the memory index histogram is used for coarse screening first, and then the graph augmentation reconstruction features are used for fine screening, which achieves efficient and accurate global feature comparison, reducing computational overhead while ensuring detection accuracy.

[0023] (4) By integrating logical anomaly scores and local anomaly scores, unified detection of logical anomalies (such as misconnection and missing parts) and structural anomalies (such as scratches and foreign objects) is achieved, which improves the integrity and applicability of the overall detection. Attached Figure Description

[0024] Figure 1 This is a schematic diagram of the anomaly detection method in the embodiments of this application; Figure 2 This is a schematic diagram of the anomaly detection model training process in an embodiment of this application; Figure 3 This is a schematic diagram of the anomaly detection model detection process in the embodiments of this application; Figure 4 This is a schematic diagram of the memory index histogram construction process in an embodiment of this application; Figure 5 This is a schematic diagram illustrating the principle of the memory index histogram in the embodiments of this application; Figure 6 This is a schematic diagram of the construction process in the embodiments of this application; Figure 7 This is a schematic diagram of some detection results in the embodiments of this application; Figure 8 This is a schematic diagram of the hardware structure of the electronic device in the embodiments of this application. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit it. In the following description, when referring to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with those of this application; they are merely examples of apparatuses and methods consistent with some aspects of the embodiments of this application as detailed in the appended claims.

[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0027] Assembly-related logic anomaly detection faces the following challenges. First, local appearances are highly similar; erroneous assemblies (such as incorrectly connected cables or misaligned connectors) are extremely close to normal states in appearance, making traditional methods based on appearance differences difficult to identify. Second, anomalies often depend on global structural relationships, requiring modeling cross-regional topology and positional consistency, rather than local patch features. Third, normal assemblies are diverse; for example, cable self-bending or slight screw rotation are normal deformations, making traditional reconstruction or template matching difficult to cover all reasonable patterns. Finally, anomaly types are hidden and diverse, such as foreign object intrusion, missing parts, misalignment, or incorrect connections, making it difficult to exhaustively enumerate all possible anomaly patterns using predefined rules.

[0028] Furthermore, industrial assembly scenarios typically involve multiple types of components, making them far more complex than single-object anomaly detection. Taking new energy vehicle battery packs as an example, the battery modules, flexible cables, and metal support structures commonly exhibit three-dimensional relationships such as gaps, obstructions, and intersecting arrangements, potentially rendering critical components invisible from certain viewpoints. Simultaneously, differences in reflection due to different materials, as well as the influence of components like cable bends and groove obstructions, introduce complex highlights, shadows, and reflections, causing significant texture differences in different areas of the same component. These factors collectively increase the difficulty for visual models to extract stable features, making logical anomalies more difficult to distinguish visually.

[0029] Currently, methods for detecting anomalies in assembled structural components are mainly divided into two categories: supervised and unsupervised.

[0030] Supervised methods (such as YOLO and Mask R-CNN) can detect significant anomalies of known categories, but they require detailed annotation of components in the assembly scenario and training on samples with anomaly categories. Supervised methods perform well in detecting foreign objects or significant appearance defects of known categories, but they still face two major limitations in industrial settings: First, it is difficult to exhaustively list the types of potential foreign objects, and relying solely on predefined categories is insufficient to cover real-world scenarios; second, the methods inherently depend on appearance differences, making it difficult to effectively identify logical anomalies that depend on spatial relationships, such as missing parts, incorrect connections, and component misalignment, thus limiting their generalization ability.

[0031] Unsupervised anomaly detection methods do not rely on anomalous samples but learn the distribution of normal samples to locate deviations, making them more applicable in industrial scenarios. Early image reconstruction-based methods, while capable of capturing appearance differences, are sensitive to geometric consistency and prone to misclassifying normal deformations as anomalies. Subsequent feature embedding methods (such as SPADE and PatchCore) perform well on structural anomalies, but due to their limitation to local patch modeling, they lack global relationship representation across components in logical anomaly tasks, easily missing topological anomalies such as misconnections and misalignments. To address the higher-level problem of logical anomalies, research has begun to expand from "appearance consistency" to "structural / logical consistency." EfficientAD introduces multi-scale feature reconstruction to enhance global structural awareness, but its logical branches rely on low-resolution features and are not sensitive enough to fine-grained topological changes. Methods such as PSAD and CSAD attempt to detect logical anomalies based on component-level segmentation and topological reasoning, but all rely on component-level annotation or reliable unsupervised segmentation. For complex assembly scenarios with multiple cables and connectors, such as battery packs, the large number of components and significant scale differences make reliable segmentation difficult to obtain, resulting in a lack of scalability for these methods.

[0032] In view of this, this application provides an unsupervised visual inspection method, system, electronic device, storage medium, and program product for assembly anomalies in industrial structural components. This solution captures local texture information by constructing a local patch feature memory library, and innovatively introduces a memory index histogram descriptor to represent the statistical structure of local regions. Furthermore, it utilizes graph augmentation technology to optimize the global feature representation, thereby achieving unified modeling and joint detection of structural and logical anomalies under unsupervised conditions. In addition, a two-stage candidate sample selection strategy effectively reduces computational overhead while ensuring detection accuracy, improving the method's engineering deployability.

[0033] The unsupervised visual inspection method provided in this application relates to the field of industrial structural component assembly anomaly detection technology. The unsupervised visual inspection method provided in this application can be applied to a terminal, a server, or software running on a terminal or server. In some embodiments, the terminal can be a smartphone, tablet, laptop, desktop computer, smart speaker, smartwatch, or vehicle terminal, but is not limited to these. The server can be configured as an independent physical server, a server cluster or distributed system composed of multiple physical servers, or a cloud server providing basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, CDN, and big data and artificial intelligence platforms. The server can also be a node server in a blockchain network. The software can be an application implementing the unsupervised visual inspection method, but is not limited to the above forms.

[0034] This application can be used in a wide variety of general-purpose or special-purpose computer system environments or configurations. Examples include: personal computers, server computers, handheld or portable devices, tablet devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputers, mainframe computers, and distributed computing environments including any of the above systems or devices. This application can be described in the general context of computer-executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform specific tasks or implement specific abstract data types. This application can also be practiced in distributed computing environments where tasks are performed by remote processing devices connected via a communication network. In distributed computing environments, program modules can reside in local and remote computer storage media, including storage devices.

[0035] This embodiment provides an unsupervised visual detection method for assembly anomalies in industrial structural components, including a training phase and a detection phase, as detailed below: Training phase: A training image set consisting of normal samples is obtained, the intermediate layer feature maps of each training image in the training image set are extracted, and the intermediate layer feature maps are patched to obtain a local patch feature embedding set. Based on the aforementioned local patch feature embedding set, a local patch feature memory is constructed. Based on the local patch feature memory, feature reconstruction is performed on the local patch feature embedding of the training image to obtain the reconstructed feature representation of the training image; Based on the reconstructed feature representation, a memory index histogram descriptor for characterizing the local statistical structure is generated; Based on the reconstructed feature representation, a feature similarity map is constructed, and graph augmentation processing is performed on the feature similarity map to obtain a graph-augmented reconstructed feature representation; Based on the memory index histogram descriptor and the graph-enhanced reconstructed feature representation, an associated memory index histogram memory and a global feature memory are constructed. Testing phase: The image to be detected is acquired, and the same feature extraction, feature reconstruction, memory index histogram generation, and graph augmentation processing as in the training phase are performed to obtain the local patch features to be tested, the memory index histogram to be tested, and the graph augmentation reconstruction feature representation to be tested. Based on the memory index histogram to be tested and the memory index histogram memory bank, candidate normal samples are selected; Based on the global feature memory corresponding to the candidate normal sample, the graph augmentation reconstruction feature representation to be tested is matched with the graph augmentation reconstruction feature representation of the candidate normal sample to obtain a logical anomaly score. The final anomaly detection result is obtained by fusing the logical anomaly score with the local anomaly score obtained based on the local patch feature memory and the local patch features to be tested.

[0036] The solutions of the embodiments of this application will be described in detail below with reference to the accompanying drawings and specific application examples.

[0037] like Figure 1 As shown in the figure, this embodiment provides an unsupervised visual inspection method for assembly anomalies of complex industrial structural components, which includes the following steps: Step S1: Obtain a training image set consisting of normal samples, input the training image set into a pre-trained feature extractor, and extract the intermediate layer feature maps of the training images.

[0038] More specifically, such as Figure 2 As shown, to extract more descriptive features, a backbone network pre-trained on representative natural image training sets such as ImageNet is selected as the feature extractor. To reduce computational complexity while preserving the descriptiveness of the features, the intermediate layer feature maps output by the backbone network are selected as the feature input for subsequent detection processes; for a single input image... The intermediate layer feature map is represented as follows:

[0039] in, This represents a pre-trained feature extractor. , These represent the spatial dimensions of the feature map, Indicates the feature embedding dimension.

[0040] In a preferred embodiment, the training image size is 256×256, and the pre-trained feature extractor uses the WideResNet-101 backbone network and loads ImageNet pre-trained weights.

[0041] Step S2: Patch the intermediate layer feature map to obtain a local patch feature embedding set, and perform a downsampling operation on the local patch feature embedding set to construct a local patch feature memory.

[0042] More specifically, such as Figure 2 As shown, in order to perform subsequent anomaly modeling using local regions as the basic unit, the intermediate layer feature map is... Perform patching to obtain a set of patch-level feature embeddings, which is represented as follows:

[0043] in, This indicates a patching operation. , This indicates the number of patches in the height and width directions of the patch-level feature map.

[0044] More specifically, to reduce storage and retrieval overhead, a local patch feature memory is constructed by performing a downsampling operation on the local patch feature embedding set of the training image set, and the expression is as follows:

[0045] in, This represents a local patch feature memory. This represents the set of local patch feature embeddings for the training image set. This indicates the downsampling rate.

[0046] In a preferred embodiment, the patching process uses a sliding window approach with a window size of 3×3 feature embeddings and a stride of 1.

[0047] In a preferred embodiment, the downsampling operation is core set subsampling, with a sampling rate of Take 0.01.

[0048] Step S3: Based on the local patch feature memory, perform similarity retrieval on the local patch feature embeddings of the training image to obtain multiple memory feature embeddings that are similar to each local patch feature embedding. Then, fuse the multiple memory feature embeddings to reconstruct the features of the training image and obtain the reconstructed feature representation of the training image.

[0049] More specifically, such as Figure 2 As shown, the local patch memory covers the overall feature distribution of normal samples in the training set. Therefore, this memory can be used to globally reconstruct image features to enhance the robustness of feature representation. Through feature reconstruction, local perturbations caused by illumination, shadows, and noise in the original feature map are effectively weakened, while avoiding the high computational cost of directly using the original features for full-image comparison.

[0050] More specifically, the patch-level feature embedding of the input image is represented as Patch feature set at each location For any position Patch features In the local patch memory Search its predecessor Embedded nearest neighbor features The nearest neighbor feature embeddings are then aggregated or concatenated to obtain the reconstructed feature vector. .

[0051] Rearrange the reconstructed feature vectors at all locations according to their original spatial positions to obtain the reconstructed feature representation of the input image:

[0052] In a preferred embodiment, the nearest neighbor feature number Take 7.

[0053] Step S4: Based on the reconstructed feature representation, perform local region statistical operations on the training image to generate a memory index histogram descriptor for characterizing the local statistical structure.

[0054] More specifically, such as Figure 2 , Figure 4 As shown, a memory index histogram descriptor is constructed to describe the global topology. In the reconstructed feature representation... A sliding window is defined above, with each window covering multiple patch positions. The memory indexes corresponding to the patches are statistically analyzed into a histogram and then normalized.

[0055] The histograms of all windows are arranged according to their spatial position, forming a memory index histogram descriptor for the training images. The histogram features at each location encode the distribution of local features in the local patch memory, thus effectively modeling the logical topology of the entire graph. For example... Figure 5 As shown, different components will generate a stable memory index distribution under normal conditions, while component errors or missing components will significantly change the pattern of the window histogram.

[0056] In a preferred embodiment, the sliding window used to construct the memory index histogram is 3×3 times the size of the patch feature embedding and has a stride of 1.

[0057] Step S5: Construct a feature similarity map based on the reconstructed feature representation, and perform graph augmentation processing on the feature similarity map to obtain a graph-augmented reconstructed feature representation.

[0058] More specifically, such as Figure 2 , Figure 6 As shown, in order to address the problem that the test objects may have insufficient inter-class classification or overly scattered intra-class distribution due to highly similar local textures, a graph attention mechanism is used to enhance feature aggregation within the same component, forming a strongly connected subgraph, and weakening cross-component features that are only similar in appearance but discontinuous in space. Thus, without setting the number of components, it can adaptively distinguish semantically different but similarly appearing regions, while effectively compressing intra-class differences caused by noise.

[0059] More specifically, such as Figure 6As shown, the reconstructed features of the training image are represented Feature embedding at each position As graph nodes, each node is retrieved based on feature similarity. The nearest neighbor nodes are used as edges to connect the nodes, and the feature similarity is used as the edge weight to construct a weighted graph structure:

[0060] in, Represents a set of nodes. This is a weighted set of edges. This graph can explicitly capture the latent correspondences within an image.

[0061] More specifically, a graph attention enhancement operation is performed on the weighted graph, and the nodes... The update format is as follows:

[0062] in, Represents a node The set of neighboring nodes, Represents a linear mapping. This represents the attention weights calculated based on node similarity. This represents a non-linear activation function.

[0063] All updated nodes constitute an enhanced reconstructed graph feature representation:

[0064] In a preferred embodiment, construct The weighted graph.

[0065] Step S6: For the same training image in the training image set, obtain its corresponding memory index histogram descriptor and graph augmentation reconstruction feature representation respectively, and select a portion of training image samples according to the downsampling operation to simultaneously construct the memory index histogram memory and the global feature memory.

[0066] More specifically, a downsampling operation is performed on the memory index histogram of the training image set to construct a memory index histogram memory. A global feature memory is constructed by using the graph enhancement feature representation corresponding to the memory index histogram to reconstruct the feature representation. Furthermore, the two correspond one-to-one at the sample level.

[0067] Step S7: Obtain the image to be detected, perform the same feature extraction, feature reconstruction, memory index histogram generation and graph enhancement processing as in the training phase on the image to be detected, and filter candidate normal samples based on the memory index histogram memory bank.

[0068] More specifically, in the actual process of detecting anomalies in industrial structural components, the components are typically transported to a pre-defined area for image acquisition using conveyor belts, UGV trolleys, or other transport devices. An image acquisition device can then be mounted on an industrial robotic arm or fixed bracket to photograph the component. In this industrial application scenario, the relative position between the image acquisition device and the pre-defined area is controlled. While the target's position in the image may slightly shift due to factors such as the accuracy of the conveyor and the repeatability of the actuator, the overall consistency remains high, resulting in images from different batches exhibiting a generally aligned spatial distribution. Furthermore, in assembly line mass production, the types of industrial structural components being inspected are usually predetermined, meaning the product category is known. Therefore, the acquired image data often exhibits relatively stable scenes and high consistency in target appearance. It should be noted that although the overall assembly structure and spatial distribution of industrial products in the image acquisition process are generally relatively stable in industrial assembly line scenarios, the product may still contain some local components with a certain degree of freedom. For example, in industrial products containing flexible components such as cables and wire harnesses, these flexible components may exhibit different bending shapes within preset constraints after assembly. Similarly, fasteners such as screws and nuts are allowed to have variations in local features such as groove orientation and minute postures, provided that the assembly conformity is not affected. The existence of these local degrees of freedom means that even under the same product category and assembly process conditions, images acquired from different batches may still exhibit local appearance differences, thus placing higher demands on the robustness and discriminative ability of anomaly detection methods.

[0069] More specifically, such as Figure 3 As shown, during the testing phase, the image to be tested... The intermediate layer feature map is obtained by using the same feature extraction process as in the training phase:

[0070] The intermediate layer feature map is then patched to obtain a patch-level feature embedding set for the image to be detected. The patch-level features are embedded into the local patch feature memory. Perform nearest neighbor matching for each patch location. Calculate the distance value. Since the local patch memory can well represent the feature distribution of normal samples, the distance value can be regarded as the similarity between the patch-level feature embedding and the normal sample patch-level feature embedding, which can also be directly regarded as the anomaly score:

[0071] in, Indicates the location of the image to be detected. Patch embedding, This indicates patch embedding in the local patch memory.

[0072] More specifically, based on the above steps, the image to be detected... The same feature reconstruction and memory index histogram generation processes as in the training phase are used to obtain the memory index histogram corresponding to the image under test. It serves as a coarse-grained description of the global structure and component relationships.

[0073] Step S8: Based on the global feature memory corresponding to the candidate normal samples, perform similarity matching on the graph enhancement reconstruction feature representation of the image to be detected to obtain the logical anomaly score.

[0074] Using histogram distance as a similarity measure, in the memory index histogram memory... The number of searches in the middle is Initial candidate sample set:

[0075] More specifically, since histograms do not contain topological details, samples with poor structural layout similarity need to be further screened from the candidates. Pairwise global similarity calculations are performed on the graph-enhanced reconstruction feature representations corresponding to the initial candidate samples, and the similarity is determined based on their relationship with the image to be detected. The overall similarity is used to select a number of samples from the initial candidate sample set. A carefully selected set of candidate samples:

[0076] in, , Larger ones are used for coarse screening. Smaller sizes are used for fine screening to ensure topological consistency of the comparison samples.

[0077] More specifically, the image to be detected The same graph augmentation process as in the training phase is used to obtain its graph augmented reconstructed feature map representation. .

[0078] The graph enhancement reconstruction feature representation With the refined candidate sample set Each sample in the global feature memory The corresponding graph augmentation reconstruction feature representation is used to perform a point-by-point distance metric for any candidate sample. In position The logical anomaly score is defined as follows:

[0079] in, Indicates the location of the image to be detected. Graph-enhanced feature embedding, Indicates candidate samples Graph enhancement feature embedding at the corresponding location.

[0080] More specifically, the memory index histogram detection branch provides an overall structural similarity score. .

[0081] The logical anomaly scores corresponding to each carefully selected candidate sample are aggregated and fused with the overall structural similarity score to obtain the global logical anomaly score of the image to be detected.

[0082] in, This represents the weighting coefficient used to balance different scoring scales.

[0083] In a preferred embodiment, the most similar one is selected. As the initial candidate sample set, adaptively selected As a carefully selected candidate sample set. Histogram anomaly score weights during the global anomaly score fusion process. .

[0084] Step S9: Combine the logical anomaly score with the local anomaly score obtained based on the local patch feature memory to obtain the final anomaly detection result of the image to be detected.

[0085] More specifically, in order to unify the scoring scale for the two types of anomalies, a verification image set constructed from normal samples was used to statistically analyze the distribution of local anomaly scores and global logical anomaly scores, and the corresponding quantile thresholds were calculated for each. and .

[0086] Based on the quantile threshold, local anomaly scores are determined using a linear mapping method. Global Logic Anomaly Score Normalization and fusion are performed to obtain the final anomaly score map of the image to be detected.

[0087] In a preferred embodiment and Take values ​​of 0.95 and 0.995 respectively.

[0088] The above process can be achieved through Figure 7 To provide a better description, in a preferred embodiment, five datasets representing assembly characteristics from actual industrial assembly production processes are selected for practical verification. The specific composition and anomaly types of each dataset are as follows: (1) Fuse-Cable Dataset: The dataset originates from the assembly scenario of new energy battery packs and consists of fuses and their corresponding connecting cables. It includes two types of fuses, 20A and 30A, which are distinguished by label color, and each fuse and its corresponding cable has a unique matching relationship. Among them, the 20A cable is marked with a yellow mark at a random location to avoid misconnection. In normal samples, the bolt installation status, cable spatial orientation, and fuse angle all have a certain degree of randomness, and the changes in highlights and shadows are considered normal working conditions. Abnormal samples mainly include assembly logic anomalies such as cable misconnection and missing labels.

[0089] (2) Battery Dataset: This dataset consists of battery modules, each containing two battery modules. Each battery module must have a valid label affixed to a random location. Changes in the orientation of cables and bolts, as well as slight variations in lighting and imaging conditions, are considered normal samples. Abnormal samples include missing labels, duplicate label affixing, and the inclusion of foreign objects of different scales.

[0090] (3) Board-Jumper Dataset: This dataset consists of a single microcontroller board containing two key jump caps. Jump cap 1 can move within a local area, and the installation state of jump cap 2 must be consistent with that of jump cap 1. Slight randomness in lighting and imaging is allowed in normal samples. Abnormal samples mainly include jump cap misalignment, missing jump caps, and abnormal number of jump caps.

[0091] (4) Mainboard-FOD dataset: This dataset comes from the motherboard assembly scene inside the computer case. Normal samples are all from the same model of standard motherboard; abnormal samples are foreign objects such as nuts, bolts, and butterfly clips that are randomly mixed in, which are typical foreign object intrusion anomalies.

[0092] (5) MVTec LOCO AD dataset: This dataset is a publicly available industrial logic anomaly detection dataset, containing five categories. In this embodiment, we selected two subclasses, Breakfast Box and SplicingConnectors, which are relatively similar to the characteristics of assembly structures, as the experimental objects.

[0093] Based on the above datasets, we can find that they generally have the following characteristics: (1) The assembly structure is complex and the parts have a certain degree of freedom, making it difficult to rely solely on standard templates for testing; (2) Complex structures are prone to introducing lighting changes such as highlights and shadows, which puts forward higher requirements for the robustness of anomaly detection algorithms; (3) Foreign object anomalies are characterized by strong randomness and difficulty in pre-defining; (4) Abnormalities often manifest as fine-grained, small-scale differences, making them difficult to detect.

[0094] The above experimental dataset is only a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention. Figure 7 As shown in the experimental results, the method proposed in this invention can accurately detect and segment various abnormal situations that may occur in actual industrial assembly processes.

[0095] In summary, the method of this embodiment has the following advantages over the prior art: (1) Compared with existing unsupervised logic anomaly detection methods that rely on component-level segmentation or component-level modeling, the method in this embodiment does not require anomaly samples and component-level annotations. It only uses normal samples to build a multi-level feature memory and statistical description model. It does not require pre-defining anomaly categories or performing component-level segmentation and annotation, which can effectively reduce the cost of data collection and manual annotation. It is suitable for industrial assembly scenarios with many component types, complex structures, and difficult-to-exhaust anomaly forms.

[0096] (2) Compared with most existing unsupervised anomaly detection methods that only model local appearance consistency, the method in this embodiment obtains local anomaly scores by constructing a local patch feature memory library. At the same time, it introduces a logical anomaly detection branch based on memory index histogram and graph-enhanced global features, so as to achieve unified modeling and detection of structural anomalies such as texture damage and foreign object incorporation, as well as logical anomalies such as missing parts, incorrect parts, misalignment, and quantity anomalies, thereby improving the integrity and applicability of the overall detection.

[0097] (3) Compared with existing unsupervised anomaly detection methods based on single nearest neighbor or single reconstructed features, the method in this embodiment retains multiple representative memory feature embeddings for each spatial location during the feature reconstruction stage, effectively reducing the impact of light intensity changes, shadows and local noise on feature expression, avoiding the instability caused by single nearest neighbor, thereby improving the robustness of subsequent statistical modeling and global comparison.

[0098] (4) Compared with existing unsupervised anomaly detection methods that rely solely on local patch similarity for anomaly discrimination, the method in this embodiment constructs a graph structure based on feature similarity and performs graph enhancement operations on the graph structure, introducing cross-regional spatial and semantic joint constraints. This enables adaptive aggregation of feature representations within the same component or functional unit, weakening interference features that are only similar in appearance but have inconsistent spatial relationships, thereby improving the ability to detect anomalies in cross-component logical relationships in the assembly structure.

[0099] (5) Compared with existing anomaly detection methods that require global feature matching of all normal samples during the testing phase, the method in this embodiment effectively reduces the number of samples for global feature comparison by combining candidate sample screening based on memory index histogram with secondary fine screening based on global features. This reduces computational overhead while ensuring detection accuracy and improves the engineering deployability of the method in actual industrial scenarios.

[0100] (6) Compared with traditional visual anomaly detection methods that are sensitive to assembly freedom and environmental changes, the method in this embodiment can tolerate appearance differences caused by deformation of flexible parts, slight changes in the pose of parts and light fluctuations during normal assembly by statistical modeling and graph-enhanced feature representation, thereby reducing the false detection rate and improving the detection stability and reliability in complex industrial environments.

[0101] This application also provides an unsupervised visual inspection system for assembly anomalies of complex industrial structural components, including: The feature extraction module is used to obtain a training dataset consisting of normal samples, input the training image set into a pre-trained feature extractor, and extract intermediate feature maps of the training images. The patch memory construction module performs patching processing on the intermediate layer feature map to obtain a local patch feature embedding set, and downsamples the local patch feature embedding set to construct a local patch feature memory. The feature reconstruction module is used to perform similarity retrieval on the local patch feature embeddings of the training image, obtain multiple memory feature embeddings similar to each local patch feature embedding, fuse the multiple memory feature embeddings, and perform feature reconstruction on the training image to obtain the reconstructed feature representation of the training image. The memory index histogram construction module is used to perform local region statistical operations on training images and generate memory index histogram descriptors to characterize local statistical structures. The graph enhancement module uses the reconstructed feature representation to construct a feature similarity graph, and performs graph enhancement processing on the feature similarity graph to obtain a graph-enhanced reconstructed feature representation; The global memory bank construction module, for the same training image in the training image set, obtains its corresponding memory index histogram descriptor and graph augmentation reconstruction feature representation, and selects a portion of training image samples according to the downsampling operation to simultaneously construct the memory index histogram memory bank and the global feature memory bank; The detection and matching module is used to acquire the image to be detected, perform the same feature extraction, feature reconstruction, memory index histogram generation and graph enhancement processing on the image to be detected as in the training phase, and filter candidate normal samples based on the memory index histogram memory. The anomaly detection module performs similarity matching on the graph augmentation reconstruction feature representation of the image to be detected based on the global feature memory corresponding to the candidate normal samples, and obtains a logical anomaly score. The anomaly score fusion module is used to fuse the logical anomaly score with the local anomaly score obtained based on the local patch feature memory to obtain the final anomaly detection result of the image to be detected.

[0102] It is understood that the content of the above method embodiments is applicable to this system embodiment. The specific functions implemented in this system embodiment are the same as those in the above method embodiments, and the beneficial effects achieved are also the same as those achieved in the above method embodiments.

[0103] This application also provides an electronic device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the above-described method. This electronic device can be any smart terminal, including tablet computers, in-vehicle computers, etc.

[0104] It is understood that the content of the above method embodiments is applicable to this device embodiment. The specific functions implemented by this device embodiment are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0105] Please see Figure 8 , Figure 8 The hardware structure of an electronic device according to another embodiment is illustrated. The electronic device includes: The processor 801 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this application. The memory 802 can be implemented as a read-only memory (ROM), a static storage device, a dynamic storage device, or a random access memory (RAM). The memory 802 can store the operating system and other application programs. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory 802 and is called and executed by the processor 801 using the methods described in the embodiments of this application. The 803 input / output interface is used to implement information input and output. The communication interface 804 is used to enable communication and interaction between this device and other devices. Communication can be achieved through wired means (such as USB, Ethernet cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.). Bus 805 transmits information between various components of the device (e.g., processor 801, memory 802, input / output interface 803, and communication interface 804); The processor 801, memory 802, input / output interface 803, and communication interface 804 are connected to each other within the device via bus 805.

[0106] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described method.

[0107] It is understood that the content of the above method embodiments is applicable to this storage medium embodiment. The specific functions implemented in this storage medium embodiment are the same as those in the above method embodiments, and the beneficial effects achieved are also the same as those achieved in the above method embodiments.

[0108] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory may optionally include memory remotely located relative to the processor, and these remote memories can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0109] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the above-described method.

[0110] It is understood that the content of the above method embodiments is applicable to the embodiments of this program product. The specific functions implemented in the embodiments of this program product are the same as those in the above method embodiments, and the beneficial effects achieved are also the same as those achieved in the above method embodiments. The executable computer program code or "code" used to perform the various embodiments can be written in high-level programming languages ​​such as C, C++, Python, Smalltalk, Java, JavaScript, Visual Basic, Structured Query Language (e.g., Transact-SQL), Perl, or in various other programming languages.

[0111] The embodiments described in this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided by the embodiments of this application. As those skilled in the art will know, with the evolution of technology and the emergence of new application scenarios, the technical solutions provided by the embodiments of this application are also applicable to similar technical problems.

[0112] Those skilled in the art will understand that the technical solutions shown in the figures do not constitute a limitation on the embodiments of this application, and may include more or fewer steps than shown, or combine certain steps, or different steps.

[0113] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0114] Those skilled in the art will understand that all or some of the steps in the methods disclosed above, as well as the functional modules / units in the systems and devices, can be implemented as software, firmware, hardware, or suitable combinations thereof.

[0115] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0116] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0117] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of the units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0118] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0119] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0120] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes multiple instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes various media capable of storing programs, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0121] The preferred embodiments of the present application have been described above with reference to the accompanying drawings, but this does not limit the scope of the claims of the present application. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and substance of the embodiments of the present application shall be within the scope of the claims of the present application.

Claims

1. An unsupervised visual inspection method for assembly anomalies in industrial structural components, characterized in that, The method includes the following steps: Training phase: A training image set consisting of normal samples is obtained, the intermediate layer feature maps of each training image in the training image set are extracted, and the intermediate layer feature maps are patched to obtain a local patch feature embedding set. Based on the aforementioned local patch feature embedding set, a local patch feature memory is constructed. Based on the local patch feature memory, feature reconstruction is performed on the local patch feature embedding of the training image to obtain the reconstructed feature representation of the training image; Based on the reconstructed feature representation, a memory index histogram descriptor for characterizing the local statistical structure is generated; Based on the reconstructed feature representation, a feature similarity map is constructed, and graph augmentation processing is performed on the feature similarity map to obtain a graph-augmented reconstructed feature representation; Based on the memory index histogram descriptor and the graph-enhanced reconstructed feature representation, an associated memory index histogram memory and a global feature memory are constructed. Testing phase: The image to be detected is acquired, and the same feature extraction, feature reconstruction, memory index histogram generation, and graph augmentation processing as in the training phase are performed to obtain the local patch features to be tested, the memory index histogram to be tested, and the graph augmentation reconstruction feature representation to be tested. Based on the memory index histogram to be tested and the memory index histogram memory bank, candidate normal samples are selected; Based on the global feature memory corresponding to the candidate normal sample, the graph augmentation reconstruction feature representation to be tested is matched with the graph augmentation reconstruction feature representation of the candidate normal sample to obtain a logical anomaly score. The final anomaly detection result is obtained by fusing the logical anomaly score with the local anomaly score obtained based on the local patch feature memory and the local patch features to be tested.

2. The method according to claim 1, characterized in that, The step of reconstructing features from the local patch feature embeddings of the training image to obtain the reconstructed feature representation of the training image includes: For each local patch feature embedding in the local patch feature embedding set, multiple similar memory feature embeddings are retrieved from the local patch feature memory. The multiple similar memory feature embeddings are fused to obtain the reconstructed feature vector at that position; The reconstructed feature vectors of all locations are arranged according to their spatial positions to form the reconstructed feature representation.

3. The method according to claim 1, characterized in that, The generation of the memory index histogram descriptor for characterizing local statistical structure includes: A sliding window is defined on the reconstructed feature representation, with each window covering multiple spatial locations; Obtain the memory indexes corresponding to the multiple spatial locations during the feature reconstruction process; The memory index is statistically analyzed and normalized to generate a histogram corresponding to the window. Arrange the histograms of all windows according to their spatial positions to form the memory index histogram descriptor.

4. The method according to claim 1, characterized in that, The construction of a feature similarity map based on the reconstructed feature representation includes: The feature at each spatial location in the reconstructed feature representation is embedded as a node in the graph; For each node, retrieve at least one nearest neighbor node from the remaining nodes based on feature similarity; Using the feature similarity between the node and its nearest neighbor as the edge weight, an edge is constructed between the node and its nearest neighbor to obtain the feature similarity graph.

5. The method according to claim 4, characterized in that, The step of performing graph augmentation processing on the feature similarity map to obtain a graph-augmented reconstructed feature representation includes: For each node in the feature similarity graph, a graph attention mechanism is applied to aggregate the feature information of its neighboring nodes in order to update the feature embedding of that node. All updated node feature embeddings are arranged in their original spatial positions to form the graph-enhanced reconstructed feature representation.

6. The method according to claim 1, characterized in that, The step of constructing an associated memory index histogram memory and a global feature memory based on the memory index histogram descriptor and the graph-enhanced reconstructed feature representation includes: A downsampling operation is performed on the memory index histogram descriptors of all training images in the training image set to construct the memory index histogram memory. The graph-enhanced reconstructed feature representations corresponding to each sample in the memory index histogram memory are associated and stored to construct the global feature memory.

7. The method according to claim 1, characterized in that, The process of selecting candidate normal samples based on the histogram of the memory index to be tested and the histogram memory includes: Calculate the histogram distance between the memory index histogram to be tested and each sample in the memory index histogram memory bank, and select the first number of samples with the smallest distance as the initial candidate sample set; For each sample in the initial candidate sample set, obtain its corresponding graph augmentation reconstruction feature representation in the global feature memory, and calculate its overall similarity with the graph augmentation reconstruction feature representation to be tested; Based on the overall similarity, a second number of samples are selected from the initial candidate sample set as candidate normal samples, wherein the second number is less than the first number.

8. The method according to claim 1, characterized in that, The process of obtaining the logical anomaly score includes: The distance between the graph augmentation and reconstruction feature representation of the image to be tested and the graph augmentation and reconstruction feature representation of each sample in the candidate normal samples is measured pixel by pixel to obtain the logical anomaly score map corresponding to each candidate sample. The logical anomaly score graphs corresponding to each candidate sample are aggregated to obtain the aggregated logical anomaly score graph. The similarity between the memory index histogram to be tested and the memory index histogram corresponding to the candidate normal sample is used as the global structural similarity score; The aggregated logical anomaly score graph is fused with the global structural similarity score to obtain the final logical anomaly score.

9. The method according to claim 1, characterized in that, The final anomaly detection result is obtained by fusing the logical anomaly score with the local anomaly score obtained based on the local patch feature memory and the local patch features to be tested, including: Obtain a set of verification images composed of normal samples, statistically analyze the distribution of local anomaly scores and logical anomaly scores, and calculate the corresponding quantile thresholds based on the distributions. Based on the quantile threshold, the local anomaly score and logical anomaly score of the image to be detected are normalized, and the normalized scores are fused to obtain the final anomaly score map.

10. An electronic device, characterized in that, The electronic device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the method according to any one of claims 1 to 9.

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