A method and apparatus for determining a synchronization signal block, a terminal and a network device

Abstract

The application provides a method, device, terminal and network equipment for determining a synchronization signal block, the method is applied to the network equipment, and comprises the following steps: determining a corresponding relationship between a relative phase difference between a primary synchronization signal (PSS) and a secondary synchronization signal (SSS) and a synchronization signal block (SSB) type; determining a first relative phase difference corresponding to the SSB type of the SSB according to the corresponding relationship; and transmitting the SSB according to the first relative phase difference. The scheme can transmit a smaller size of a cropped version of the SSB in the overlapping spectrum, thereby realizing the application of the terminal channel bandwidth technology of the network side overlap, and distinguishing the SSB type transmitted by the network equipment according to the relative phase difference between the PSS and the SSS, so as to avoid the SSB decoding error.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to a method, apparatus, terminal and network device for determining a synchronization signal block. Background Technology

[0002] In wireless cellular communication systems, channel bandwidth is one of the most important parameters. To accommodate the different spectrum availability of various operators, a series of finite channel bandwidth values ​​are introduced to facilitate the design and implementation of base stations (BS) and user equipment (UE). For example, in 5G NR wireless cellular systems, regular channel bandwidths are defined for the spectrum below 7.125 GHz, in multiples of 5 MHz, with a maximum of 100 MHz, namely {5 MHz, 10 MHz, 15 MHz, 20 MHz, 30 MHz, 35 MHz, 40 MHz, 45 MHz, 50 MHz, 60 MHz, 70 MHz, 80 MHz, 90 MHz, 100 MHz}. Furthermore, for the same cell, the uplink and downlink channel bandwidths supported by the terminal and base station can differ. Under the regular channel bandwidth, the Synchronization Signal / PBCH Block (SSB) occupies 20 Resource Blocks (RBs), occupying 3.6 MHz of spectrum. One SSB contains a Primary Synchronization Signal (PSS) and a Secondary Synchronization Signal (SSS), which carry specially defined sequence signals to assist the UE in synchronizing with the network and identifying the Physical Cell ID (PCI).

[0003] In addition, for some special application scenarios (such as railway communication), a 3MHz irregular channel bandwidth has been introduced. Moreover, some operators also have other irregular spectrums, such as 7MHz, 8MHz, 9MHz, etc.

[0004] To effectively utilize irregular spectrum, a network-side overlapping UE channel bandwidth technique can be introduced. This involves the BS (Base Station) supporting the entire irregular spectrum as a single carrier and transmitting only one SSB (Secure Channel Bus), while the UE (User Equipment) is allocated only one regular channel bandwidth. Furthermore, the channel bandwidths of different UEs can overlap, thus covering the entire irregular spectrum. However, in practical applications, since a normal-sized SSB is 3.6MHz, the overlapping bandwidth must be greater than 3.6MHz to accommodate the normal SSB. If the size of the overlapping spectrum block is insufficient to accommodate the SSB, the network-side overlapping UE channel bandwidth technique cannot be applied. Summary of the Invention

[0005] The purpose of this application is to provide a method, apparatus, terminal, and network device for determining synchronization signal blocks, so as to solve the problem that if the size of the overlapping spectrum block is insufficient to accommodate the SSB, the terminal channel bandwidth technology of network-side overlapping cannot be applied.

[0006] Firstly, in order to solve the above-mentioned technical problems, embodiments of this application provide a method for determining a synchronization signal block, applied to a network device, comprising:

[0007] Determine the correspondence between the relative phase difference between the primary synchronization signal (PSS) and the secondary synchronization signal (SSS) and the type of synchronization signal block (SSB);

[0008] Based on the correspondence, determine the first relative phase difference corresponding to the SSB type of the SSB;

[0009] The SSB is transmitted based on the first relative phase difference.

[0010] In some embodiments, determining the correspondence between the relative phase difference between the primary synchronization signal PSS and the secondary synchronization signal SSS and the SSB type includes:

[0011] The N relative phase differences are represented by angles on the unit circle, and each relative phase difference corresponds to an SSB type; wherein the N relative phase differences are evenly distributed on the unit circle, and N is a positive integer greater than or equal to 2.

[0012] In some embodiments, when N=2, the correspondence includes:

[0013] When the relative phase difference is 0 degrees, the SSB type is an SSB occupying 20 RBs;

[0014] When the relative phase difference is 180 degrees, the SSB type is an SSB occupying 12 RBs.

[0015] In some embodiments, when N=2, the PSS and the SSS are generated according to the first sequence generation formula and the second sequence generation formula, respectively;

[0016] The formula for generating the first sequence is:

[0017] Where, d PSS (n) is a PSS sequence. x(i+7)=(x(i+4)+x(i))mod2,0≤n<127; [x(6)x(5)x(4)x(3)x(2)x(1)x(0)]=[1 1 1 0 1 1 0];The formula for generating the second sequence is:

[0018] Where, d SSS (n) is an SSS sequence. 0 ≤ n < 127; x0(i+7)=(x0(i+4)+x0(i))mod2; x1(i+7)=(x1(i+1)+x1(i))mod2;

[0019] [x0(6)x0(5)x0(4)x0(3)x0(2)x0(1)x0(0)]=[0 0 0 0 0 0 1];

[0020] [x1(6)x1(5)x1(4)x1(3)x1(2)x1(1)x1(0)]=[0 0 0 0 0 0 1];

[0021] Specifically, when the SSB type is an SSB occupying 20 RBs, q = 0 in the first sequence generation formula and the second sequence generation formula; when the SSB type is an SSB occupying 12 RBs, q = 1 in the first sequence generation formula and the second sequence generation formula.

[0022] In some embodiments, transmitting the SSB based on the first relative phase difference includes:

[0023] A first terminal carrier is allocated to the first terminal; wherein the first terminal carrier overlaps with the second terminal carrier corresponding to the second terminal, and the first terminal carrier and the second terminal carrier cover an irregular bandwidth;

[0024] The SSB is transmitted in the overlapping bandwidth portion of the first terminal carrier and the second terminal carrier, based on the first relative phase difference.

[0025] Secondly, in order to solve the above-mentioned technical problems, embodiments of this application provide a method for determining a synchronization signal block, applied to a first terminal, including:

[0026] Receive an SSB sent by a network device; wherein, the PSS and SSS in the SSB have a first relative phase difference;

[0027] Based on the first relative phase difference and the correspondence between the relative phase difference and the SSB type, the SSB type corresponding to the SSB is determined.

[0028] In some embodiments, the correspondence between the relative phase difference and the SSB type includes:

[0029] The N relative phase differences are represented by angles on the unit circle, and each relative phase difference corresponds to an SSB type; wherein the N relative phase differences are evenly distributed on the unit circle, and N is a positive integer greater than or equal to 2.

[0030] In some embodiments, when N=2, the correspondence includes:

[0031] When the relative phase difference is 0 degrees, the SSB type is an SSB occupying 20 resource blocks (RBs).

[0032] When the relative phase difference is 180 degrees, the SSB type is an SSB occupying 12 RBs.

[0033] In some embodiments, when N=2, the PSS and the SSS are generated according to the first sequence generation formula and the second sequence generation formula, respectively;

[0034] The formula for generating the first sequence is:

[0035] Where, d PSS (n) is a PSS sequence. x(i+7)=(x(i+4)+x(i))mod2,0≤n<127, [x(6)x(5)x(4)x(3)x(2)x(1)x(0)]=[1 1 1 0 1 1 0];The formula for generating the second sequence is:

[0036] Where, d SSS (n) is an SSS sequence. 0 ≤ n < 127; x0(i+7)=(x0(i+4)+x0(i))mod2; x1(i+7)=(x1(i+1)+x1(i))mod2;

[0037] [x0(6)x0(5)x0(4)x0(3)x0(2)x0(1)x0(0)]=[0 0 0 0 0 0 1];

[0038] [x1(6)x1(5)x1(4)x1(3)x1(2)x1(1)x1(0)]=[0 0 0 0 0 0 1];

[0039] Specifically, when the SSB type is an SSB occupying 20 RBs, q = 0 in the first sequence generation formula and the second sequence generation formula; when the SSB type is an SSB occupying 12 RBs, q = 1 in the first sequence generation formula and the second sequence generation formula.

[0040] Thirdly, to address the aforementioned technical problems, embodiments of this application provide a network device, including: a transceiver, a memory, a processor, and a computer program stored in the memory and executable on the processor; the processor is configured to read the program from the memory and execute the following processes:

[0041] Determine the correspondence between the relative phase difference between PSS and SSS and the SSB type;

[0042] Based on the correspondence, determine the first relative phase difference corresponding to the SSB type of the SSB;

[0043] The SSB is transmitted based on the first relative phase difference.

[0044] In some embodiments, the processor is specifically configured to read a program from memory and execute the following processes:

[0045] The N relative phase differences are represented by angles on the unit circle, and each relative phase difference corresponds to an SSB type; wherein the N relative phase differences are evenly distributed on the unit circle, and N is a positive integer greater than or equal to 2.

[0046] In some embodiments, when N=2, the correspondence includes:

[0047] When the relative phase difference is 0 degrees, the SSB type is an SSB occupying 20 RBs;

[0048] When the relative phase difference is 180 degrees, the SSB type is an SSB occupying 12 RBs.

[0049] In some embodiments, when N=2, the PSS and the SSS are generated according to the first sequence generation formula and the second sequence generation formula, respectively;

[0050] The formula for generating the first sequence is:

[0051] Where, d PSS (n) is a PSS sequence. x(i+7)=(x(i+4)+x(i))mod2,0≤n<127; [x(6)x(5)x(4)x(3)x(2)x(1)x(0)]=[1 1 1 0 1 1 0];

[0052] The formula for generating the second sequence is:

[0053] Where, d SSS (n) is an SSS sequence. 0 ≤ n < 127; x0(i+7)=(x0(i+4)+x0(i))mod2; x1(i+7)=(x1(i+1)+x1(i))mod2;

[0054] [x0(6)x0(5)x0(4)x0(3)x0(2)x0(1)x0(0)]=[0 0 0 0 0 0 1];

[0055] [x1(6)x1(5)x1(4)x1(3)x1(2)x1(1)x1(0)]=[0 0 0 0 0 0 1];

[0056] Specifically, when the SSB type is an SSB occupying 20 RBs, q = 0 in the first sequence generation formula and the second sequence generation formula; when the SSB type is an SSB occupying 12 RBs, q = 1 in the first sequence generation formula and the second sequence generation formula.

[0057] In some embodiments, the processor is specifically configured to read a program from memory and execute the following processes:

[0058] A first terminal carrier is allocated to the first terminal; wherein the first terminal carrier overlaps with the second terminal carrier corresponding to the second terminal, and the first terminal carrier and the second terminal carrier cover an irregular bandwidth;

[0059] The SSB is transmitted in the overlapping bandwidth portion of the first terminal carrier and the second terminal carrier, based on the first relative phase difference.

[0060] Fourthly, to address the aforementioned technical problems, this application provides a terminal, which is a first terminal, comprising: a transceiver, a memory, a processor, and a computer program stored in the memory and executable on the processor; the processor is used to read the program from the memory and execute the following processes:

[0061] Receive an SSB sent by a network device; wherein, the PSS and SSS in the SSB have a first relative phase difference;

[0062] Based on the first relative phase difference and the correspondence between the relative phase difference and the SSB type, the SSB type corresponding to the SSB is determined.

[0063] In some embodiments, the correspondence between the relative phase difference and the SSB type includes:

[0064] The N relative phase differences are represented by angles on the unit circle, and each relative phase difference corresponds to an SSB type; wherein the N relative phase differences are evenly distributed on the unit circle, and N is a positive integer greater than or equal to 2.

[0065] In some embodiments, when N=2, the correspondence includes:

[0066] When the relative phase difference is 0 degrees, the SSB type is an SSB occupying 20 resource blocks (RBs).

[0067] When the relative phase difference is 180 degrees, the SSB type is an SSB occupying 12 RBs.

[0068] In some embodiments, when N=2, the PSS and the SSS are generated according to the first sequence generation formula and the second sequence generation formula, respectively;

[0069] The formula for generating the first sequence is:

[0070] Where, d PSS (n) is a PSS sequence. x(i+7)=(x(i+4)+x(i))mod2,0≤n<127, [x(6)x(5)x(4)x(3)x(2)x(1)x(0)]=[1 1 1 0 1 1 0];

[0071] The formula for generating the second sequence is:

[0072] Where, d SSS (n) is an SSS sequence. 0 ≤ n < 127; x0(i+7)=(x0(i+4)+x0(i))mod2; x1(i+7)=(x1(i+1)+x1(i))mod2;

[0073] [x0(6)x0(5)x0(4)x0(3)x0(2)x0(1)x0(0)]=[0 0 0 0 0 0 1];

[0074] [x1(6)x1(5)x1(4)x1(3)x1(2)x1(1)x1(0)]=[0 0 0 0 0 0 1];

[0075] Specifically, when the SSB type is an SSB occupying 20 RBs, q = 0 in the first sequence generation formula and the second sequence generation formula; when the SSB type is an SSB occupying 12 RBs, q = 1 in the first sequence generation formula and the second sequence generation formula.

[0076] Fifthly, in order to solve the above-mentioned technical problems, embodiments of this application provide a device for determining synchronization signal blocks, applied to network devices, including:

[0077] The first determining module is used to determine the correspondence between the relative phase difference between the main synchronization signal PSS and the auxiliary synchronization signal SSS and the type of the synchronization signal block SSB;

[0078] The second determining module is used to determine the first relative phase difference corresponding to the SSB type of the SSB based on the correspondence relationship;

[0079] The transmitting module is configured to transmit the SSB based on the first relative phase difference.

[0080] Sixthly, in order to solve the above-mentioned technical problems, embodiments of this application provide a device for determining a synchronization signal block, applied to a first terminal, comprising:

[0081] A receiving module is used to receive an SSB sent by a network device; wherein, the PSS and SSS in the SSB have a first relative phase difference;

[0082] The third determining module is used to determine the SSB type corresponding to the SSB based on the first relative phase difference and the correspondence between the relative phase difference and the SSB type.

[0083] In a seventh aspect, to solve the above-mentioned technical problems, embodiments of this application provide a processor-readable storage medium storing a computer program for causing the processor to execute the method for determining a synchronization signal block as described in the first aspect, or to execute the method for determining a synchronization signal block as described in the second aspect.

[0084] The beneficial effects of the above technical solution in this application are as follows:

[0085] In the above scheme, the network device can select an appropriate SSB size according to requirements and determine the first relative phase difference corresponding to the SSB based on the correspondence between the PSS and SSS. After the network device transmits the SSB according to the first relative phase difference, the terminal can identify the SSB type corresponding to the SSB transmitted by the network device based on the first relative phase difference between the PSS and SSS in the SSB. Thus, when the overlapping spectrum block size is insufficient to accommodate an SSB of 20 RBs, a smaller, cropped SSB can be transmitted in the overlapping spectrum, thereby realizing the application of network-side overlapping terminal channel bandwidth technology and improving flexibility. Moreover, this scheme, by identifying the SSB type through relative phase difference, can avoid the problem of decoding errors that may occur when the terminal decodes the SSB without knowing the SSB type. Attached Figure Description

[0086] Figure 1 A schematic diagram of the spectrum for overlapping carrier aggregation;

[0087] Figure 2 A schematic diagram of the spectrum of overlapping UE channel bandwidth on the network side;

[0088] Figure 3 This is a schematic diagram of the spectrum that most closely approximates the bandwidth of a larger regular channel.

[0089] Figure 4 This is one of the flowcharts for determining the synchronization signal block according to an embodiment of the present invention;

[0090] Figure 5 This is one of the schematic diagrams illustrating the relative phase difference between PSS and SSS in an embodiment of the present invention;

[0091] Figure 6 This is the second schematic diagram showing the relative phase difference between PSS and SSS in an embodiment of the present invention.

[0092] Figure 7 This is one of the schematic diagrams of irregular small bandwidth in an embodiment of the present invention;

[0093] Figure 8 This is a second schematic diagram of an irregular small bandwidth embodiment of the present invention;

[0094] Figure 9 This is the third schematic diagram of an irregular small bandwidth embodiment of the present invention;

[0095] Figure 10 This is a second flowchart of the method for determining the synchronization signal block according to an embodiment of the present invention;

[0096] Figure 11 This is one of the structural block diagrams of the synchronization signal block determination device according to an embodiment of the present invention;

[0097] Figure 12This is a second structural block diagram of the device for determining the synchronization signal block according to an embodiment of the present invention;

[0098] Figure 13 This is a schematic diagram of the hardware structure of a network device according to an embodiment of the present invention;

[0099] Figure 14 This is a schematic diagram of the hardware structure of the terminal according to an embodiment of the present invention. Detailed Implementation

[0100] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0101] In the embodiments of this application, the term "and / or" describes the relationship between associated objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A alone, A and B simultaneously, and B alone. The character " / " generally indicates that the preceding and following associated objects have an "or" relationship.

[0102] In the embodiments of this application, the term "multiple" refers to two or more, and other quantifiers are similar.

[0103] It should be noted that the technical solutions provided in this application are applicable to a variety of systems, especially 5th-Generation (5G) mobile communication systems. For example, applicable systems may include Global System for Mobile Communication (GSM), Code Division Multiple Access (CDMA), Wideband Code Division Multiple Access (WCDMA) General Packet Radio Service (GPRS), Long Term Evolution (LTE), LTE Frequency Division Duplex (FDD), LTE Time Division Duplex (TDD), Long Term Evolution Advanced (LTE-A), Universal Mobile Telecommunications System (UMTS), Worldwide Interoperability for Microwave Access (WiMAX), and 5G New Radio (NR), etc. All of these systems include terminal equipment and network equipment. The system may also include a core network component, such as an evolved packet system (EPS) or a 5G system (5GS).

[0104] The terminal devices involved in the embodiments of this application can be devices that provide voice and / or data connectivity to users, handheld devices with wireless connectivity, or other processing devices connected to a wireless modem. The names of the terminal devices may differ in different systems; for example, in a 5G system, a terminal device can be called User Equipment (UE). Wireless terminal devices can communicate with one or more core networks (CNs) via a Radio Access Network (RAN). Wireless terminal devices can be mobile terminal devices, such as mobile phones (or "cellular" phones) and computers with mobile terminal devices, for example, portable, pocket-sized, handheld, computer-embedded, or vehicle-mounted mobile devices that exchange voice and / or data with the RAN. Examples include Personal Communication Service (PCS) phones, cordless phones, Session Initiated Protocol (SIP) phones, Wireless Local Loop (WLL) stations, and Personal Digital Assistants (PDAs). Wireless terminal equipment can also be referred to as a system, subscriber unit, subscriber station, mobile station, mobile station, remote station, access point, remote terminal, access terminal, user terminal, user agent, or user device, but is not limited to these terms in the embodiments of this application.

[0105] The network device involved in this application embodiment can be a base station, which may include multiple cells providing services to terminals. Depending on the specific application, a base station may also be called an access point, or a device in the access network that communicates with wireless terminal devices through one or more sectors on the air interface, or other names. The network device can be used to exchange received air frames with Internet Protocol (IP) packets, acting as a router between the wireless terminal device and the rest of the access network, where the rest of the access network may include an Internet Protocol (IP) communication network. The network device can also coordinate the attribute management of the air interface. For example, the network equipment involved in the embodiments of this application can be a base transceiver station (BTS) in a Global System for Mobile communications (GSM) or Code Division Multiple Access (CDMA), a NodeB in a Wide-band Code Division Multiple Access (WCDMA) system, an evolved Node B (eNB or e-NodeB) in a long term evolution (LTE) system, a 5G base station (gNB) in a next generation system, a Home evolved Node B (HeNB), a relay node, a femto, a pico, etc., and is not limited in the embodiments of this application. In some network structures, the network equipment may include centralized unit (CU) nodes and distributed unit (DU) nodes, and the centralized unit and distributed unit may also be geographically separated.

[0106] Network devices and terminal devices can each use one or more antennas for Multiple-Input Multiple-Output (MIMO) transmission. MIMO transmission can be Single-User MIMO (SU-MIMO) or Multiple-User MIMO (MU-MIMO). Depending on the configuration and number of antenna combinations, MIMO transmission can be 2D-MIMO, 3D-MIMO, Full-Dimension MIMO (FD-MIMO), or Massive-MIMO. It can also be diversity transmission, pre-coded transmission, or beamforming transmission, etc.

[0107] The following section will first introduce the content related to the solutions provided in the embodiments of this application.

[0108] To effectively utilize irregular spectrum, the relevant technologies mainly adopted the following solutions:

[0109] Option 1: Carrier Aggregation (CA) technology.

[0110] In this scheme, two carriers are allocated to the UE side for aggregation, and these two carriers cover the entire irregular frequency range in a partially overlapping manner. For example... Figure 1 As shown, this scheme requires each of the two carriers to transmit SSB, which has a relatively large overhead compared to the small bandwidth spectrum, resulting in a small overall improvement in spectrum utilization efficiency.

[0111] Option 2: Network-side overlapping UE channel bandwidth technology, where the BS side supports the entire irregular spectrum as a single carrier and transmits only one SSB. For example... Figure 2 In this scheme, only one regular channel bandwidth is allocated on the UE side, and the channel bandwidths of different UEs can overlap to cover the entire irregular spectrum. This scheme requires that the SSB must be located in an overlapping spectrum block. If the size of the overlapping spectrum block is insufficient to accommodate the SSB, the network-side overlapping terminal channel bandwidth technology cannot be applied.

[0112] Option 3: The closest large regular channel bandwidth technique, which means that for the irregular spectrum bandwidth of the target, the closest large regular channel bandwidth is used as the channel bandwidth, such as... Figure 3 As shown, a 7MHz spectrum can utilize a 10MHz channel bandwidth. However, if a significant interference exists near an irregular bandwidth spectrum, this scheme can cause uncontrollable congestion, affecting receiver performance and resulting in ineffective spectrum utilization.

[0113] Based on Scheme 2, if the size of the overlapping spectrum block is insufficient to accommodate the SSB without introducing new channel bandwidth, how to apply the network-side overlapping terminal channel bandwidth technology is an urgent problem to be solved.

[0114] Based on the above, embodiments of this application provide a method, apparatus, terminal, and network device for determining synchronization signal blocks, in order to solve the problem that if the size of the overlapping spectrum block is insufficient to accommodate the SSB, then the terminal channel bandwidth technology of network-side overlap cannot be applied.

[0115] See Figure 4 This application provides a method for determining a synchronization signal block, applied to a network device, comprising the following steps:

[0116] Step 401: Determine the correspondence between the relative phase difference between the primary synchronization signal PSS and the secondary synchronization signal SSS and the type of the synchronization signal block SSB.

[0117] In this step, if there are N SSB types, each of the N SSB types corresponds to one of the N relative phase differences, and the relative phase differences corresponding to different SSB types are different, N is ≥2, and N is a positive integer.

[0118] Step 402: Determine the first relative phase difference corresponding to the SSB type of the SSB based on the correspondence.

[0119] Among them, the SSB type includes the normal version SSB that occupies 20 RBs, and the trimmed version SSB that occupies less than 20 RBs. For example, the trimmed version SSB may only include the SSB that occupies 12 RBs, or it may also include SSBs of other trimmed sizes. This is not a limitation.

[0120] In this step, the first relative phase difference is one of the N relative phase differences included in the correspondence, and SSB specifically refers to the SSB to be transmitted.

[0121] Step 403: Send the SSB according to the first relative phase difference.

[0122] In this step, when the SSB is sent according to the first relative phase difference, the PSS and SSS in the SSB are made to have a first relative phase difference.

[0123] In this embodiment, after determining the SSB type corresponding to the SSB to be transmitted, the network device determines the first relative phase difference between the PSS and SSS within the SSB according to the correspondence between relative phase differences and SSB types, and transmits the PSS and SSS according to the first relative phase difference. Thus, the terminal can obtain the first relative phase difference between the PSS and SSS during cell search; furthermore, it determines the SSB type corresponding to the first relative phase difference from the correspondence between relative phase differences and SSB types, and uses the determined SSB type as the SSB type corresponding to the received SSB.

[0124] In some embodiments, determining the correspondence between the relative phase difference between the primary synchronization signal PSS and the secondary synchronization signal SSS and the SSB type includes:

[0125] The N relative phase differences are represented by angles on the unit circle, and each relative phase difference corresponds to an SSB type; wherein the N relative phase differences are evenly distributed on the unit circle, and N is a positive integer greater than or equal to 2.

[0126] For example, when there are two SSB types, i.e., N=2, the phase of the PSS is X+180 degrees, and the phase of the SSS is X degrees, where 0≤X≤180 degrees. This results in a relative phase difference between the PSS and SSS that includes both 0 degrees and 180 degrees, with 0 degrees and 180 degrees corresponding to different SSB types.

[0127] For example, when there are ≥3 SSB types, i.e., N≥3, the relative phase differences between the various SSB types are... For example, when N=3, the relative phase differences corresponding to the three SSB types are 0 degrees, 120 degrees and 240 degrees, respectively.

[0128] In some embodiments, determining the correspondence between the relative phase difference between the primary synchronization signal PSS and the secondary synchronization signal SSS and the SSB type includes:

[0129] The N relative phase differences are represented by angles on the unit circle, and each relative phase difference corresponds to an SSB type; wherein the positions of the N relative phase differences on the unit circle are not uniformly distributed, and N is a positive integer greater than or equal to 2.

[0130] For example, when N=2, the relative phase difference between the two SSB types is 0 degrees and 100 degrees, respectively.

[0131] For example, when N=2, the relative phase difference between the two SSB types is 0 degrees and 120 degrees, respectively.

[0132] For example, when N=2, the relative phase difference between the two SSB types is 0 degrees and 200 degrees, respectively.

[0133] For example, when N=3, the relative phase differences corresponding to the three SSB types are 0 degrees, 100 degrees, and 300 degrees, respectively.

[0134] It should be noted that the distribution of the N phase differences on the unit circle is only an example, and the choice of angle can be diverse and is not limited to this.

[0135] In some embodiments, when N=2, the correspondence includes:

[0136] When the relative phase difference is 0 degrees, the SSB type is an SSB occupying 20 RBs;

[0137] When the relative phase difference is 180 degrees, the SSB type is an SSB occupying 12 RBs.

[0138] For example, in the case of an SSB type occupying 20 RBs, the relative phase difference between the PSS and SSS is 0 degrees. A schematic diagram of the relative phase difference between the PSS and SSS is shown below. Figure 5 As shown.

[0139] For example, in the case of an SSB type occupying 12 RBs, the relative phase difference between the PSS and SSS is 180 degrees. A schematic diagram of the relative phase difference between the PSS and SSS is shown below. Figure 6 As shown.

[0140] Understandable, Figure 6 The statement that the phase of the PSS in the SSB is greater than the phase of the SSS is merely an example and is not a limitation. In practical applications, the phase of the SSS can also be greater than the phase of the PSS, for example, if the phase of the PSS is Y degrees, the phase of the SSS is Y+180 degrees, where 0≤Y≤180 degrees.

[0141] In some embodiments, when N=2, the PSS and the SSS are generated according to the first sequence generation formula and the second sequence generation formula, respectively;

[0142] The formula for generating the first sequence is:

[0143] Where, d PSS (n) is a PSS sequence. x(i+7)=(x(i+4)+x(i))mod2,0≤n<127; [x(6)x(5)x(4)x(3)x(2)x(1)x(0)]=[1 1 1 0 1 1 0];

[0144] The formula for generating the second sequence is:

[0145] Where, d SSS (n) is an SSS sequence. 0 ≤ n < 127; x0(i+7)=(x0(i+4)+x0(i))mod2; x1(i+7)=(x1(i+1)+x1(i))mod2;

[0146] [x0(6)x0(5)x0(4)x0(3)x0(2)x0(1)x0(0)]=[0 0 0 0 0 0 1];

[0147] [x1(6)x1(5)x1(4)x1(3)x1(2)x1(1)x1(0)]=[0 0 0 0 0 0 1];

[0148] Specifically, when the SSB type is an SSB occupying 20 RBs, q = 0 in the first sequence generation formula and the second sequence generation formula; when the SSB type is an SSB occupying 12 RBs, q = 1 in the first sequence generation formula and the second sequence generation formula.

[0149] It should be noted that when q is 1, it means that the terminal does not expect to receive subcarriers 0 to 47 and 192 to 239 in any of the four OFDM symbols of the SS / PBCH block, that is, subcarriers 0 to 47 and 192 to 239 have been clipped, and the SSB's SBB type is a clipped version occupying 12 RBs; when q is 0, it means that the terminal can receive subcarriers 0 to 239, that is, the SSB's SBB type is an uncut SSB occupying 20 RBs.

[0150] In some embodiments, sending an SSB includes:

[0151] A first terminal carrier is allocated to the first terminal; wherein the first terminal carrier overlaps with the second terminal carrier corresponding to the second terminal, and the first terminal carrier and the second terminal carrier cover an irregular bandwidth;

[0152] The SSB is transmitted on the overlapping bandwidth portion of the first terminal carrier and the second terminal carrier.

[0153] In this embodiment, the network device can set an irregular small bandwidth as a carrier and select a normal SSB or a clipped SSB based on the overlapping spectrum size on the terminal side, and transmit the PSS and SSS signals in the SSB according to the corresponding relative phase difference. In this way, the spectrum utilization of the irregular small bandwidth can be improved, and there is no need to introduce or standardize the irregular small bandwidth as channel bandwidth for the terminal, nor is there any additional signaling or spectrum overhead.

[0154] The following section explains the SSB transmission method for irregular small bandwidth application scenarios, using 6MHz, 7MHz, and 8MHz as examples.

[0155] Example 1: Irregular small bandwidth is 6MHz.

[0156] like Figure 7 As shown, the channel bandwidth on the network device (such as BS) side is 6MHz, and terminal 1 and terminal 2 are each configured with a 5MHz channel bandwidth (i.e., terminal carrier). The two 5MHz channel bandwidths are placed within 6MHz in a left-right aligned manner, that is, the two 5MHz channel bandwidths cover the irregular small bandwidth of 6MHz, and the overlap area of ​​the two 5MHz channel bandwidths is 4MHz.

[0157] The SSB type is set to 20 RBs in size, which is a normal-sized SSB, and the relative phase difference between the PSS and SSS in the SSB is 0 degrees. At this time, the spectrum utilization reaches 100%.

[0158] Example 2: Irregular small bandwidth is 7MHz.

[0159] like Figure 8 As shown, the channel bandwidth on the network device (such as BS) side is 7MHz. Terminal 1 and Terminal 2 are each configured with a 5MHz UE channel bandwidth (i.e., terminal carrier). The two 5MHz channel bandwidths are placed within 7MHz in a left-right aligned manner. That is, the two 5MHz channel bandwidths cover the irregular small bandwidth of 7MHz, and the overlap area of ​​the two 5MHz channel bandwidths is 3MHz.

[0160] The SSB type is set to an SSB occupying 12 RBs (i.e., a cropped SSB), and the PSS and SSS are 180 degrees apart, at which point the spectrum utilization reaches 100%.

[0161] Example 3: Irregular small bandwidth is 8MHz.

[0162] like Figure 9As shown, the channel bandwidth on the network device (such as BS) side is 7MHz. Terminal 1 and Terminal 2 are each configured with a 5MHz UE channel bandwidth (i.e., terminal carrier). The two 5MHz channel bandwidths are placed in an aligned manner with a 0.5MHz gap on each side, and the overlap area of ​​the two 5MHz channel bandwidths within the 7MHz is 3MHz.

[0163] The SSB type is set to a 12-RB SSB (i.e., a cropped SSB), and the relative phase difference between the PSS and SSS in the SSB is 180 degrees. At this time, the spectrum utilization reaches 7 / 8 = 87.5%.

[0164] See Figure 10 This application provides a method for determining a synchronization signal block, applied to a terminal, comprising the following steps:

[0165] Step 1001: Receive an SSB sent by a network device; wherein, the PSS and SSS in the SSB have a first relative phase difference;

[0166] In this process, after determining the SSB type corresponding to the SSB to be sent, the network device determines the first relative phase difference between the PSS and SSS in the SSB according to the correspondence between the relative phase difference and the SSB type, and sends the PSS and SSS according to the first relative phase difference.

[0167] Step 1002: Determine the SSB type corresponding to the SSB based on the first relative phase difference and the correspondence between the relative phase difference and the SSB type.

[0168] It should be noted that the correspondence between the relative phase difference between PSS and SSS and the SSB type includes N SSB types. There is a one-to-one correspondence between the N SSB types and the N relative phase differences. The relative phase differences corresponding to different SSB types are different. N is ≥2 and N is a positive integer.

[0169] In this step, the terminal can obtain the first relative phase difference between the PSS and SSS during cell search; further, from the correspondence between the relative phase difference and the SSB type, the SSB type corresponding to the first relative phase difference is determined, and the determined SSB type is used as the SSB type corresponding to the received SSB; decoding the SSB according to the SSB type can avoid the problem that the terminal may make mistakes when decoding the SSB when the SSB type is unknown.

[0170] For example, if the relative phase difference is determined to be 0 degrees, the Physical Broadcast Channel (PBCH) in the SSB is decoded using 20 RBs; if the relative phase difference is determined to be 180 degrees, the PBCH in the SSB is decoded using 12 RBs.

[0171] Among them, the SSB type includes the normal version SSB that occupies 20 RBs, and the trimmed version SSB that occupies less than 20 RBs. For example, the trimmed version SSB may only include the SSB that occupies 12 RBs, or it may also include SSBs of other trimmed sizes. This is not a limitation.

[0172] In the above embodiments, after receiving an SSB, the terminal can determine the SSB type based on the first relative phase difference and correspondence between the PSS and SSS within the SSB. In this way, the terminal can distinguish the SSB type sent by the network, avoiding SSB decoding errors.

[0173] It should be noted that the above embodiments can be applied to UE channel bandwidth technology solutions with overlapping network sides, and can also be applied to other scenarios for identifying SSB categories.

[0174] In some embodiments, the correspondence between relative phase difference and SSB type includes:

[0175] For example, when there are two SSB types, i.e., N=2, the phase of the PSS is X+180 degrees, and the phase of the SSS is X degrees, where 0≤X≤180 degrees. This results in a relative phase difference between the PSS and SSS that includes both 0 degrees and 180 degrees, with 0 degrees and 180 degrees corresponding to different SSB types.

[0176] For example, when there are ≥3 SSB types, i.e., N≥3, the relative phase differences between the various SSB types are... For example, when N=3, the relative phase differences corresponding to the three SSB types are 0 degrees, 120 degrees and 240 degrees, respectively.

[0177] In some embodiments, determining the correspondence between the relative phase difference between the primary synchronization signal PSS and the secondary synchronization signal SSS and the SSB type includes:

[0178] The N relative phase differences are represented by angles on the unit circle, and each relative phase difference corresponds to an SSB type; wherein the positions of the N relative phase differences on the unit circle are not uniformly distributed, and N is a positive integer greater than or equal to 2.

[0179] For example, when N=2, the relative phase difference between the two SSB types is 0 degrees and 100 degrees, respectively.

[0180] For example, when N=2, the relative phase difference between the two SSB types is 0 degrees and 120 degrees, respectively.

[0181] For example, when N=2, the relative phase difference between the two SSB types is 0 degrees and 200 degrees, respectively.

[0182] For example, when N=3, the relative phase differences corresponding to the three SSB types are 0 degrees, 100 degrees, and 300 degrees, respectively.

[0183] It should be noted that the distribution of the N phase differences on the unit circle is only an example, and the choice of angle can be diverse and is not limited to this.

[0184] In some embodiments, when N=2, the correspondence includes:

[0185] When the relative phase difference is 0 degrees, the SSB type is an SSB occupying 20 resource blocks (RBs).

[0186] When the relative phase difference is 180 degrees, the SSB type is an SSB occupying 12 RBs.

[0187] For example, in the case of an SSB type occupying 20 RBs, the relative phase difference between the PSS and SSS is 0 degrees. A schematic diagram of the relative phase difference between the PSS and SSS is shown below. Figure 5 As shown.

[0188] For example, in the case of an SSB type occupying 12 RBs, the relative phase difference between the PSS and SSS is 180 degrees. A schematic diagram of the relative phase difference between the PSS and SSS is shown below. Figure 6 As shown.

[0189] In some embodiments, when N=2, the PSS and SSS are generated according to the first sequence generation formula and the second sequence generation formula, respectively;

[0190] The formula for generating the first sequence is:

[0191] Where, d PSS (n) is a PSS sequence. x(i+7)=(x(i+4)+x(i))mod2,0≤n<127, [x(6)x(5)x(4)x(3)x(2)x(1)x(0)]=[1 1 1 0 1 1 0];

[0192] The formula for generating the second sequence is:

[0193] Where, d SSS (n) is an SSS sequence. 0 ≤ n < 127; x0(i+7)=(x0(i+4)+x0(i))mod2; x1(i+7)=(x1(i+1)+x1(i))mod2;

[0194] [x0(6)x0(5)x0(4)x0(3)x0(2)x0(1)x0(0)]=[0 0 0 0 0 0 1];

[0195] [x1(6)x1(5)x1(4)x1(3)x1(2)x1(1)x1(0)]=[0 0 0 0 0 0 1];

[0196] Specifically, when the SSB type is an SSB occupying 20 RBs, q = 0 in the first sequence generation formula and the second sequence generation formula; when the SSB type is an SSB occupying 12 RBs, q = 1 in the first sequence generation formula and the second sequence generation formula.

[0197] It should be noted that when q is 1, the terminal does not expect to receive subcarriers 0 to 47 and 192 to 239 in any of the four OFDM symbols of the SS / PBCH block, that is, subcarriers 0 to 47 and 192 to 239 have been clipped, and the SSB's SBB type is a clipped version occupying 12 RBs; when q is 0, it means that the terminal can receive subcarriers 0 to 239, that is, the SSB's SBB type is an uncut SSB occupying 20 RBs.

[0198] See Figure 11 This application provides a device synchronization signal block determination 1100, applied to a network device, including:

[0199] The first determining module 1101 is used to determine the correspondence between the relative phase difference between the main synchronization signal PSS and the auxiliary synchronization signal SSS and the type of the synchronization signal block SSB.

[0200] The second determining module 1102 is used to determine the first relative phase difference corresponding to the SSB type of the SSB based on the correspondence relationship.

[0201] The transmitting module 1103 is used to transmit the SSB according to the first relative phase difference.

[0202] In some embodiments, the first determining module 1101 is specifically used for:

[0203] The N relative phase differences are represented by angles on the unit circle, and each relative phase difference corresponds to an SSB type; wherein the N relative phase differences are evenly distributed on the unit circle, and N is a positive integer greater than or equal to 2.

[0204] In some embodiments, when N=2, the correspondence includes:

[0205] When the relative phase difference is 0 degrees, the SSB type is an SSB occupying 20 RBs;

[0206] When the relative phase difference is 180 degrees, the SSB type is an SSB occupying 12 RBs.

[0207] In some embodiments, when N=2, the PSS and the SSS are generated according to the first sequence generation formula and the second sequence generation formula, respectively;

[0208] The formula for generating the first sequence is:

[0209] Where, d PSS (n) is a PSS sequence. x(i+7)=(x(i+4)+x(i))mod2,0≤n<127; [x(6)x(5)x(4)x(3)x(2)x(1)x(0)]=[1 1 1 0 1 1 0];

[0210] The formula for generating the second sequence is:

[0211] Where, d SSS (n) is an SSS sequence. 0 ≤ n < 127; x0(i+7)=(x0(i+4)+x0(i))mod2; x1(i+7)=(x1(i+1)+x1(i))mod2;

[0212] [x0(6)x0(5)x0(4)x0(3)x0(2)x0(1)x0(0)]=[0 0 0 0 0 0 1];

[0213] [x1(6)x1(5)x1(4)x1(3)x1(2)x1(1)x1(0)]=[0 0 0 0 0 0 1];

[0214] Specifically, when the SSB type is an SSB occupying 20 RBs, q = 0 in the first sequence generation formula and the second sequence generation formula; when the SSB type is an SSB occupying 12 RBs, q = 1 in the first sequence generation formula and the second sequence generation formula.

[0215] In some embodiments, the sending module 1103 is specifically used for:

[0216] A first terminal carrier is allocated to the first terminal; wherein the first terminal carrier overlaps with the second terminal carrier corresponding to the second terminal, and the first terminal carrier and the second terminal carrier cover an irregular bandwidth;

[0217] The SSB is transmitted in the overlapping bandwidth portion of the first terminal carrier and the second terminal carrier, based on the first relative phase difference.

[0218] It should be noted that the device 1100 provided in this application embodiment can implement all the method steps implemented in the method embodiment on the network device side and can achieve the same technical effect. Here, the parts that are the same as those in the method embodiment and the beneficial effects will not be described in detail.

[0219] See Figure 12 This application provides a synchronization signal block determination device 1200, applied to a first terminal, comprising:

[0220] The receiving module 1201 is used to receive an SSB sent by a network device; wherein, the PSS and SSS in the SSB have a first relative phase difference;

[0221] The third determining module 1202 is used to determine the SSB type corresponding to the SSB based on the first relative phase difference and the correspondence between the relative phase difference and the SSB type.

[0222] In some embodiments, the correspondence between the relative phase difference and the SSB type includes:

[0223] The N relative phase differences are represented by angles on the unit circle, and each relative phase difference corresponds to an SSB type; wherein the N relative phase differences are evenly distributed on the unit circle, and N is a positive integer greater than or equal to 2.

[0224] In some embodiments, when N=2, the correspondence includes:

[0225] When the relative phase difference is 0 degrees, the SSB type is an SSB occupying 20 resource blocks (RBs).

[0226] When the relative phase difference is 180 degrees, the SSB type is an SSB occupying 12 RBs.

[0227] In some embodiments, when N=2, the PSS and the SSS are generated according to the first sequence generation formula and the second sequence generation formula, respectively;

[0228] The formula for generating the first sequence is:

[0229] Where, d PSS (n) is a PSS sequence. x(i+7)=(x(i+4)+x(i))mod2,0≤n<127, [x(6)x(5)x(4)x(3)x(2)x(1)x(0)]=[1 1 1 0 1 1 0];

[0230] The formula for generating the second sequence is:

[0231] Where, d SSS (n) is an SSS sequence. 0 ≤ n < 127; x0(i+7)=(x0(i+4)+x0(i))mod2; x1(i+7)=(x1(i+1)+x1(i))mod2;

[0232] [x0(6)x0(5)x0(4)x0(3)x0(2)x0(1)x0(0)]=[0 0 0 0 0 0 1];

[0233] [x1(6)x1(5)x1(4)x1(3)x1(2)x1(1)x1(0)]=[0 0 0 0 0 0 1];

[0234] Specifically, when the SSB type is an SSB occupying 20 RBs, q = 0 in the first sequence generation formula and the second sequence generation formula; when the SSB type is an SSB occupying 12 RBs, q = 1 in the first sequence generation formula and the second sequence generation formula.

[0235] It should be noted that the device 1200 provided in this application embodiment can implement all the method steps implemented in the above terminal-side method embodiment and can achieve the same technical effect. Here, the parts that are the same as those in the method embodiment and the beneficial effects will not be described in detail.

[0236] It should be noted that the division of units in the embodiments of this application is illustrative and only represents one logical functional division. In actual implementation, other division methods may be used. Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated units described above can be implemented in hardware or as software functional units.

[0237] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a processor-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0238] See Figure 13 This application provides a network device, including: a processor 1300; and a memory 1320 connected to the processor 1300 via a bus interface. The memory 1320 is used to store programs and data used by the processor 1300 when performing operations, and the processor 1300 calls and executes the programs and data stored in the memory 1320.

[0239] The transceiver 1310 is connected to a bus interface and is used to receive and send data under the control of the processor 1300; the processor 1300 reads the program from the memory 1320 to implement the following steps:

[0240] Determine the correspondence between the relative phase difference between the primary synchronization signal PSS and the secondary synchronization signal SSS and the type of synchronization signal block SSB;

[0241] Based on the correspondence, determine the first relative phase difference corresponding to the SSB type of the SSB;

[0242] The SSB is transmitted based on the first relative phase difference.

[0243] In some embodiments, the processor 1300 is further configured to read a program from the memory X20 and execute the following processes:

[0244] The N relative phase differences are represented by angles on the unit circle, and each relative phase difference corresponds to an SSB type; wherein the N relative phase differences are evenly distributed on the unit circle, and N is a positive integer greater than or equal to 2.

[0245] In some embodiments, when N=2, the correspondence includes:

[0246] When the relative phase difference is 0 degrees, the SSB type is an SSB occupying 20 RBs;

[0247] When the relative phase difference is 180 degrees, the SSB type is an SSB occupying 12 RBs.

[0248] In some embodiments, when N=2, the PSS and the SSS are generated according to the first sequence generation formula and the second sequence generation formula, respectively;

[0249] The formula for generating the first sequence is:

[0250] Where, d PSS (n) is a PSS sequence. x(i+7)=(x(i+4)+x(i))mod2,0≤n<127; [x(6)x(5)x(4)x(3)x(2)x(1)x(0)]=[1 1 1 0 1 1 0];

[0251] The formula for generating the second sequence is:

[0252] Where, d SSS (n) is an SSS sequence. 0 ≤ n < 127; x0(i+7)=(x0(i+4)+x0(i))mod2; x1(i+7)=(x1(i+1)+x1(i))mod2;

[0253] [x0(6)x0(5)x0(4)x0(3)x0(2)x0(1)x0(0)]=[0 0 0 0 0 0 1];

[0254] [x1(6)x1(5)x1(4)x1(3)x1(2)x1(1)x1(0)]=[0 0 0 0 0 0 1];

[0255] Specifically, when the SSB type is an SSB occupying 20 RBs, q = 0 in the first sequence generation formula and the second sequence generation formula; when the SSB type is an SSB occupying 12 RBs, q = 1 in the first sequence generation formula and the second sequence generation formula.

[0256] In some embodiments, the processor 1300 is specifically configured to read a program from memory and execute the following processes:

[0257] A first terminal carrier is allocated to the first terminal; wherein the first terminal carrier overlaps with the second terminal carrier corresponding to the second terminal, and the first terminal carrier and the second terminal carrier cover an irregular bandwidth;

[0258] The SSB is transmitted in the overlapping bandwidth portion of the first terminal carrier and the second terminal carrier, based on the first relative phase difference.

[0259] Among them, Figure 13 In this context, the bus architecture may include any number of interconnected buses and bridges, specifically linking various circuits together, represented by one or more processors (processor 1300) and memory (memory 1320). The bus architecture may also link together various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art and therefore will not be described further herein. The bus interface provides an interface. The transceiver 1310 may be multiple elements, including transmitters and transceivers, providing a unit for communicating with various other devices over a transmission medium. The processor 1300 is responsible for managing the bus architecture and general processing, and the memory 1320 may store data used by the processor 1300 during operation.

[0260] The processor 1300 can be a central processing unit (CPU), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or a complex programmable logic device (CPLD). The processor can also adopt a multi-core architecture.

[0261] See Figure 14This application provides a terminal, which is a first terminal, including: a processor 1400; and a memory 1420 connected to the processor 1400 via a bus interface. The memory 1420 is used to store programs and data used by the processor 1400 when performing operations, and the processor 1400 calls and executes the programs and data stored in the memory 1420.

[0262] The transceiver 1410 is connected to a bus interface and is used to receive and send data under the control of the processor 1400; the processor 1400 reads the program from the memory 1420 to implement the following steps:

[0263] Receive an SSB sent by a network device; wherein, the PSS and SSS in the SSB have a first relative phase difference;

[0264] Based on the first relative phase difference and the correspondence between the relative phase difference and the SSB type, the SSB type corresponding to the SSB is determined.

[0265] In some embodiments, the correspondence between the relative phase difference and the SSB type includes:

[0266] The N relative phase differences are represented by angles on the unit circle, and each relative phase difference corresponds to an SSB type; wherein the N relative phase differences are evenly distributed on the unit circle, and N is a positive integer greater than or equal to 2.

[0267] In some embodiments, when N=2, the correspondence includes:

[0268] When the relative phase difference is 0 degrees, the SSB type is an SSB occupying 20 resource blocks (RBs).

[0269] When the relative phase difference is 180 degrees, the SSB type is an SSB occupying 12 RBs.

[0270] In some embodiments, when N=2, the PSS and the SSS are generated according to the first sequence generation formula and the second sequence generation formula, respectively;

[0271] The formula for generating the first sequence is:

[0272] Where, d PSS (n) is a PSS sequence. x(i+7)=(x(i+4)+x(i))mod2,0≤n<127, [x(6)x(5)x(4)x(3)x(2)x(1)x(0)]=[1 1 1 0 1 1 0];

[0273] The formula for generating the second sequence is:

[0274] Where, d SSS (n) is an SSS sequence. 0 ≤ n < 127; x0(i+7)=(x0(i+4)+x0(i))mod2; x1(i+7)=(x1(i+1)+x1(i))mod2;

[0275] [x0(6)x0(5)x0(4)x0(3)x0(2)x0(1)x0(0)]=[0 0 0 0 0 0 1];

[0276] [x1(6)x1(5)x1(4)x1(3)x1(2)x1(1)x1(0)]=[0 0 0 0 0 0 1];

[0277] Specifically, when the SSB type is an SSB occupying 20 RBs, q = 0 in the first sequence generation formula and the second sequence generation formula; when the SSB type is an SSB occupying 12 RBs, q = 1 in the first sequence generation formula and the second sequence generation formula.

[0278] Among them, Figure 14 In this context, the bus architecture can include any number of interconnected buses and bridges, specifically linking various circuits together, represented by one or more processors (processor 1400) and memory (memory 1420). The bus architecture can also link various other circuits, such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art and therefore will not be described further herein. The bus interface provides an interface. The transceiver 1410 can be multiple elements, including transmitters and transceivers, providing a unit for communicating with various other devices over a transmission medium. For different terminals, the user interface 1430 can also be an interface capable of connecting external or internal devices, including but not limited to keypads, displays, speakers, microphones, joysticks, etc. The processor 1400 is responsible for managing the bus architecture and general processing, and the memory 1420 can store data used by the processor 1400 during operation.

[0279] The processor 1400 can be a central processing unit (CPU), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or a complex programmable logic device (CPLD). The processor can also adopt a multi-core architecture.

[0280] This application also provides a processor-readable storage medium storing a computer program for causing the processor to execute the method for determining the synchronization signal block as described above.

[0281] The processor-readable storage medium can be any available medium or data storage device that the processor can access, including but not limited to magnetic memory (e.g., floppy disk, hard disk, magnetic tape, magneto-optical disk (MO)), optical memory (e.g., compact disc (CD), digital video disc (DVD), Blu-ray disc (BD), high-definition versatile disc (HVD)), and semiconductor memory (e.g., ROM, erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), non-volatile memory (NAND (Non-volatile Memory Device) FLASH), solid state hard disk (SSD)).

[0282] The implementation embodiments of the methods on the network device side or the first terminal side described above are all applicable to the embodiments of the readable storage medium and can achieve the same technical effect.

[0283] This application also provides a computer program product, including computer instructions. When these computer instructions are executed by a processor, they implement the various processes of the above method embodiments and achieve the same technical effects. To avoid repetition, they will not be described again here.

[0284] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage and optical storage) containing computer-usable program code.

[0285] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-executable instructions. These computer-executable instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0286] These processor-executable instructions may also be stored in a processor-readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the processor-readable memory produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0287] These processors can execute instructions that can also be loaded onto a computer or other programmable data processing device, causing a series of operational steps to be performed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable device for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0288] Furthermore, it should be noted that in the apparatus and method of this application, it is obvious that the components or steps can be decomposed and / or recombined. These decompositions and / or recombinations should be considered equivalent solutions of this application. Moreover, the steps performing the above series of processes can naturally be executed in the order described, but are not necessarily required to be executed in chronological order; some steps can be executed in parallel or independently of each other. Those skilled in the art will understand that all or any step or component of the method and apparatus of this application can be implemented in any computing device (including processors, storage media, etc.) or network of computing devices, in hardware, firmware, software, or a combination thereof. This is something that those skilled in the art can achieve by using their basic programming skills after reading the description of this application.

[0289] It should be noted that the above division of modules is merely a logical functional division. In actual implementation, they can be fully or partially integrated into a single physical entity, or they can be physically separated. Furthermore, these modules can be implemented entirely in software via processing element calls; they can be fully implemented in hardware; or some modules can be implemented by processing element calls to software, while others are implemented in hardware. For example, a module can be a separate processing element, or it can be integrated into a chip in the aforementioned device. Alternatively, it can be stored as program code in the memory of the aforementioned device, and its function can be called and executed by a processing element of the device. The implementation of other modules is similar. Moreover, these modules can be fully or partially integrated together, or they can be implemented independently. The processing element mentioned here can be an integrated circuit with signal processing capabilities. In the implementation process, each step of the above method or each of the above modules can be completed through integrated logic circuits in the hardware of the processor element or through software instructions.

[0290] For example, each module, unit, subunit, or submodule can be one or more integrated circuits configured to implement the above methods, such as one or more application-specific integrated circuits (ASICs), one or more digital signal processors (DSPs), or one or more field-programmable gate arrays (FPGAs). As another example, when a module is implemented using processing element scheduler code, the processing element can be a general-purpose processor, such as a central processing unit (CPU) or other processor capable of calling program code. Furthermore, these modules can be integrated together as a system-on-a-chip (SOC).

[0291] The terms “first,” “second,” etc., used in the specification and claims of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data used in this way can be interchanged where appropriate so that embodiments of the application described herein may be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus. Additionally, the use of “and / or” in the specification and claims indicates at least one of the connected objects, such as A and / or B and / or C, indicating seven possibilities: A alone, B alone, C alone, and both A and B, both B and C, both A and C, and A, B, and C. Similarly, the use of “at least one of A and B” in this specification and claims should be understood as “A alone, B alone, or both A and B.”

[0292] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A method for determining a synchronization signal block, characterized in that, Applied to network devices, including: Determine the correspondence between the relative phase difference between the primary synchronization signal PSS and the secondary synchronization signal SSS and the type of synchronization signal block SSB; Based on the correspondence, determine the first relative phase difference corresponding to the SSB type of the SSB; The SSB is transmitted based on the first relative phase difference.

2. The method for determining the synchronization signal block according to claim 1, characterized in that, The determination of the correspondence between the relative phase difference between the primary synchronization signal PSS and the secondary synchronization signal SSS and the SSB type includes: The N relative phase differences are represented by angles on the unit circle, and each relative phase difference corresponds to an SSB type; wherein the N relative phase differences are evenly distributed on the unit circle, and N is a positive integer greater than or equal to 2.

3. The method for determining the synchronization signal block according to claim 2, characterized in that, When N=2, the correspondence includes: When the relative phase difference is 0 degrees, the SSB type is an SSB occupying 20 RBs; When the relative phase difference is 180 degrees, the SSB type is an SSB occupying 12 RBs.

4. The method for determining the synchronization signal block according to claim 2, characterized in that, When N=2, the PSS and the SSS are generated according to the first sequence generation formula and the second sequence generation formula, respectively; The formula for generating the first sequence is: Where, d PSS (n) is the PSS sequence. x(i+7)=(x(i+4)+x(i))mod2,0≤n<127; The formula for generating the second sequence is: Where, d SSS (n) is an SSS sequence. x0(i+7)=(x0(i+4)+x0(i))mod2; x1(i+7)=(x1(i+1)+x1(i))mod2; [x0(6)x0(5)x0(4)x0(3)x0(2)x0(1)x0(0)]=[0 0 0 0 0 0 1]; [x1(6)x1(5)x1(4)x1(3)x1(2)x1(1)x1(0)]=[0 0 0 0 0 0 1]; Specifically, when the SSB type is an SSB occupying 20 RBs, q = 0 in the first sequence generation formula and the second sequence generation formula; when the SSB type is an SSB occupying 12 RBs, q = 1 in the first sequence generation formula and the second sequence generation formula.

5. The method for determining a synchronization signal block according to claim 1, characterized in that, Sending the SSB based on the first relative phase difference includes: A first terminal carrier is allocated to the first terminal; wherein the first terminal carrier overlaps with the second terminal carrier corresponding to the second terminal, and the first terminal carrier and the second terminal carrier cover an irregular bandwidth; The SSB is transmitted in the overlapping bandwidth portion of the first terminal carrier and the second terminal carrier, based on the first relative phase difference.

6. A method for determining a synchronization signal block, characterized in that, Applied to the first terminal, including: Receive an SSB sent by a network device; wherein, the PSS and SSS in the SSB have a first relative phase difference; Based on the first relative phase difference and the correspondence between the relative phase difference and the SSB type, the SSB type corresponding to the SSB is determined.

7. The method for determining a synchronization signal block according to claim 6, characterized in that, The correspondence between the relative phase difference and the SSB type includes: The N relative phase differences are represented by angles on the unit circle, and each relative phase difference corresponds to an SSB type; wherein the N relative phase differences are evenly distributed on the unit circle, and N is a positive integer greater than or equal to 2.

8. The method for determining a synchronization signal block according to claim 7, characterized in that, When N=2, the correspondence includes: When the relative phase difference is 0 degrees, the SSB type is an SSB that occupies 20 resource blocks (RBs). When the relative phase difference is 180 degrees, the SSB type is an SSB occupying 12 RBs.

9. The method for determining a synchronization signal block according to claim 7, characterized in that, When N=2, the PSS and the SSS are generated according to the first sequence generation formula and the second sequence generation formula, respectively; The formula for generating the first sequence is: Where, d PSS (n) is the PSS sequence. x(i+7)=(x(i+4)+x(i))mod2,0≤n<127, The formula for generating the second sequence is: Where, d SSS (n) is an SSS sequence. 0 ≤ n < 127; x0(i+7)=(x0(i+4)+x0(i))mod2; x1(i+7)=(x1(i+1)+x1(i))mod2; [x0(6)x0(5)x0(4)x0(3)x0(2)x0(1)x0(0)]=[0 0 0 0 0 0 1]; [x1(6)x1(5)x1(4)x1(3)x1(2)x1(1)x1(0)]=[0 0 0 0 0 0 1]; Specifically, when the SSB type is an SSB occupying 20 RBs, q = 0 in the first sequence generation formula and the second sequence generation formula; when the SSB type is an SSB occupying 12 RBs, q = 1 in the first sequence generation formula and the second sequence generation formula.

10. A network device, comprising: A transceiver, a memory, a processor, and a computer program stored in the memory and executable on the processor; characterized in that the processor is configured to read the program from the memory and perform the following processes: Determine the correspondence between the relative phase difference between PSS and SSS and the SSB type; Based on the correspondence, determine the first relative phase difference corresponding to the SSB type of the SSB; The SSB is transmitted based on the first relative phase difference.

11. The network device according to claim 10, characterized in that, The processor is specifically used to read the program from the memory and execute the following processes: The N relative phase differences are represented by angles on the unit circle, and each relative phase difference corresponds to an SSB type; wherein the N relative phase differences are evenly distributed on the unit circle, and N is a positive integer greater than or equal to 2.

12. The network device according to claim 11, characterized in that, When N=2, the correspondence includes: When the relative phase difference is 0 degrees, the SSB type is an SSB occupying 20 RBs; When the relative phase difference is 180 degrees, the SSB type is an SSB occupying 12 RBs.

13. The network device according to claim 11, characterized in that, When N=2, the PSS and the SSS are generated according to the first sequence generation formula and the second sequence generation formula, respectively; The formula for generating the first sequence is: Where, d PSS (n) is the PSS sequence. x(i+7)=(x(i+4)+x(i))mod2,0≤n<127; The formula for generating the second sequence is: Where, d SSS (n) is an SSS sequence. 0 ≤ n < 127; x0(i+7)=(x0(i+4)+x0(i))mod2; x1(i+7)=(x1(i+1)+x1(i))mod2; [x0(6)x0(5)x0(4)x0(3)x0(2)x0(1)x0(0)]=[0 0 0 0 0 0 1]; [x1(6)x1(5)x1(4)x1(3)x1(2)x1(1)x1(0)]=[0 0 0 0 0 0 1]; Specifically, when the SSB type is an SSB occupying 20 RBs, q = 0 in the first sequence generation formula and the second sequence generation formula; when the SSB type is an SSB occupying 12 RBs, q = 1 in the first sequence generation formula and the second sequence generation formula.

14. The network device according to claim 11, characterized in that, The processor is specifically used to read the program from the memory and execute the following processes: A first terminal carrier is allocated to the first terminal; wherein the first terminal carrier overlaps with the second terminal carrier corresponding to the second terminal, and the first terminal carrier and the second terminal carrier cover an irregular bandwidth; The SSB is transmitted in the overlapping bandwidth portion of the first terminal carrier and the second terminal carrier, based on the first relative phase difference.

15. A terminal, wherein the terminal is a first terminal, comprising: A transceiver, a memory, a processor, and a computer program stored in the memory and executable on the processor; characterized in that the processor is configured to read the program from the memory and perform the following processes: Receive an SSB sent by a network device; wherein, the PSS and SSS in the SSB have a first relative phase difference; Based on the first relative phase difference and the correspondence between the relative phase difference and the SSB type, the SSB type corresponding to the SSB is determined.

16. The terminal according to claim 15, characterized in that, The correspondence between the relative phase difference and the SSB type includes: The N relative phase differences are represented by angles on the unit circle, and each relative phase difference corresponds to an SSB type; wherein the N relative phase differences are evenly distributed on the unit circle, and N is a positive integer greater than or equal to 2.

17. The terminal according to claim 16, characterized in that, When N=2, the correspondence includes: When the relative phase difference is 0 degrees, the SSB type is an SSB that occupies 20 resource blocks (RBs). When the relative phase difference is 180 degrees, the SSB type is an SSB occupying 12 RBs.

18. The terminal according to claim 16, characterized in that, When N=2, the PSS and the SSS are generated according to the first sequence generation formula and the second sequence generation formula, respectively; The formula for generating the first sequence is: Where, d PSS (n) is the PSS sequence. x(i+7)=(x(i+4)+x(i))mod2,0≤n<127, The formula for generating the second sequence is: Where, d SSS (n) is an SSS sequence. x0(i+7)=(x0(i+4)+x0(i))mod2; x1(i+7)=(x1(i+1)+x1(i))mod2; [x0(6)x0(5)x0(4)x0(3)x0(2)x0(1)x0(0)]=[0 0 0 0 0 0 1]; [x1(6)x1(5)x1(4)x1(3)x1(2)x1(1)x1(0)]=[0 0 0 0 0 0 1]; Specifically, when the SSB type is an SSB occupying 20 RBs, q = 0 in the first sequence generation formula and the second sequence generation formula; when the SSB type is an SSB occupying 12 RBs, q = 1 in the first sequence generation formula and the second sequence generation formula.

19. A device for determining a synchronization signal block, characterized in that, Applied to network devices, including: The first determining module is used to determine the correspondence between the relative phase difference between the main synchronization signal PSS and the auxiliary synchronization signal SSS and the type of the synchronization signal block SSB; The second determining module is used to determine the first relative phase difference corresponding to the SSB type of the SSB based on the correspondence relationship; The transmitting module is configured to transmit the SSB based on the first relative phase difference.

20. A device for determining a synchronization signal block, characterized in that, Applied to the first terminal, including: A receiving module is used to receive an SSB sent by a network device; wherein, the PSS and SSS in the SSB have a first relative phase difference; The third determining module is used to determine the SSB type corresponding to the SSB based on the first relative phase difference and the correspondence between the relative phase difference and the SSB type.

21. A processor-readable storage medium, characterized in that, The processor-readable storage medium stores a computer program that causes the processor to perform the method for determining a synchronization signal block according to any one of claims 1 to 5, or to perform the method for determining a synchronization signal block according to any one of claims 6 to 9.

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