LDPC code error correction method and device, electronic equipment and storage medium

Abstract

This application provides an LDPC code error correction method, apparatus, electronic device, and storage medium. The method includes: after completing one round of iterative decoding of the current codeword of the LDPC code, determining whether the current codeword is in an oscillatory correctable state according to a preset oscillation correctability determination condition; when the current codeword is determined to be in an oscillatory correctable state, adjusting the preset parameters in the iterative decoding process by weighting and offsetting; after the adjustment is completed, continuing to perform the next round of iterative decoding on the current codeword until the current codeword is successfully decoded; obtaining the next codeword and repeating the above steps until all codewords in the oscillatory correctable state are successfully decoded. This application avoids the time overhead and resource consumption caused by restarting the post-processing flow after decoding failure, effectively reducing the error level, and has the advantages of short processing time, high bandwidth performance, and low hardware resource consumption.

Description

Technical Field

[0001] This application relates to the field of electronic communication technology, and in particular to an LDPC code error correction method, apparatus, electronic device and storage medium. Background Technology

[0002] Low-Density Parity-Check (LDPC) codes exhibit near-Shannon-limit error correction performance in communication systems and have been widely used in electronic communications. Despite their excellent error correction performance, LDPC codes face the error floor problem under certain channel conditions. The error floor is the core performance bottleneck of LDPC codes in the high signal-to-noise ratio (SNR) region. Specifically, when the SNR increases to a certain threshold, the uncorrectable bit error rate (UBER) no longer decreases significantly with further increases in SNR, but instead tends to a stable, unreducible numerical plateau. This phenomenon occurs because certain types of error modes, especially those related to codeword structure (such as trap sets), are difficult to effectively correct through iterative decoding processes.

[0003] To address the causes of error planes, current mainstream suppression methods can be broadly categorized into code design optimization and decoding algorithm optimization. Using both in conjunction can achieve optimal results. However, most current decoding algorithm optimization schemes fall under the category of post-processing; that is, additional post-processing is initiated only after the maximum number of iterations has been reached and the decoding process has failed, leading to a re-decoding. This approach is time-consuming and consumes significant hardware resources, resulting in a decrease in decoding bandwidth performance. Summary of the Invention

[0004] This application provides an LDPC code error correction method, apparatus, electronic device, and storage medium, aiming to solve the problems of long processing time, high hardware resource consumption, and poor decoding bandwidth performance caused by the post-processing process used in the prior art for LDPC code error correction.

[0005] Firstly, an LDPC code error correction method is provided, comprising: after completing one round of iterative decoding of the current codeword of the LDPC code, determining whether the current codeword is in an oscillatory correctable state according to a preset oscillation correctability determination condition; when the current codeword is determined to be in an oscillatory correctable state, performing weighted and offset adjustments on preset parameters in the iterative decoding process; after completing the adjustment, continuing to perform the next round of iterative decoding on the current codeword until the current codeword is successfully decoded; obtaining the next codeword and repeating the above steps until all codewords in the oscillatory correctable state are successfully decoded.

[0006] This method accurately identifies codewords that oscillate repeatedly near the correct codeword but have not yet converged by judging the oscillation correctability of the entire codeword after each round of decoding iteration. At the same time, it makes targeted parameter adjustments to the oscillating correctable codewords, realizing active intervention in the decoding process. This avoids the time overhead caused by restarting the post-processing process after decoding failure, effectively reduces the error level, and improves the decoding success rate and bandwidth performance.

[0007] In conjunction with the first aspect, in one possible implementation, the method further includes: obtaining the original bit error rate based on the channel signal-to-noise ratio, and generating N sets of LDPC codewords to be tested based on the original bit error rate and the expected uncorrected bit error rate; inputting the N sets of codewords to be tested into an LDPC error level test platform for decoding tests; filtering out uncorrectable codewords from the decoding test results; inputting the uncorrectable codewords into the LDPC error level test platform for re-decoding tests, and setting oscillation correctability determination conditions based on the results of the re-decoding tests.

[0008] In this embodiment, through large-scale codeword testing and screening during the testing phase, the characteristics of oscillating correctable codewords are extracted from uncorrectable codewords, and oscillating correctability determination conditions are set accordingly, providing a reliable determination basis for real-time recognition in the subsequent decoding process.

[0009] In conjunction with the first aspect, in one possible implementation, uncorrectable codewords are input into an LDPC error-level test platform for re-decoding testing, and oscillation correctability determination conditions are set based on the results of the re-decoding test. This includes: inputting uncorrectable codewords into an LDPC error-level test platform for decoding testing, and observing the state information of each iteration. The state information includes at least one or more of the following: the number of iterations, the number of error bits after each iteration, and the number of error parity check equations; based on the state information, codewords with oscillation characteristics and correctability characteristics are identified, and the conditions used to identify the state information are set as oscillation correctability determination conditions.

[0010] In this embodiment, by observing detailed state information such as the number of iterations, the number of error bits after each iteration, and the number of error parity check equations during the decoding process, the oscillation-correctable codewords are accurately identified, and the conditions of these state information are solidified as judgment rules to ensure the accuracy of the identification conditions.

[0011] In conjunction with the first aspect, in one possible implementation, the preset parameters include any one or more of the following: channel information and the transmission message from the verification node to the variable node.

[0012] In this embodiment, by adjusting two key types of information—channel information and the transmission messages from the verification node to the variable node—the decoding process can be effectively guided toward convergence, breaking the oscillation state.

[0013] In conjunction with the first aspect, in one possible implementation, when it is determined that the current codeword is in an oscillation-correctable state, the preset parameters in the iterative decoding process are weighted and offset to guide the decoding process to evolve towards iterative convergence. This includes: when it is determined that the current codeword is in an oscillation-correctable state, a tiered dynamic adjustment strategy is used to adjust the weighting and offset values ​​of the preset parameters in the iterative decoding process.

[0014] In this embodiment, a tiered dynamic adjustment strategy is adopted. By pre-configuring multiple adjustment parameters, different weighting values ​​and offset values ​​can be flexibly selected for parameter adjustment during the decoding process, thereby improving the adaptability and flexibility of the adjustment.

[0015] In conjunction with the first aspect, in one possible implementation, when it is determined that the current codeword is in an oscillation-correctable state, a tiered dynamic adjustment strategy is adopted to adjust the preset parameters in the iterative decoding process, including: when it is determined that the current codeword is in an oscillation-correctable state, the first-tier dynamic adjustment strategy is adopted to adjust the preset parameters in the iterative decoding process, and the iterative state after adjustment is observed; when any of the following situations occur, the second-tier dynamic adjustment strategy is switched to: the number of error parity check equations decreases, or the number of error bits decreases, or the decoding process enters the iterative convergence state.

[0016] In this implementation, a relatively coarse first-level parameter is initially selected to achieve rapid adaptation. As iterations deepen, the system switches to a more refined second-level parameter for precise optimization, thus balancing adjustment efficiency and control accuracy.

[0017] In conjunction with the first aspect, in one possible implementation, the next codeword is acquired, and the above steps are repeated until all codewords in the oscillation-correctable state are successfully decoded. This includes: after the current codeword is successfully decoded, acquiring the next codeword; determining whether the next codeword is in the oscillation-correctable state according to a preset oscillation-correctable determination condition; if so, adjusting the preset parameters of the next codeword by weighting and offsetting according to the preset parameters corresponding to the adjusted codeword, and continuing iterative decoding of the next codeword until the next codeword is successfully decoded; repeating the above acquisition and adjustment steps until all codewords in the oscillation-correctable state are successfully decoded.

[0018] In this implementation, by retaining the adjusted preset parameters after successful decoding of the current codeword and merging and adjusting the next oscillatory correctable codeword, progressive parameter optimization is achieved. This merging weight adjustment method ensures that the parameter combination is effective for all oscillatory correctable codewords, laying the foundation for significantly reducing the number of uncorrectable codewords during subsequent re-decoding and ensuring an effective reduction in error levels.

[0019] Secondly, an LDPC code decoding device is provided for use in electronic devices. The device includes: an identification module, used to determine whether the current codeword is in an oscillation-correctable state according to a preset oscillation-correctable determination condition after completing one round of iterative decoding of the current codeword of the LDPC code; an adjustment module, used to perform weighted and offset adjustments on preset parameters in the iterative decoding process when it is determined that the current codeword is in an oscillation-correctable state; and an execution module, used to continue to perform the next round of iterative decoding on the current codeword after the adjustment is completed, until the current codeword is successfully decoded, and then obtain the next codeword, repeating the above steps until all codewords in the oscillation-correctable state are successfully decoded.

[0020] Thirdly, an electronic device is provided, including a processor, a memory, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the method of the first aspect.

[0021] Fourthly, a computer-readable storage medium is provided, on which a computer program or instructions are stored, wherein when the computer program or instructions are executed by a processor, the steps of the method of the first aspect are implemented.

[0022] Implementing the embodiments of this application can achieve the following beneficial effects: In the iterative decoding process, the oscillation-correctable state of the codeword is identified in real time, and the preset parameters are weighted and offset accordingly, guiding the decoding process towards iterative convergence, significantly improving the decoding success rate, and greatly reducing the error level. Simultaneously, since the entire process is completed during the current decoding process, there is no need to wait for decoding failures and restart the post-processing flow, resulting in short processing time, high bandwidth performance, and low hardware resource consumption. Attached Figure Description

[0023] Figure 1 A flowchart illustrating an LDPC code error correction method provided in an embodiment of this application; Figure 2 A schematic diagram of an oscillation state provided in an embodiment of this application; Figure 3 This is a schematic diagram comparing the uncorrected bit error rate of the LDPC code error correction method shown in the embodiments of this application with the prior art under different original bit error rate conditions; Figure 4 A flowchart illustrating another LDPC code error correction method provided in this application embodiment; Figure 5 This is a schematic diagram of the structure of an LDPC code error correction device provided in an embodiment of this application; Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0024] The technical solutions in the embodiments of this application will now be described with reference to the accompanying drawings.

[0025] This application is applicable to data error correction scenarios in the fields of communication and storage technology, and is particularly applicable to error floor suppression in the iterative decoding process of LDPC codes.

[0026] Low-density parity-check (LDPC) codes are linear block codes whose parity-check matrix is ​​sparse, meaning the number of 1s in the matrix is ​​far less than the number of 0s. LDPC code decoding typically employs iterative decoding algorithms, such as the Belief Propagation (BP) algorithm, the Min-Sum algorithm, and their improved versions. The core idea of ​​iterative decoding is to repeatedly pass messages between variable nodes and parity-check nodes, gradually correcting erroneous bits until all parity-check equations are satisfied or the preset maximum number of iterations is reached.

[0027] In LDPC-based communication and storage systems, when the system operates in the high signal-to-noise ratio (SNR) region, the uncorrected bit error rate (UBER) curve tends to exhibit an error floor that is difficult to decrease further. Specifically, once the SNR reaches a certain threshold, the uncorrected UBER no longer decreases significantly with increasing SNR, but instead tends to a stable, unreducible numerical plateau. The error floor is mainly caused by the presence of specific error patterns in the codewords, such as trap sets and absorbing sets. These error patterns are often difficult to correct during iterative decoding, leading to decoding failure.

[0028] To address this problem, this application proposes an LDPC code error correction method, apparatus, electronic device, and storage medium. The core inventive concept of this application lies in: identifying oscillatingly correctable codewords in real time during the iterative decoding process, and guiding the decoding process towards convergence by weighting and offsetting relevant preset parameters. This allows error correction to be completed within a single decoding cycle, avoiding the time overhead, resource consumption, and poor decoding bandwidth performance issues associated with restarting and post-processing after decoding failures in traditional solutions.

[0029] The LDPC code error correction method involved in this application is first introduced below. Please refer to [link / reference]. Figure 1 This is a flowchart illustrating an LDPC code error correction method provided in an embodiment of this application. Figure 1 The methods shown may include: S101. After completing one round of iterative decoding of the current codeword of the LDPC code, determine whether the current codeword is in an oscillation-correctable state according to the preset oscillation-correctable judgment condition.

[0030] It's important to note that a codeword refers to a complete bitstream; for example, a 4KB codeword is a 4K×8-bit string of 0s and 1s. Determining whether the current codeword is in an oscillatory correctable state is performed on the entire bitstream. This can be achieved by counting the number of erroneous bits in the entire bitstream compared to the previous iteration, as well as the number of erroneous parity equations corresponding to the entire bitstream. Therefore, determining the oscillatory correctable state can be done after a complete iteration of the current codeword.

[0031] As a feasible implementation method, the method proposed in this application can be applied to a column-layered decoding architecture. Column-layered decoding is an efficient LDPC decoding implementation. Its basic idea is to divide the columns (corresponding variable nodes) of the parity-check matrix into multiple layers, each layer containing several columns. During decoding, the variable node messages of each layer are updated sequentially according to the layer order. This layered processing method is beneficial for hardware parallel implementation and can improve decoding throughput.

[0032] It should be noted that iterative decoding of LDPC codes refers to the process of repeatedly updating the confidence information of each node through message passing between variable nodes and check nodes until all check equations are satisfied or the preset maximum number of iterations is reached. Here, variable nodes are nodes in the bipartite graph of the LDPC code corresponding to the encoded bits, each variable node representing one encoded bit; check nodes are nodes in the bipartite graph of the LDPC code corresponding to the parity check equations, each check node representing a parity check constraint. Confidence is a measure of the probability that each bit will take the value of 0 or 1, usually expressed in the form of Log-Likelihood Ratio (LLR). The larger the absolute value of LLR, the more certain the value of that bit is. The check equations refer to the linear constraint relationships defined by the LDPC code parity check matrix. When all check equations are satisfied, decoding is considered successful.

[0033] It should also be noted that the oscillating correctable state refers to a special state exhibited by the codeword during the iterative decoding process. Oscillation means that the position of the erroneous bit repeatedly appears a preset number of times during a decoding iteration. This can be determined by observing the number of flips in adjacent iterations of the codeword and the number of consecutive iterations. Correctable means that the number of error parity check equations does not exceed a preset threshold. This can be determined by setting a threshold for the number of error parity check equations.

[0034] To understand the concept of "oscillation" more intuitively, please refer to [link / reference]. Figure 2 This is a schematic diagram of an oscillation state provided in an embodiment of this application. Figure 2 The horizontal axis represents the interval (number of iterations), and the vertical axis represents the magnitude of the error bit flip. Figure 2The horizontal axis in the graph represents the number of iterations, and the vertical axis represents the amplitude (analogous to the number of error bit flips or the change in error bit position between adjacent iterations). As can be seen from the graph, the amplitude alternates between increasing and decreasing with the number of iterations, never steadily converging to a fixed value; this is the oscillation characteristic described in the embodiments of this application. During LDPC iterative decoding, if the number of error bit flips between adjacent iterations exhibits similar repeated up-and-down fluctuations (i.e., the error bit position repeatedly appears between different iteration rounds), then the codeword is determined to have oscillation characteristics.

[0035] As a feasible implementation method, the preset oscillation correctability determination condition refers to a threshold condition that can be used to identify a set of state information of oscillation correctability codewords, which can be obtained by decoding a large number of codewords during the testing phase.

[0036] As a feasible implementation, an LDPC decoder can be used to perform LDPC code iterative decoding. The LDPC decoder can be a hardware module or a hardware acceleration engine. The LDPC decoder can be built into a communication receiver chip, a memory controller chip, or a dedicated LDPC decoder chip, and can be implemented in the form of an FPGA (Field Programmable Gate Array) or an ASIC (Application-Specific Integrated Circuit).

[0037] As a feasible implementation, after each iteration of the LDPC decoder, the internal monitoring unit can collect the status information of this iteration, such as the current iteration number, the number of error bits after this iteration, and the number of error parity check equations after this iteration. The monitoring unit compares this real-time status information with the pre-stored oscillation correctability determination conditions one by one. If all status information is within the threshold range set by the determination conditions, the current codeword is determined to be in an oscillation correctability state; otherwise, the current codeword is determined not to be in an oscillation correctability state, and the normal iterative decoding process continues.

[0038] For example, suppose the preset conditions for determining oscillation correctability are: the number of iterations ≥ 15, the number of error parity check equations ≤ 8, and the number of error bit flips between two adjacent iterations ≥ 3. When decoding reaches the 16th iteration, if the current number of error parity check equations is 6, and the number of error bit flips between the 15th and 16th iterations is 4, satisfying all the above conditions, then the current codeword is determined to be in an oscillation correctable state.

[0039] S102. When it is determined that the current codeword is in an oscillating and correctable state, the preset parameters in the iterative decoding process are weighted and offset.

[0040] It should be noted that preset parameters refer to key information parameters that affect the decoding convergence behavior during iterative decoding. Weighting refers to multiplying the original value of the parameter by a weighted value, and offset refers to adding a compensation value to the original value of the parameter. By adjusting the weighting and offset of the preset parameters, the strength or direction of message transmission during decoding iteration can be changed, thereby breaking the oscillation state and guiding the decoding towards convergence.

[0041] In one embodiment, the preset parameters include any one or more of the following: channel information and the transmission message from the verification node to the variable node.

[0042] It should be noted that channel information refers to the raw confidence information extracted from the received signal, usually expressed in the form of log-likelihood ratio (LLR), which reflects the initial probability that each bit is 0 or 1.

[0043] It should also be noted that the message passed from the check node to the variable node refers to the extrinsic information transmitted from the check node to the variable node during the iterative decoding process. This extrinsic information refers to the constraint opinions calculated from the current check node but not including the variable node's own input information. Simply put, the extrinsic information represents the constraint opinions of the check node on the value of the current variable node based on the states of other adjacent variable nodes besides the current variable node. By weighting and offsetting these two types of information, the dynamic process of decoding iteration can be effectively intervened.

[0044] As a feasible implementation method, one or more of the following can be adjusted, depending on the actual application scenario: adjusting channel information, or adjusting the transmission messages from the verification node to the variable node. For example, in scenarios with low signal-to-noise ratio and high channel noise, channel information can be adjusted first to enhance the reliability of the original confidence level; in scenarios with a large number of iterations and significant message attenuation, the transmission messages from the verification node to the variable node can be adjusted first to enhance the constraint propagation strength.

[0045] As a feasible implementation method, after determining that the current codeword is in an oscillation-correctable state, the current channel information and / or the transmission messages from the check node to the variable node can be read. These information are then multiplied by preset weighting values ​​and supplemented with preset compensation values ​​to obtain adjusted information. The adjusted information is then re-inputted into the iterative decoding process to replace the original information for subsequent iterations.

[0046] In one embodiment, step S102 includes: when it is determined that the current codeword is in an oscillation-correctable state, using a tiered dynamic adjustment strategy to adjust the weighting and offset values ​​of preset parameters in the iterative decoding process.

[0047] It should be noted that the hierarchical dynamic adjustment strategy means that multiple groups of parameter combinations of weighting values and offset values with different levels are pre-configured, and different levels of parameters are dynamically selected for adjustment according to the current iteration state during the decoding process. In the initial stage, the first level can be selected to achieve rapid guidance, and in the later stage, it can be switched to the second level for precise correction, so as to balance the adjustment efficiency and the regulation accuracy.

[0048] In one embodiment, when it is determined that the current codeword is in an oscillatory correctable state, the hierarchical dynamic adjustment strategy is used to adjust the weighting value and the offset value of the preset parameters in the iterative decoding process, including: when it is determined that the current codeword is in an oscillatory correctable state, the first-level dynamic adjustment strategy is used to adjust the preset parameters in the iterative decoding process, and the iterative state after adjustment is observed; when any of the following situations occurs in the iterative state, switch to the second-level dynamic adjustment strategy: the number of incorrect parity check equations decreases, or the number of incorrect bits decreases, or the decoding process enters the iterative convergence state.

[0049] It should be noted that the first level and the second level described in this application are only used for illustrative purposes. In fact, more levels (such as the third level, the fourth level, etc.) may be included, and the difference between each level lies in the different coarse and fine granularities of the adjustment parameters. Among them, the coarse granularity level corresponds to a larger adjustment range of the weighting value and the offset value, which is suitable for quickly guiding the decoding direction; the fine granularity level corresponds to a smaller adjustment range, which is suitable for precise correction when the decoding is close to convergence. By gradually switching from the coarse granularity level to the fine granularity level, the adjustment efficiency and the regulation accuracy can be balanced.

[0050] For example, after the decoder completes the first-level parameter adjustment, it continues to perform iterative decoding, and re-collects the state information after each iteration. Assume that the number of incorrect parity check equations in the first iteration after the first-level adjustment is E1, and the number of incorrect parity check equations in the second iteration is E2. If E2 < E1, it indicates that the number of incorrect parity check equations decreases and the decoding begins to converge. At this time, the gear shift is triggered, and the parameter adjustment strategy is switched from the first level to the second level. If it is detected in subsequent iterations that the number of incorrect bits decreases or the decoding state continues to improve, the gear shift is also triggered or the second-level fine adjustment is continued.

[0051] For example, the first-level parameters are (weighting value = 1.5, compensation value = 0.2), and the second-level parameters are (weighting value = 1.05, compensation value = 0.05). After the first-level adjustment, the number of incorrect parity check equations in the 17th iteration drops from 8 before adjustment to 5, meeting the switching condition, and the parameters are updated to the second level (weighting value = 1.05, compensation value = 0.05). In the 18th iteration, the number of incorrect parity check equations further drops to 2, and the decoding continues to converge. At this time, the third-level gear shift can be triggered or the second-level fine adjustment can be continued.

[0052] S103. After the adjustment is completed, continue to perform the next round of iterative decoding on the current codeword until the current codeword is successfully decoded.

[0053] It should be noted that after the weighting and offset adjustments of the preset parameters are completed, iterative decoding continues on the current codeword. Since the current codeword has been identified as being in an oscillating and correctable state, the convergence behavior of the decoding algorithm will be improved after the above parameter adjustments. The oscillation phenomenon that might have occurred can be effectively suppressed in the next round of iterative decoding, enabling the decoding to gradually converge and be successfully decoded.

[0054] It should be noted that after the weighting and offset adjustments of the preset parameters are completed, the iterative decoding process for the current codeword continues. Since the current codeword has been identified as being in an oscillating and correctable state, the convergence behavior of the decoding algorithm will be improved after the above parameter adjustments. The oscillation phenomenon that might have occurred is effectively suppressed, enabling the decoding to gradually converge and be successfully decoded.

[0055] As a feasible implementation method, the adjusted preset parameters are substituted into the current iterative decoding process. Then, after each iteration of decoding, a check equation check is performed to determine whether the current codeword satisfies all check constraints. For example, the syndrome of the current codeword is calculated. If the syndrome is zero, it indicates that the current codeword has satisfied all check equations, i.e., successful decoding. At this point, the iterative decoding process for the codeword is terminated, and a successful decoding result is output.

[0056] If the syntagmatic expression is not zero after the current iteration, it is determined whether the current iteration count has reached the preset maximum iteration count threshold. If the maximum iteration count has not been reached, the next iteration decoding continues, repeating the above message passing, parameter adjustment update, and verification detection process; if the maximum iteration count has been reached but the syntagmatic expression is still not zero, the current codeword decoding is determined to have failed, but the information of the codeword can still be recorded for subsequent analysis or to enter other error correction mechanisms.

[0057] S104. Obtain the next codeword and repeat the above steps until all codewords in the oscillation-correctable state are successfully decoded.

[0058] As a feasible implementation method, there may be more than one oscillatory correctable codeword. The core of this step is to perform a progressive merging weight adjustment on multiple oscillatory correctable codewords.

[0059] It should be noted that this test round refers to a set of codewords involved in a single batch decoding process. There may be more than one oscillation-correctable codeword. The core of this step is to batch process all codewords that meet the oscillation-correctable condition in the current round, rather than processing only a single codeword and then ending the process, thereby ensuring that the error plane is effectively reduced.

[0060] As a feasible implementation, the decoder can maintain a queue of codewords to be processed, which records all codewords identified as oscillatory correctable in the current test round. After processing each oscillatory correctable codeword (i.e., the codeword is successfully decoded), it checks whether there are any other unprocessed oscillatory correctable codewords in the queue. If so, the next oscillatory correctable codeword is taken out, and the identification, adjustment, and decoding steps S101 to S103 are repeated for it until the queue is empty, that is, all oscillatory correctable codewords in the current test round have been successfully decoded.

[0061] In one embodiment, step S104 includes: after the current codeword is successfully decoded, continuing to acquire the next codeword; determining whether the next codeword is in an oscillation-correctable state according to a preset oscillation-correctable determination condition; if so, adjusting the preset parameters of the next codeword by weighting and offsetting according to the preset parameters corresponding to the adjusted codeword, and continuing to perform iterative decoding on the next codeword until the next codeword is successfully decoded; repeating the above acquisition and adjustment steps until all codewords in an oscillation-correctable state are successfully decoded.

[0062] As a feasible implementation method, after successfully decoding the first oscillatory correctable codeword by adjusting its preset parameters, a first set of adjusted preset parameters is obtained. When adjusting the second oscillatory correctable codeword, further adjustments can be made based on the first set of adjusted preset parameters to obtain a second set of adjusted preset parameters that can simultaneously decode both the first and second codewords. This process is repeated, merging and adjusting parameters sequentially until a final set of adjusted parameters is obtained that can successfully decode all oscillatory correctable codewords. This progressive merging adjustment method ensures that the adjusted parameters are effective for all oscillatory correctable codewords, thereby significantly reducing the number of uncorrectable codewords when the original codewords are subsequently re-decoded using these final parameters.

[0063] As a feasible implementation, suppose that K codewords are identified as oscillatory correctable codewords in the current test round, numbered C1, C2, ..., CK. The decoder first processes C1: performing identification, parameter adjustment, and continuing decoding until C1 is successfully decoded. After C1 is processed, the decoder checks the list of oscillatory correctable codewords and finds that C2 has not yet been processed, so it jumps to S101 to identify and process C2. This process continues until all C1 to CK are processed. During this process, each oscillatory correctable codeword undergoes parameter adjustment and iterative decoding independently without interference. When all K oscillatory correctable codewords have been successfully decoded, the decoder can start processing codewords in the next test round, or determine that the error level has been overcome and end the process.

[0064] Please see Figure 3This is a schematic diagram comparing the LDPC code error correction method shown in the embodiments of this application with the uncorrected bit error rate (UBER) of existing technologies under different raw bit error rate (RBER) conditions. From Figure 3 It can be seen that in the region with low RBER (4.0E-03 to 5.0E-03), the corresponding signal-to-noise ratio is high, and the signal quality is good. The UBER of the existing technology without post-processing does not decrease with the decrease of RBER, but remains at the same level, resulting in error phasing. However, by implementing the method shown in this application, the UBER always decreases with the decrease of RBER, and error phasing is almost non-existent.

[0065] The LDPC code error correction method shown in this application identifies the oscillation-correctable state of the codeword in real time during the iterative decoding process, and adjusts the preset parameters by weighting and offsetting accordingly. This effectively guides the decoding process towards iterative convergence, eliminating the need to wait for the maximum number of iterations after decoding failure before starting the post-processing flow. Instead, intervention and error correction are completed during the current decoding process, significantly improving the decoding success rate, effectively reducing the error plane, and avoiding the restart overhead after decoding failure. This results in shorter decoding time, higher bandwidth performance, and less hardware resource consumption.

[0066] Please refer to the following: Figure 4 This is another LDPC code error correction method provided in the embodiments of this application. For example... Figure 4 The methods shown include: S401. Obtain the original bit error rate based on the channel signal-to-noise ratio, and generate N sets of LDPC codewords to be tested based on the original bit error rate and the expected uncorrected bit error rate.

[0067] It should be noted that the Raw Bit Error Rate (RBER) refers to the probability of bit errors occurring during channel transmission without any error correction coding. The codeword to be tested refers to the codeword sample used to test the error correction performance of the LDPC decoder.

[0068] As a feasible implementation method, the current channel signal-to-noise ratio (SNR) is first obtained through channel measurement or protocol specifications. The raw bit error rate (RBER) is then calculated based on the theoretical relationship between SNR and bit error rate (such as the Q-function or AWGN channel model). Next, based on the raw RBER obtained from the test, matching random noise is generated (in some feasible implementations, a common Gaussian white noise model can be used). Based on the LDPC coding scheme specified for the test, corresponding encoded data is generated (in some feasible implementations, to simplify the test, all-zero codewords can be used as encoded data). Then, combining the random noise and the LDPC encoded data, an error injection operation (e.g., an XOR operation) is performed to obtain the erroneous codewords to be tested. Finally, the number of codeword groups N to be tested is determined based on the expected uncorrected bit error rate (UBER), calculated as: N = UBER × total number of codeword bits × code rate. Here, the total number of codeword bits refers to the number of bits contained in a single LDPC codeword, and the code rate is the ratio of the number of information bits to the total number of codeword bits.

[0069] In one embodiment, to further increase the reliability and statistical significance of the test, the number of test codewords can be expanded from N groups to more groups, such as 2N groups.

[0070] S402. Input N sets of codewords to be tested into the LDPC error level test platform for decoding test.

[0071] It should be noted that the LDPC error plane test platform is an FPGA-specific platform for testing the error correction performance of LDPC decoding. It can simulate decoding behavior under high signal-to-noise ratio environments and output statistical results of decoding success / failure.

[0072] As a feasible implementation, the generated N sets (or more sets, such as 2N sets) of codewords to be tested are input into the LDPC error flat test platform for the first decoding test.

[0073] S403. Filter out uncorrectable codewords from the decoding test results.

[0074] It should be noted that uncorrectable codewords refer to codewords that the LDPC decoder cannot successfully decode within a specified maximum number of iterations.

[0075] As a feasible implementation method, the decoding results of each of the N sets of codewords to be tested can be statistically analyzed. Codewords that fail to decode (i.e., codewords whose check equations are still not satisfied after the maximum number of iterations) are marked as "uncorrectable codewords," and the error patterns (i.e., the positional distribution of error bits) of these uncorrectable codewords are recorded. Codewords that are successfully decoded are discarded and do not enter the subsequent screening process. For example, assuming that 5 out of 20 sets of test codewords fail to decode, these 5 sets of codewords are marked as uncorrectable codewords.

[0076] S404. Input the uncorrectable codeword into the LDPC error level test platform for re-decoding test, and set the oscillation correction judgment condition based on the result of the re-decoding test.

[0077] It should be noted that the LDPC error plane test platform can directly observe the state of each iteration of LDPC decoding, such as the number of iterations, the number of error bits after each iteration, the number of error parity check equations, etc., so as to record the state information in detail during each iteration process and extract the characteristics of oscillatory correctable codewords.

[0078] As a feasible implementation method, the oscillation correction determination conditions obtained during the testing phase can be permanently embedded into the LDPC decoder in one go.

[0079] In one embodiment, uncorrectable codewords are input into an LDPC error-level test platform for re-decoding testing, and oscillation correctability determination conditions are set based on the results of the re-decoding test. This includes: inputting uncorrectable codewords into an LDPC error-level test platform for decoding testing, and observing the state information of each iteration. The state information includes at least one or more of the following: the number of iterations, the number of error bits after each iteration, and the number of error parity check equations; based on the state information, codewords with oscillation characteristics and correctability characteristics are identified, and the conditions set for the state information used for identification are used as oscillation correctability determination conditions.

[0080] As a feasible implementation, for each uncorrectable codeword, the LDPC error leveling test platform can output its complete iteration status log and identify it according to the following rules: (1) Oscillation characteristic identification: Observe the change in the position of the error bit in adjacent iterations. If the position of the error bit changes and then recovers in M ​​consecutive iterations (e.g., M=5), forming a cyclic oscillation pattern, then the codeword is identified as having oscillation characteristics. The specific judgment threshold can be set according to experience. For example, when the number of error bit flips in adjacent iterations is ≥3 times and lasts for more than 3 rounds, it is judged as oscillation.

[0081] (2) Correctable characteristic indicator: can be set by observing the number of error parity check equations. If the number of error parity check equations remains stable at a low level during the iteration process (e.g., does not exceed the preset threshold T=8), then the codeword has correctable characteristics.

[0082] When an uncorrectable codeword is simultaneously identified as having both oscillatory and correctable properties, it is marked as an oscillatory correctable codeword. Record the specific state information thresholds used to identify the codeword (e.g., iteration count ≥ 15, number of error parity check equations ≤ 8, number of adjacent iteration error bit flips ≥ 3), and use the combination of these thresholds as the oscillatory correctability determination criteria.

[0083] For example, suppose we re-decode five uncorrectable codewords, two of which exhibit oscillatory and correctable characteristics. Their common features are: after 15 iterations, the number of error parity check equations is always ≤8, and the number of adjacent iteration error bit flips is ≥3. Then the judgment condition is set as: iteration count ≥15, number of error parity check equations ≤8, and number of adjacent iteration error bit flips ≥3.

[0084] S405. After completing one round of iterative decoding of the current codeword of the LDPC code, determine whether the current codeword is in an oscillation-correctable state according to the preset oscillation-correctable judgment condition.

[0085] S406. When it is determined that the current codeword is in an oscillating and correctable state, the preset parameters in the iterative decoding process are weighted and offset.

[0086] S407. After the adjustment is completed, continue to perform the next round of iterative decoding on the current codeword until the current codeword is successfully decoded.

[0087] S408. Obtain the next codeword and repeat steps S405-S407 above until all codewords in the oscillation-correctable state are successfully decoded.

[0088] The specific implementation methods of steps S405-S408 are the same as those of S101-S104, and will not be repeated here.

[0089] pass Figure 4 The LDPC code error correction method shown first extracts the oscillation-correctable judgment condition through extensive codeword testing and internal state observation during the testing phase. Then, in the actual decoding phase, this condition is used for real-time identification and parameter adjustment, forming a complete technical closed loop from condition setting to practical application. The judgment condition obtained in the testing phase can be permanently embedded into the decoder for use in all subsequent decoding operations, eliminating the need for repeated testing before each decoding. This significantly reduces the real-time computational overhead and hardware resource consumption during online decoding, further improving decoding throughput.

[0090] The method of this application has been described above; the apparatus of this application will be described below.

[0091] Please refer to the following: Figure 5This is a schematic diagram of the structure of an LDPC code error correction device provided in an embodiment of this application, which can be applied to electronic devices, such as... Figure 5 The LDPC code error correction device 50 includes: The identification module 501 is used to determine whether the current codeword is in an oscillation-correctable state after completing one round of iterative decoding of the current codeword of the LDPC code, based on a preset oscillation-correctable determination condition.

[0092] The adjustment module 502 is used to perform weighted and offset adjustments on the preset parameters in the iterative decoding process when it is determined that the current codeword is in an oscillation-correctable state.

[0093] The execution module 503 is used to continue to perform the next round of iterative decoding on the current codeword after the adjustment is completed, until the current codeword is successfully decoded; and to obtain the next codeword, repeat the above steps, until all codewords in the oscillation correctable state are successfully decoded.

[0094] In one possible design, the device also includes: a setting module ( Figure 5 (Not shown) is used to obtain the original bit error rate based on the channel signal-to-noise ratio, and generate N sets of LDPC test codewords based on the original bit error rate and the expected uncorrected bit error rate; input the N sets of test codewords into the LDPC error level test platform for decoding test; filter out uncorrectable codewords from the decoding test results; input the uncorrectable codewords into the LDPC error level test platform for re-decoding test, and set the oscillation correctability judgment condition based on the result of the re-decoding test.

[0095] In one possible design, a module is configured to input uncorrectable codewords into an LDPC error-level test platform for re-decoding testing, and to set oscillation correctability determination conditions based on the results of the re-decoding test. Specifically, this module is used to: input uncorrectable codewords into the LDPC error-level test platform for decoding testing, and observe the state information of each iteration. The state information includes at least one or more of the following: the number of iterations, the number of error bits after each iteration, and the number of error parity check equations; based on the state information, codewords with oscillatory and correctable characteristics are identified, and the conditions used to identify the state information are set as oscillation correctability determination conditions.

[0096] In one possible design, the preset parameters include: channel information, and any one or more of the messages transmitted from the check node to the variable node.

[0097] In one possible design, the adjustment module 502 is used to adjust the weighted and offset values ​​of the preset parameters in the iterative decoding process when it is determined that the current codeword is in an oscillation-correctable state. Specifically, it is used to adjust the weighted and offset values ​​of the preset parameters in the iterative decoding process by adopting a tiered dynamic adjustment strategy when it is determined that the current codeword is in an oscillation-correctable state.

[0098] In one possible design, the adjustment module 502 is used to adjust the weighted values ​​and offset values ​​of the preset parameters in the iterative decoding process using a graded dynamic adjustment strategy when the current codeword is determined to be in an oscillatory correctable state. Specifically, it is used to: adjust the preset parameters in the iterative decoding process using the first-grade dynamic adjustment strategy when the current codeword is determined to be in an oscillatory correctable state, and observe the iterative state after adjustment; when the iterative state shows any of the following situations, switch to the second-grade dynamic adjustment strategy: the number of error parity check equations decreases, or the number of error bits decreases, or the decoding process enters the iterative convergence state.

[0099] In one possible design, the execution module 503 is specifically used for: after the current codeword is successfully decoded, continuing to acquire the next codeword; determining whether the next codeword is in an oscillation-correctable state according to a preset oscillation-correctable determination condition; if so, adjusting the preset parameters of the next codeword by weighting and offsetting according to the preset parameters corresponding to the adjusted codeword, and continuing to perform iterative decoding on the next codeword until the next codeword is successfully decoded; repeating the above acquisition and adjustment steps until all codewords in an oscillation-correctable state are successfully decoded.

[0100] The aforementioned device can identify the oscillation-correctable state of the codeword in real time during the iterative decoding process, and adjust the preset parameters accordingly with weighting and offsetting to guide the decoding process towards iterative convergence, significantly improving the decoding success rate and greatly reducing the error level. Furthermore, since the entire process is completed during the current decoding process, there is no need to wait for a decoding failure to restart the post-processing flow, resulting in short processing time, high bandwidth performance, and low hardware resource consumption.

[0101] See Figure 6 , Figure 6 This is a schematic diagram of another electronic device provided in an embodiment of this application. The electronic device includes a processor 601 and a memory 602. The memory 602 is connected to the processor 601, for example, via a bus. Processor 601 is configured to support the smart terminal 60 in performing the corresponding functions in the methods described in the above method embodiments. Processor 601 may be a central processing unit (CPU), a network processor (NP), a hardware chip, or any combination thereof. The aforementioned hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The aforementioned PLD may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof.

[0102] Memory 602 is used to store program code, etc. Memory 602 may include NAND flash memory. In some embodiments, it may also include volatile memory (VM), such as random access memory (RAM), and non-volatile memory (NVM) such as read-only memory (ROM), hard disk drive (HDD), or solid-state drive (SSD). Memory 602 may also include combinations of the above types of memory.

[0103] As a feasible implementation method, Figure 6 The electronic device shown only illustrates the necessary components for performing the methods of this application. In some embodiments, the electronic device may include... Figure 1 All the structures shown will not be described in detail here.

[0104] This application also provides a computer-readable storage medium storing a computer program, the computer program including program instructions, which, when executed by a computer, cause the computer to perform the method as described in the foregoing embodiments.

[0105] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc.

[0106] The above-disclosed embodiments are merely preferred embodiments of this application and should not be construed as limiting the scope of this application. Therefore, any equivalent variations made in accordance with the claims of this application shall still fall within the scope of this application.

Claims

1. An LDPC code error correction method, characterized in that, The method includes: After completing one round of iterative decoding of the current codeword of the LDPC code, it is determined whether the current codeword is in an oscillation-correctable state according to the preset oscillation-correctable determination condition; When it is determined that the current codeword is in the oscillation correctable state, the preset parameters in the iterative decoding process are weighted and offset. After the adjustment is completed, continue to perform the next round of iterative decoding on the current codeword until the current codeword is successfully decoded; Obtain the next codeword and repeat the above steps until all codewords in the oscillation-correctable state have been successfully decoded.

2. The method according to claim 1, characterized in that, The method further includes: The original bit error rate is obtained based on the channel signal-to-noise ratio, and N sets of LDPC codewords to be tested are generated based on the original bit error rate and the expected uncorrected bit error rate. The N sets of codewords to be tested are input into the LDPC error level test platform for decoding test; Filter out uncorrectable characters from the decoding test results; The uncorrectable codeword is input into the LDPC error plane test platform for re-decoding test, and the oscillation correctability determination condition is set according to the result of the re-decoding test.

3. The method as described in claim 2, characterized in that, The step of inputting the uncorrectable codeword into the LDPC error plane test platform for re-decoding test, and setting oscillation correctability determination conditions based on the results of the re-decoding test, includes: The uncorrectable codeword is input into the LDPC error plane test platform for decoding test, and the state information of each iteration is observed. The state information includes at least one or more of the following: the number of iterations, the number of error bits after each iteration, and the number of error parity check equations. Based on the state information, codewords with oscillation characteristics and correctability characteristics are identified, and the conditions for identifying the state information used are set as the oscillation correctability determination conditions.

4. The method according to any one of claims 1-3, characterized in that, The preset parameters include any one or more of the following: channel information and the transmission message from the verification node to the variable node.

5. The method according to claim 1, characterized in that, When it is determined that the current codeword is in an oscillation-correctable state, the preset parameters in the iterative decoding process are weighted and offset, including: When it is determined that the current codeword is in an oscillation-correctable state, a tiered dynamic adjustment strategy is adopted to adjust the weighting and offset values ​​of the preset parameters in the iterative decoding process.

6. The method according to claim 5, characterized in that, When it is determined that the current codeword is in an oscillation-correctable state, a tiered dynamic adjustment strategy is used to adjust the weighting and offset values ​​of preset parameters during the iterative decoding process, including: When it is determined that the current codeword is in an oscillation-correctable state, the first-level dynamic adjustment strategy is used to adjust the preset parameters in the iterative decoding process, and the iterative state after adjustment is observed. When any of the following conditions occur in the iterative state, switch to the second dynamic adjustment strategy: the number of error parity check equations decreases, or the number of error bits decreases, or the decoding process enters the iterative convergence state.

7. The method according to claim 1, characterized in that, The process of obtaining the next codeword and repeating the above steps until all codewords in the oscillation-correctable state are successfully decoded includes: After the current codeword is successfully decoded, continue to obtain the next codeword; Determine whether the next codeword is in an oscillation-correctable state based on the preset oscillation-correctable determination condition; If so, then according to the preset parameters corresponding to the adjusted codeword, the preset parameters of the next codeword are weighted and offset, and iterative decoding is continued for the next codeword until the next codeword is successfully decoded; Repeat the above acquisition and adjustment steps until all codewords in the oscillation-correctable state are successfully decoded.

8. An LDPC code error correction device, characterized in that, Applied to electronic devices, the device includes: The identification module is used to determine whether the current codeword is in an oscillation-correctable state after completing one round of iterative decoding of the current codeword of the LDPC code, based on a preset oscillation-correctable determination condition. An adjustment module is used to perform weighted and offset adjustments on preset parameters in the iterative decoding process when it is determined that the current codeword is in the oscillation correctable state; The execution module is used to continue to perform the next round of iterative decoding on the current codeword after the adjustment is completed, until the current codeword is successfully decoded and the next codeword is obtained. The above steps are repeated until all codewords in the oscillation correctable state are successfully decoded.

9. An electronic device, characterized in that, It includes a processor, a memory, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, implements the method as claimed in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, It stores a computer program thereon, which, when executed by a processor, implements the method as described in any one of claims 1 to 7.

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