A method and apparatus for estimating symbol timing offset of a digital communication signal
By using finite innovation rate sampling and frequency domain truncation processing, combined with modulus summation, the accuracy problem of symbol timing deviation estimation in root raised cosine pulse shaping signals is solved, achieving high-precision symbol synchronization at low sampling rates, which is suitable for resource-constrained communication terminals and satellite payloads.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SCHOOL OF INFORMATION & COMM TECH NAT UNIV OF DEFENSE TECH OF THE CHINESE PEOPLES LIBERATION ARMY
- Filing Date
- 2025-08-05
- Publication Date
- 2026-08-04
AI Technical Summary
In existing technologies for MPSK/MQAM signals with root-raised cosine pulse shaping, symbol timing synchronization requires an oversampling rate of not less than 2, which results in the inability to accurately extract symbol information and effectively estimate symbol timing deviation at low sampling rates.
By sampling at a finite innovation rate, performing sinc interpolation upsampling and discrete Fourier transform, combined with truncation of the frequency domain sequence and magnitude summation, high-precision symbol timing bias estimation is achieved, applicable to cases where the oversampling rate is greater than or less than 1.
Achieving high-precision symbol timing bias estimation at low sampling rates reduces algorithm complexity, making it suitable for resource-constrained communication terminals and satellite payloads, and reducing data transmission volume and storage requirements.
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Figure CN122513232A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of digital communication technology, and more specifically, to a method and apparatus for estimating timing deviation of digital communication signal symbols. Background Technology
[0002] This invention relates to the field of electronic countermeasures reconnaissance of communication signals, and specifically to a method for estimating symbol timing bias of typical root-raised cosine pulse-shaped digital communication signals with finite innovation rate sampling.
[0003] In the typical signal reception and processing of root-raised cosine pulse shaping (RBCM) communication systems, symbol timing synchronization is crucial. It is essential to ensure that each sampling decision is made at the optimal decision time to avoid inter-symbol interference and extract symbol information with the lowest possible bit error rate.
[0004] Currently, MPSK / MQAM signals, such as those shaped by root-raised cosine pulses, require sampling at a rate that satisfies the Nyquist sampling theorem. The signal is then filtered again by the shaping pulse and a specific method is used for symbol timing synchronization. This involves sampling and decision-making at times free from intersymbol interference (ISI) to extract symbol information. To achieve good results, the oversampling rate (the ratio of the receiver's sampling rate to the symbol rate) is generally required to be no less than 2, and ideally no less than 1. When the sampling rate is lower than the symbol rate, spectral aliasing occurs, making it impossible to accurately extract symbol information and thus hindering effective symbol timing deviation estimation. Summary of the Invention
[0005] This invention provides a method for estimating the timing deviation of digital communication signals. Addressing the shortcomings of existing technologies, this method involves sampling at a finite innovation rate, then performing specific interval retention and zeroing operations on the frequency domain sequence after discrete Fourier transform. Furthermore, it involves sampling points at equal intervals from the discrete sequence after two frequency domain transforms and calculating the sum of the magnitudes. Utilizing this monotonic correspondence, a high-precision timing deviation estimate can be obtained through a simple search, achieving effective estimation of the symbol timing deviation even when the oversampling rate is greater than or less than 1.
[0006] This invention provides a method for estimating timing deviation of digital communication signal symbols, comprising: Step 1: Perform finite innovation rate sampling on the received baseband signal to obtain a sampling sequence; Step 2: Perform sinc interpolation upsampling on the sampled sequence to obtain the upsampled sequence; Step 3: Perform a discrete Fourier transform on the upsampled sequence to obtain a frequency domain sequence; Step 4: Perform truncation on the frequency domain sequence, retaining the values within the preset interval and setting the remaining values to zero to obtain the truncated frequency domain sequence; Step 5: Obtain the quotient of the truncated frequency domain sequence and the frequency domain representation of the root raised cosine pulse to obtain the quotient sequence; Step 6: Perform a discrete Fourier transform on the quotient sequence to obtain a discrete sequence after two frequency domain transforms; Step 7: The discrete sequence after the two frequency domain transformations... Starting from each sampling point, every... Extract a value from each sample point, calculate the sum of the moduli of the extracted values, and iterate through the samples. All within the range To determine the optimal starting point that maximizes the sum of the moduli; Step 8: Calculate the symbol timing deviation estimate based on the optimal starting point, thereby achieving an accurate estimate of the symbol timing deviation of the root-raised cosine pulse-shaped digital communication signal.
[0007] Furthermore, the step of performing finite innovation rate sampling on the received baseband signal to obtain a sampling sequence includes: The received baseband signal is first filtered with a low-pass filter of a preset bandwidth, and then the filtered signal is sampled at a preset sampling interval to obtain a sampling sequence.
[0008] Furthermore, the preset bandwidth is specifically... ;in, This is the bandwidth of the low-pass filter. The root-raised cosine pulse roll-off factor, The symbol period.
[0009] Furthermore, the step of truncating the frequency domain sequence, retaining values within a preset interval and setting the remainder to zero, to obtain the truncated frequency domain sequence includes: The truncation width J is determined based on the number of symbols contained in the received signal. The first J values and the last J values of the frequency domain sequence are retained, and the remaining values are set to zero to obtain the truncated frequency domain sequence. The truncation width J ensures that the discrete sequence obtained after two frequency domain transformations of the quotient sequence obtained in step 5 appears at equal intervals on the discrete time axis, with samples determined only by the current symbol and free from inter-symbol interference. The interval of the samples free from inter-symbol interference corresponds to the extraction interval N in step 7, so as to realize symbol timing deviation estimation.
[0010] Furthermore, the truncation width J is equal to half the number of corresponding symbols.
[0011] Furthermore, before performing truncation on the frequency domain sequence, retaining values within a preset interval and setting the remainder to zero to obtain the truncated frequency domain sequence, the process further includes: Spectral peak detection is performed on the frequency domain sequence to estimate the frequency shift, and the center frequency of the truncation window is dynamically shifted according to the frequency shift to maintain truncation accuracy in scenarios with Doppler frequency shift.
[0012] Furthermore, after calculating the symbol timing deviation estimate based on the optimal starting point, the method further includes: The received signal is compensated using the estimated symbol timing deviation and the frequency offset, and steps 1 to 8 are repeated at least once to iteratively improve the symbol timing deviation estimation accuracy.
[0013] The present invention also provides a digital communication signal symbol timing deviation estimation device, comprising: The sampling module is used to sample the received baseband signal at a finite innovation rate to obtain a sampling sequence; The interpolation module is used to perform sinc interpolation upsampling on the sampled sequence to obtain an upsampled sequence; The first processing module is used to perform a discrete Fourier transform on the upsampled sequence to obtain a frequency domain sequence; The truncation module is used to perform truncation processing on the frequency domain sequence, retaining the values within a preset interval and setting the remaining values to zero, to obtain the truncated frequency domain sequence. The quotient module is used to obtain the quotient of the truncated frequency domain sequence and the frequency domain representation of the root raised cosine pulse, thus obtaining the quotient sequence; The second processing module is used to perform a discrete Fourier transform on the quotient sequence to obtain a discrete sequence after two frequency domain transformations. The third processing module is used for the discrete sequence after the two frequency domain transformations. Starting from each sampling point, every... Extract a value from each sample point, calculate the sum of the moduli of the extracted values, and iterate through the samples. All within the range To determine the optimal starting point that maximizes the sum of the moduli; The deviation estimation module is used to calculate the symbol timing deviation estimate based on the optimal starting point, thereby achieving an accurate estimation of the symbol timing deviation of the root-raised cosine pulse-shaped digital communication signal. The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the digital communication signal symbol timing deviation estimation method as described above.
[0014] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the digital communication signal symbol timing deviation estimation method as described above.
[0015] In summary, compared with the prior art, the above-described technical solutions conceived by this invention can achieve the following beneficial effects: The digital communication signal symbol timing deviation estimation method of the present invention has the following beneficial technical effects: This invention generates periodic peak points free of inter-symbol interference (ISI) in the time domain through frequency domain truncation and equal-interval modulus summation, eliminating the need for complex iterations or high-order statistical calculations in the estimation process. Simultaneously, sinc interpolation upsampling ensures distortion-free reconstruction of band-limited signals, guaranteeing complete preservation of spectral information at low sampling rates. This enables high-precision, low-power symbol synchronization in resource-constrained scenarios such as satellites and IoT terminals. By performing specific interval retention and zeroing operations on the frequency domain sequence after discrete Fourier transform, periodic, ISI-free reference points are generated in subsequent processing. These reference points only carry the current symbol information, eliminating interference from adjacent symbols and providing a clean and reliable processing object for subsequent timing estimation. By equally interval sampling points and summing the moduli in the discrete sequence after two frequency domain transforms, the sum reaches its maximum when the sampling interval aligns with the true timing deviation. Utilizing this monotonic correspondence, a high-precision timing deviation estimate can be obtained through a simple search, eliminating the need for complex iterations or high-order calculations and significantly reducing algorithm complexity. Therefore, this invention can still achieve timing deviation estimation accuracy comparable to or even better than traditional high sampling rate schemes, thereby relaxing the front-end ADC specifications, reducing data transmission volume and storage requirements, and can be directly deployed in resource-constrained communication terminals or satellite payloads and other occasions that are sensitive to power consumption and size. Attached Figure Description
[0016] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0017] Figure 1 A flowchart illustrating an optional digital communication signal symbol timing deviation estimation method provided in this application embodiment; Figure 2 A flowchart illustrating an optional finite innovation rate sampling method provided in this application embodiment; Figure 3 A schematic diagram illustrating the mean square error of timing bias estimation under optional oversampling rates provided in an embodiment of this application; Figure 4 This is a schematic diagram of an optional electronic device provided in an embodiment of this application. Detailed Implementation
[0018] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Furthermore, the technical features involved in the various embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.
[0019] The terms "first," "second," "third," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.
[0020] Hereinafter, exemplary embodiments according to this application will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are merely some embodiments of this application, and not all embodiments of this application. It should be understood that this application is not limited to the exemplary embodiments described herein.
[0021] Figure 1 The illustration shows a flowchart of an optional digital communication signal symbol timing deviation estimation method according to an embodiment of this application; as shown. Figure 1 As shown, the digital communication signal symbol timing deviation estimation method according to an embodiment of this application includes: Step 1: Perform finite innovation rate sampling on the received baseband signal to obtain a sampling sequence; Step 2: Perform sinc interpolation upsampling on the sampled sequence to obtain the upsampled sequence; Step 3: Perform a discrete Fourier transform on the upsampled sequence to obtain a frequency domain sequence; Step 4: Perform truncation on the frequency domain sequence, retaining the values within the preset interval and setting the remaining values to zero to obtain the truncated frequency domain sequence; Step 5: Obtain the quotient of the truncated frequency domain sequence and the frequency domain representation of the root raised cosine pulse to obtain the quotient sequence; Step 6: Perform a discrete Fourier transform on the quotient sequence to obtain a discrete sequence after two frequency domain transforms (one each in steps 3 and 6); Step 7: The discrete sequence after the two frequency domain transformations... Starting from each sampling point, every... Extract a value from each sample point, calculate the sum of the moduli of the extracted values, and iterate through the samples. All within the range To determine the optimal starting point that maximizes the sum of the moduli; Step 8: Calculate the symbol timing deviation estimate based on the optimal starting point, thereby achieving an accurate estimate of the symbol timing deviation of the root-raised cosine pulse-shaped digital communication signal.
[0022] In a receiver, the first parameter to set is the number of symbols. The expected number of sampling points per symbol period Signal sampling rate ; Known signal and parameters: signal carrier frequency Symbol period Roll-off factor and its corresponding root-raised cosine pulse signal low-pass filter and its bandwidth Total number of signal points Sampling interval after upsampling ; Received signal: .
[0023] Regarding step 1: Figure 2 The illustration shows a flowchart of an optional finite innovation rate (FRI) sampling method according to an embodiment of this application. Figure 2 The structure shown is sampled using finite innovation rate (FRI) sampling to obtain the sampled sequence. The signal after carrier synchronization and down-conversion is: The anti-aliasing low-pass filter is Its bandwidth satisfies: ,and The signal after sampling is . and They can be represented as: (1) (2) in, , , , The timing deviation to be estimated, and , .
[0024] Regarding step 2: sampling sequence Upsampling is performed using sinc interpolation to obtain the upsampled sequence. ,For example: (3) The upsampling factor is , ; Regarding step 3: Calculating the upsampled sequence Root-raised cosine pulse signal The discrete Fourier transform sequence is used to obtain the frequency domain sequence. : (4) (5) in, ; Regarding step 4: For the frequency domain sequence Perform truncation, retaining values within a preset interval and setting the remainder to zero to obtain the truncated frequency domain sequence. ; right Perform truncation, for example: (6) in: (7) Regarding step 5: Obtaining the truncated frequency domain sequence The quotient of the frequency domain representation of the root raised cosine pulse , to obtain the quotient sequence ,right Perform a division operation: (8) Regarding step 6: Perform a discrete Fourier transform on the quotient sequence to obtain a discrete sequence after two frequency domain transforms (one each in steps 3 and 6). : (9) Regarding step 7: the discrete sequence after the two frequency domain transformations... Starting from each sampling point, every... Extract a value from each sample point, calculate the sum of the moduli of the extracted values, and iterate through the samples. All within the range To determine the optimal starting point that maximizes the sum of the moduli; Regarding step 8: Calculate the symbol timing deviation estimate based on the optimal starting point, thereby achieving an accurate estimate of the symbol timing deviation for root-raised cosine pulse-shaped digital communication signals.
[0025] Complete timing deviation estimation, for example: (10) (11) It is worth noting that in steps 3 and 4, first... Truncation Divide by If the obtained Performing the spectrum calculation again, the discrete-time Fourier transform within its principal value interval is: (13) in, , .when hour, .
[0026] Therefore, when At that time, there were: (14) The above formula only applies to There are sometimes non-zero values. That is, through the truncation in step 4, it is possible to make... The discrete-time Fourier transform has an interval of Multiple equally spaced points The values at these points are determined solely by the symbol information. The decision is made based on the information values transmitted on other symbols. It is irrelevant, meaning there is no "inter-symbol interference".
[0027] Furthermore, regarding the result obtained in step 4 Discrete-time Fourier Transform ,when When it is large enough, press it. To sum the modulo values of multiple equally spaced points, we have: (15) That is, only when the offset values are taken at equal intervals Only when the time is right can the maximum value be reached. Based on this criterion, the timing deviation can be controlled through step 6. The estimate.
[0028] In a preferred embodiment, the received intermediate frequency signal containing 64 symbols is first digitally down-converted to obtain a baseband signal s(t). This baseband signal is then input into a low-pass FIR filter with a bandwidth of B = 0.8 * 2π / T. After filtering, the signal is sampled using a sampling clock Ts = 1.25T to obtain a sampling sequence r[n]. This sampling rate is lower than the symbol rate, resulting in an under-Nyquist scenario with an oversampling rate Q = 0.8. The sampling sequence r[n] is then upsampled using sinc interpolation to obtain... r_up[n] is then transformed into a frequency domain sequence R(k) by calling an 8192-point FFT kernel. R(k) is truncated: only 2k = 64 complex values, k = 0-31 and k = 8160-8191, are retained, and the rest are cleared to generate Rt(k). Rt(k) is divided element-wise with the previously stored root raised cosine pulse frequency domain coefficients P(k) to obtain the quotient sequence Y(k). Then, an 8192-point FFT is performed on Y(k) to obtain the discrete sequence y[n] after two frequency domain transformations. Starting from N0 = 0 in y[n], a complex value is taken every N = 128 points. After taking 4 consecutive values and calculating the modulus, S(0) is obtained. The sequence is then traversed by sliding N0 = 0...127 to find N0max = 37, which maximizes S(N0). The estimated timing deviation τ = 0.703T is calculated using the formula τ = N-1 - N0max / N·T, thus enabling symbol synchronization to be completed even without satisfying the Nyquist sampling condition.
[0029] In a preferred embodiment, the digital communication signal symbol timing deviation estimation method of this embodiment, which involves sampling the received baseband signal at a finite innovation rate to obtain a sampling sequence, includes: first filtering the received baseband signal with a low-pass filter of a preset bandwidth, and then sampling the filtered signal at a preset sampling interval to obtain a sampling sequence.
[0030] Specifically, the received intermediate frequency signal containing 64 symbols is digitally down-converted to obtain a baseband signal s(t). Then, the baseband signal is input into a low-pass FIR filter with a bandwidth of B = 0.8 * 2π / T. After filtering, the sampled signal is sampled using a sampling clock of Ts = 1.25T to obtain a sampling sequence r[n]. This sampling rate is lower than the symbol rate, forming an under-Nyquist scenario with an oversampling rate of Q = 0.8.
[0031] In a preferred embodiment, the preset bandwidth in the digital communication signal symbol timing deviation estimation method of this embodiment is specifically: ;in, This is the bandwidth of the low-pass filter. The root-raised cosine pulse roll-off factor, The symbol period is the sampling interval, which is limited by the bandwidth of the low-pass filter and must satisfy Ts <= 2π / B. Depending on the value of B, the sampling interval can be greater than the symbol period, which corresponds to the case where the oversampling rate is less than 1, or it can be less than the symbol period, which corresponds to the case where the oversampling rate is greater than 1.
[0032] In a preferred embodiment, the digital communication signal symbol timing deviation estimation method of this embodiment, which involves truncating the frequency domain sequence, retaining values within a preset interval and setting the remaining values to zero, to obtain a truncated frequency domain sequence, includes: The truncation width J is determined based on the number of symbols contained in the received signal. The first J values and the last J values of the frequency domain sequence are retained, and the remaining values are set to zero to obtain the truncated frequency domain sequence. The truncation width J ensures that the discrete sequence obtained after two frequency domain transformations of the quotient sequence obtained in step 5 appears at equal intervals on the discrete time axis, with samples determined only by the current symbol and free from inter-symbol interference. The interval of the samples free from inter-symbol interference corresponds to the extraction interval N in step 7, so as to realize symbol timing deviation estimation.
[0033] Specifically, the sampled sequence r[n] is upsampled using sinc interpolation to obtain... r_up[n] is then transformed into a frequency domain sequence R(k) by calling an 8192-point FFT kernel; R(k) is truncated: only 2k = 64 complex values, k = 0-31 and k = 8160-8191, are retained, and the rest are cleared to generate R_t(k).
[0034] In a preferred embodiment, the truncation width J in the digital communication signal symbol timing deviation estimation method of this embodiment is equal to half the number of corresponding symbols. It is worth noting that the truncation bandwidth does not need to guarantee the effective bandwidth of the root-raised cosine pulse after truncation, but must be equal to half the number of symbols. In this way, even if there is no effective bandwidth for symbols in the end, there can still be no inter-symbol interference points.
[0035] In a preferred embodiment, the digital communication signal symbol timing deviation estimation method of this embodiment further includes, before performing truncation processing on the frequency domain sequence, retaining values within a preset interval and setting the remainder to zero, to obtain the truncated frequency domain sequence: Spectral peak detection is performed on the frequency domain sequence to estimate the frequency shift, and the center frequency of the truncation window is dynamically shifted according to the frequency shift to maintain truncation accuracy in scenarios with Doppler frequency shift.
[0036] Specifically, before truncation, the spectral peak detection is performed on the 8192-point frequency domain sequence R(k): the peak is found in |R(k)| using the three-point parabolic interpolation method, and the frequency offset is measured. ;Then the center of the cutoff window was shifted from the DC position to At the corresponding bin location, the reserved interval is adjusted to and ,in, For FFT points, To truncate the width, the truncation window is always aligned with the main lobe of the signal in scenarios with Doppler frequency shift.
[0037] In a preferred embodiment, after calculating the estimated symbol timing deviation value based on the optimal starting point, the digital communication signal symbol timing deviation estimation method of this embodiment further includes: The received signal is compensated using the estimated symbol timing deviation and the frequency offset, and steps 1 to 8 are repeated at least once to iteratively improve the symbol timing deviation estimation accuracy.
[0038] Specifically, after executing steps 1-8 for the first time, the result is... =0.703T and (Assuming the frequency offset is) The received signal r(t) is processed using a numerically controlled oscillator (NCO). Frequency offset compensation, and interpolation filter used for - Timing offset compensation is performed to generate the compensated signal r'(t); then steps 1-8 are executed again to obtain... and After two iterations, the mean square error of timing bias estimation is significantly reduced, meeting the requirements for high-precision demodulation.
[0039] In summary, the present invention has the following technical advantages compared to the prior art: First, according to the received signal Figure 2 The structure shown performs finite innovation rate sampling, that is, it first passes through a low-pass filter lower than the signal bandwidth before sampling, so that sampling at a sampling rate lower than the signal symbol rate will not cause spectral aliasing, and also makes timing deviation estimation under under-Nyquist sampling conditions possible. Second, in step 4, based on the number of symbols in the received signal... Filter by truncation Middle and front Point and last One point retains its original value, while the values of all other points are set to zero. This truncation operation and the truncation width... This results in the spectrum obtained by recalculating the discrete time series after division in step 4 having equally spaced points without inter-symbol interference, which is the key to achieving timing deviation estimation. Third, in step 6, from the discrete spectrum sequence The indivual( Starting from point ), multiple discrete spectrum sequence point values are taken at equal intervals, and the magnitude values are summed. The symbol timing deviation is estimated by using the k value corresponding to the maximum magnitude value. This is the direct estimation step of this invention.
[0040] also, Figure 3 The illustration shows a schematic diagram of the mean square error of timing bias estimation under optional different oversampling rates according to an embodiment of this application, such as... Figure 3As shown, for various cases where the signal oversampling rate Q is less than 1 and greater than 1, Monte Carlo simulations were performed using 200 symbol periods to obtain the mean square error of timing deviation estimation under different bit signal-to-noise ratios. As the signal-to-noise ratio increases, better estimation accuracy can be obtained.
[0041] According to another aspect of the embodiments of this application, a monitoring device for implementing the above-described digital communication signal symbol timing deviation estimation method is also provided, the device may include: The sampling module is used to sample the received baseband signal at a finite innovation rate to obtain a sampling sequence; The interpolation module is used to perform sinc interpolation upsampling on the sampled sequence to obtain an upsampled sequence; The first processing module is used to perform a discrete Fourier transform on the upsampled sequence to obtain a frequency domain sequence; The truncation module is used to perform truncation processing on the frequency domain sequence, retaining the values within a preset interval and setting the remaining values to zero, to obtain the truncated frequency domain sequence. The quotient module is used to obtain the quotient of the truncated frequency domain sequence and the frequency domain representation of the root raised cosine pulse, thus obtaining the quotient sequence; The second processing module is used to perform a discrete Fourier transform on the quotient sequence to obtain a discrete sequence after two frequency domain transformations. The third processing module is used for the discrete sequence after the two frequency domain transformations. Starting from each sampling point, every... Extract a value from each sample point, calculate the sum of the moduli of the extracted values, and iterate through the samples. All within the range To determine the optimal starting point that maximizes the sum of the moduli; The deviation estimation module is used to calculate the symbol timing deviation estimate based on the optimal starting point, thereby achieving an accurate estimation of the symbol timing deviation of the root-raised cosine pulse-shaped digital communication signal.
[0042] It should be noted that the digital communication signal symbol timing deviation estimation device provided in this embodiment of the invention can execute the digital communication signal symbol timing deviation estimation method described in any of the above embodiments during specific operation, and this embodiment will not elaborate on this.
[0043] Exemplary electronic devices Figure 4 This is a schematic diagram of an optional electronic target device according to an embodiment of this application, such as... Figure 4 As shown, it includes a processor 402, a communication interface 404, a memory 406, and a communication bus 408. The processor 402, communication interface 404, and memory 406 communicate with each other via the communication bus 408. Memory 406 is used to store computer programs; When processor 402 executes a computer program stored in memory 406, it performs the following steps: Step 1: Perform finite innovation rate sampling on the received baseband signal to obtain a sampling sequence; Step 2: Perform sinc interpolation upsampling on the sampled sequence to obtain the upsampled sequence; Step 3: Perform a discrete Fourier transform on the upsampled sequence to obtain a frequency domain sequence; Step 4: Perform truncation on the frequency domain sequence, retaining the values within the preset interval and setting the remaining values to zero to obtain the truncated frequency domain sequence; Step 5: Obtain the quotient of the truncated frequency domain sequence and the frequency domain representation of the root raised cosine pulse to obtain the quotient sequence; Step 6: Perform a discrete Fourier transform on the quotient sequence to obtain a discrete sequence after two frequency domain transforms (one each in steps 3 and 6); Step 7: The discrete sequence after the two frequency domain transformations... Starting from each sampling point, every... Extract a value from each sample point, calculate the sum of the moduli of the extracted values, and iterate through the samples. All within the range To determine the optimal starting point that maximizes the sum of the moduli; Step 8: Calculate the symbol timing deviation estimate based on the optimal starting point, thereby achieving an accurate estimate of the symbol timing deviation of the root-raised cosine pulse-shaped digital communication signal.
[0044] Optionally, the communication bus can be a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus, etc. This communication bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 4 The symbol is represented by a single thick line, but this does not indicate that there is only one bus or one type of bus. The communication interface is used for communication between the aforementioned electronic target device and other devices.
[0045] The memory may include RAM, or non-volatile memory, such as at least one disk storage device. Optionally, the memory may also be at least one storage target device located remotely from the aforementioned processor.
[0046] The processors mentioned above can be general-purpose processors, including but not limited to: CPU (Central Processing Unit), NP (Network Processor), etc.; they can also be DSP (Digital Signal Processor), ASIC (Application Specific Integrated Circuit), FPGA (Field-Programmable Gate Array), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.
[0047] Exemplary computer program products and computer-readable storage media In addition to the methods and apparatus described above, embodiments of this application may also be computer program products, which include computer program instructions that, when executed by a processor, cause the processor to perform the steps in the digital communication signal symbol timing deviation estimation methods according to various embodiments of this application as described in the "Exemplary Methods" section of this specification.
[0048] The computer program product can be written in any combination of one or more programming languages to perform the operations of the embodiments of this application. The programming languages include object-oriented programming languages such as Java and C++, as well as conventional procedural programming languages such as C or similar languages. The program code can be executed entirely on the user's computing device, partially on the user's computing device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.
[0049] Furthermore, embodiments of this application may also be computer-readable storage media storing computer program instructions that, when executed by a processor, cause the processor to perform the steps in the moving object tracking methods according to various embodiments of this application described in the "Exemplary Methods" section of this specification.
[0050] The computer-readable storage medium may be any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, target device, or device, or any combination thereof. More specific examples (a non-exhaustive list) of readable storage media include: an electrical connection having one or more wires, a portable disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof.
[0051] The basic principles of this application have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this application are merely examples and not limitations, and should not be considered as essential features of each embodiment of this application. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the application to the necessity of employing the aforementioned specific details for implementation.
[0052] The block diagrams of devices, target apparatuses, devices, and systems involved in this application are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, target apparatuses, devices, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms meaning “including but not limited to,” and are used interchangeably with them. The terms “or” and “and” as used herein refer to the terms “and / or,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.
[0053] It should also be noted that in the target apparatus, equipment, and method of this application, each component or step can be disassembled and / or recombined. These disassemblies and / or recombinations should be considered as equivalent solutions of this application.
[0054] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use this application. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to other aspects without departing from the scope of this application. Therefore, this application is not intended to be limited to the aspects shown herein, but rather to be accorded the widest scope consistent with the principles and novel features disclosed herein.
[0055] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this application to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations thereof.
Claims
1. A method for estimating timing deviation of digital communication signal symbols, characterized in that, include: Step 1: Perform finite innovation rate sampling on the received baseband signal to obtain a sampling sequence; Step 2: Perform sinc interpolation upsampling on the sampled sequence to obtain the upsampled sequence; Step 3: Perform a discrete Fourier transform on the upsampled sequence to obtain a frequency domain sequence; Step 4: Perform truncation on the frequency domain sequence, retaining the values within the preset interval and setting the remaining values to zero to obtain the truncated frequency domain sequence; Step 5: Obtain the quotient of the truncated frequency domain sequence and the frequency domain representation of the root raised cosine pulse to obtain the quotient sequence; Step 6: Perform a discrete Fourier transform on the quotient sequence to obtain a discrete sequence after two frequency domain transforms; Step 7: The discrete sequence after the two frequency domain transformations... Starting from each sampling point, every... Extract a value from each sample point, calculate the sum of the moduli of the extracted values, and iterate through the samples. All within the range To determine the optimal starting point that maximizes the sum of the moduli; Step 8: Calculate the symbol timing deviation estimate based on the optimal starting point, thereby achieving an accurate estimate of the symbol timing deviation of the root-raised cosine pulse-shaped digital communication signal.
2. The method of estimating symbol timing offset of a digital communication signal of claim 1 wherein, The step of sampling the received baseband signal at a finite innovation rate to obtain a sampling sequence includes: The received baseband signal is first filtered with a low-pass filter of a preset bandwidth, and then the filtered signal is sampled at a preset sampling interval to obtain a sampling sequence.
3. The digital communication signal symbol timing deviation estimation method as described in claim 2, characterized in that, The preset bandwidth is specifically ; wherein, is a bandwidth of a low-pass filter, is a root raised cosine pulse roll-off coefficient, is a symbol period.
4. The digital communication signal symbol timing deviation estimation method as described in claim 1, characterized in that, The step of truncating the frequency domain sequence, retaining values within a preset interval and setting the remainder to zero, to obtain the truncated frequency domain sequence includes: The truncation width J is determined based on the number of symbols contained in the received signal. The first J values and the last J values of the frequency domain sequence are retained, and the remaining values are set to zero to obtain the truncated frequency domain sequence. The truncation width J ensures that the discrete sequence obtained after two frequency domain transformations of the quotient sequence obtained in step 5 appears at equal intervals on the discrete time axis, with samples determined only by the current symbol and free from inter-symbol interference. The interval of the samples free from inter-symbol interference corresponds to the extraction interval N in step 7, so as to realize symbol timing deviation estimation.
5. The digital communication signal symbol timing deviation estimation method as described in claim 4, characterized in that, The truncation width J is equal to half the number of corresponding symbols.
6. The digital communication signal symbol timing deviation estimation method as described in claim 1, characterized in that, Before performing truncation on the frequency domain sequence, retaining values within a preset interval and setting the remainder to zero to obtain the truncated frequency domain sequence, the method further includes: Spectral peak detection is performed on the frequency domain sequence to estimate the frequency shift, and the center frequency of the truncation window is dynamically shifted according to the frequency shift to maintain truncation accuracy in scenarios with Doppler frequency shift.
7. The method for estimating symbol timing offset of a digital communication signal of claim 6, wherein, After calculating the symbol timing deviation estimate based on the optimal starting point, the method further includes: The received signal is compensated using the estimated symbol timing deviation and the frequency offset, and steps 1 to 8 are repeated at least once to iteratively improve the symbol timing deviation estimation accuracy.
8. A digital communication signal symbol timing offset estimation device, characterized by include: The sampling module is used to sample the received baseband signal at a finite innovation rate to obtain a sampling sequence; The interpolation module is used to perform sinc interpolation upsampling on the sampled sequence to obtain an upsampled sequence; The first processing module is used to perform a discrete Fourier transform on the upsampled sequence to obtain a frequency domain sequence; The truncation module is used to perform truncation processing on the frequency domain sequence, retaining the values within a preset interval and setting the remaining values to zero, to obtain the truncated frequency domain sequence. The quotient module is used to obtain the quotient of the truncated frequency domain sequence and the frequency domain representation of the root raised cosine pulse, thus obtaining the quotient sequence; The second processing module is used to perform a discrete Fourier transform on the quotient sequence to obtain a discrete sequence after two frequency domain transformations. The third processing module is used for the discrete sequence after the two frequency domain transformations. Starting from each sampling point, every... Extract a value from each sample point, calculate the sum of the moduli of the extracted values, and iterate through the samples. All within the range To determine the optimal starting point that maximizes the sum of the moduli; The deviation estimation module is used to calculate the symbol timing deviation estimate based on the optimal starting point, thereby achieving an accurate estimation of the symbol timing deviation of the root-raised cosine pulse-shaped digital communication signal.
9. An electronic device, comprising: processor; And a memory storing computer program instructions that, when executed by the processor, cause the processor to perform the digital communication signal symbol timing deviation estimation method as described in any one of claims 1-7.
10. A non-temporary computer-readable storage medium having stored thereon computer program instructions, which, when executed by a processor, cause the processor to perform the digital communication signal symbol timing deviation estimation method as described in any one of claims 1-7.