Aging test apparatus and aging test method

Abstract

The application discloses an aging test device and an aging test method, and relates to the technical field of electronics. The aging test device comprises an aging board used for placing at least one discrete device to be tested; and a test circuit connected to the aging board and used for switching to a contact test mode to contact test the discrete device to be tested or switching to an aging test mode to age test the discrete device to be tested. The contact test mode comprises a first contact test mode and a second contact test mode. The first contact test mode is used for contact testing the source and the drain of the discrete device to be tested, and the second contact test mode is used for contact testing the gate of the discrete device to be tested. Thus, the pin contact state of the discrete device to be tested is verified before the aging test, the contact test and the aging test are compatible, and the aging test efficiency and the test accuracy are improved.

Description

Technical Field

[0001] This application relates to the field of electronic technology, and in particular to an aging test device and an aging test method. Background Technology

[0002] Aging tests on semiconductor devices can screen out defective devices, improve their reliability, and thus ensure the field reliability of the products in which they are ultimately used. Currently, aging tests on semiconductor devices involve using aging test equipment to provide bias voltage to the discrete device under test, control the ambient temperature, and detect changes in key parameters to screen out individuals at risk of early failure.

[0003] In the process of semiconductor device aging testing, the aging test equipment has poor versatility and there is a common problem of inaccurate test results due to poor contact of device pins. Summary of the Invention

[0004] This application provides an aging test device and an aging test method, which are used to verify the pin contact status of the discrete device under test before aging test, and to achieve compatibility between contact test and aging test, thereby improving the efficiency and accuracy of aging test.

[0005] In a first aspect, this application provides an aging test apparatus, comprising: an aging board for placing at least one discrete device under test; and a test circuit connected to the aging board for switching to a contact test mode for contact testing of the discrete device under test, or switching to an aging test mode for aging testing of the discrete device under test; wherein the contact test mode includes a first contact test mode and a second contact test mode, the first contact test mode being used for source and drain contact testing of the discrete device under test, and the second contact test mode being used for gate contact testing of the discrete device under test.

[0006] In this embodiment, the failure of the discrete device under test (DUT) detected during the aging test may be caused by pin contact failure. The DUT may fail the aging test due to pin contact failure, and the source and drain contact tests and gate contact tests of the DUT are two relatively independent contact tests. The aging test equipment provided in this application embodiment can switch between source and drain contact tests and gate contact tests of the DUT before the aging test, complete the contact tests of the source, drain, and gate of the DUT, and obtain the contact test results before the aging test, avoiding aging test if the contact test fails, thereby ensuring the accuracy of the test results when the aging test equipment performs aging tests on the DUT.

[0007] Furthermore, the electrical connection requirements of the discrete device under test (DUT) differ between contact testing and aging testing. By setting up a test circuit independent of the aging board in the aging test equipment, the independently set test circuit can operate stably at room temperature while the aging board is under high-temperature aging conditions. This allows the electrical loops in the test circuit to be configured with non-fixed connections. When the test circuit is connected to the aging board, the test circuit can switch between different test modes by adjusting the electrical connection method. Thus, the same aging test equipment can be used to complete both contact testing and aging testing of the DUT. During contact testing, it can switch between source and drain contact testing and gate contact testing of the DUT, thereby simplifying the aging test process, reducing hardware costs, and improving the versatility and utilization of the aging test equipment.

[0008] In some embodiments, the test circuit includes a first voltage source, a current sampler, and a switching circuit, wherein the switching circuit connects the first voltage source and the current sampler; in a first contact test mode, the switching circuit is used to connect the positive terminal of the first voltage source to the source of the discrete device under test, connect the negative terminal of the first voltage source to the drain of the discrete device under test, and connect the current sampler between the first voltage source and the source or drain of the discrete device under test; in a second contact test mode, the switching circuit is used to connect the first voltage source between the source and drain of the discrete device under test, and connect the current sampler between the first voltage source and the source or drain of the discrete device under test.

[0009] In this embodiment, the source and drain contact tests and the gate contact tests of the discrete device under test (DUT) are two relatively independent tests. The aging test equipment provided in this application embodiment can perform contact tests before performing aging tests on the DUT, and can switch between source and drain contact tests and gate contact tests. For example, by switching the electrical connection method between the pins of the DUT and the electrical connection method between the pins of the DUT and the first voltage source provided by the test circuit, the test circuit can perform source and drain contact tests or gate contact tests on the DUT in contact test mode. This allows contact tests on all pins of the DUT to be completed before aging tests, preventing the DUT from failing the contact tests and thus avoiding ineffective aging tests. In other words, performing aging tests after the DUT passes the contact tests avoids the impact of abnormal pin contacts on the aging test results, ensuring the accuracy of the aging test results.

[0010] In some embodiments, the aging test equipment further includes an aging chamber, in which an aging board is disposed. The aging chamber is used to heat and age the discrete device under test before the test circuit switches to the aging test mode.

[0011] In this embodiment, the aging board is placed inside the aging chamber. During the test, the aging chamber heats the discrete device under test placed on the aging board to provide a high-temperature aging environment for the aging board.

[0012] In some embodiments, the above-mentioned aging test mode includes a first aging test mode, a second aging test mode, and a third aging test mode. The first aging test mode is used for high-temperature reverse bias test of the discrete device under test, the second aging test mode is used for high-temperature gate bias test of the discrete device under test, and the third aging test mode is used for high-temperature reverse bias test and high-temperature gate bias test of the discrete device under test.

[0013] In this embodiment, the electrical circuit in the test circuit is not fixedly connected. In the aging test mode, the test circuit can realize high-temperature reverse bias test and high-temperature gate bias test of the discrete device under test. Furthermore, the aging test equipment provided in this application embodiment can also be used to realize source and drain contact test and gate contact test of the discrete device under test. There is no need to change the aging board for different test requirements. It can also simplify the aging test process, reduce hardware costs, and improve the versatility and utilization of the aging test equipment.

[0014] In some embodiments, the test circuit further includes a second voltage source, a switching circuit connected to the second voltage source, and the supply voltage of the second voltage source being higher than the supply voltage of the first voltage source. In the first aging test mode, the switching circuit is used to connect the second voltage source between the source and drain of the discrete device under test, connect the source and gate of the discrete device under test, and connect a current sampler between the second voltage source and the source or drain of the discrete device under test. In the second aging test mode, the switching circuit is used to connect the first voltage source between the source and gate of the discrete device under test, connect the source and drain of the discrete device under test, and connect a current sampler between the first voltage source and the source or gate of the discrete device under test.

[0015] In this embodiment, multiple voltage sources are used in the test circuit, with the second voltage source having a higher supply voltage than the first voltage source. The first voltage source can provide the bias voltage for contact testing and high-temperature gate bias testing of the discrete device under test (DUT), while the second voltage source can provide the bias voltage for high-temperature reverse bias testing. The aging test equipment can switch between high-temperature reverse bias testing and high-temperature gate bias testing. For example, by switching the electrical connection between the pins of the DUT and the first and second voltage sources provided by the test circuit, the test circuit can perform high-temperature reverse bias testing or high-temperature gate bias testing on the DUT in aging test mode. Therefore, there is no need to replace the aging board for different test requirements, which simplifies the aging test process, reduces hardware costs, and improves the versatility and utilization of the aging test equipment.

[0016] In some embodiments, the test circuit includes multiple current samplers. In the third aging test mode, the switching circuit is used to: connect a second voltage source between the source and drain of the discrete device under test, connect a current sampler between the second voltage source and the source or drain of the discrete device under test, connect a first voltage source between the source and gate of the discrete device under test, and connect a current sampler between the second voltage source and the source or gate of the discrete device under test.

[0017] Furthermore, the test circuit can also be configured to simultaneously perform high-temperature reverse bias test and high-temperature gate bias test on the discrete device under test in aging test mode, thereby simplifying the aging test process and improving test efficiency.

[0018] In some embodiments, the aging test equipment further includes a connection circuit, which includes a first interface and a second interface coupled together. The first interface is connected to the test circuit, and the second interface is disposed on the aging board for connecting the discrete device under test.

[0019] In this embodiment, when the discrete device under test (DUT) is placed on the test socket of the aging board, at least one second interface for connecting to the test socket is provided for each pin of the DUT, and multiple first interfaces are coupled one-to-one with multiple second interfaces. The first interfaces are connected to the nodes of the test circuit. Without changing the fixtures and electrical connections of the aging board, the electrical connections of the test circuit can be dynamically changed, configured, or switched. This allows for dynamic reuse of test resources and flexible reconstruction of test paths. Consequently, the electrical connections between the pins of the DUT and between the pins of the DUT and the voltage source provided by the test circuit can be adjusted to perform contact testing and aging testing on the same aging board. This not only enables standardized design and reuse of the fixtures on the aging board, eliminating the need to replace the aging board or fixtures for different testing requirements, but also simplifies the aging test process and improves the versatility of the aging test equipment.

[0020] In some embodiments, the switching circuit includes multiple relays, which control the on and off states of the relays to switch between a contact test mode and an aging test mode.

[0021] In this embodiment, by setting relays in the test circuit, the switching circuit can be used to control the conduction and cutoff of multiple relays, thereby realizing the adjustment of the electrical connection method between the pins of the discrete device under test according to the test requirements, so as to realize the switching of different test modes and improve the versatility of the aging test equipment.

[0022] In some embodiments, the test circuit further includes a protection circuit, which is connected to the test circuit, multiple relays, a first voltage source, and a second voltage source. The protection circuit is used to detect the voltage and current of the test circuit, and when the voltage of the test circuit is greater than a fault voltage threshold or the current is greater than a fault current threshold, it controls at least one of the multiple relays, the first voltage source, and the second voltage source to turn off.

[0023] In this embodiment, by using a protection circuit in the test circuit to detect the voltage and current in the test circuit in real time, when the voltage or current of the test circuit is abnormal, multiple relays in the test circuit that are in the conducting state are immediately turned off, and the first voltage source and the second voltage source in the working state are controlled to stop supplying power, so as to avoid damage to the components and discrete devices under test in the test circuit due to overvoltage or overcurrent. This not only improves the safety of the aging test equipment, but also avoids abnormal test results caused by circuit abnormalities during aging test or contact test, and ensures the accuracy of the test results.

[0024] Secondly, this application provides an aging test method applied to an aging test apparatus, which includes: an aging board for placing at least one discrete device under test; and a test circuit connected to the aging board for switching to a contact test mode for contact testing of the discrete device under test, or switching to an aging test mode for aging testing of the discrete device under test. The contact test mode includes a first contact test mode and a second contact test mode. The first contact test mode is used for source and drain contact testing of the discrete device under test, and the second contact test mode is used for gate contact testing of the discrete device under test. The aging test method includes: controlling the test circuit to switch to the contact test mode for contact testing of the discrete device under test; if the source, drain, and gate contacts of the discrete device under test are normal, controlling the test circuit to switch to the aging test mode for aging testing of the discrete device under test.

[0025] In this embodiment, the failure of the discrete device under test (DUT) detected during the aging test may be caused by pin contact failure. The DUT may fail the aging test due to pin contact failure, and the source and drain contact tests and gate contact tests of the DUT are two relatively independent contact tests. Before the aging test, this embodiment completes the contact tests of the source, drain, and gate of the DUT by switching between the source and drain contact tests and the gate contact tests. This allows the contact test results to be obtained before the aging test, avoiding aging tests if the contact tests fail, thereby ensuring the accuracy of the test results when the aging test equipment performs aging tests on the DUT.

[0026] In some embodiments, the aging test equipment further includes an aging chamber, an aging plate is disposed inside the aging chamber, the aging chamber is used to heat and age the discrete device under test, and the aging test method further includes: controlling the test circuit to switch to contact test mode, and controlling the aging chamber to heat and age the discrete device under test before contact testing in contact test mode.

[0027] In this embodiment, before the control test circuit performs contact testing and aging testing on the discrete device under test, it first controls the aging chamber to heat and age the discrete device under test, providing a high-temperature test environment for both contact testing and aging testing. This allows the effectiveness of the pin contact of the discrete device under test to be detected under high-temperature conditions, improving the comprehensiveness and reliability of the testing of the discrete device under test.

[0028] In some embodiments, the above-mentioned aging test method further includes: after the control test circuit is switched to contact test mode, and after the discrete device under test is contact tested in contact test mode, the aging chamber is controlled to heat and age the discrete device under test.

[0029] In this embodiment, the beneficial effects of the second aspect can be referred to the description of the first aspect and any of its implementations, and will not be repeated here. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of the structure of an aging test device provided in an embodiment of this application; Figure 2 A schematic flowchart of an aging test method provided in an embodiment of this application; Figure 3 A schematic flowchart of another aging test method provided in an embodiment of this application; Figure 4 This is a schematic diagram of another aging test device provided in an embodiment of this application; Figure 5 This is a schematic diagram of the structure of an aging board provided in an embodiment of this application; Figure 6 A schematic diagram of the test circuit provided in the embodiments of this application in the first contact test mode; Figure 7 A schematic diagram of the test circuit provided in the embodiments of this application in the second contact test mode; Figure 8 A schematic diagram of the test circuit provided in the embodiments of this application in the first aging test mode; Figure 9 A schematic diagram of the test circuit provided in the embodiments of this application in the second aging test mode; Figure 10This is a schematic diagram of the test circuit provided in the embodiment of this application in the third aging test mode.

[0031] Figure reference numerals: 100-Aging test equipment; 110-Aging board; 120-Test circuit; 130-Aging chamber; 140-Connection circuit; 121-First voltage source; 122-Second voltage source; 123-Current sampler; 124-Switching circuit; 125-Protection circuit; SKT-Test socket; DUT-Discrete device under test. Detailed Implementation

[0032] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0033] To facilitate understanding of the technical solutions of the embodiments of this application, before introducing the solutions of the embodiments of this application, some terms or concepts that may be involved in the embodiments of this application will be introduced first.

[0034] Aging test: The reliability test that exposes semiconductor devices to environmental stresses higher than normal (usually high temperature, high voltage, high current, etc.) for a period of time, so as to screen out the potential early failure defects of semiconductor devices and select stable and reliable devices.

[0035] Discrete devices: Semiconductor devices in various package forms, including diodes, transistors, thyristors, bridge rectifiers, silicon carbide single transistors, metal oxide semiconductor field effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs), and bipolar junction transistors (BJTs), etc.

[0036] High temperature reverse bias (HTRB) test: used to evaluate the blocking capability of discrete devices under test at high temperature and high reverse voltage.

[0037] High temperature gate bias (HTGB) test: For discrete devices under test with gate oxide layer, it is used to evaluate the withstand voltage capability of the gate of the discrete device under test under high temperature and constant voltage.

[0038] Aging board: It integrates test sockets and interfaces, and serves as a key connection carrier between aging test equipment and discrete devices under test. It is a printed circuit board used to support discrete devices under test. It can fix the discrete devices under test in the aging environment and provide electrical connection so that they can be connected to the aging test system.

[0039] Test socket: A special connector that is mounted on a burn-in board or test equipment for mechanically holding and electrically connecting discrete devices under test.

[0040] Fixtures: Auxiliary devices used to fix, position, and support discrete devices under test during manufacturing or testing, ensuring that all elements, including the burn-in board, test socket, and discrete device under test, can be operated and handled accurately and consistently during manufacturing or testing.

[0041] In related technologies, high-temperature reverse bias testing and high-temperature gate bias testing are two key tests in the reliability testing of discrete devices during aging tests to screen out defective discrete devices and improve their reliability. Although both of these aging tests apply electrical stress to the discrete device under test in a high-temperature environment, the failure mechanisms and bias conditions they assess are completely different, such as the electrical connection method between the pins of the discrete device under test, and the location, direction, and magnitude of the bias voltage applied to the pins of the discrete device under test.

[0042] The high-temperature reverse bias test places the discrete device under test in a high-temperature aging environment and applies a large reverse voltage to the pins at both ends of the discrete device. At the same time, the leakage current of the pins of the discrete device under test is detected in real time to determine whether the leakage current of the discrete device under test is within the specified range under high-temperature reverse bias conditions. This tests the ability of the discrete device under test to block high voltage for a long time and ensures that it will not leak current or break down prematurely in long-term switching applications.

[0043] High-temperature gate bias testing places the discrete device under test in a high-temperature aging environment and applies a voltage to the gate of the discrete device. At the same time, the leakage current of the gate is detected in real time to determine whether there are abnormal fluctuations in the gate leakage current of the discrete device under test under high-temperature constant voltage conditions. This tests the withstand voltage capability of the gate oxide layer and ensures that it will not fail due to gate leakage or threshold drift in long-term switching applications.

[0044] In some implementations, during high-temperature reverse bias or high-temperature gate bias testing, the discrete device under test (DUT) is placed on a test socket on an aging board, and the test circuitry is directly mounted on the aging board. In traditional solutions, the structure of the test socket and the electrical circuitry of the test circuitry on the aging board are fixed, and their structure and electrical circuitry cannot be reused between high-temperature reverse bias and high-temperature gate bias tests, resulting in poor versatility of the aging test equipment. Typically, high-temperature reverse bias and high-temperature gate bias tests are implemented separately, using two different aging test devices to perform the two tests, rather than flexibly switching between the same aging test device. However, during separate aging tests, when the DUT completes one aging test on the aging board of one aging test device, it needs to be removed from that device and placed on the aging board of another aging test device to complete another aging test. This requires operators to switch the DUT between the two aging test devices. When performing batch aging tests, the frequent switching of the DUT between different aging test devices not only affects aging test efficiency but also increases the complexity and implementation cost of the aging test.

[0045] Furthermore, poor pin contact of the discrete device under test (DUT) may occur during aging tests, leading to distorted test results. This type of failure caused by contact issues is difficult to distinguish from aging failures inherent in the device itself during the aging test. In other words, it is difficult to effectively determine whether a DUT failure is due to aging during the aging test, thus affecting the accuracy of the results. For single-structure aging test equipment, aging tests and contact tests are not compatible. When performing batch cyclic aging tests, the DUT needs to be switched between different test equipment, ultimately resulting in a cumbersome testing process, low testing efficiency, and high testing costs.

[0046] To address the aforementioned issues, this application provides an aging test device and an aging test method, which verify the pin contact status of the discrete device under test before aging testing, and achieve compatibility between contact testing and aging testing, thereby improving the efficiency and accuracy of aging testing.

[0047] The specific embodiments involved in this application are described in detail below with reference to the accompanying drawings.

[0048] Please see Figure 1 , Figure 1 This is a schematic diagram of the structure of an aging test device 100 provided in an embodiment of this application. The aging test device 100 provided in this embodiment includes an aging board 110 and a test circuit 120.

[0049] In this embodiment, at least one test socket is provided on the aging plate 110. Figure 1(not shown in the image), each test socket is used to electrically connect at least one discrete device under test (DUT), such that the burn-in board 110 can be used to place at least one DUT.

[0050] In traditional solutions where the test circuit 120 is mounted on the aging board 110, under high-temperature aging conditions, if components that can alter the electrical connection are incorporated into the test circuit 120 on the aging board 110, poor contact may occur due to factors such as thermal expansion and contraction, metal oxidation, or mechanical fatigue, leading to test interruptions or even inaccurate results. To ensure test reliability and the validity of test results, the aging board 110 is typically designed with hardwired, fixed wiring to ensure stable operation under high-temperature aging conditions. However, the fixed structure of the test sockets on the aging board 110 and the fixed electrical circuitry of the test circuit 120 result in poor versatility of the aging test equipment 100. For example, high-temperature reverse bias tests and high-temperature grid bias tests require separate tests in two different aging test equipment 100s.

[0051] In this embodiment, a test circuit 120, independent of the aging board 110, is provided in the aging test equipment 100, and the test circuit 120 is connected to the aging board 110. The test circuit 120 connects to the pins of the discrete device under test (DUT) placed on the aging board 110 through this connection. For example, when the DUT is a device with a gate oxide layer, such as a metal-oxide-semiconductor field-effect transistor or an insulated-gate bipolar transistor, the test circuit 120 is specifically used to connect the source, drain, and gate of the DUT placed on the aging board 110. Furthermore, the test circuit 120 can be equipped with components that can be used to change the electrical connection method. Figure 1 (Not shown in the image) When the aging board 110 is in a high-temperature aging environment, the test circuit 120 is set independently of the aging board 110. The test circuit 120 still works stably in a normal temperature environment, and the performance of the components can be guaranteed.

[0052] The aging test equipment 100 also includes a controller ( Figure 1(Not shown in the diagram), the controller is connected to the test circuit 120 and is used to control the switching of the test circuit 120 between contact test mode and aging test mode. The controller dynamically changes, configures, or switches the electrical connection mode between the pins of the discrete device under test (DUT), the electrical connection mode between the pins of the DUT and the voltage source provided by the test circuit 120, and the magnitude of the bias voltage applied by the voltage source to the pins of the DUT by controlling the on / off state of components in the test circuit 120 for changing electrical connection methods. This achieves the switching of the test circuit 120 between contact test mode and aging test mode. Specifically, when the controller controls the test circuit 120 to switch to contact test mode, the test circuit 120 is used for contact testing of the DUT; when the controller controls the test circuit 120 to switch to aging test mode, the test circuit 120 is used for aging testing of the DUT.

[0053] When the test circuit 120 is not used to test the pin contact of the discrete device under test (DUT), and the control circuit 120 directly enters the aging test mode to perform aging tests on the DUT, there may be problems with inaccurate aging test results due to poor pin contact of the DUT. For example, the test socket on the aging board 110 may have contact wear, deformation, oxidation, or contamination; the DUT may have poor pin flatness, oxidation, or dimensional deviations; and factors such as inconsistent thermal expansion between the DUT and the test socket under high temperature, uneven clamping pressure, or positioning deviations may all cause poor contact between the DUT pins and the test socket on the aging board 110. In this case, during the aging test, failures caused by poor pin contact of the DUT are difficult to distinguish from failures caused by high-temperature aging. That is, failures of the DUT detected during the aging test may be caused by pin contact failures, affecting the accuracy of the aging test results.

[0054] In this embodiment, when the controller uses the test circuit 120 to perform aging tests on the discrete device under test (DUT), to ensure the accuracy of the aging test results, before switching the test circuit 120 to the aging test mode, it needs to first switch the test circuit 120 to the contact test mode to perform contact tests on the DUT. Simultaneously, to ensure the accuracy of the contact test results, contact tests need to be performed on multiple pins of the DUT.

[0055] In the following embodiments, the discrete device under test (DUT) is a device with a gate oxide layer, such as a metal-oxide-semiconductor field-effect transistor or an insulated-gate bipolar transistor. That is, the discrete device under test includes a source, a drain, and a gate. During aging tests, the discrete device under test needs to undergo high-temperature reverse bias tests (aging tests of the source and drain) and high-temperature gate bias tests (aging tests of the gate). During contact tests, contact tests need to be performed on the source, drain, and gate of the discrete device under test.

[0056] The aging test equipment 100 provided in this application can not only perform contact testing and aging testing on discrete devices under test (DUTs) with gate oxide layers, but also, for any type of discrete device such as diodes, transistors, thyristors, bridge rectifiers, and silicon carbide single transistors, adjust the wiring and component layout of the test circuit 120 in the aging test equipment 100, and adjust the aging board 110 used in the aging test equipment 100. By dynamically changing, configuring, or switching the electrical connection between the pins of the discrete device under test (DUT), the electrical connection between the pins of the DUT and the voltage source provided by the test circuit 120, and the magnitude of the bias voltage applied by the voltage source to the pins of the DUT, the aging test equipment 100 can be used to perform contact testing and aging testing on other types of discrete devices without having to change the aging board 110 or fixtures for different test requirements. This simplifies the aging test process, reduces hardware costs, and improves the versatility and utilization of the aging test equipment 100.

[0057] However, the source and drain contact tests of the discrete device under test (DUT) and the gate contact test of the DUT are two relatively independent contact tests when checking the effectiveness of the pin contact of the DUT. That is, the electrical connection method between the pins of the DUT and the location, direction and magnitude of the bias voltage to be applied to the pins of the DUT are different under the two contact tests.

[0058] Therefore, when the controller controls the test circuit 120 to switch to the contact test mode in this application, the contact test mode of the test circuit 120 includes a first contact test mode and a second contact test mode. The first contact test mode is used for source and drain contact testing of the discrete device under test (DUT), and the second contact test mode is used for gate contact testing of the DUT. By switching to the contact test mode, the switching between the first contact test mode and the second contact test mode needs to be performed in a set order. For example, the first contact test mode is switched first, and the second contact test mode is switched after the test is completed, or the second contact test mode is switched first, and the first contact test mode is switched after the test is completed, thereby realizing the contact test of each pin of the discrete device under test (DUT).

[0059] In some implementations, when the control test circuit 120 switches to contact test mode, if any one of the source, drain, or gate pins of the discrete device under test (DUT) has an abnormal contact, i.e., the contact test result of any pin fails to meet the requirements, an alert message is output to indicate that the contact test of the DUT is unqualified. At this time, the DUT is determined to be a defective device, its contact test data is saved, and aging tests are no longer performed on the DUT with unqualified contact tests.

[0060] If the source, drain, and gate contacts of the discrete device under test (DUT) are normal, the controller switches the test circuit 120 to aging test mode, where the DUT undergoes aging testing. This ensures that the DUT entering the aging test is a discrete device with properly contacting pins, preventing aging test failures due to abnormal pin contact and improving the accuracy of the aging test by the aging test equipment 100.

[0061] Furthermore, the aging test equipment 100 also includes an aging chamber 130, with an aging plate 110 disposed inside the aging chamber 130. The aging chamber 130, as a high-temperature chamber device capable of precise temperature control, provides a high-temperature aging environment for the discrete device under test (DUT) placed on the aging plate 110. A controller is connected to the aging chamber 130. The controller switches the test circuit 120 to aging test mode, and before aging the DUT, it controls the aging chamber 130 to heat and age it to provide the necessary aging test conditions.

[0062] In addition, the aging test equipment 100 may also include a main cabinet for housing the aforementioned test circuit 120 and controller. Figure 1 (Not shown in the image) The main unit cabinet is set up independently of the aging chamber 130. When the aging chamber 130 provides a high-temperature aging environment for the aging board 110 inside, the test circuit 120 and controller in the main unit cabinet operate stably under normal temperature conditions, so that the electrical circuit in the test circuit 120 can be set to a non-fixed connection method.

[0063] In this embodiment, when the controller switches the test circuit 120 to the aging test mode, if any one of the source, drain, or gate pins of the discrete device under test (DUT) fails to age, i.e., the aging test result of any pin does not meet the requirements, a prompt message is output to indicate that the aging test of the DUT is unqualified. Simultaneously, the DUT is determined to be a non-qualified device, and its aging test data is saved. If the aging test results of the source, drain, and gate of the DUT all meet the requirements, the DUT is determined to be a qualified device, and its aging test data is saved.

[0064] In some implementations, such as Figure 2 As shown, Figure 2 This is a schematic flowchart of an aging test method provided in an embodiment of this application. The aging test method includes the following steps: S210: Control the test circuit to switch to contact test mode, and perform contact test on the discrete device under test in contact test mode.

[0065] In this embodiment, before the control test circuit switches to contact test mode to perform contact test on the discrete device under test, the control test circuit switches to contact test mode first, and then performs contact test on multiple pins of the discrete device under test in contact test mode.

[0066] Furthermore, the contact test mode includes a first contact test mode and a second contact test mode. In the contact test mode, the switching between the first contact test mode and the second contact test mode is performed in a set order. The first contact test mode is used for the source and drain contact test of the discrete device under test, and the second contact test mode is used for the gate contact test of the discrete device under test, so as to complete the contact test of the source, drain and gate.

[0067] In some implementations, after the aging test equipment is powered on and the discrete device under test is placed on the aging board, the control circuit to switch to contact test mode can be controlled by a user-operated host computer. The host computer sends instructions to the controller in the aging test equipment and displays the test status, parameters, and progress in real time on the host computer or the display interface of the aging test equipment. Alternatively, the controller can automatically complete the mode switching. After the aging test equipment is powered on and the discrete device under test is placed on the aging board, the controller automatically switches to contact test mode according to the set procedure.

[0068] S220: Controls the aging chamber to heat and age the discrete components under test.

[0069] In this embodiment, after the contact test of the discrete device under test and before the aging test of the discrete device under test, the discrete device under test placed on the aging board is heated and aged in an aging chamber. After being heated to the set test temperature, the temperature is kept constant during the aging test to provide a high-temperature aging environment for the aging test of the discrete device under test.

[0070] S230: If the source, drain and gate contacts of the discrete device under test are normal, the control test circuit switches to the aging test mode and performs aging test on the discrete device under test in the aging test mode.

[0071] In this embodiment, if the source, drain, and gate contacts of the discrete device under test (DUT) are normal, i.e., the contact test of the DUT is qualified, the control test circuit switches from the contact test mode to the aging test mode, and completes the aging test of the DUT in the aging test mode. The switching from contact test mode to aging test mode can be achieved by the host computer issuing a command to the controller in the aging test equipment when it detects that the source, drain, and gate contacts of the DUT are normal, causing the controller to control the test circuit to perform the mode switch. Alternatively, the controller can automatically switch to the aging test mode according to a set procedure when it detects that the source, drain, and gate contacts of the DUT are normal.

[0072] In this embodiment, the aging test mode includes a first aging test mode, a second aging test mode, and a third aging test mode. The first aging test mode is used for high-temperature reverse bias testing of the discrete device under test, the second aging test mode is used for high-temperature gate bias testing of the discrete device under test, and the third aging test mode is used for high-temperature reverse bias testing and high-temperature gate bias testing of the discrete device under test. That is, the switching between the first aging test mode and the second aging test mode is performed in a set order during the aging test mode, or the third aging test mode is directly executed to complete the aging test of the discrete device under test.

[0073] Furthermore, after completing the contact test and aging test on the discrete devices under test (DUT) of this batch on the aging board, when the operator removes the DUT from this batch and places the next batch of DUTs on the aging board, the controller automatically enters the next round of contact test and aging test. This eliminates the need to replace the aging board or aging test equipment during the contact test and aging test of the same batch of DUTs, thus improving the testing efficiency of the aging test equipment.

[0074] In addition, the thermal expansion of the discrete device under test (DUT) and the test socket is inconsistent under high temperature conditions, and the pins of the DUT may experience contact fatigue and accelerated oxidation, resulting in poor contact stability or contact failure of the DUT under high temperature conditions. In order to detect whether the DUT can operate reliably for a long time within the operating temperature range, the contact effectiveness of the pins of the DUT under high temperature conditions can also be detected.

[0075] In some implementations, such as Figure 3 As shown, Figure 3 This is a schematic flowchart of another aging test method provided in an embodiment of this application. The aging test method includes the following steps: S310: Controls the aging chamber to heat and age the discrete components under test.

[0076] In this embodiment, before the control test circuit performs contact testing and aging testing on the discrete device under test, it first controls the aging chamber to heat and age the discrete device under test. After heating to the set test temperature, it maintains a constant temperature during the contact testing and aging testing process, thereby providing a high-temperature test environment for both the contact testing and aging testing of the discrete device under test.

[0077] S320: Controls the test circuit to switch to contact test mode, and performs contact test on the discrete device under test in contact test mode.

[0078] In this embodiment, under high-temperature testing conditions, the control test circuit switches to contact test mode to perform contact testing on the discrete device under test, thereby detecting the contact effectiveness of the pins of the discrete device under test under high-temperature conditions.

[0079] S330: If the source, drain and gate contacts of the discrete device under test are normal, the control test circuit switches to the aging test mode and performs aging test on the discrete device under test in the aging test mode.

[0080] In this embodiment, the specific implementation of S330 can be referred to the content of S230 in the above embodiment, and will not be repeated here.

[0081] Furthermore, when the aging chamber is heated and aged in both contact test mode and aging test mode to provide a high-temperature test environment, the constant temperature provided by the aging chamber in contact test mode and aging test mode can be controlled to be the same or different, without any restrictions.

[0082] In this embodiment, when using the test circuit 120 to perform aging tests on the discrete device under test (DUT), before switching the test circuit 120 to the aging test mode, it is first switched to the contact test mode to perform contact testing on the DUT. This avoids performing aging tests if the contact test fails, ensuring the accuracy of the aging test results. Furthermore, when controlling the aging chamber 130 to heat and age the DUT to provide a high-temperature aging test environment, the DUT can be heated and aged after the contact test and before the aging test, or heated and aged before the contact test, to further detect the contact effectiveness of the DUT's pins under high-temperature conditions. Thus, reliability testing of the DUT is performed at different time sequences, effectively covering contact failure scenarios under high-temperature aging environments, improving the comprehensiveness and reliability of the DUT testing.

[0083] Meanwhile, the aging test equipment 100 not only has a test circuit 120 independent of the aging board 110, but also enables the test circuit 120 to switch between contact test mode and aging test mode when testing the discrete device under test (DUT) by dynamically changing, configuring or switching the electrical connection between the pins of the DUT, the electrical connection between the pins of the DUT and the voltage source provided by the test circuit 120, and the magnitude of the bias voltage applied by the voltage source to the pins of the DUT.

[0084] Furthermore, the aging test equipment 100 also includes a connection circuit 140, which includes a coupled first interface IO1 and a second interface IO2. The first interface IO1 is connected to the test circuit 120, and the second interface IO2 is located on the aging board 110 for connecting the discrete device under test (DUT). When the DUT is placed on the test socket of the aging board 110, at least one second interface IO2 is provided for each pin of the DUT for connection to the test socket, and multiple first interfaces IO1 and multiple second interfaces IO2 are coupled one-to-one. The first interface IO1 is connected to the node of the test circuit 120.

[0085] The electrical connection method of the test circuit 120 can be dynamically changed, configured, or switched, allowing test resources in the test circuit 120 to be dynamically reused and test paths to be flexibly reconfigured. For example, when the node of the test circuit 120 connected to the first interface IO1 is connected to the voltage source in the test circuit 120, the test circuit 120 provides a bias voltage to the discrete device under test (DUT) through the first interface IO1. Alternatively, when two pins of the discrete device under test (DUT) are connected between the nodes connected to their respective first interface IO1s, the two pins are connected. The first interface IO1 and the second interface IO2 include test pins, gold fingers, and ohm connectors, etc., which are not limited here.

[0086] Based on this, by setting a test circuit 120 independent of the aging board 110 in the aging test equipment 100, the electrical circuits in the test circuit 120 can be set to a non-fixed connection mode. A connection circuit 140 is set to connect the test circuit 120 and the aging board 110. This allows for the adjustment of the electrical connection mode between the pins of the discrete device under test (DUT) and the electrical connection mode between the pins of the DUT and the voltage source provided by the test circuit 120 without changing the fixtures and electrical connection mode of the aging board 110. By adjusting the power supply voltage provided by the voltage source, contact testing and aging testing can be performed on the DUTs set on the same aging board 110. This not only enables the standardized design and reuse of the fixtures on the aging board 110, eliminating the need to replace the aging board 110 or fixtures for different testing needs, but also simplifies the aging test process, reduces hardware costs, and improves the versatility and utilization of the aging test equipment 100.

[0087] Furthermore, such as Figure 4 As shown, Figure 4 This is a schematic diagram of another aging test device 100 provided in an embodiment of this application. The aging test device 100 provided in this embodiment includes an aging plate 110, a test circuit 120, an aging chamber 130, a connection circuit 140, and a controller. Figure 4 (Not shown in the image).

[0088] In this embodiment, the test circuit 120 includes a first voltage source 121, a second voltage source 122, a current sampler 123, and a switching circuit 124. The switching circuit 124 connects the first voltage source 121, the second voltage source 122, the current sampler 123, and each pin of the discrete device under test (DUT). The second voltage source 122 can provide a higher supply voltage than the first voltage source 121. That is, the first voltage source 121 is a low-voltage source, such as providing a supply voltage of 0V-60V, and the second voltage source 122 is a high-voltage source, such as providing a supply voltage of 500V-2000V. No specific limitations are imposed in this application. The first voltage source 121 can be used to provide the bias voltage for contact testing and high-temperature gate bias testing of the DUT, and the second voltage source 122 can be used to provide the bias voltage for high-temperature reverse bias testing.

[0089] The switching circuit 124 includes multiple relays. Under different test modes, the conduction path parameters of the switching circuit 124 in the controller are pre-configured according to test requirements. This allows the switching circuit 124 to control the on / off state of multiple relays, thereby changing the electrical connection between the pins of the discrete device under test (DUT) and the electrical connection between the DUT pins and the first voltage source 121 and the second voltage source 122, switching between contact test mode and aging test mode. The multiple relays in the switching circuit 124 can be replaced with other switching devices that are controlled to switch on and off, changing the electrical connection method in the test circuit 120.

[0090] Furthermore, by pre-configuring the supply voltage parameters applied to the pins of the discrete device under test (DUT) by the first voltage source 121 and the second voltage source 122 of the test circuit 120, i.e., configuring the bias voltage applied to the pins of the DUT, the controller controls the test circuit 120 to switch between contact test mode and aging test mode. When switching between these modes, the controller automatically completes the corresponding circuit connection and test condition switching according to the pre-configured parameters, and determines the contact test result or aging test result of the DUT based on the current data sampled by the current sampler 123.

[0091] In some implementations, the sampling components in the test circuit 120 used to sample the operating data of the discrete device under test (DUT) may also include a voltage sampler. The controller determines the contact test result or aging test result of the DUT based on the voltage data sampled by the voltage sampler.

[0092] In this embodiment, the aging test equipment 100 may further include a driving resistor ( Figure 4(Not shown in the diagram) The drive circuit is used to connect to the gate of the discrete device under test (DUT). When the test circuit 120 provides a bias voltage to the gate, it can limit the instantaneous inrush current when the voltage source supplies power to the gate, preventing the DUT from being damaged by overcurrent and ensuring the test safety of the DUT. The drive resistor is located in the test circuit 120, or it can be located on the burn-in board 110, and is connected between the gate of the DUT and the corresponding second interface IO2.

[0093] Furthermore, the test circuit 120 may also include a protection circuit 125, such as an overcurrent protection (OCP) circuit and an overvoltage protection (OVP) circuit. The protection circuit 125 is connected to the test circuit 120, multiple relays, a first voltage source 121, and a second voltage source 122. The protection circuit 125 is equipped with sampling components for sampling the operating data of the discrete device under test (DUT). The protection circuit 125 is used to detect the voltage and current of the test circuit 120, and when the voltage of the test circuit 120 is greater than a fault voltage threshold or the current is greater than a fault current threshold, it controls at least one of the multiple relays, the first voltage source 121, and the second voltage source 122 to turn off.

[0094] In this embodiment, the protection circuit 125 is used to detect the voltage and current in the test circuit 120 in real time. If the voltage in the test circuit 120 exceeds the fault voltage threshold, or the current flowing through the test circuit 120 exceeds the fault current threshold, the multiple relays in the test circuit 120 that are in the conducting state are immediately shut off, and the first voltage source 121 and the second voltage source 122 that are in the working state are controlled to stop supplying power. This prevents the components and discrete devices under test (DUTs) in the test circuit 120 from being damaged due to overvoltage or overcurrent. This not only improves the safety of the aging test equipment 100, but also avoids abnormal test results caused by circuit abnormalities during aging tests or contact tests, ensuring the accuracy of the test results.

[0095] In some implementations, the burn-in board 110 is used to house multiple discrete devices under test (DUTs), such as... Figure 5 As shown, Figure 5 This is a schematic diagram of the structure of an aging board 110 provided in an embodiment of this application. The aging board 110 is provided with multiple test sockets SKT, each SKT being used to place one or more discrete devices under test (DUTs). The connection circuit on the aging board 110 provides multiple second interfaces IO2 for each SKT to connect to it, thereby connecting multiple pins of the DUT. The connection circuit also provides a corresponding first interface node for each second interface IO2 to connect to the test circuit.

[0096] In this embodiment, the number of first voltage sources, second voltage sources, and current samplers in the test circuit connected to the aging board 110 can be multiple. When multiple discrete devices under test (DUTs) are placed on the aging board 110, the controller is used to allocate multiple first voltage sources, second voltage sources, and current samplers to the multiple DUTs, configure the supply voltage applied by the first voltage sources and second voltage sources to the pins of the connected DUTs, and configure the electrical connection method between the pins of each DUT, so that the test circuit can test multiple DUTs in parallel to improve the test efficiency of the aging test equipment.

[0097] As one implementation method, when a test socket SKT can be used to hold two discrete devices under test (DUTs), such as Figure 5 As shown, the gate G and drain D of the first discrete device under test (DUT), and the gate G and drain D of the second discrete device under test (DUT) are all used to connect to a corresponding second interface IO2. The source S of the first discrete device under test (DUT) and the source S of the second discrete device under test (DUT) share the second interface IO2.

[0098] For example, during the source-drain contact test, it is necessary to detect the forward conduction voltage of the body diode between the source-drain and drain-drain. The source-s of the first and second discrete device under test (DUT) are connected to the positive terminal of the same voltage source in the test circuit through a shared second interface IO2. The drain-drain of the first and second DUTs is grounded through their respective second interface IO2s. During the high-temperature aging test, it is necessary to detect the leakage current between the source-s and drain-drain. The source-s of the first and second DUTs are grounded through a shared second interface IO2. The drain-drain of the first and second DUTs is connected to the positive terminal of the same or different voltage sources in the test circuit through their respective second interface IO2s; no restrictions are imposed here.

[0099] In this embodiment, a test socket SKT is arranged on the aging board 110 to realize simultaneous aging test or contact test of two discrete devices under test (DUTs), which can improve test efficiency and reduce area overhead.

[0100] In the embodiments of this application, when the control test circuit switches to the contact test mode, the test circuit is used to perform the switching between the first contact test mode and the second contact test mode in a set order in the contact test mode to complete the contact test of the source S, drain D and gate G, as described below.

[0101] like Figure 6 As shown, Figure 6 This is a schematic diagram of the test circuit provided in the embodiment of this application in the first contact test mode.

[0102] In this embodiment, the first contact test mode is used to test the contact between the source S and drain D of the discrete device under test (DUT), that is, to detect the contact reliability of the source S and drain D of the DUT, so as to ensure that the source S and drain D of the DUT can establish a good, stable and low impedance electrical connection with the test circuit during the aging test.

[0103] Figure 6 Taking an N-type field-effect transistor as an example, the positive terminal of the body diode of the discrete device under test (DUT) is connected to the source (S), and the negative terminal of the body diode is connected to the drain (D). In the first contact test mode, the switching circuit in the test circuit is used to connect the positive terminal of the first voltage source 121 to the source (S) of the DUT, connect the negative terminal of the first voltage source 121 to the drain (D) of the DUT, and connect the current sampler 123 between the first voltage source 121 and either the source (S) or the drain (D) of the DUT. That is, during the contact test between the source (S) and the drain (D), a forward bias voltage is applied across the body diode connected between the source (S) and the drain (D) of the DUT, such as a 5V bias voltage applied to the first voltage source 121, and the forward conduction current of the body diode of the DUT is detected by the current sampler 123.

[0104] In this process, by applying a forward bias voltage to the body diode of the discrete device under test (DUT), it is not necessary to drive the gate G of the DUT. When the source S and drain D of the DUT are in normal contact, a stable forward current flows through the body diode. If the forward current of the body diode of the DUT is greater than or equal to a first current threshold (e.g., 1 μA), then the source S and drain D of the DUT are in normal contact. The first current threshold is the critical current value for normal contact between the source S and drain D of the DUT. If the forward current of the body diode of the DUT is less than the first current threshold, then the contact between the source S and drain D of the DUT is abnormal, and the DUT is determined to be a defective device, and its contact test data is saved.

[0105] In some implementations, when the discrete device under test (DUT) is a P-type field-effect transistor, the positive terminal of the body diode of the DUT is connected to the drain D, and the negative terminal of the body diode is connected to the source S. In the first contact test mode, the switching circuit in the test circuit is used to connect the positive terminal of the first voltage source 121 to the drain D of the DUT and the negative terminal of the first voltage source 121 to the source S of the DUT, so as to apply a forward bias voltage across the body diode connecting the source S and drain D of the DUT.

[0106] like Figure 7 As shown, Figure 7 This is a schematic diagram of the test circuit provided in the embodiment of this application in the second contact test mode.

[0107] In this embodiment, the second contact test mode is used to test the gate G contact of the discrete device under test (DUT), that is, to detect the contact reliability of the gate G of the DUT, so as to ensure that the gate G of the DUT can establish a good, stable and low impedance electrical connection with the test circuit during the aging test.

[0108] In the second contact test mode, the switching circuit connects the first voltage source 121 between the source S and drain D of the discrete device under test (DUT). The first voltage source 121 can be connected in either the positive or negative direction between the source S and drain D of the DUT. The current sampler 123 is also connected between the first voltage source 121 and either the source S or drain D of the DUT. Specifically, during the gate G contact test, the gate G is floating; the test circuit does not provide a drive signal to the gate G. A bias voltage, such as 25V, is applied between the source S and drain D of the DUT. The leakage current between the source S and drain D of the DUT is detected by the current sampler 123.

[0109] The discrete device under test (DUT) contains parasitic capacitances, including gate-source capacitance and gate-drain capacitance. When a bias voltage is applied between the source (S) and drain (D) of the DUT, the change in bias voltage will be coupled to the gate (G) of the DUT through the parasitic capacitance. At this time, the leakage current between the source (S) and drain (D) after the gate (G) is lifted can be detected to determine whether the gate (G) is open-circuited (abnormal contact).

[0110] If the leakage current between the source (S) and drain (D) of the discrete device under test (DUT) is less than the second current threshold (e.g., 1 μA), then the gate (G) of the DUT is considered to have normal contact. The second current threshold is the critical current value for normal gate (G) contact of the DUT. If the leakage current between the source (S) and drain (D) of the DUT is greater than or equal to the second current threshold, then the gate (G) of the DUT is considered to have abnormal contact, and the DUT is deemed a defective device. Its contact test data is then saved.

[0111] In the embodiments of this application, when the test circuit switches to the contact test mode, if the source S, drain D, and gate G of the discrete device under test (DUT) are detected to be in normal contact, the test circuit is controlled to switch to the aging test mode. In the aging test mode, the test circuit is used to switch between the first and second aging test modes in a set order, or to directly execute the third aging test mode, to complete the high-temperature reverse bias test and high-temperature gate bias test of the DUT. That is, the test circuit can also be configured to simultaneously complete the high-temperature reverse bias test and high-temperature gate bias test of the DUT in the aging test mode, thereby simplifying the aging test process and improving test efficiency, as described below.

[0112] like Figure 8 As shown, Figure 8 This is a schematic diagram of the test circuit provided in the embodiment of this application in the first aging test mode.

[0113] In this embodiment, the first aging test mode is used for high-temperature reverse bias testing of the discrete device under test (DUT). Specifically, the switching circuit connects the second voltage source 122 between the source S and drain D of the DUT. The second voltage source 122 can be connected in either the forward or reverse direction between the source S and drain D of the DUT, connecting the source S and gate G of the DUT. A current sampler 123 is also connected between the second voltage source 122 and either the source S or drain D of the DUT. That is, during the high-temperature reverse bias test, a bias voltage is applied between the source S and drain D of the DUT. For example, if the second voltage source 122 applies a bias voltage of 2000V, the gate G and source S are shorted, putting the DUT in a turned-off state. The leakage current between the source S and drain D of the DUT is detected by the current sampler 123.

[0114] In the high-temperature reverse bias test, a large bias voltage is applied between the source (S) and drain (D) of the discrete device under test (DUT). By detecting the leakage current between the source (S) and drain (D), it is possible to effectively determine whether there are abnormalities such as increased leakage current, micro-breakdown, or defective conduction between the source (S) and drain (D), thus verifying the reliability of the DUT under high-voltage reverse bias conditions. If the leakage current between the source (S) and drain (D) of the DUT is less than the third current threshold, the high-temperature reverse bias of the DUT is normal. The third current threshold is the critical current value for normal high-temperature reverse bias of the DUT. If the leakage current between the source (S) and drain (D) of the DUT under high-voltage bias is greater than or equal to the third current threshold, the high-temperature reverse bias of the DUT is abnormal, and the DUT is judged as a defective device, and its aging test data is saved.

[0115] like Figure 9 As shown, Figure 9 This is a schematic diagram of the test circuit provided in the embodiment of this application in the second aging test mode.

[0116] In this embodiment, the second aging test mode is used for high-temperature gate bias testing of the discrete device under test (DUT). In the second aging test mode, a switching circuit connects the first voltage source 121 between the source S and gate G of the DUT, connects the source S and drain D of the DUT, and connects the current sampler 123 between the first voltage source 121 and either the source S or the gate G of the DUT. That is, during the high-temperature gate bias test, a bias voltage is applied between the gate G and source S of the DUT to keep it in a conducting state. For example, if the first voltage source 121 applies a 25V bias voltage, the source S and drain D are shorted, and the leakage current of the gate G of the DUT is detected by the current sampler 123.

[0117] In the high-temperature gate bias test, a constant bias voltage is applied to the gate G of the discrete device under test (DUT). By detecting the leakage current of the gate G, it is possible to effectively determine whether there are abnormalities such as increased leakage current, micro-breakdown, or defective conduction in the gate G, thus verifying the reliability of the DUT under high-voltage gate bias conditions. If the leakage current of the gate G of the DUT is less than the fourth current threshold, the high-temperature gate bias of the DUT is normal. The fourth current threshold is the critical current value for normal high-temperature gate bias of the DUT. If the leakage current of the gate G of the DUT is greater than or equal to the fourth current threshold under the bias voltage, the high-temperature gate bias of the DUT is abnormal, and the DUT is judged as a defective device, and its aging test data is saved.

[0118] like Figure 10As shown, Figure 10 This is a schematic diagram of the test circuit provided in the embodiment of this application in the third aging test mode. In the aging test equipment, the test circuit may include multiple current samplers 123.

[0119] In this embodiment, the third aging test mode is used for high-temperature reverse bias testing and high-temperature gate bias testing of the discrete device under test (DUT). In the third aging test mode, the switching circuit connects the second voltage source 122 between the source S and drain D of the DUT, connects a current sampler 123 between the second voltage source 122 and either the source S or drain D of the DUT, connects the first voltage source 121 between the source S and gate G of the DUT, and connects the second voltage source 122 between the source S or gate G of the DUT. The specific aging test process is described in the above embodiment and will not be repeated here.

[0120] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. An aging test apparatus characterized by comprising: The aging test equipment includes: A test plate is used to hold at least one discrete device under test. The test circuit, connected to the aging board, is used to switch to contact test mode to perform contact test on the discrete device under test, or to switch to aging test mode to perform aging test on the discrete device under test. The contact test mode includes a first contact test mode and a second contact test mode. The first contact test mode is used to test the source and drain contacts of the discrete device under test, and the second contact test mode is used to test the gate contacts of the discrete device under test.

2. The aging test apparatus of claim 1, wherein The test circuit includes a first voltage source, a current sampler, and a switching circuit, wherein the switching circuit is connected to the first voltage source and the current sampler. In the first contact test mode, the switching circuit is used to connect the positive terminal of the first voltage source to the source of the discrete device under test, connect the negative terminal of the first voltage source to the drain of the discrete device under test, and connect the current sampler between the first voltage source and the source or drain of the discrete device under test. In the second contact test mode, the switching circuit is used to connect the first voltage source between the source and drain of the discrete device under test, and to connect the current sampler between the first voltage source and the source or drain of the discrete device under test.

3. The aging test apparatus of claim 2, wherein The aging test equipment also includes an aging chamber, in which the aging board is disposed. The aging chamber is used to heat and age the discrete device under test before the test circuit switches to the aging test mode.

4. The aging test apparatus of claim 3, wherein The aging test mode includes a first aging test mode, a second aging test mode, and a third aging test mode. The first aging test mode is used for high-temperature reverse bias test of the discrete device under test. The second aging test mode is used for high-temperature gate bias test of the discrete device under test. The third aging test mode is used for high-temperature reverse bias test and high-temperature gate bias test of the discrete device under test.

5. The aging test apparatus of claim 4, wherein The test circuit also includes a second voltage source, and the switching circuit is connected to the second voltage source, wherein the supply voltage of the second voltage source is higher than the supply voltage of the first voltage source; In the first aging test mode, the switching circuit is used to connect the second voltage source between the source and drain of the discrete device under test, connect the source and gate of the discrete device under test, and connect the current sampler between the second voltage source and the source or drain of the discrete device under test. In the second aging test mode, the switching circuit is used to connect the first voltage source between the source and gate of the discrete device under test, connect the source and drain of the discrete device under test, and connect the current sampler between the first voltage source and the source or gate of the discrete device under test.

6. The aging test apparatus of claim 5, wherein The test circuit includes multiple current samplers, and in the third aging test mode, the switching circuit is used for: The second voltage source is connected between the source and drain of the discrete device under test, and a current sampler is connected between the second voltage source and the source or drain of the discrete device under test. The first voltage source is connected between the source and gate of the discrete device under test, and a current sampler is connected between the second voltage source and the source or gate of the discrete device under test.

7. The aging test apparatus according to any one of claims 1 to 6, characterized by The aging test equipment also includes a connection circuit, which includes a first interface and a second interface coupled together. The first interface is connected to the test circuit, and the second interface is disposed on the aging board for connecting the discrete device under test.

8. The aging test apparatus according to any one of claims 1 to 6, characterized by The switching circuit includes multiple relays, which are used to control the on and off states of the multiple relays to switch between the contact test mode and the aging test mode.

9. The aging test apparatus of claim 8, wherein, The test circuit also includes a protection circuit, which is connected to the test circuit, the plurality of relays, the first voltage source, and the second voltage source. The protection circuit is used to detect the voltage and current of the test circuit, and when the voltage of the test circuit is greater than the fault voltage threshold or the current is greater than the fault current threshold, it controls at least one of the plurality of relays, the first voltage source and the second voltage source to turn off.

10. An aging test method characterized by, The aging test method is applied to an aging test equipment, which includes: A test plate is used to hold at least one discrete device under test. The test circuit, connected to the aging board, is used to switch to contact test mode to perform contact test on the discrete device under test, or to switch to aging test mode to perform aging test on the discrete device under test. The contact test mode includes a first contact test mode and a second contact test mode. The first contact test mode is used to test the source and drain contacts of the discrete device under test, and the second contact test mode is used to test the gate contacts of the discrete device under test. The aging test method includes: The test circuit is controlled to switch to the contact test mode, and the discrete device under test is subjected to contact test in the contact test mode. If the source, drain, and gate contacts of the discrete device under test are normal, the test circuit is controlled to switch to the aging test mode, and the discrete device under test is subjected to aging test in the aging test mode.

11. The aging test method according to claim 10, characterized in that, The aging test equipment further includes an aging chamber, the aging plate is disposed inside the aging chamber, the aging chamber is used to heat and age the discrete device under test, and the aging test method further includes: Before the test circuit is switched to the contact test mode, the aging chamber is controlled to heat and age the discrete device under test.

12. The aging test method according to claim 11, characterized in that, The aging test method also includes: After the test circuit is switched to the contact test mode and the discrete device under test is tested in the contact test mode, the aging chamber is controlled to heat and age the discrete device under test.

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