Chip frequency adjustment method and apparatus
By processing the sliding average of each component of the chip and calculating the power consumption difference, the stuttering problem in chip frequency adjustment was solved, and a smooth frequency adjustment effect was achieved.
Patent Information
- Application Number
- CN202610836641.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-10
- Publication Date
- 2026-08-25
AI Technical Summary
In existing technologies, chip frequency adjustment suffers from stuttering and poor frequency modulation effect.
By determining the frequency modulation request, the chip's components are subjected to a sliding average process over a preset time period to calculate the power consumption difference. The chip's power is then adjusted based on this power consumption difference. This includes a second sliding average process on the core's average power consumption. By combining the chip's total average power consumption and power consumption trend, transient load interference is eliminated, and frequency modulation stuttering is avoided.
It improves the chip frequency regulation effect, avoids frequency modulation stuttering, and achieves smooth, continuous, and fast power consumption-frequency coordinated response.
Smart Images
Figure CN122633012A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of chip frequency regulation, and more specifically, to a chip frequency regulation method and apparatus. Background Technology
[0002] During operation, the chip dynamically adjusts its frequency based on the performance load. By adjusting the chip's operating frequency, it optimizes power consumption and performance, improves energy efficiency, reduces heat generation, ensures system stability, and meets the performance requirements of different applications. Through frequency modulation, the device can provide sufficient computing power under high loads and save power under low loads, improving user experience and overall device reliability.
[0003] When a chip performs frequency modulation, it is limited by factors such as power consumption and temperature. In existing technologies, the frequency modulation method of the chip is prone to stuttering, resulting in poor frequency modulation performance. Summary of the Invention
[0004] The purpose of this invention is to provide a chip frequency adjustment method and apparatus that can avoid frequency modulation stuttering.
[0005] To achieve the above objectives, the technical solutions adopted in the embodiments of this application are as follows: In a first aspect, embodiments of this application provide a chip frequency adjustment method, the method comprising: Confirm frequency modulation request; When the frequency modulation request indicates a power consumption frequency modulation request, the power consumption of each component included in the chip within a preset time period is processed by a first moving average to obtain the average power consumption of each component. The total average power consumption of the chip is determined based on the average power consumption of each component. The average power consumption of the core is processed by a second moving average to obtain the short-term average power consumption of the core, wherein the chip includes components including cores; Determine the core power consumption trend based on the most recent N core power consumption values; The power difference is calculated based on the chip's total average power consumption, the short-term average power consumption of the cores, and the power consumption trend of the cores. The power of the chip is adjusted based on the power consumption difference.
[0006] In an optional implementation, the method further includes: Determine the current temperature of the chip; The current temperature is compared with the preset temperature, and a temperature control frequency modulation is generated based on the comparison result.
[0007] In an optional implementation, the method further includes: When the frequency modulation request instructs the OS to frequency modulate, the desired frequency to be sent is determined; Frequency modulation is performed based on the desired frequency.
[0008] In an optional implementation, the step of performing a first moving average process on the power consumption of each component included in the chip over a preset time period to obtain the average power consumption of each component when the frequency modulation request indicates a power consumption frequency modulation request includes: When the frequency modulation request indicates a power frequency modulation request, the power consumption of each component included in the chip is collected within a preset time period, wherein each component includes a core, a double data rate synchronous dynamic random access memory, a peripheral component interconnect fast bus, and a system on chip; For the power consumption of each component, a first sliding average process is performed based on a large window to obtain the average power consumption of each component.
[0009] In an optional implementation, the step of calculating the power difference based on the chip's total average power consumption, the short-term average power consumption of the cores, and the core power consumption trend includes: Determine the expected power consumption corresponding to the frequency modulation request; The average power consumption of the core is determined from the average power consumption of each component; Determine the prediction coefficients corresponding to the power consumption trend; The power difference is obtained based on the chip's total average power consumption, the core's average power consumption, the prediction coefficient, the short-term core's average power consumption, and the expected power consumption.
[0010] In an optional implementation, the power consumption difference is calculated using the following formula: ; in, Due to poor power consumption, Total average power consumption - average power consumption of cores + average power consumption of short-term cores For the power consumption trend of the core, The prediction coefficient corresponding to the power consumption trend. This represents the expected power consumption.
[0011] In an optional implementation, the step of adjusting the power of the chip based on the power consumption difference includes: Determine the current power consumption frequency of the chip; Based on the power consumption difference and the current power consumption frequency, determine the adjustment frequency value; The current power consumption frequency is adjusted based on the adjusted frequency value.
[0012] In an optional implementation, the method further includes: Determine the final effective frequency of the chip; The step of adjusting the power of the chip based on the power consumption difference includes: The power consumption limiting frequency is determined based on the adjusted frequency value; Compare the power consumption limit frequency with the final effective frequency; The smaller of the power consumption limit frequency and the final effective frequency is taken as the target frequency; The chip is frequency-tuned based on the target frequency.
[0013] In an optional implementation, the frequency modulation request includes a power consumption frequency modulation request, a temperature control frequency modulation request, and an OS frequency modulation request, wherein the temperature control frequency modulation request has a higher priority than the power consumption frequency modulation request, and the power consumption frequency modulation request has a higher priority than the OS frequency modulation request.
[0014] Secondly, embodiments of this application provide a chip frequency adjustment device, the device comprising: A determination module is used to determine a frequency modulation request; when the frequency modulation request indicates a power frequency modulation request, it performs a first moving average processing on the power consumption of each component included in the chip within a preset time period to obtain the average power consumption of each component; based on the average power consumption of each component, it determines the total average power consumption of the chip; it performs a second moving average processing on the average power consumption of the core to obtain the short-term average power consumption of the core, wherein the components included in the chip include cores; based on the power consumption of the cores in the most recent N times, it determines the power consumption trend of the cores; based on the total average power consumption of the chip, the short-term average power consumption of the cores, and the power consumption trend of the cores, it calculates the power consumption difference; and a frequency modulation module is used to adjust the power of the chip based on the power consumption difference.
[0015] Thirdly, embodiments of this application provide an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of the chip frequency adjustment method.
[0016] Fourthly, embodiments of this application provide a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the chip frequency adjustment method.
[0017] This application has the following beneficial effects: This application determines a frequency modulation request. When the frequency modulation request indicates a power consumption frequency modulation request, it performs a first moving average process on the power consumption of each component in the chip within a preset time period to obtain the average power consumption of each component. Based on the average power consumption of each component, it determines the total average power consumption of the chip. Then, it performs a second moving average process on the average power consumption of the core to obtain the short-term average power consumption of the core. The chip includes cores. Based on the power consumption of the cores in the most recent N times, it determines the power consumption trend of the cores. Based on the total average power consumption of the chip, the short-term average power consumption of the cores, and the power consumption trend of the cores, it calculates the power consumption difference. Based on the power consumption difference, it adjusts the power of the chip, thereby improving the frequency modulation effect and avoiding stuttering during frequency modulation. Attached Figure Description
[0018] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0019] Figure 1 A block diagram of an electronic device provided in an embodiment of the present invention; Figure 2 This is one of the flowcharts illustrating a chip frequency adjustment method provided in an embodiment of the present invention; Figure 3 This is a second schematic flowchart of a chip frequency adjustment method provided in an embodiment of the present invention; Figure 4 This is a third flowchart illustrating a chip frequency adjustment method provided in an embodiment of the present invention. Figure 5 This is the fourth flowchart illustrating a chip frequency adjustment method provided in an embodiment of the present invention. Figure 6 The fifth schematic flowchart of a chip frequency adjustment method provided in an embodiment of the present invention; Figure 7 This is a sixth flowchart illustrating a chip frequency adjustment method provided in an embodiment of the present invention. Figure 8 This is a structural block diagram of a chip frequency adjustment device provided in an embodiment of the present invention. Detailed Implementation
[0020] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.
[0021] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.
[0022] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.
[0023] In the description of this invention, it should be noted that if terms such as "upper," "lower," "inner," or "outer" are used to indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the product of this invention is usually placed, they are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this invention.
[0024] Furthermore, the terms "first" and "second" are used only to distinguish descriptions and should not be interpreted as indicating or implying relative importance.
[0025] In the description of this application, it should also be noted that, unless otherwise expressly specified and limited, the terms "set up," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.
[0026] Through extensive research, the inventors discovered that existing technologies have poor frequency modulation effects when adjusting the chip frequency.
[0027] In view of the above-mentioned problems, this embodiment provides a chip frequency adjustment method and apparatus. It can determine a frequency adjustment request, and when the frequency adjustment request indicates a power consumption frequency adjustment request, perform a first moving average process on the power consumption of each component included in the chip within a preset time period to obtain the average power consumption of each component. Based on the average power consumption of each component, the total average power consumption of the chip is determined. A second moving average process is performed on the average power consumption of the most recent N cores to obtain the short-term average power consumption of the cores. The chip includes cores as components. Based on the average power consumption of the cores, the power consumption trend of the cores is determined. Based on the total average power consumption of the chip, the short-term average power consumption of the cores, and the power consumption trend of the cores, the power consumption difference is calculated. Based on the power consumption difference, the power of the chip is adjusted, thereby improving the frequency adjustment effect and avoiding stuttering during frequency adjustment. The solution provided in this embodiment will be described in detail below.
[0028] This embodiment provides an electronic device capable of adjusting the chip frequency. In one possible implementation, the electronic device can be a user terminal, such as, but not limited to, a server, smartphone, personal computer (PC), tablet computer, personal digital assistant (PDA), and mobile internet device (MID).
[0029] Please refer to Figure 1 , Figure 1 This is a schematic diagram of the structure of the electronic device 100 provided in the embodiments of this application. The electronic device 100 may further include... Figure 1 The more or fewer components shown, or having the same Figure 1 The different configurations shown. Figure 1 The components shown can be implemented using hardware, software, or a combination thereof.
[0030] The electronic device 100 includes a chip frequency adjustment device 110, a memory 120, and a processor 130.
[0031] The components of the memory 120 and processor 130 are electrically connected directly or indirectly to achieve data transmission or interaction. For example, these components can be electrically connected to each other through one or more communication buses or signal lines. The chip frequency adjustment device 110 includes at least one software function module that can be stored in the memory 120 in the form of software or firmware or embedded in the operating system (OS) of the electronic device 100. The processor 130 is used to execute the executable modules stored in the memory 120, such as the software function modules and computer programs included in the chip frequency adjustment device 110.
[0032] The memory 120 may be, but is not limited to, Random Access Memory (RAM), Read Only Memory (ROM), Programmable Read-Only Memory (PROM), Erasable Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM), etc. The memory 120 is used to store programs, and the processor 130 executes the programs after receiving execution instructions.
[0033] Please refer to Figure 2 , Figure 2 For application Figure 1 The flowchart below shows a chip frequency adjustment method for an electronic device 100, and the method includes a detailed description of each step.
[0034] S201: Confirm frequency modulation request.
[0035] Frequency modulation requests can include power consumption frequency modulation requests, temperature control frequency modulation requests, and OS frequency modulation requests. Temperature control frequency modulation requests have a higher priority than power consumption frequency modulation requests, which in turn have a higher priority than OS frequency modulation requests.
[0036] Upon receiving simultaneous power consumption frequency modulation requests, temperature control frequency modulation requests, and OS frequency modulation requests, adjustments are made sequentially based on the priority of each request. First, the chip frequency is adjusted based on the temperature control frequency modulation request; then, the chip frequency is adjusted based on the power consumption frequency modulation request; and finally, the chip frequency is adjusted based on the OS frequency modulation request.
[0037] Specifically, a global variable can be created to determine which frequency modulation request is the power consumption frequency modulation request, temperature control frequency modulation request, or OS frequency modulation request.
[0038] For example, a global variable g_process_event is created, and different bits are used to distinguish the specific frequency modulation request and its priority. Bit0 is the temperature control frequency modulation request, which has the highest priority; Bit1 is the power consumption frequency modulation request, which has the second highest priority; and Bit2 is the OS frequency modulation request, which has the lowest priority.
[0039] When Bit0 is 1, it indicates that the frequency modulation request is a temperature control frequency modulation request; when Bit1 is 1, it indicates that the frequency modulation request is a power consumption frequency modulation request; and when Bit2 is 1, it indicates that the frequency modulation request is an OS frequency modulation request.
[0040] S202: When the frequency modulation request indicates power consumption frequency modulation, the power consumption of each component contained in the chip is processed by the first moving average within a preset time period to obtain the average power consumption of each component.
[0041] It should be noted that the components of a chip may include a core, double data rate synchronous dynamic random access memory, a high-speed bus for peripheral component interconnection, and a system-on-a-chip.
[0042] DDR (Double Data Rate SDRAM) is a type of synchronous dynamic random access memory that transmits data on both the rising and falling edges of the clock.
[0043] A core refers to an independent computing unit in a system-on-a-chip or central processing unit that has complete instruction fetching, decoding, execution, and write-back capabilities; its physical implementation is one or more homogeneous or heterogeneous microprocessor cores integrated on the same semiconductor substrate.
[0044] PCIe (Peripheral Component Interconnect Express) is a standardized computer bus interface specification based on a high-speed serial point-to-point topology. Its physical implementation consists of a PCIe controller and the PCIe physical layer circuit electrically connected to it, integrated into a system-on-a-chip or central processing unit, to provide a low-latency, high-bandwidth, hot-pluggable, and quality-of-service data communication channel between the host and one or more peripherals.
[0045] A SoC (System on Chip) is a complete microelectronic system that integrates heterogeneous computing and control modules, such as a general-purpose processor core, a graphics processor core, a digital signal processor core, a memory controller, a high-speed interconnect fabric, an input / output subsystem, and one or more dedicated hardware accelerators, onto a single semiconductor substrate.
[0046] S203: Determine the total average power consumption of the chip based on the average power consumption of each component.
[0047] S204: Perform a second moving average on the average power consumption of the core to obtain the average power consumption of the core in the short term.
[0048] The chip contains components including a core.
[0049] S205: Determine the power consumption trend of a core based on the power consumption of the most recent N cores.
[0050] S206: Calculate the power difference based on the chip's total average power consumption, the short-term average power consumption of the core, and the core's power consumption trend.
[0051] S207: Adjusts the chip's power based on power consumption difference.
[0052] When Bit 1 of the global variable `g_process_event` corresponding to the frequency modulation request is 1, it indicates that the frequency modulation request is a power-saving frequency modulation request, determining the power consumption of the chip's cores, Double Data Rate Synchronous Dynamic Random Access Memory, Peripheral Component Interconnect Fast Bus, and On-Chip System within a preset time period. It should be noted that the preset time period can be set based on actual conditions.
[0053] The power consumption of the core, Double Data Rate Synchronous Dynamic Random Access Memory, Peripheral Component Interconnect Fast Bus, and System-on-Chip over a preset time period is processed by a first moving average, and the average power consumption of the core is processed by a second moving average, so as to obtain the average power consumption of the core, Double Data Rate Synchronous Dynamic Random Access Memory, Peripheral Component Interconnect Fast Bus, and System-on-Chip, as well as the short-term average power consumption of the core.
[0054] The window for the first moving average process is larger than the window for the second moving average process.
[0055] For example, the first sliding average process can be set to a window size of 100, and the second sliding average process can be set to a window size of 5.
[0056] The average power consumption of each component within a preset time period is obtained by performing a sliding average of the power consumption of each component in the chip over a large window. The average power consumption of the core obtained in the previous step is then used as input, and a short-term average power consumption of the core is generated by performing a sliding average of the power consumption of each component within a small window.
[0057] Large-window moving average can effectively suppress high-frequency interference caused by sensor noise, power supply ripple and instantaneous load spikes, so that the average power consumption of each component has a high signal-to-noise ratio, providing a high-confidence benchmark data source for subsequent power consumption trend prediction and power difference calculation. Based on small-window moving average, while preserving the steady-state characteristics of the average power consumption of the core, the detection delay of power consumption rise / fall trend is reduced. By establishing a steady-state anchor point through a large window and identifying the actual drift through a small window, the problem of control oscillation caused by power consumption sampling jitter in existing technologies is fundamentally overcome.
[0058] The average power consumption of the core is obtained based on the first moving average processing, the power consumption trend of the core is determined, and the power consumption difference is calculated based on the total average power consumption of the chip, the short-term average power consumption of the core, and the power consumption trend of the core. The chip frequency is adjusted based on the power consumption difference to eliminate the interference of transient load of the core on the deviation calculation. The power consumption difference is obtained based on the dual-window data processing to avoid stuttering or incorrect adjustment when adjusting the chip frequency.
[0059] Adjusting the chip frequency based on a frequency modulation request can be implemented in various ways. In one implementation, such as... Figure 3 As shown, it includes the following steps: S301: Determine the current temperature of the chip.
[0060] S302: Compare the current temperature with the preset temperature and generate a temperature control frequency adjustment based on the comparison result.
[0061] Specifically, temperature detection configuration is performed by reading the user-preset first preset temperature TL1, second preset temperature TL2, and third preset temperature Thermal Trip configurations. The first preset temperature TL1 is less than the second preset temperature TL2, and the second preset temperature TL2 is less than the third preset temperature Thermal Trip. When the current temperature reaches the second preset temperature TL2, a temperature control frequency adjustment request is generated.
[0062] The chip's current temperature is compared with various preset temperatures, and frequency adjustment is performed based on the comparison results. For example, when the current temperature reaches the first preset temperature TL1, an alarm message is output. By reducing the chip's frequency, the current temperature of the chip is reduced to the first target temperature, and the frequency reduction of the first preset temperature TL1 is released.
[0063] It should be noted that the first preset temperature TL1 can be set to 80°, and the first target temperature can be set to 75°.
[0064] When the current temperature reaches the second preset temperature TL2, a frequency reduction operation is triggered, lowering the chip's current temperature to the second target temperature. When the chip's current temperature drops to the second target temperature, the frequency reduction at the second preset temperature TL2 is deactivated. The first target temperature is lower than the second target temperature.
[0065] It should be noted that the second preset temperature TL2 can be set to 90°, and the second target temperature can be set to 85°.
[0066] When downclocking based on the second preset temperature, the final effective frequency of the chip and the frequency corresponding to downclocking based on the second preset temperature can be determined. The final effective frequency of the chip is compared with the frequency corresponding to downclocking based on the second preset temperature. If the frequency corresponding to downclocking based on the second preset temperature is smaller, the underlying driver module is called to set the frequency to the frequency corresponding to downclocking based on the second preset temperature, and the frequency corresponding to downclocking based on the second preset temperature is assigned to the final effective frequency. Otherwise, no processing is performed, and Bit0 is cleared.
[0067] When the current temperature reaches the third preset temperature (Thermal Trip), a shutdown operation is triggered.
[0068] The third preset temperature, Thermal Trip, can be set to 100°.
[0069] It should be noted that the first preset temperature TL1 and the third preset temperature Thermal Trip do not require software intervention.
[0070] It should be noted that the chip's final effective frequency is updated only through a comparison and then assignment process. During the chip's initial startup, the final effective frequency is the factory-set initial value. In later operation, the final effective frequency can be the minimum of the frequencies corresponding to temperature control, power consumption regulation, and OS frequency modulation.
[0071] Adjusting the chip frequency based on a frequency modulation request can be implemented in various ways. In another implementation, such as... Figure 4 As shown, it includes the following steps: S401: When the frequency modulation request instructs the OS to adjust the frequency, determine the desired frequency to be sent.
[0072] S402: Frequency modulation is performed based on the desired frequency.
[0073] When the frequency adjustment request instructs the OS to adjust the frequency, the frequency adjustment target is confirmed according to the OS frequency adjustment. The frequency adjustment target includes the CPU core to be adjusted and the expected frequency corresponding to the CPU core to be adjusted.
[0074] The frequency modulation target is communicated to the data processing module, and bit 2 of g_process_event is set to 1. If there is no such event, the original value is retained and no processing is performed.
[0075] Read the expected frequency corresponding to the CPU core to be regulated and compare it with the final effective frequency. If the expected frequency corresponding to the CPU core to be regulated is less than the final effective frequency, then set the frequency of the specified CPU core to the expected frequency corresponding to the CPU core to be regulated and put the expected frequency corresponding to the CPU core to be regulated into the storage area for later use. Otherwise, set the frequency of the CPU core to the final effective frequency and clear Bit2 in both cases.
[0076] There are multiple ways to calculate power difference based on the chip's total average power consumption, short-term core average power consumption, and core power consumption trends. One such method is... Figure 5 As shown, it includes the following steps: S501: When the frequency modulation request indicates a power frequency modulation request, the power consumption of each component in the chip is collected within a preset time period.
[0077] The components include the core, double data rate synchronous dynamic random access memory, peripheral component interconnect bus, and system-on-a-chip.
[0078] S502: For the power consumption of each component, a first sliding average process is performed based on a large window to obtain the average power consumption of each component.
[0079] S503: Determine the total average power consumption of the chip based on the average power consumption of each component.
[0080] S504: Perform a second moving average on the average power consumption of the core to obtain the average power consumption of the core in the short term.
[0081] S505: Determines the power consumption trend of a core based on the power consumption of the most recent N cores.
[0082] S506: Determine the expected power consumption corresponding to the frequency modulation request.
[0083] S507: Determine the average power consumption of the core from the average power consumption of each component.
[0084] S508: Determine the prediction coefficients corresponding to the power consumption trend.
[0085] S509: Based on the chip's total average power consumption, the core's average power consumption, the prediction coefficient, the short-term core's average power consumption, and the expected power consumption, the power consumption difference is obtained.
[0086] The power consumption of each component within the VR chip is collected over a preset time period by accessing the VR chip via I2C. Specifically, this includes core power consumption, on-chip system power consumption, peripheral component interconnection fast bus power consumption, and double data rate synchronous dynamic random access memory power consumption. The power consumption of each component over the preset time period is then averaged using a moving average algorithm. This involves performing a first moving average on the power consumption of each component over the preset time period to calculate the average power consumption of each component over the preset time period. The total average power consumption is then calculated based on the average power consumption of each component and denoted as power_a. The maximum number of averages can be 100.
[0087] Among them, the average power consumption of the core in the average power consumption of each component is denoted as core_avg_power. The average power consumption of the core, core_avg_power, is put into a small window and averaged again, that is, a second moving average process is performed, denoted as core_pout.
[0088] Using a linear regression prediction algorithm, the power consumption of the next core is predicted based on the power consumption of the most recent N cores, thus obtaining the power consumption trend of the cores. This data is then stored in memory.
[0089] Using the data stored in memory, the power consumption difference delta_power is calculated using a formula.
[0090] The power consumption difference is calculated using the following formula: ; in, Due to poor power consumption, Total average power consumption - average power consumption of cores + average power consumption of short-term cores For the power consumption trend of the core, The prediction coefficient corresponding to the power consumption trend. This represents the expected power consumption.
[0091] There are several ways to adjust the chip's power based on power consumption differences. In one such method, such as... Figure 6 As shown, it includes the following steps: S601: Determines the current power consumption frequency of the chip.
[0092] S602: Determine the adjustment frequency value based on the power consumption difference and the current power consumption frequency.
[0093] S603: Adjusts the current power consumption frequency based on the adjustment frequency value.
[0094] Based on the power consumption difference, a factor 'a' is derived from the current frequency and the power consumption difference, and the adjusted frequency value is calculated based on this factor 'a'.
[0095] Chip power consumption control is a complex process. CPU power consumption depends not only on voltage and frequency, but also on various factors such as manufacturing process, architecture design, and load conditions. In some simplified models, power consumption can be estimated based on voltage and frequency. Typically, dynamic power consumption can be estimated using the following formula: ; ; in: , Indicates dynamic power consumption. It is a switched capacitor. V It is the operating voltage. This is the current power consumption frequency. It is an activity factor.
[0096] In determining 'a', based on the ratio of power consumption difference to current power consumption frequency, 'a' can be directly obtained.
[0097] The ratio of the power consumption difference to factor a is calculated to obtain the adjustment frequency value. The specific implementation method for adjusting the current power consumption frequency based on this adjustment frequency value can be as follows: Based on preset frequency modulation parameters, the maximum step size during a single frequency adjustment is controlled. The frequency modulation parameters may include the frequency modulation step size and the maximum frequency modulation step size.
[0098] The frequency adjustment value is compared with the frequency modulation step size. If the frequency adjustment value reaches the maximum frequency modulation step size, the step size of this frequency modulation is set to the maximum frequency modulation step size, and frequency modulation is performed according to the maximum frequency modulation step size.
[0099] The frequency is increased or decreased depending on whether the adjustment value is positive or negative. If the adjustment value is positive, the frequency is decreased, and if it is negative, the frequency is increased.
[0100] There are several ways to implement chip frequency modulation based on power consumption. In another implementation method, such as... Figure 7 As shown, it includes the following steps: S701: Determines the final operating frequency of the chip.
[0101] S702: Determines the power consumption limit frequency based on the adjusted frequency value.
[0102] S703: Compares the power-limited frequency with the final effective frequency.
[0103] S704: Select the smaller of the power-limited frequency and the final effective frequency as the target frequency.
[0104] S705: Frequency modulation of the chip based on the target frequency.
[0105] Assign the value of the core's average power consumption ± the adjusted frequency value to the power limit frequency, and set bit 1 of g_process_event to 1. If there is no such event, keep the original value and do nothing.
[0106] Determine the difference between the power limit frequency and the final effective frequency. If the power limit frequency is smaller, call the underlying driver module to set the frequency to the power limit frequency and the final effective frequency to the power limit frequency. Otherwise, do nothing and clear Bit1 in both cases.
[0107] The power consumption difference is quantized and directly mapped to the frequency adjustment step size, and frequency adjustment is performed based on the adjustment step size to avoid stuttering during the frequency adjustment process. The frequency adjustment process has no obvious step jumps, no repeated oscillations, and no delayed response lag, exhibiting a smooth, continuous, and fast-converging power consumption-frequency coordinated response.
[0108] When g_process_event is 0, it indicates that no frequency adjustment request has been received, and the chip frequency is adjusted according to the default frequency adjustment method. Specifically, this may include comparing the temperature limit frequency and the power limit frequency, and setting the smaller one as the final effective frequency. The temperature limit frequency and the power limit frequency can be preset.
[0109] Alternatively, read the frequency of each CPU core specified by the OS and compare it with the final effective frequency. If the frequency specified by the OS is less than the final effective frequency, set the frequency of the specified CPU core to the frequency specified by the OS; otherwise, set the frequency of the CPU core to the final effective frequency.
[0110] Please refer to Figure 6 This application embodiment also provides an application for Figure 1 The chip frequency adjustment device 110 of the electronic device 100 includes: The determining module 111 is used to determine a frequency modulation request; when the frequency modulation request indicates a power frequency modulation request, it performs a first moving average processing on the power consumption of each component included in the chip within a preset time period to obtain the average power consumption of each component; based on the average power consumption of each component, it determines the total average power consumption of the chip; it performs a second moving average processing on the average power consumption of the core to obtain the short-term average power consumption of the core, wherein the components included in the chip include cores; based on the power consumption of the cores in the most recent N times, it determines the power consumption trend of the cores; based on the total average power consumption of the chip, the short-term average power consumption of the cores, and the power consumption trend of the cores, it calculates the power consumption difference; Frequency modulation module 112 is used to adjust the power of the chip based on the power consumption difference.
[0111] This application also provides an electronic device 100, which includes a processor 130 and a memory 120. The memory 120 stores computer-executable instructions, which, when executed by the processor 130, implement the chip frequency adjustment method.
[0112] This application embodiment also provides a computer-readable storage medium storing a computer program, which, when executed by the processor 130, implements the chip frequency adjustment method.
[0113] In the embodiments provided in this application, it should be understood that the disclosed apparatus and methods can also be implemented in other ways. The apparatus embodiments described above are merely illustrative. For example, the flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.
[0114] Furthermore, the functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part. If the function is implemented as a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes: USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, optical disks, and other media capable of storing program code.
[0115] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0116] The above descriptions are merely various embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A chip frequency adjustment method, characterized in that, The method includes: Confirm frequency modulation request; When the frequency modulation request indicates a power consumption frequency modulation request, the power consumption of each component included in the chip within a preset time period is processed by a first moving average to obtain the average power consumption of each component. The total average power consumption of the chip is determined based on the average power consumption of each component. The average power consumption of the core is processed by a second moving average to obtain the short-term average power consumption of the core, wherein the chip includes components including cores; Determine the core power consumption trend based on the most recent N core power consumption values; The power difference is calculated based on the chip's total average power consumption, the short-term average power consumption of the cores, and the power consumption trend of the cores. The power of the chip is adjusted based on the power consumption difference.
2. The method according to claim 1, characterized in that, The method further includes: Determine the current temperature of the chip; The current temperature is compared with the preset temperature, and a temperature control frequency modulation is generated based on the comparison result.
3. The method according to claim 1, characterized in that, The method further includes: When the frequency modulation request instructs the OS to frequency modulate, the desired frequency to be sent is determined; Frequency modulation is performed based on the desired frequency.
4. The method according to claim 1, characterized in that, The step of performing a first moving average process on the power consumption of each component included in the chip over a preset time period when the frequency modulation request indicates a power consumption frequency modulation request, to obtain the average power consumption of each component, includes: When the frequency modulation request indicates a power frequency modulation request, the power consumption of each component included in the chip is collected within a preset time period, wherein each component includes a core, a double data rate synchronous dynamic random access memory, a peripheral component interconnect fast bus, and a system on chip; For the power consumption of each component, a first sliding average process is performed based on a large window to obtain the average power consumption of each component.
5. The method according to claim 1, characterized in that, The step of calculating the power difference based on the chip's total average power consumption, the short-term average power consumption of the cores, and the core power consumption trend includes: Determine the expected power consumption corresponding to the frequency modulation request; The average power consumption of the core is determined from the average power consumption of each component; Determine the prediction coefficients corresponding to the power consumption trend; The power difference is obtained based on the chip's total average power consumption, the core's average power consumption, the prediction coefficient, the short-term core's average power consumption, and the expected power consumption.
6. The method according to claim 5, characterized in that, The power consumption difference is calculated using the following formula: ； in, Due to poor power consumption, Total average power consumption - average power consumption of cores + average power consumption of short-term cores For the power consumption trend of the core, The prediction coefficient corresponding to the power consumption trend. This represents the expected power consumption.
7. The method according to claim 1, characterized in that, The step of adjusting the power of the chip based on the power consumption difference includes: Determine the current power consumption frequency of the chip; Based on the power consumption difference and the current power consumption frequency, determine the adjustment frequency value; The current power consumption frequency is adjusted based on the adjusted frequency value.
8. The method according to claim 7, characterized in that, The method further includes: Determine the final effective frequency of the chip; The step of adjusting the power of the chip based on the power consumption difference includes: The power consumption limiting frequency is determined based on the adjusted frequency value; Compare the power consumption limit frequency with the final effective frequency; The smaller of the power consumption limit frequency and the final effective frequency is taken as the target frequency; The chip is frequency-tuned based on the target frequency.
9. The method according to claim 1, characterized in that, The frequency modulation request includes a power consumption frequency modulation request, a temperature control frequency modulation request, and an OS frequency modulation request. The temperature control frequency modulation request has a higher priority than the power consumption frequency modulation request, and the power consumption frequency modulation request has a higher priority than the OS frequency modulation request.
10. A chip frequency adjustment device, characterized in that, The device includes: A determination module is used to determine a frequency modulation request; when the frequency modulation request indicates a power frequency modulation request, the module performs a first moving average processing on the power consumption of each component included in the chip within a preset time period to obtain the average power consumption of each component; based on the average power consumption of each component, the module determines the total average power consumption of the chip; the module performs a second moving average processing on the average power consumption of the core to obtain the short-term average power consumption of the core, wherein the components included in the chip include cores; based on the power consumption of the cores in the most recent N times, the module determines the power consumption trend of the cores; based on the total average power consumption of the chip, the short-term average power consumption of the cores, and the power consumption trend of the cores, the module calculates the power consumption difference. A frequency modulation module is used to adjust the power of the chip based on the power consumption difference.