A beam control method of a spaceborne Ka-band analog multi-beam phased array antenna

Abstract

The application provides a beam control method of a spaceborne Ka-band analog multi-beam phased array antenna, and relates to the technical field of phased array antennas, which comprises the following steps: constructing a three-level wave control architecture and configuring an antenna array, wherein the architecture comprises a first FPGA, a second FPGA and an ARM processor, and the antenna array is composed of antenna units; receiving and analyzing a beam switching instruction by the ARM processor to obtain a target beam pointing direction, a target operating frequency point and a target beam mode; identifying the target beam mode by the first FPGA to determine an array gating scale and gate the antenna units; calculating a phase shift code by a dispersion compensation method based on the target operating frequency point and issuing a digital control phase shifter; and searching for an attenuation control code from a wave control code table according to the target beam pointing direction and issuing a digital control attenuator, so that the multi-beam comprehensive control of the hundred-nanosecond-level beam fast switching, the multi-beam pointing consistency and the wide and narrow beam flexible compatibility can be realized in the spaceborne wave beam working mode.

Description

Technical Field

[0001] This invention relates to the field of phased array antenna technology, and in particular to a beam control method for a spaceborne Ka-band analog multi-beam phased array antenna. Background Technology

[0002] Spaceborne Ka-band multi-beam phased array antennas are the core payload of satellite communication systems. Through electronically controlled beamforming and pointing, they achieve high-capacity communication coverage over ground targets. With the rapid development of low-Earth orbit satellite constellations and high-throughput satellite systems, spaceborne antennas must simultaneously meet the requirements of wideband operation, independent multi-beam control, rapid beam switching, and strict constraints on weight, power consumption, and reliability. This places higher demands on the integration and control flexibility of antenna systems.

[0003] To achieve simultaneous operation of multiple beams, existing spaceborne multi-beam phased array antennas typically employ a fully connected beamforming architecture, with multiple phase shifters and attenuators configured at the rear end of each antenna element. As the number of beams increases, the number of phase shifters and control chips grows exponentially, leading to a sharp increase in the interconnect complexity of the beamforming network. Under this architecture, traditional solutions typically employ a centralized beam control architecture with a single processor, where the same chip handles all tasks, including satellite platform communication response, beam pointing calculation, beam control code calculation, and multi-channel code value distribution. However, in spaceborne beam-hopping operation mode, beam scheduling time requirements are no greater than 62.5 μs and handover execution time requirements are no greater than 100 ns. In this architecture, the main control chip resources are continuously occupied by tasks such as communication protocol processing, and there are significant time delays in the beam control code calculation and distribution stages, failing to meet the handover execution time requirements at the nanosecond level.

[0004] Therefore, it is necessary to provide a beam control method and system for a spaceborne Ka-band analog multi-beam phased array antenna to solve the above-mentioned technical problems. Summary of the Invention

[0005] To address the aforementioned technical problems, this invention provides a beam control method and system for a spaceborne Ka-band analog multi-beam phased array antenna. This method solves the problem that existing spaceborne phased arrays suffer from slow beam switching speeds and limited multi-beam parallel control capabilities due to their single-processor centralized beam control architecture, making it difficult to meet the requirements for switching execution times down to the nanosecond level.

[0006] This invention provides a beam control method for a spaceborne Ka-band analog multi-beam phased array antenna, the method comprising: A three-level beam control architecture is constructed and an antenna array is configured. The three-level beam control architecture includes a first FPGA, a second FPGA and an ARM processor. The antenna array is composed of antenna elements. The antenna elements are equipped with multiple digitally controlled phase shifters and multiple digitally controlled attenuators. The ARM processor receives and parses the beam switching command sent by the satellite platform to obtain the target beam direction, target operating frequency, and target beam mode. The first FPGA identifies the target beam pattern, determines the antenna array gating scale, and selects a corresponding number of antenna elements according to the antenna array gating scale. The first FPGA calculates the phase shift code of the antenna element based on the target operating frequency using a dispersion compensation method, and sends the phase shift code to the multi-channel digitally controlled phase shifter; and searches for the attenuation control code of the antenna element from a preset beam control code table according to the target beam direction, and sends the attenuation control code to the multi-channel digitally controlled attenuator.

[0007] Preferably, the step of receiving and parsing the beam switching command sent by the satellite platform through the ARM processor to obtain the target beam direction, target operating frequency, and target beam mode specifically includes: The ARM processor receives beam switching command frames issued by the satellite platform. The beam switching command frame is subjected to frame header verification, length verification and CRC cyclic redundancy check. After all verifications pass, the logical beam number is extracted from the beam switching command frame. Based on the logical beam number, the target beam direction, the target operating frequency, and the target beam mode are obtained by searching the beam parameter mapping table pre-stored inside the ARM processor. The target beam pointing, the target operating frequency, and the target beam pattern are subjected to boundary validity checks. If the boundary validity checks all pass, the target beam pointing, the target operating frequency, and the target beam pattern are packaged into a control data packet according to a preset communication protocol, and the control data packet is sent to the first FPGA; otherwise, an instruction exception message is generated and sent to the satellite platform.

[0008] Preferably, the step of identifying the target beam pattern through the first FPGA, determining the antenna array gating scale, and selecting a corresponding number of antenna elements according to the antenna array gating scale specifically includes: The target beam pattern is identified by the first FPGA, and the target beam pattern includes a service beam pattern and a signaling beam pattern; If the target beam pattern is the service beam pattern, then the antenna array selection scale is determined to be the full array scale, all antenna elements of the antenna array are selected, and amplitude taper weighting processing is performed on all antenna elements to form a narrow beam. If the target beam pattern is the signaling beam pattern, then the antenna array selection scale is determined to be a partial array scale, and a portion of the antenna elements are selected from the antenna array according to the equal-interval sparse extraction strategy to form a wide beam.

[0009] Preferably, the step of performing amplitude taper weighting processing on all antenna elements to form a narrow beam specifically includes: Obtain the total number N of all antenna elements, and use the Taylor weighting function to calculate the low sidelobe amplitude weighting coefficient of the i-th antenna element. The corresponding calculation formula is as follows: In the formula, Represents the coefficients of the nth-order Taylor weighting; The center element number of the antenna array is indicated; m represents the total Taylor weighting order. Represents the cosine function; The target attenuation of the multi-channel digitally controlled attenuator corresponding to the antenna element is determined based on the low sidelobe amplitude weighting coefficient, wherein the target attenuation is negatively correlated with the low sidelobe amplitude weighting coefficient. The attenuation control code corresponding to the target attenuation amount is sent to the multi-channel digitally controlled attenuator, and the radio frequency signals of all antenna elements are attenuated according to the attenuation control code to form the narrow beam.

[0010] Preferably, the step of calculating the phase-shifting code of the antenna element using the first FPGA based on the target operating frequency and employing a dispersion compensation method, and then sending the phase-shifting code to the multi-channel digitally controlled phase shifter, specifically includes: Obtain the antenna element position coordinates of the antenna array, the target beam direction, and the target operating frequency; Determine the target operating frequency band based on the target operating frequency point, divide the target operating frequency band into sub-bands, and take the sub-band where the target operating frequency point is located as the target sub-band, and obtain the sub-band center frequency corresponding to the target sub-band; Based on the antenna element position coordinates and the target beam direction, calculate the basic phase compensation amount of the antenna element at the sub-band center frequency; The basic phase compensation quantity of the antenna element is quantized and mapped into a target phase shift code, and the target phase shift code is sent down to the multi-channel digitally controlled phase shifter corresponding to the antenna element; The phase shift amount of the target phase shift code is based on the center frequency of the sub-band and is used to align the beams operating at different frequency points within the target operating frequency band.

[0011] Preferably, the step of calculating the fundamental phase compensation amount of the antenna element at the sub-band center frequency based on the antenna element position coordinates and the target beam direction specifically includes: For the i-th antenna element, calculate the fundamental phase compensation amount of the i-th antenna element at the sub-band center frequency f. The corresponding calculation formula is as follows: In the formula, c represents the speed of light; This represents the position vector of the i-th antenna element; This represents the unit direction vector pointing to the target beam. Indicates the elevation angle to which the target beam is pointing; Indicates the azimuth angle to which the target beam is pointing; This represents the dot product of the position vector of the i-th antenna element and the unit direction vector pointing to the target beam.

[0012] Preferably, the software loading and on-orbit reconfiguration of the first FPGA are performed via the second FPGA, specifically including: Monitor the working status of the first FPGA and receive the reconfiguration command sent by the satellite platform; When the first FPGA is detected to be powered on, the pre-stored main program configuration file is read from the configuration storage area of ​​the second FPGA and loaded into the first FPGA so that the first FPGA enters the normal working state. When the reconfiguration instruction is received, the corresponding FPGA configuration file is obtained according to the reconfiguration instruction, the integrity and legality of the FPGA configuration file are verified, and after the verification is passed, the FPGA configuration file is loaded into the first FPGA to update the first FPGA; When an abnormal operation of the first FPGA is detected, a pre-stored backup configuration file is retrieved from the configuration storage area and loaded into the first FPGA to restore the normal working state of the first FPGA.

[0013] A beam control system for a spaceborne Ka-band analog multi-beam phased array antenna, the system comprising: An architecture configuration module is used to construct a three-level beam control architecture and configure the antenna array. The three-level beam control architecture includes a first FPGA, a second FPGA and an ARM processor. The antenna array is composed of antenna elements. The antenna elements are equipped with multiple digitally controlled phase shifters and multiple digitally controlled attenuators. The instruction parsing module is used to receive and parse the beam switching instructions sent by the satellite platform through the ARM processor to obtain the target beam direction, target operating frequency, and target beam mode. The array gating module is used to identify the target beam pattern through the first FPGA, determine the antenna array gating scale, and select a corresponding number of antenna elements according to the antenna array gating scale. The amplitude and phase control module is used to calculate the phase shift code of the antenna element based on the target operating frequency using the first FPGA and employing a dispersion compensation method, and to send the phase shift code to the multi-channel digitally controlled phase shifter; and to look up the attenuation control code of the antenna element from a preset beam control code table according to the target beam direction, and to send the attenuation control code to the multi-channel digitally controlled attenuator.

[0014] An electronic device includes a memory and a processor, wherein the memory stores a computer program, and when the processor runs the computer program stored in the memory, the processor executes the steps of a beam control method for a spaceborne Ka-band analog multi-beam phased array antenna as described in any of the preceding claims.

[0015] A readable storage medium storing a computer program, which, when executed by a processor, is used to implement the steps of a beam control method for a spaceborne Ka-band analog multi-beam phased array antenna as described in any of the preceding claims.

[0016] Compared with related technologies, the beam control method and system for a spaceborne Ka-band analog multi-beam phased array antenna provided by this invention have the following advantages: This invention constructs a three-level beam control architecture and configures an antenna array. The three-level beam control architecture includes a first FPGA, a second FPGA, and an ARM processor. The antenna array is composed of antenna elements, each equipped with multiple digitally controlled phase shifters and multiple digitally controlled attenuators. The ARM processor receives and parses beam switching commands sent by the satellite platform to obtain the target beam direction, target operating frequency, and target beam mode. The first FPGA identifies the target beam mode, determines the antenna array gating scale, and selects the corresponding number of antenna elements according to the antenna array gating scale. Based on the target operating frequency, the first FPGA calculates the phase shift code of the antenna element using a dispersion compensation method and sends the phase shift code to the multiple digitally controlled phase shifters. Furthermore, based on the target beam direction, the attenuation control code of the antenna element is looked up from a preset beam control code table and sent to the multiple digitally controlled attenuators. This enables multi-beam integrated control in satellite-borne beam-hopping operation mode, achieving nanosecond-level rapid beam switching, consistent multi-beam direction, and flexible compatibility between wide and narrow beams.

[0017] The present invention realizes the separation of communication response and beam control tasks on the spaceborne platform by constructing a three-level beam control architecture composed of an ARM processor, a first FPGA, and a second FPGA. Among them, the ARM processor focuses on processing satellite platform instruction reception and parsing, the first FPGA focuses on completing phase shift code calculation, attenuation control code lookup, and multi-channel code value distribution, and the second FPGA is used for software loading and on-orbit reconfiguration of the first FPGA. The three levels have clear division of labor and cooperate in parallel, liberating the code value calculation and distribution link in the beam switching process from the main control chip resources, greatly improving the beam switching speed, and meeting the switching execution time requirement of nanosecond level. The present invention identifies the target beam pattern through the first FPGA. In the service beam pattern, all antenna units are selected and amplitude taper weighting processing is performed to form a narrow beam to achieve high-gain communication; in the signaling beam pattern, part of the antenna units are selected according to the equal-interval sparse sampling strategy to form a wide beam to achieve large-angle coverage. The two modes share the same set of antenna arrays and multi-channel digital control attenuator hardware resources, and can flexibly switch between narrow and wide beams without additional hardware overhead, improving the system integration and resource utilization rate. The present invention calculates the target phase shift code by using the dispersion compensation method based on the target operating frequency point through the first FPGA, and calculates the basic phase compensation amount of each antenna unit based on the center frequency of the sub-band where the target operating frequency point is located, so that the phase shift amount of the target phase shift code corresponds to the center frequency of this sub-band, thereby making the beam directions of different frequency points within the same frequency band consistent, effectively eliminating the beam direction deviation caused by frequency change, and ensuring the beam direction accuracy under wide-band operation. The present invention performs software loading and on-orbit reconfiguration on the first FPGA through the second FPGA, receives the reconfiguration instruction sent by the satellite platform during on-orbit operation to update the first FPGA, and automatically calls the backup configuration file to restore its normal working state when the first FPGA runs abnormally, significantly improving the reliability and maintainability of the system during long-term on-orbit operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a flowchart of a beam control method for a spaceborne Ka-band analog multi-beam phased array antenna provided by an embodiment of the present invention; Figure 2 It is a system block diagram of a beam control system for a spaceborne Ka-band analog multi-beam phased array antenna provided by an embodiment of the present invention; Figure 3 It is a schematic hardware structure diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0019] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] like Figure 1 The diagram shown is a flowchart of a beam control method for a spaceborne Ka-band analog multi-beam phased array antenna provided by an embodiment of the present invention. Figure 1 The execution subject of the method shown can be a software and / or hardware device. The execution subject of this invention can include, but is not limited to, at least one of the following: user equipment, network equipment, etc. User equipment can include, but is not limited to, computers, smartphones, personal digital assistants (PDAs), and the aforementioned electronic devices. Network equipment can include, but is not limited to, a single network server, a server group consisting of multiple network servers, or a cloud based on cloud computing consisting of a large number of computers or network servers. Cloud computing is a type of distributed computing, consisting of a super virtual computer composed of a group of loosely coupled computers. This embodiment does not limit this. Steps S1 to S4 are detailed as follows: S1. Construct a three-level beam control architecture and configure an antenna array. The three-level beam control architecture includes a first FPGA, a second FPGA and an ARM processor. The antenna array is composed of antenna elements. The antenna elements are equipped with multiple digitally controlled phase shifters and multiple digitally controlled attenuators. The three-level beam control architecture comprises three layers: the first layer is an ARM (Advanced RISC Machine) processor, primarily responsible for receiving commands, verifying and parsing them, and transmitting telemetry information back to the satellite platform; the second layer is a first FPGA (Field-Programmable Gate Array), the execution unit for beam control, responsible for phase shift code calculation, attenuation control code lookup, and multi-channel code value distribution; the third layer is a second FPGA, independently storing the configuration file of the first FPGA and responsible for power-on loading and on-orbit reconfiguration of the first FPGA. The three layers are interconnected via a high-speed parallel bus, forming a complete control link from command reception to beamforming. The antenna array is composed of antenna elements arranged in an equally spaced grid. Each antenna element is the basic radiating unit of the antenna array. A numerically controlled phase shifter is used to adjust the phase of the RF signal in that channel, and a numerically controlled attenuator is used to adjust the amplitude of the RF signal in that channel. "Multi-channel" refers to the fact that each antenna element has multiple independently controllable phase shift and attenuation channels at its back end, corresponding to multiple beams operating simultaneously and independently; typically, this is set to eight channels.

[0021] The spaceborne Ka-band analog multi-beam phased array antenna is a phased array antenna system installed on a satellite platform and operating in the Ka band (uplink 27.5-30 GHz, downlink 17.3-20.2 GHz), belonging to the category of wireless carrier communication. This system forms multiple simultaneously and independently controllable beams in space by adjusting the phase and amplitude of the radio frequency signal in each antenna element channel of the array, achieving high-capacity communication coverage over ground targets. Compared to digital beamforming schemes, the analog multi-beam phased array antenna directly performs amplitude and phase modulation at the radio frequency end, eliminating the need for high-speed analog-to-digital conversion. It features low power consumption, light weight, and high integration, making it suitable for the stringent weight and power consumption constraints of spaceborne platforms.

[0022] In practical applications, the first FPGA and the second FPGA are connected via a SelectMAP interface or a JTAG interface. The second FPGA reads the configuration file from an external Flash memory and loads it into the first FPGA through this interface. The ARM processor is connected to the first FPGA via a high-speed parallel bus, and the ARM processor sends the parsed control data packets to the first FPGA via this bus. The output of the first FPGA is connected to the multi-channel digitally controlled phase shifters and multi-channel digitally controlled attenuators at the rear of each antenna element via a beam control sub-board. After the first FPGA completes the phase shift code calculation and attenuation control code lookup, it distributes the code values ​​to the corresponding channel's digitally controlled phase shifters and digitally controlled attenuators via the beam control sub-board. The antenna elements are arranged in an equally spaced grid to form an antenna array. Each antenna element has multiple digitally controlled phase shifters and multiple digitally controlled attenuators at its rear, with each channel corresponding to an independent beam. The second FPGA independently stores the configuration file of the first FPGA. Upon power-up, the second FPGA actively initiates the loading process to write the configuration file into the first FPGA.

[0023] S2, the ARM processor receives and parses the beam switching command sent by the satellite platform to obtain the target beam direction, target operating frequency and target beam mode; The process of receiving and parsing beam switching commands sent by the satellite platform through the ARM processor to obtain the target beam direction, target operating frequency, and target beam mode specifically includes: The ARM processor receives beam switching command frames issued by the satellite platform. The beam switching command frame is subjected to frame header verification, length verification and CRC cyclic redundancy check. After all verifications pass, the logical beam number is extracted from the beam switching command frame. Based on the logical beam number, the target beam direction, the target operating frequency, and the target beam mode are obtained by searching the beam parameter mapping table pre-stored inside the ARM processor. The target beam pointing, the target operating frequency, and the target beam pattern are subjected to boundary validity checks. If the boundary validity checks all pass, the target beam pointing, the target operating frequency, and the target beam pattern are packaged into a control data packet according to a preset communication protocol, and the control data packet is sent to the first FPGA; otherwise, an instruction exception message is generated and sent to the satellite platform.

[0024] The beam switching command frame is the data carrier for communication between the satellite platform and the ARM processor. It includes a frame header, payload, and frame tail checksum field, used to carry the logical beam number. The frame header checksum confirms whether the start flag of the command frame matches the protocol definition; the length checksum confirms whether the total number of bytes in the frame conforms to the protocol requirements; and the CRC (Cyclic Redundancy Check) is a transmission error detection mechanism for the entire frame data, comparing the checksum of the received data bit by bit with the checksum carried in the frame tail to eliminate data errors introduced during transmission. The logical beam number is the beam identifier carried in the beam switching command frame payload. The beam parameter mapping table is a pre-stored data structure within the ARM processor, indexed by the logical beam number. Each index entry stores a complete set of beam parameters, converting the logical beam number into specific beam control parameters through a table lookup. The target beam pointing is the beam's pointing direction in space, including elevation and azimuth angles. The target operating frequency is the center frequency of the current beam's operation. The target beam mode is the beam's operating mode identifier, taking values ​​for either service beam mode or signaling beam mode.

[0025] Understandably, boundary validity checking is a parameter legality verification mechanism used to confirm that the target beam pointing is within the scan angle boundary range, the target operating frequency is within the frequency band boundary range, and the target beam mode value is equal to the service beam mode or signaling beam mode. The control data packet is a data structure generated by the ARM processor after reorganizing the three parameters according to a preset communication protocol. The preset communication protocol is a data frame format agreed upon between the ARM processor and the first FPGA, containing a frame header, data field, and check field, used to encode the three parameters into a control word sequence recognizable by the first FPGA. Instruction exception information is an error feedback frame generated by the ARM processor when verification fails or boundary checks fail.

[0026] In practical applications, the satellite platform sends beam switching command frames to the ARM processor via the onboard bus. Upon receiving the command frame, the ARM processor first verifies whether the frame header conforms to the preset protocol flags, then verifies whether the entire frame length matches the protocol definition, and finally performs CRC cyclic redundancy check on the data within the frame, calculating the checksum byte-by-byte and comparing it with the check field at the end of the frame. After all three levels of checks pass, the ARM processor extracts the logical beam number according to the protocol field offset. The ARM processor internally stores a beam parameter mapping table, indexed by the logical beam number. Each number corresponds to a set of beam parameter entries, containing the beam pointing angle, operating frequency, and beam mode identifier.

[0027] Next, the ARM processor uses the extracted logical beam number as an index to look up the mapping table, reading the corresponding target beam pointing, target operating frequency, and target beam mode. The ARM processor performs boundary validity checks on the three parameters: confirming that the elevation and azimuth angles of the target beam pointing are within the scan angle boundaries, confirming that the target operating frequency is within the upper and lower boundaries of its frequency band, and confirming that the target beam mode value is equal to the service beam mode or signaling beam mode. After passing the checks, the ARM processor packages the three parameters into a control data packet according to a preset communication protocol and sends it to the first FPGA via a high-speed parallel bus. If any step of the three-level verification fails, no matching entry is found in the mapping table, or the boundary check fails, the ARM processor generates a corresponding exception code, encapsulates it into an instruction exception information frame, and sends it back to the satellite platform.

[0028] S3, the target beam pattern is identified by the first FPGA, the antenna array gating scale is determined, and the corresponding number of antenna elements are selected according to the antenna array gating scale; The step of identifying the target beam pattern through the first FPGA, determining the antenna array gating scale, and selecting a corresponding number of antenna elements according to the antenna array gating scale specifically includes: The target beam pattern is identified by the first FPGA, and the target beam pattern includes a service beam pattern and a signaling beam pattern; If the target beam pattern is the service beam pattern, then the antenna array selection scale is determined to be the full array scale, all antenna elements of the antenna array are selected, and amplitude taper weighting processing is performed on all antenna elements to form a narrow beam. If the target beam pattern is the signaling beam pattern, then the antenna array selection scale is determined to be a partial array scale, and a portion of the antenna elements are selected from the antenna array according to the equal-interval sparse extraction strategy to form a wide beam.

[0029] The service beam pattern corresponds to service communication scenarios, where the satellite platform transmits high-speed service data to ground terminals, requiring the antenna array to provide a high-gain, narrow beam. The signaling beam pattern corresponds to signaling broadcast scenarios, where the satellite platform sends system broadcast signaling to terminals within the coverage area, requiring the antenna array to provide wide beam coverage. The antenna array gating size is the array's working aperture determined based on the target beam pattern, including full array size and partial array size, used to determine the number of antenna elements participating in radiation. Full array size represents the state where all antenna elements are involved in operation, increasing the effective radiating aperture to compress the beamwidth and improve gain. Amplitude taper weighting is an operation that applies different amplitude weights to all antenna element channels to reduce beam sidelobe levels and decrease adjacent beam interference.

[0030] Narrow beamforming is the beamform formed by full array operation in service beamforming mode. It has a narrow width and high gain, and is used for point-to-point high-speed communication. Partial array size refers to a state in which a portion of antenna elements are selected from all antenna elements according to rules to participate in operation. The equal-interval sparse decimation strategy is a method of uniformly selecting antenna elements from all antenna elements according to fixed row and column intervals. By controlling the decimation density, the effective aperture size is adjusted to widen the beam. Wide beamforming is the beamform formed by partial array operation in signaling beamforming mode. It has a wide width and a large coverage area, and is used for regional broadcasting.

[0031] In practical applications, the first FPGA reads the target beam mode field from the control data packet and identifies whether the field value is a service beam mode or a signaling beam mode. If it is identified as a service beam mode, the first FPGA marks the antenna array gating scale as the full array scale, traverses all antenna element channels, and generates a gating control flag for each channel. The first FPGA calls the internally stored Taylor weighting coefficient table and uses the Taylor weighting function to calculate the low sidelobe amplitude weighting coefficients. This coefficient is converted into attenuation control codes for each channel's digitally controlled attenuator and distributed to the digitally controlled attenuators at the rear of the corresponding antenna element via the beam control board. The digitally controlled attenuators adjust the channel attenuation according to the received attenuation control codes, with smaller attenuations for channels near the center of the array and larger attenuations for channels near the edges, forming an amplitude distribution that is high in the middle and low at both ends, completing the amplitude taper weighting process. After amplitude weighting, the RF signals of each channel are radiated into space and superimposed to form a narrow beam.

[0032] If the signaling beam pattern is identified, the first FPGA marks the antenna array gating size as a partial array size, invokes the equally spaced sparse decimation strategy, and selects antenna elements from the antenna array at fixed row and column intervals. The first FPGA generates gating control flags and corresponding attenuation control codes for the selected antenna elements, and generates shutdown control flags for the unselected antenna elements. The attenuation control code corresponding to the shutdown control flag controls the digitally controlled attenuator to the maximum attenuation state. The gating control flags and shutdown control flags drive the digitally controlled attenuators of the corresponding channels via the beam control sub-board, forming a wide beam.

[0033] The step of performing amplitude taper weighting processing on all antenna elements to form a narrow beam specifically includes: Obtain the total number N of all antenna elements, and use the Taylor weighting function to calculate the low sidelobe amplitude weighting coefficient of the i-th antenna element. The corresponding calculation formula is as follows: In the formula, Represents the coefficients of the nth-order Taylor weighting; The center element number of the antenna array is indicated; m represents the total Taylor weighting order. Represents the cosine function; The target attenuation of the multi-channel digitally controlled attenuator corresponding to the antenna element is determined based on the low sidelobe amplitude weighting coefficient, wherein the target attenuation is negatively correlated with the low sidelobe amplitude weighting coefficient. The attenuation control code corresponding to the target attenuation amount is sent to the multi-channel digitally controlled attenuator, and the radio frequency signals of all antenna elements are attenuated according to the attenuation control code to form the narrow beam.

[0034] The Taylor weighting function is a mathematical function used for amplitude taper in phased array antennas. It adjusts the amplitude excitation coefficients of each antenna element to reduce beam sidelobe levels. The low-sidelobe amplitude weighting coefficients are the weight values ​​calculated by the Taylor weighting function, used to determine the amplitude attenuation of each antenna element channel. The center element number of the antenna array is the antenna element number corresponding to the geometric center of the antenna array, used to determine the distance of each element relative to the array center. The total order of the Taylor weighting is the number of series terms involved in the calculation in the Taylor weighting function, used to control the order of sidelobe suppression.

[0035] The target attenuation is a numerically controlled attenuator parameter derived from the low sidelobe amplitude weighting coefficient. The low sidelobe amplitude weighting coefficient is negatively correlated with the target attenuation; that is, a larger weighting coefficient for elements closer to the array center corresponds to a smaller target attenuation, while a smaller weighting coefficient for elements closer to the array edge corresponds to a larger target attenuation. The numerically controlled attenuator adjusts the attenuation of the channel RF signal according to the attenuation control code. Channels closer to the array center experience smaller attenuation, while those closer to the array edge experience larger attenuation. The superposition of the RF signal amplitudes from each channel results in an amplitude distribution that is high in the middle and low at both ends, thus suppressing the beam sidelobe level.

[0036] In practical applications, the first FPGA reads the antenna array size parameters from the control data packet. Taking a 600-element downlink antenna as an example, the first FPGA obtains the total number of all antenna elements (600) and reads the center element number (300) and the total Taylor weighting order (4). The first FPGA iterates through the antenna elements from 1 to 600. For each element read, the first FPGA calls the Taylor weighting function, substituting the current element number, the center element number (300), the total number of array elements (600), and the current order (from 1 to 4) into the calculation, accumulating the weighted components of four orders to obtain the low sidelobe amplitude weighting coefficients for that antenna element. After iterating through 600 antenna elements, the first FPGA generates low sidelobe amplitude weighting coefficients of the same length as the array.

[0037] Furthermore, the first FPGA converts each low sidelobe amplitude weighting coefficient into a target attenuation amount, using a negative correlation mapping. For example, a weighting coefficient of 0.9 maps to a 0.5dB attenuation, and a weighting coefficient of 0.4 maps to a 7dB attenuation. The 600 target attenuation amounts are then converted into attenuation control codes recognizable by the digitally controlled attenuators (DCAs). These attenuation control codes are then distributed via the beam control board to the multi-channel DCAs at the rear of each antenna element. The DCAs adjust the attenuation of the corresponding channels based on the received attenuation control codes, controlling the attenuation of the central region channels to within 1dB and the attenuation of the edge region channels to reach 10dB, forming an amplitude distribution that is high in the middle and low at both ends. After amplitude attenuation, the 600 RF signals are radiated into space, and the combined beam sidelobe level is suppressed to below -12dB, narrowing the beamwidth to 2.8°, forming a narrow beam.

[0038] Through the above methods, in the service beam mode, after full array selection and amplitude taper weighting, the beamwidth is narrowed to 2.8°, and the sidelobe level is reduced to below -12dB, meeting the requirements of high-gain communication. In the signaling beam mode, after partial array selection, the 7dB beamwidth is widened to over 11.5°, meeting the requirements of wide-area coverage. Both modes share the antenna array and digitally controlled attenuator, requiring no additional hardware.

[0039] S4, the first FPGA calculates the phase shift code of the antenna element based on the target operating frequency using a dispersion compensation method, and sends the phase shift code to the multi-channel digitally controlled phase shifter; and searches for the attenuation control code of the antenna element from a preset beam control code table according to the target beam direction, and sends the attenuation control code to the multi-channel digitally controlled attenuator.

[0040] The dispersion compensation method involves calculating the phase shift code based on the target operating frequency to eliminate beam pointing deviations caused by frequency variations. The phase shift code is a control word loaded onto the digitally controlled phase shifter, used to adjust the phase of the RF signals in each antenna element channel, ensuring that the radiation fields of each channel are in phase and superimposed in the target direction. The preset beam control code table is a pre-calculated data table stored within the first FPGA, used to quickly look up the attenuation control code for each antenna element under different beam pointing conditions. The attenuation control codes in the table are pre-calculated based on the antenna element's position in the array and the target beam pattern. The attenuation control code is a control word loaded onto the digitally controlled attenuator, used to adjust the amplitude of the corresponding channel's RF signal and reduce the sidelobe level.

[0041] Using the above method, the first FPGA calculates the phase-shift code based on the target operating frequency using a dispersion compensation method to eliminate beam pointing deviation caused by frequency changes. Simultaneously, it searches for the attenuation control code in a preset beam control code table according to the target beam pointing, quickly obtaining attenuation parameters without real-time calculation. The phase-shift code and attenuation control code are respectively sent to a multi-channel digitally controlled phase shifter and a multi-channel digitally controlled attenuator to complete beam pointing control and sidelobe suppression, meeting the nanosecond-level switching requirements in the spaceborne hopping beam operating mode.

[0042] The step of calculating the phase-shift code of the antenna element based on the target operating frequency using the first FPGA and employing a dispersion compensation method, and then sending the phase-shift code to the multi-channel digitally controlled phase shifter, specifically includes: Obtain the antenna element position coordinates of the antenna array, the target beam direction, and the target operating frequency; Determine the target operating frequency band based on the target operating frequency point, divide the target operating frequency band into sub-bands, and take the sub-band where the target operating frequency point is located as the target sub-band, and obtain the sub-band center frequency corresponding to the target sub-band; Based on the antenna element position coordinates and the target beam direction, calculate the basic phase compensation amount of the antenna element at the sub-band center frequency; The basic phase compensation quantity of the antenna element is quantized and mapped into a target phase shift code, and the target phase shift code is sent down to the multi-channel digitally controlled phase shifter corresponding to the antenna element; The phase shift amount of the target phase shift code is based on the center frequency of the sub-band and is used to align the beams operating at different frequency points within the target operating frequency band.

[0043] The antenna element position coordinates are the spatial position parameters of each antenna element within the antenna array, used to calculate the path difference between different elements. The target operating frequency band is the frequency band range to which the target operating frequency belongs; the Ka band covers 27.5-30 GHz uplink and 17.3-20.2 GHz downlink. Subbands are frequency band segments obtained by dividing the target operating frequency band into fixed bandwidths; each subband is 100 MHz wide and is used to refine the granularity of phase-shift code calculation. The target subband is the subband where the target operating frequency is located. The subband center frequency is the center frequency of the target subband, serving as the reference frequency for calculating the phase-shift codes for all frequencies within that subband. The basic phase compensation amount is the phase value calculated based on the projection distance and the subband center frequency, used to compensate for the path difference from each antenna element to the target beam direction. Quantization mapping converts the continuously changing basic phase compensation amount into integer values ​​according to the quantization steps of the numerically controlled phase shifter, used to generate phase-shift codes executable by the numerically controlled phase shifter.

[0044] In practical applications, the first FPGA reads the target beam direction, target operating frequency, and position coordinates of each element of the antenna array from the control data packet. The first FPGA determines the operating frequency band based on the target operating frequency: if the frequency falls within the 27.5-30GHz range, it is classified as the uplink band; if it falls within the 17.3-20.2GHz range, it is classified as the downlink band. The first FPGA divides the target operating frequency band into several sub-bands in 100MHz steps: 25 sub-bands for the uplink band and 29 sub-bands for the downlink band. The first FPGA traverses the frequency boundaries of each sub-band, marks the sub-band containing the target operating frequency as the target sub-band, and reads the center frequency of that sub-band.

[0045] The first FPGA iterates through all antenna elements in the antenna array, performing the following operations for each element: reading the element's position coordinates, calculating the path difference of the electromagnetic wave from that position to the target direction based on the target beam pointing, and then multiplying this by the sub-band center frequency to obtain the element's basic phase compensation. After completing the calculation of the basic phase compensation for all elements, the first FPGA quantizes the continuous basic phase compensation of each element into integers according to the quantization steps of the digitally controlled phase shifter, mapping it to the target phase shift code corresponding to each element. The first FPGA packages the target phase shift codes in channel number order and distributes them to each beam control sub-board via a high-speed parallel bus. The beam control sub-board loads the target phase shift code of the corresponding channel into the multi-channel digitally controlled phase shifter at the back end of each antenna element. After loading, the multi-channel digitally controlled phase shifter adjusts the phase of each channel according to the target phase shift code, so that the radiation fields of each channel are superimposed in phase in the target direction. Since the phase shift is calculated based on the sub-band center frequency, when the target operating frequency changes within the target sub-band, the phase relationship of each channel remains constant, and the beam pointing does not change with the frequency shift, achieving consistent beam pointing at different frequencies within the same sub-band.

[0046] The calculation of the fundamental phase compensation amount of the antenna element at the sub-band center frequency based on the antenna element's position coordinates and the target beam direction specifically includes: For the i-th antenna element, calculate the fundamental phase compensation amount of the i-th antenna element at the sub-band center frequency f. The corresponding calculation formula is as follows: In the formula, c represents the speed of light; This represents the position vector of the i-th antenna element; This represents the unit direction vector pointing to the target beam. Indicates the elevation angle to which the target beam is pointing; Indicates the azimuth angle to which the target beam is pointing; This represents the dot product of the position vector of the i-th antenna element and the unit direction vector pointing to the target beam.

[0047] The position vector of an antenna element is a spatial vector pointing from the array reference origin to that element, used to determine the spatial positional differences between different elements. The unit direction vector pointing to the target beam is a unit vector along the direction of the target beam, determined by the elevation and azimuth angles, used to describe the beam's pointing in space. The elevation angle is the angle between the beam pointing direction and the array normal, and the azimuth angle is the angle between the projection of the beam pointing direction onto the array and the array reference axis. The dot product is a scalar product of the position vector and the unit direction vector, used to calculate the projected distance of the antenna element in the beam pointing direction; this projected distance determines the magnitude of the path difference.

[0048] In practical applications, the first FPGA reads the elevation and azimuth angles of the target beam from the control data packet and generates a unit direction vector pointing to the target beam by combining this with the array reference axis direction. The first FPGA traverses all antenna elements of the antenna array. Taking a 600-element downlink antenna as an example, it performs the following operations sequentially on the 1st to 600th antenna elements: reads the position vector of the element, performs a dot product operation between the position vector and the unit direction vector pointing to the target beam to obtain the projected distance of the element in the beam pointing direction, typically ranging from -0.5 meters to 0.5 meters. The first FPGA multiplies the sub-band center frequency (18.95 GHz) by the projected distance and then multiplies by the reciprocal of the speed of light to obtain the basic phase compensation amount for the element, typically ranging from 0 degrees to 360 degrees. After completing the basic phase compensation amount calculation for all 600 elements, the first FPGA enters the quantization mapping process.

[0049] The software loading and on-orbit reconfiguration of the first FPGA via the second FPGA specifically includes: Monitor the working status of the first FPGA and receive the reconfiguration command sent by the satellite platform; When the first FPGA is detected to be powered on, the pre-stored main program configuration file is read from the configuration storage area of ​​the second FPGA and loaded into the first FPGA so that the first FPGA enters the normal working state. When the reconfiguration instruction is received, the corresponding FPGA configuration file is obtained according to the reconfiguration instruction, the integrity and legality of the FPGA configuration file are verified, and after the verification is passed, the FPGA configuration file is loaded into the first FPGA to update the first FPGA; When an abnormal operation of the first FPGA is detected, a pre-stored backup configuration file is retrieved from the configuration storage area and loaded into the first FPGA to restore the normal working state of the first FPGA.

[0050] The first FPGA's operating states include power-on, running, and abnormal running states. Power-on refers to the process of powering on and starting the first FPGA, at which point its internal logic has not yet been loaded. The configuration storage area is a non-volatile memory connected internally or externally to the second FPGA, used to store the first FPGA's configuration file. The main program configuration file is a pre-programmed stable version of the configuration data, used to load and enter normal operating state upon the first FPGA's initial power-on. The reconfiguration command is a configuration update command issued by the satellite platform, used to trigger the replacement of the first FPGA's configuration data. The FPGA configuration file is the updated version of the configuration data obtained according to the reconfiguration command, used to replace the currently running configuration. Integrity and validity checks are verification operations performed on the FPGA configuration file. Integrity checks confirm data integrity by comparing and verifying the data's integrity, while validity checks confirm the data source's trustworthiness by comparing the digital signature. An abnormal running state occurs when the first FPGA deviates from its normal function due to a single-event upset or logic error. The backup configuration file is a spare version of the configuration data pre-stored in the configuration storage area.

[0051] In practical applications, the second FPGA connects to the configuration completion pin and heartbeat signal output pin of the first FPGA via a dedicated monitoring line. The second FPGA continuously samples the level of the configuration completion pin; when the pin transitions from low to high, it determines that the first FPGA has completed power-on. The second FPGA reads the main program configuration file from the external Flash memory and writes it to the configuration memory of the first FPGA in byte stream form via the SelectMAP interface. After writing, the second FPGA reads the configuration status register of the first FPGA to confirm the loading result. The second FPGA receives the reconfiguration command issued by the satellite platform via the onboard bus, extracts the Flash configuration file from the command, stores it in the Flash memory, and then reads the file to calculate the CRC checksum and compare it with the frame tail field to complete the integrity verification. The second FPGA reads the digital signature of the Flash configuration file and compares it with the pre-stored public key to complete the legality verification. After successful verification, the second FPGA loads the Flash configuration file into the first FPGA, overwriting the original configuration. The second FPGA monitors the heartbeat signal output pin of the first FPGA. Under normal conditions, the heartbeat signal changes periodically. If no change is detected for more than 10 seconds, it is determined to be an operational anomaly. At this time, the second FPGA retrieves the backup configuration file from the Flash memory and reloads it into the first FPGA.

[0052] like Figure 2 The diagram shown is a system block diagram of a beam control system for a spaceborne Ka-band analog multi-beam phased array antenna according to an embodiment of the present invention. The system includes: An architecture configuration module is used to construct a three-level beam control architecture and configure the antenna array. The three-level beam control architecture includes a first FPGA, a second FPGA and an ARM processor. The antenna array is composed of antenna elements. The antenna elements are equipped with multiple digitally controlled phase shifters and multiple digitally controlled attenuators. The instruction parsing module is used to receive and parse the beam switching instructions sent by the satellite platform through the ARM processor to obtain the target beam direction, target operating frequency, and target beam mode. The array gating module is used to identify the target beam pattern through the first FPGA, determine the antenna array gating scale, and select a corresponding number of antenna elements according to the antenna array gating scale. The amplitude and phase control module is used to calculate the phase shift code of the antenna element based on the target operating frequency using the first FPGA and employing a dispersion compensation method, and to send the phase shift code to the multi-channel digitally controlled phase shifter; and to look up the attenuation control code of the antenna element from a preset beam control code table according to the target beam direction, and to send the attenuation control code to the multi-channel digitally controlled attenuator.

[0053] Figure 2 The apparatus of the illustrated embodiment can be used to perform corresponding actions. Figure 1 The steps in the method embodiments shown are implemented in a similar manner and have similar technical effects, and will not be repeated here.

[0054] An electronic device includes a memory and a processor, wherein the memory stores a computer program, and when the processor runs the computer program stored in the memory, the processor executes the steps of a beam control method for a spaceborne Ka-band analog multi-beam phased array antenna as described in any of the preceding claims.

[0055] like Figure 3 The diagram shown is a hardware structure schematic of an electronic device according to an embodiment of the present invention. The electronic device 30 includes: a processor 31, a memory 32, and a computer program; wherein... The memory 32 is used to store the computer program, and the memory may also be flash memory. The computer program is, for example, an application program or functional module that implements the above method.

[0056] Processor 31 is configured to execute the computer program stored in the memory to implement the various steps performed by the device in the above method. For details, please refer to the relevant descriptions in the preceding method embodiments.

[0057] Alternatively, the memory 32 can be either standalone or integrated with the processor 31.

[0058] When the memory 32 is a device independent of the processor 31, the device may further include: Bus 33 is used to connect the memory 32 and the processor 31.

[0059] A readable storage medium storing a computer program, which, when executed by a processor, is used to implement the steps of a beam control method for a spaceborne Ka-band analog multi-beam phased array antenna as described in any of the preceding claims.

[0060] The readable storage medium can be a computer storage medium or a communication medium. A communication medium includes any medium that facilitates the transfer of computer programs from one location to another. A computer storage medium can be any available medium accessible to a general-purpose or special-purpose computer. For example, a readable storage medium is coupled to a processor, enabling the processor to read information from and write information to the readable storage medium. Of course, the readable storage medium can also be a component of the processor. The processor and the readable storage medium can reside in an Application-Specific Integrated Circuit (ASIC). Alternatively, the ASIC can be located in a user equipment. Of course, the processor and the readable storage medium can also exist as discrete components in a communication device. The readable storage medium can be a read-only memory (ROM), random access memory (RAM), CD-ROM, magnetic tape, floppy disk, and optical data storage device, etc.

[0061] The present invention also provides a program product including executable instructions stored in a readable storage medium. At least one processor of the device can read the executable instructions from the readable storage medium, and the at least one processor executes the executable instructions to cause the device to implement the methods provided in the various embodiments described above.

[0062] In the embodiments of the above-described device, it should be understood that the processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), etc. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in this invention can be directly manifested as execution by a hardware processor, or execution by a combination of hardware and software modules within the processor.

[0063] Through the above embodiments, this invention constructs a three-level beam control architecture and configures an antenna array. The three-level beam control architecture includes a first FPGA, a second FPGA, and an ARM processor. The antenna array is composed of antenna elements, and each antenna element is equipped with multiple digitally controlled phase shifters and multiple digitally controlled attenuators. The ARM processor receives and parses the beam switching command sent by the satellite platform to obtain the target beam pointing, target operating frequency, and target beam mode. The first FPGA identifies the target beam mode, determines the antenna array gating scale, and selects the corresponding number of antenna elements according to the antenna array gating scale. Based on the target operating frequency, the first FPGA calculates the phase shift code of the antenna element using a dispersion compensation method and sends the phase shift code to the multiple digitally controlled phase shifters. Based on the target beam pointing, the attenuation control code of the antenna element is searched from a preset beam control code table and sent to the multiple digitally controlled attenuators. Thus, in the onboard hopping beam operating mode, it can achieve nanosecond-level rapid beam switching, consistent multi-beam pointing, and flexible compatibility of wide and narrow beams for multi-beam integrated control.

[0064] The present invention realizes the separation of the communication response and beam control tasks of the spaceborne platform by constructing a three-level beam control architecture composed of an ARM processor, a first FPGA, and a second FPGA. Among them, the ARM processor focuses on processing the reception and parsing of satellite platform instructions. The first FPGA focuses on completing the calculation of phase shift codes, the search for attenuation control codes, and the distribution of multi-channel code values. The second FPGA is used for software loading and on-orbit reconfiguration of the first FPGA. The three levels have clear divisions of labor and cooperate in parallel, liberating the code value calculation and distribution link in the beam switching process from the resources of the main control chip, greatly improving the beam switching speed, and meeting the switching execution time requirement of nanosecond level. The present invention identifies the target beam mode through the first FPGA. In the service beam mode, all antenna elements are selected and amplitude taper weighting processing is performed to form a narrow beam to achieve high-gain communication. In the signaling beam mode, a part of the antenna elements are selected according to the equal-spacing sparse sampling strategy to form a wide beam to achieve large-angle coverage. The two modes share the same set of antenna arrays and multi-channel digital controlled attenuator hardware resources, and can flexibly switch between narrow and wide beams without additional hardware overhead, improving the system integration and resource utilization rate. The present invention calculates the target phase shift code by using the dispersion compensation method based on the target operating frequency point through the first FPGA, and calculates the basic phase compensation amount of each antenna element based on the center frequency of the sub-band where the target operating frequency point is located, so that the phase shift amount of the target phase shift code corresponds to the center frequency of this sub-band, thereby making the beam directions of different frequency points within the same frequency band consistent, effectively eliminating the beam direction deviation caused by frequency changes, and ensuring the beam direction accuracy under wide-band operation. The present invention performs software loading and on-orbit reconfiguration of the first FPGA through the second FPGA, receives the reconfiguration instructions sent by the satellite platform during on-orbit operation to update the first FPGA, and automatically calls the backup configuration file to restore its normal working state when the first FPGA runs abnormally, significantly improving the reliability and maintainability of the system during long-term on-orbit operation.

[0065] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A beam control method for a spaceborne Ka-band analog multi-beam phased array antenna, characterized in that, The method includes: A three-level beam control architecture is constructed and an antenna array is configured. The three-level beam control architecture includes a first FPGA, a second FPGA and an ARM processor. The antenna array is composed of antenna elements. The antenna elements are equipped with multiple digitally controlled phase shifters and multiple digitally controlled attenuators. The ARM processor receives and parses the beam switching command sent by the satellite platform to obtain the target beam direction, target operating frequency, and target beam mode. The first FPGA identifies the target beam pattern, determines the antenna array gating scale, and selects a corresponding number of antenna elements according to the antenna array gating scale. The first FPGA calculates the phase shift code of the antenna element based on the target operating frequency using a dispersion compensation method, and sends the phase shift code to the multi-channel digitally controlled phase shifter; and searches for the attenuation control code of the antenna element from a preset beam control code table according to the target beam direction, and sends the attenuation control code to the multi-channel digitally controlled attenuator.

2. The beam control method for a spaceborne Ka-band analog multi-beam phased array antenna according to claim 1, characterized in that, The process of receiving and parsing beam switching commands sent by the satellite platform through the ARM processor to obtain the target beam direction, target operating frequency, and target beam mode specifically includes: The ARM processor receives beam switching command frames issued by the satellite platform. The beam switching command frame is subjected to frame header verification, length verification and CRC cyclic redundancy check. After all verifications pass, the logical beam number is extracted from the beam switching command frame. Based on the logical beam number, the target beam direction, the target operating frequency, and the target beam mode are obtained by searching the beam parameter mapping table pre-stored inside the ARM processor. The target beam pointing, the target operating frequency, and the target beam pattern are subjected to boundary validity checks. If the boundary validity checks all pass, the target beam pointing, the target operating frequency, and the target beam pattern are packaged into a control data packet according to a preset communication protocol, and the control data packet is sent to the first FPGA; otherwise, an instruction exception message is generated and sent to the satellite platform.

3. The beam control method for a spaceborne Ka-band analog multi-beam phased array antenna according to claim 1, characterized in that, The step of identifying the target beam pattern through the first FPGA, determining the antenna array gating scale, and selecting a corresponding number of antenna elements according to the antenna array gating scale specifically includes: The target beam pattern is identified by the first FPGA, and the target beam pattern includes a service beam pattern and a signaling beam pattern; If the target beam pattern is the service beam pattern, then the antenna array selection scale is determined to be the full array scale, all antenna elements of the antenna array are selected, and amplitude taper weighting processing is performed on all antenna elements to form a narrow beam. If the target beam pattern is the signaling beam pattern, then the antenna array selection scale is determined to be a partial array scale, and a portion of the antenna elements are selected from the antenna array according to the equal-interval sparse extraction strategy to form a wide beam.

4. The beam control method for a spaceborne Ka-band analog multi-beam phased array antenna according to claim 3, characterized in that, The step of performing amplitude taper weighting processing on all antenna elements to form a narrow beam specifically includes: Obtain the total number N of all antenna elements, and use the Taylor weighting function to calculate the low sidelobe amplitude weighting coefficient of the i-th antenna element. The corresponding calculation formula is as follows: In the formula, Represents the coefficients of the nth-order Taylor weighting; The center element number of the antenna array is indicated; m represents the total Taylor weighting order. Represents the cosine function; The target attenuation of the multi-channel digitally controlled attenuator corresponding to the antenna element is determined based on the low sidelobe amplitude weighting coefficient, wherein the target attenuation is negatively correlated with the low sidelobe amplitude weighting coefficient. The attenuation control code corresponding to the target attenuation amount is sent to the multi-channel digitally controlled attenuator, and the radio frequency signals of all antenna elements are attenuated according to the attenuation control code to form the narrow beam.

5. The beam control method for a spaceborne Ka-band analog multi-beam phased array antenna according to claim 1, characterized in that, The step of calculating the phase-shift code of the antenna element based on the target operating frequency using the first FPGA and employing a dispersion compensation method, and then sending the phase-shift code to the multi-channel digitally controlled phase shifter, specifically includes: Obtain the antenna element position coordinates of the antenna array, the target beam direction, and the target operating frequency; Determine the target operating frequency band based on the target operating frequency point, divide the target operating frequency band into sub-bands, and take the sub-band where the target operating frequency point is located as the target sub-band, and obtain the sub-band center frequency corresponding to the target sub-band; Based on the antenna element position coordinates and the target beam direction, calculate the basic phase compensation amount of the antenna element at the sub-band center frequency; The basic phase compensation amount of the antenna element is quantized and mapped into a target phase shift code, and the target phase shift code is sent down to the multi-channel digitally controlled phase shifter corresponding to the antenna element; The phase shift amount of the target phase shift code is based on the center frequency of the sub-band and is used to align the beams operating at different frequency points within the target operating frequency band.

6. The beam control method for a spaceborne Ka-band analog multi-beam phased array antenna according to claim 5, characterized in that, The calculation of the fundamental phase compensation amount of the antenna element at the sub-band center frequency based on the antenna element's position coordinates and the target beam direction specifically includes: For the i-th antenna element, calculate the fundamental phase compensation amount of the i-th antenna element at the sub-band center frequency f. The corresponding calculation formula is as follows: In the formula, c represents the speed of light; This represents the position vector of the i-th antenna element; This represents the unit direction vector pointing to the target beam. Indicates the elevation angle to which the target beam is pointing; Indicates the azimuth angle to which the target beam is pointing; This represents the dot product of the position vector of the i-th antenna element and the unit direction vector pointing to the target beam.

7. The beam control method for a spaceborne Ka-band analog multi-beam phased array antenna according to claim 1, characterized in that, The software loading and on-orbit reconfiguration of the first FPGA via the second FPGA specifically includes: Monitor the working status of the first FPGA and receive the reconfiguration command sent by the satellite platform; When the first FPGA is detected to be powered on, the pre-stored main program configuration file is read from the configuration storage area of ​​the second FPGA and loaded into the first FPGA so that the first FPGA enters the normal working state. When the reconfiguration instruction is received, the corresponding FPGA configuration file is obtained according to the reconfiguration instruction, the integrity and legality of the FPGA configuration file are verified, and after the verification is passed, the FPGA configuration file is loaded into the first FPGA to update the first FPGA; When an abnormal operation of the first FPGA is detected, a pre-stored backup configuration file is retrieved from the configuration storage area and loaded into the first FPGA to restore the normal working state of the first FPGA.

8. A beam control system for a spaceborne Ka-band analog multi-beam phased array antenna, characterized in that, A beam control method for a spaceborne Ka-band analog multi-beam phased array antenna as described in any one of claims 1-7, the system comprising: An architecture configuration module is used to construct a three-level beam control architecture and configure the antenna array. The three-level beam control architecture includes a first FPGA, a second FPGA and an ARM processor. The antenna array is composed of antenna elements. The antenna elements are equipped with multiple digitally controlled phase shifters and multiple digitally controlled attenuators. The instruction parsing module is used to receive and parse the beam switching instructions sent by the satellite platform through the ARM processor to obtain the target beam direction, target operating frequency, and target beam mode. The array gating module is used to identify the target beam pattern through the first FPGA, determine the antenna array gating scale, and select a corresponding number of antenna elements according to the antenna array gating scale. The amplitude and phase control module is used to calculate the phase shift code of the antenna element based on the target operating frequency using the first FPGA and employing a dispersion compensation method, and to send the phase shift code to the multi-channel digitally controlled phase shifter; and to look up the attenuation control code of the antenna element from a preset beam control code table according to the target beam direction, and to send the attenuation control code to the multi-channel digitally controlled attenuator.

9. An electronic device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor runs the computer program stored in the memory, the processor performs the steps of a beam control method for a spaceborne Ka-band analog multi-beam phased array antenna as described in any one of claims 1-7.

10. A readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it is used to implement the steps of the beam control method for a spaceborne Ka-band analog multi-beam phased array antenna as described in any one of claims 1-7.

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