A digital pre-distortion method, device, storage medium and product

Abstract

The application discloses a digital pre-distortion method, which is applied to an electronic device. The electronic device is configured with a digital pre-distortion module for performing overall pre-distortion processing on signals before signal amplification of multiple transmission channels of the electronic device. The digital pre-distortion module comprises a first pre-distortion unit, a second pre-distortion unit and a third pre-distortion unit. The first pre-distortion unit and the second pre-distortion unit are arranged on a first platform of the electronic device. The third pre-distortion unit is arranged on each transmitter connected with an output of the first platform. The digital pre-distortion method comprises the following steps: calling the first pre-distortion unit to eliminate linear crosstalk among the multiple transmission channels; calling the second pre-distortion unit to eliminate nonlinear crosstalk among the multiple transmission channels; and calling the third pre-distortion unit to eliminate power amplifier distortion of each transmission channel. The application further discloses an electronic device, a computer readable storage medium and a computer program product.

Description

Technical Field

[0001] This application relates to, but is not limited to, the field of communications, and particularly to a digital predistortion method, electronic device, computer-readable storage medium, and computer program product. Background Technology

[0002] The power amplifier (PA) is a crucial component of the base station transceiver's transmit channel, located at the end of the channel. Its function is to amplify the signal to a specified power before sending it to the antenna for radiation into free space. During signal amplification, the PA's nonlinear characteristics generate various distortions, including harmonic distortion and intermodulation distortion. These distortions degrade signal quality and affect the performance of the communication system. Digital pre-distortion (DPD) technology is a linearization technique for PAs that pre-distorts the signal before amplification to counteract the nonlinear distortion generated by the power amplifier.

[0003] In 5G and future communication systems, the multiple radio frequency channels of a multi-channel transmitter are located close to each other, and may even be concentrated on the same chipset. Input signals are transmitted at the same frequency and with similar power, inevitably leading to mutual coupling and crosstalk. This crosstalk, amplified by the power amplifier, generates new nonlinear distortion, further enhancing the nonlinear distortion of the multi-channel transmitter compared to a single-channel transmitter. Therefore, the predistortion model of a multi-channel transmitter in related technologies is extremely complex compared to a single-input single-output model, including many order cross-terms. Furthermore, the real-time requirements of DPD technology in related technologies place even greater demands on hardware resources, contradicting the need for cost reduction in transceiver systems. Simply simplifying model parameters to reduce resource requirements, limited by complexity, results in poor performance and effectiveness of digital predistortion models in related technologies, failing to achieve a balance between performance and cost. Summary of the Invention

[0004] In view of this, embodiments of this application provide a digital predistortion method, an electronic device, a computer-readable storage medium, and a computer program product, to at least solve the problem that digital predistortion models in the related art cannot simultaneously achieve both performance and cost.

[0005] The technical solution of this application embodiment is implemented as follows:

[0006] This application provides a digital predistortion method applied to an electronic device. The electronic device is equipped with a digital predistortion module for performing overall predistortion processing on the signals before signal amplification in multiple transmission channels of the electronic device. The digital predistortion module includes a first predistortion unit, a second predistortion unit, and a third predistortion unit. The first and second predistortion units are disposed on a first platform of the electronic device; the third predistortion unit is disposed on each transmission chip in the first platform. The digital predistortion method includes:

[0007] The third pre-distortion unit is invoked to eliminate power amplifier distortion in each transmission channel;

[0008] The first predistortion unit is invoked to eliminate linear crosstalk between multiple transmission channels;

[0009] The second predistortion unit is invoked to eliminate nonlinear crosstalk between multiple transmission channels.

[0010] This application embodiment also provides an electronic device, which is configured with a digital predistortion module for performing overall predistortion processing on the signals before signal amplification in multiple transmission channels of the electronic device; the digital predistortion module includes a first predistortion unit, a second predistortion unit, and a third predistortion unit; the first predistortion unit and the second predistortion unit are configured on a first platform of the electronic device; the third predistortion unit is configured on each transmission chip in the first platform;

[0011] The third pre-distortion unit is used to eliminate power amplifier distortion in each transmission channel;

[0012] The first predistortion unit is used to eliminate linear crosstalk between multiple transmission channels;

[0013] The second predistortion unit is used to eliminate nonlinear crosstalk between multiple transmission channels.

[0014] This application also provides an electronic device, the electronic device comprising:

[0015] Memory, used to store executable instructions;

[0016] When the processor executes executable instructions stored in the memory, it performs the steps of the digital predistortion method described above.

[0017] This application also provides a computer-readable storage medium storing one or more computer programs thereon, which can be executed by one or more processors to implement the steps of the above-described digital predistortion method.

[0018] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the above-described digital predistortion method.

[0019] In this embodiment, the digital predistortion module configured on the electronic device includes a first predistortion unit and a second predistortion unit configured on a first platform, and a third predistortion unit configured on the transmitter chip. The first predistortion unit is used to eliminate linear crosstalk between multiple transmission channels; the second predistortion unit is used to eliminate nonlinear crosstalk between multiple transmission channels; and the third predistortion unit is used to eliminate power amplifier distortion in each transmission channel, thereby realizing a digital predistortion system scheme for multi-channel transmission. Furthermore, after decomposition, the design and debugging complexity of each predistortion unit will be greatly reduced, and the debugging of each predistortion unit can be performed simultaneously, which is more conducive to the promotion and application of the scheme in base stations, small base stations, etc., thereby achieving the goal of cost reduction. For the third predistortion unit on each transmitter chip, only a single-input single-output digital predistortion model of a single-channel power amplifier needs to be considered, which is much less complex than a multi-channel digital predistortion model. Furthermore, while ensuring single-channel digital predistortion performance, each transmitter chip does not require individual training and debugging, greatly improving debugging efficiency. Integration onto the chip eliminates limitations imposed by the interface rate between the platform and the transmitter, maximizing the single-channel digital predistortion performance of the model. For the first and second predistortion units on each platform, the platform's richer hardware resources allow for flexible configuration across multiple scenarios and applications. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of a DPD principle provided in related technologies;

[0021] Figure 2 This is a framework diagram of a DPD provided in related technologies;

[0022] Figure 3 This is a framework diagram of a digital predistortion model for multi-channel transmitters provided in related technologies;

[0023] Figure 4 A flowchart illustrating a digital predistortion method provided in an embodiment of this application;

[0024] Figure 5 A schematic diagram showing the disassembly of the nonlinear distortion model of the two transmission channels provided in the embodiments of this application;

[0025] Figure 6 A schematic block diagram illustrating the multi-channel DPD model scheme provided in the embodiments of this application;

[0026] Figure 7A schematic block diagram of an electronic device provided in an embodiment of this application;

[0027] Figure 8 This is a schematic structural diagram of an electronic device provided in an embodiment of this application. Detailed Implementation

[0028] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0029] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of the invention. However, those skilled in the art will understand that the invention can be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, and methods have been omitted so as not to obscure the description of the invention with unnecessary detail.

[0030] It should be noted that the technical solutions described in the embodiments of the present invention can be combined arbitrarily without conflict.

[0031] Furthermore, in the embodiments of the present invention, terms such as "first" and "second" are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0032] Additionally, the term "at least one" in this document means any combination of at least two of any one or more of a plurality, for example, including at least one of A, B, and C, and may mean including any one or more elements selected from the set consisting of A, B, and C.

[0033] Before explaining this application, the DPD technology and Multiple-Input Multiple-Output (MIMO) in the related art are described below:

[0034] Figure 1 This is a schematic diagram of a DPD principle provided in related technologies, such as... Figure 1 As shown, signal x i The signal x is output to the DPD module. d ; and will signal x d Input PA, obtain the signal x output by PA. o .

[0035] Taking digital images as an example, the DPD module can process the input data into such... Figure 1 The horizontal axis is x d The vertical axis is x o The curve; PA can process the input data into such a curve. Figure 1 The horizontal axis is x iThe vertical axis is x d The curve, after the data was processed twice, yielded the following result: Figure 1 The horizontal axis is x i The vertical axis is x o A straight line.

[0036] Figure 2 This is a framework diagram of a DPD provided in related technologies, such as... Figure 2 As shown, DPD is a real-time iterative system that continuously calculates and calibrates to obtain ideal predistortion parameter values. Its overall process is as follows: Analog feedback signals from training samples are acquired from the PA output (e.g., in the coupling module). The feedback signals undergo a series of processing steps, including analog-to-digital conversion (ADC) and frequency shifting. The feedback and front-end signals are then aligned for time delay, amplitude, and phase. The processed data is used to solve for parameters based on the adopted predistortion model. The PA's front-end processing module downloads these parameters, completing the predistortion processing of the input signal. Through this process and key circuit architecture design, DPD technology can effectively improve the efficiency of power amplifiers, reduce signal distortion, and thus enhance the performance of the entire communication system.

[0037] MIMO technology improves the quality of communication systems by using multiple transmit and receive antennas for wireless transmission. It can significantly increase the channel capacity of a communication system without increasing system bandwidth or antenna transmit power, thus becoming a key technology for next-generation mobile communications.

[0038] In next-generation mobile communication systems, crosstalk can be classified into linear crosstalk and nonlinear crosstalk based on the location of crosstalk generation in multi-channel transmitters: crosstalk occurring at the front end of the power amplifier is called nonlinear crosstalk, while crosstalk occurring at the back end of the power amplifier, such as antenna crosstalk, is called linear crosstalk.

[0039] In the context of MIMO, in order to compensate for nonlinearity and crosstalk in multi-channel MIMO transmitters, some digital predistortion models suitable for this scenario have been proposed in related technologies, such as cross-digital predistortion models, crosstalk cancellation predistortion models, and predistortion models composed of cross-digital and crosstalk cancellation.

[0040] Based on the above model, there are currently two main implementation schemes for DPD:

[0041] Option 1: The decision feedback equalizer (DFE) / field programmable gate array (FPGA) platform integrates a DPD module, which transmits parameter signals with the radio transceiver (TRX) and PA through a high-speed digital interface, such as JESD204B. The DPD parameters are applied to the TRX through the high-speed digital interface. In addition to resource constraints, the rate and bandwidth of the digital interface also limit the scale of the DPD model parameters, thus limiting the DPD performance.

[0042] Figure 3 This is a framework diagram of a digital predistortion model for multi-channel transmitters provided in related technologies, such as... Figure 3 As shown, the multimode remote radio unit (RRU) integrates a PA, TRX, DFE or FPGA, and power management. The TRX chip integrates a phase-locked loop (PLL) module, TRX power management, crest factor reduction (CFR) DPD, receiver (Rx or ORx), and transmitter (Tx). The Rx includes a low-noise amplifier (LNA), direct digital control (DDC), broadband forum (BBF), and ADC; the ORx includes an ATT, DDC, BBF, and ADC; and the Tx includes a DA, DUC, BBF, and digital-to-analog converter (DAC).

[0043] It should be noted that the TRX chip integrates a DPD module, and the DPD parameters directly affect the TRX; the power management in the RRU directly manages the power management of the TRX; the DFE or FPGA transmits parameter signals to the TRX through a high-speed digital interface, such as JESD204B.

[0044] It should be noted that while TRX has a cost advantage over Scheme 1 and is not limited by high-speed digital interfaces, its on-chip hardware resources are relatively small compared to Scheme 1, making it unsuitable for high-precision and high-complexity DPD models.

[0045] Figure 4 This is a flowchart illustrating a digital predistortion method provided in an embodiment of this application, as shown below. Figure 4As shown, this method is applied to an electronic device equipped with a digital predistortion module for performing overall predistortion processing on signals before signal amplification across multiple transmission channels of the electronic device. The digital predistortion module includes a first predistortion unit, a second predistortion unit, and a third predistortion unit. The first and second predistortion units are configured on a first platform of the electronic device; the third predistortion unit is configured on each transmission chip in the first platform. The digital predistortion method includes:

[0046] S101. Call the third pre-distortion unit to eliminate power amplifier distortion in each transmit channel.

[0047] In some embodiments, each transmit channel is individually excited to obtain the reference output signal and reference input signal of the first power amplifier in each transmit channel; a third predistortion unit is invoked to determine the first predistortion coefficient of each transmit channel based on the reference output signal and the reference input signal; the third predistortion unit is invoked to perform predistortion correction on the target input signal entering the first power amplifier based on the first predistortion coefficient to eliminate the power amplifier distortion of each transmit channel.

[0048] In some embodiments, if there is a linear relationship between the output signal of the first power amplifier and the target input signal of the first power amplifier, the output signal of the first power amplifier is determined to be the target output signal of the first power amplifier, the first predistortion coefficient is the target predistortion coefficient of each transmission channel, and the linear crosstalk coefficient is obtained. If there is no linear relationship between the output signal of the first power amplifier and the target input signal of the first power amplifier, the third predistortion unit is invoked, the first predistortion coefficient is repeatedly adjusted to obtain the second predistortion coefficient; the third predistortion unit is invoked, and based on the second predistortion coefficient, the target input signal entering the first power amplifier is repeatedly subjected to predistortion correction until there is a linear relationship between the output signal of the first power amplifier and the target input signal of the first power amplifier, the output signal of the first power amplifier is determined to be the target output signal of the first power amplifier, the second predistortion coefficient is the target predistortion coefficient of each transmission channel, and the linear crosstalk coefficient is obtained.

[0049] S102. Call the second predistortion unit to eliminate nonlinear crosstalk between multiple transmission channels.

[0050] In some embodiments, when multiple transmission channels are in operation, a linear crosstalk cancellation coefficient is determined based on the target output signal, the target input signal, and the baseband signal; a first predistortion unit is invoked to eliminate linear crosstalk between the multiple transmission channels based on the linear crosstalk cancellation coefficient.

[0051] S103. Call the first predistortion unit to eliminate linear crosstalk between multiple transmission channels.

[0052] In some embodiments, when multiple transmission channels are in operation, a nonlinear crosstalk cancellation coefficient is determined based on the target predistortion coefficient, the baseband signal, and the target input signal; a second predistortion unit is invoked to eliminate nonlinear crosstalk between the multiple transmission channels based on the nonlinear crosstalk cancellation coefficient.

[0053] In this application embodiment, the electronic device may include mobile terminal devices such as mobile phones, tablets, laptops, personal digital assistants (PDAs), cameras, and wearable devices, as well as fixed terminal devices such as desktop computers.

[0054] Electronic devices include multiple communication devices, such as multiple antennas, all supporting the same communication standard. For example, multiple antennas may all support cellular communication, Wireless-Fidelity (Wi-Fi) communication, etc. Here, multiple antennas supporting cellular communication can support completely identical communication services, or they can support entirely different communication services. Of course, multiple antennas supporting cellular communication can also support different communication services.

[0055] Among them, the communication services supported by the antennas supporting cellular communication include, but are not limited to, Global System for Mobile Communications (GSM) mobile communication, Code Division Multiple Access (CDMA) mobile communication, 3rd Generation (3G) mobile communication, 4th Generation (4G) mobile communication, and 5th Generation (5G) mobile communication.

[0056] In some embodiments, when the multiple antennas supporting cellular communication support the same communication services, taking the electronic device supporting 5G mobile communication services as an example, the electronic device is provided with multiple antennas supporting 5G mobile communication services, and the multiple antennas are arranged in different positions of the electronic device.

[0057] Among them, the communication services supported by the antennas that support Wi-Fi communication include, but are not limited to, first-generation 802.11 communication services, second-generation 802.11b communication services, third-generation 802.11g / a communication services, fourth-generation 802.11n communication services, and fifth-generation 802.11ac communication services.

[0058] In this embodiment, the first platform can be an FPGA platform or a DFE platform. The first platform interacts with the transmitter chip through a high-speed digital interface to transmit DPD parameters. Here, multiple transmitter chips can be configured on the first platform.

[0059] In some embodiments, S101, S102 and S103 may be executed simultaneously, or S102 and S101 may be executed simultaneously, with S101 being executed before S102 and S101.

[0060] In some embodiments, the digital predistortion module further includes an analog-to-digital conversion unit, a processing unit, and a synchronization unit. The signals processed by the first predistortion unit, the second predistortion unit, and the third predistortion unit come from the same analog-to-digital conversion unit and the processing unit. The synchronization unit is invoked to synchronize the signals received by the first predistortion unit, the second predistortion unit, and the third predistortion unit.

[0061] This application provides a digital predistortion method applied to an electronic device. The electronic device is equipped with a digital predistortion module for performing overall predistortion processing on signals before signal amplification in multiple transmission channels of the electronic device. The digital predistortion module includes a first predistortion unit, a second predistortion unit, and a third predistortion unit. The first and second predistortion units are configured on a first platform of the electronic device. The third predistortion unit is configured on each transmitter connected to the output of the first platform. The digital predistortion method includes: calling the first predistortion unit to eliminate linear crosstalk between multiple transmission channels; calling the second predistortion unit to eliminate nonlinear crosstalk between multiple transmission channels; and calling the third predistortion unit to eliminate power amplifier distortion in each transmission channel. In other words, in this embodiment, the digital predistortion module configured on the electronic device includes a first predistortion unit and a second predistortion unit configured on a first platform, and a third predistortion unit configured on the transmitter chip. The first predistortion unit is used to eliminate linear crosstalk between multiple transmission channels; the second predistortion unit is used to eliminate nonlinear crosstalk between multiple transmission channels; and the third predistortion unit is used to eliminate power amplifier distortion in each transmission channel, thereby realizing a digital predistortion system scheme for multi-channel transmission. Furthermore, after decomposition, the design and debugging complexity of each predistortion unit will be greatly reduced, and the debugging of each predistortion unit can be performed simultaneously, which is more conducive to the promotion and application of the scheme in base stations, small base stations, etc., thereby achieving the goal of cost reduction. For the third predistortion unit on each transmitter chip, only a single-input single-output digital predistortion model of a single-channel power amplifier needs to be considered, which is much less complex than a multi-channel digital predistortion model. Furthermore, while ensuring single-channel digital predistortion performance, each transmitter chip does not require individual training and debugging, greatly improving debugging efficiency. Integration onto the chip eliminates limitations imposed by the interface rate between the platform and the transmitter, maximizing the single-channel digital predistortion performance of the model. For the first and second predistortion units on each platform, the platform's richer hardware resources allow for flexible configuration across multiple scenarios and applications.

[0062] In some embodiments, the method provided in this application includes steps A1 to A2, or includes step A3:

[0063] Step A1: Obtain the preset number of iterations and the error threshold or duration corresponding to the error caused by crosstalk between multiple transmission channels.

[0064] Step A2: Based on the preset number of iterations, error threshold, or duration, redetermine the linear crosstalk cancellation coefficient and the nonlinear crosstalk cancellation coefficient.

[0065] Step A3: When the antenna beam scanning of the electronic device changes, redetermine the linear crosstalk coefficient, the linear crosstalk cancellation coefficient, and the nonlinear crosstalk cancellation coefficient.

[0066] The following will describe an exemplary application of the embodiments of this application in a real-world application scenario.

[0067] This application proposes a digital predistortion system scheme for multi-channel transmission. The main idea is to divide the multi-channel digital predistortion model into two sub-modules: one is a single-input single-output (DPD) module that does not need to consider inter-channel crosstalk, which is integrated into the TRX chip; the other is an inter-channel crosstalk cancellation module, which is integrated into the FPGA or DFE platform. The platform transmits DPD parameters to the TRX chip through a high-speed digital interface.

[0068] First, the multi-channel digital distortion model is broken down into three parts. Figure 5 A decomposition diagram of a nonlinear distortion model with two transmission channels is given, as follows: Figure 5 As shown, the nonlinear distortion model is divided into a single-channel power amplifier distortion model and an inter-channel crosstalk distortion model; among them, the inter-channel crosstalk distortion can be further divided into a nonlinear crosstalk sub-model and a linear crosstalk model:

[0069] After the input signal x1(n) generated by the local oscillator (LO) passes through the nonlinear crosstalk sub-model, the input signal of the power amplifier PA1 is: x1(n) + α 21 (n); After the input signal x2(n) generated by LO passes through the nonlinear crosstalk sub-model, the input signal of power amplifier PA2 is: x2(n) + α 12 (n); where α 21 (n) and α 12 (n) represents the crosstalk signal.

[0070] Let the power amplifier distortion model be a function f(x), which is determined by the actual DPD model used, such as a memory polynomial; then the power amplifier output signal is: f(x1(n) + α 21 (n)), f(x2(n)+α 12 (n)).

[0071] Here, f(x) can be selected from different power amplifier distortion models depending on the specific learning architecture used. Power amplifier distortion models include, but are not limited to, multinomial models, LS algorithms, and piecewise function models. The signal output to the antenna after the power amplifier output signal passes through the linear crosstalk sub-model is: y1(n) = f(x1(n) + α 21 (n))+β 21 (f(x1(n)+α 21 (n)), y2(n)=f(x2(n)+α 12 (n))+β 21 (f(x2(n)+α 12 (n))).

[0072] After the above decomposition, the solution corresponding to the multi-channel DPD model can be adopted as follows: Figure 6 The technical architecture implementation shown is as follows: Figure 6 As shown, DPD submodule 1 (i.e., inter-channel nonlinear crosstalk cancellation module) and DPD submodule 3 (i.e., single-input single-output power amplifier distortion cancellation module) are integrated in the DFE or FPGA platform, while DPD submodule 2 is integrated on the TRX chip. The signal output from the DFE or FPGA platform can be output to each TRX chip through a high-speed digital interface, and needs to be ADC-processed before being output to the TRX chip.

[0073] For each TRX chip, each transmit channel is first excited, and the analog signal fed back from PA1 or PA2 is acquired from the coupler. The fed-back analog signal is processed by ADC, frequency shift, etc. The feedback signal and the input signal (i.e., local oscillator signal) generated through LO are aligned in terms of time delay, amplitude, phase, etc. The processed data is used to solve the predistortion parameters based on DPD submodule 2. The processed data can also be transmitted to DFE or DPD submodule 1 of the FPGA platform.

[0074] The data from the three DPD submodules comes from the same ADC and processing module, ensuring data synchronization. Using the same ADC reduces hardware costs and avoids introducing new errors due to ADC differences. During operation, driven by the same clock or synchronous clock, the data output by the ADC is simultaneously sent to DPD submodule 2 and DPD submodule 1, and link delay calibration is removed. An inter-channel data alignment module is added to the processing module to ensure complete synchronization of the data received by each submodule.

[0075] The workflow of this system solution is as follows:

[0076] a. Excite each transmit channel individually. Based on the input and output signals of each channel's PA, use the built-in DPD submodule 2 of TRX to solve its power amplifier predistortion parameters and load them into the module to perform predistortion correction on the signal before it enters the PA.

[0077] b. Based on the desired error threshold, repeat step a in a loop. After correction, the input and output of the single-channel power amplifier can be approximated as a linear relationship.

[0078] c. The multi-channel transmitter enters normal working state, and all the transmission channels that need to work enter working state. Based on the power amplifier output signal and the power amplifier predistortion signal and baseband signal obtained in step a, the linear crosstalk cancellation coefficient is calculated.

[0079] d. Based on the linear crosstalk coefficient from step b, calculate the nonlinear crosstalk cancellation coefficient for the baseband signal, the signal before entering the power amplifier, and the baseband signal.

[0080] e. Repeat steps c and d according to the desired number of iterations, error threshold, or duration.

[0081] f. Continuously output signals to each channel antenna in the loop. When the antenna beam scan changes, repeat steps a to e according to the new threshold.

[0082] The key advantage of this system is that:

[0083] First, the on-chip DPD module of the TRX only needs to consider the single-input single-output DPD model of a single-channel PA, which is much less complex than the multi-channel DPD model. Furthermore, while ensuring single-channel DPD performance, each TRX DPD does not need to be trained and debugged individually, greatly improving debugging efficiency. Integration on-chip avoids the limitations of the interface speed between the FPGA and TRX, maximizing the single-channel DPD performance under this model. Simultaneously, the inter-channel crosstalk module is placed on the DFE / FPGA platform, nested outside the single-channel TRX DPD. Since the inter-channel crosstalk coefficient is affected by various factors such as the number of channels, channel layout, MIMO antenna beam scanning, and antenna port impedance matching, placing it on the platform allows for more flexible configuration in various scenarios and applications by utilizing the platform's richer hardware resources. Finally, using this dual DPD module combination of TRX + DFE / FPGA platform to implement a multi-channel transmission digital predistortion system solution significantly reduces the design and debugging complexity of each module after separation. The two parts can be debugged simultaneously, which is more conducive to the promotion and application of this low-cost TRX integrated DPD solution in base stations and small base stations, thereby achieving cost reduction.

[0084] Embodiments of this application provide an electronic device configured with a digital predistortion module for performing overall predistortion processing on signals before signal amplification in multiple transmission channels of the electronic device. The digital predistortion module includes a first predistortion unit, a second predistortion unit, and a third predistortion unit. The first and second predistortion units are configured on a first platform of the electronic device; the third predistortion unit is configured on each transmission chip in the first platform. This electronic device can be used to implement... Figure 4 A corresponding embodiment provides a digital predistortion method, referring to... Figure 7 As shown, the electronic device 700 includes:

[0085] The third predistortion unit 701 is used to eliminate power amplifier distortion in each transmit channel;

[0086] The first predistortion unit 702 is used to eliminate linear crosstalk between multiple transmission channels;

[0087] The second predistortion unit 703 is used to eliminate nonlinear crosstalk between multiple transmission channels.

[0088] In other embodiments of this application, the processing unit 704 is used to individually excite each transmission channel to obtain the reference output signal and reference input signal of the first power amplifier in each transmission channel;

[0089] The third predistortion unit 701 is used to determine the first predistortion coefficient of each transmission channel based on the reference output signal and the reference input signal;

[0090] The third predistortion unit 701 is used to perform predistortion correction on the target input signal entering the first power amplifier based on the first predistortion coefficient, thereby eliminating power amplifier distortion in each transmission channel.

[0091] In other embodiments of this application, the processing unit 704 is configured to determine, if there is a linear relationship between the output signal of the first power amplifier and the target input signal of the first power amplifier, that the output signal of the first power amplifier is the target output signal of the first power amplifier, the first predistortion coefficient is the target predistortion coefficient of each transmission channel, and obtain the linear crosstalk coefficient.

[0092] In other embodiments of this application, the processing unit 704 is used to call the third predistortion unit to repeatedly adjust the first predistortion coefficient to obtain the second predistortion coefficient if there is no linear relationship between the output signal of the first power amplifier and the target input signal of the first power amplifier.

[0093] The third predistortion unit 701 is used to repeatedly perform predistortion correction on the target input signal entering the first power amplifier based on the second predistortion coefficient until there is a linear relationship between the output signal of the first power amplifier and the target input signal of the first power amplifier. The output signal of the first power amplifier is determined to be the target output signal of the first power amplifier, the second predistortion coefficient is the target predistortion coefficient of each transmission channel, and the linear crosstalk coefficient is obtained.

[0094] In other embodiments of this application, the processing unit 704 is used to determine the linear crosstalk cancellation coefficient based on the target output signal, the target input signal, and the baseband signal when multiple transmission channels are in operation.

[0095] The first predistortion unit 702 is used to eliminate linear crosstalk between multiple transmission channels based on the linear crosstalk cancellation coefficient.

[0096] In other embodiments of this application, the processing unit 704 is used to determine the nonlinear crosstalk cancellation coefficient based on the target predistortion coefficient, the baseband signal, and the target input signal when multiple transmission channels are in operation.

[0097] The second predistortion unit 703 is used to eliminate nonlinear crosstalk between multiple transmission channels based on the nonlinear crosstalk cancellation coefficient.

[0098] In other embodiments of this application, the processing unit 704 is used to obtain a preset number of iterations and an error threshold or duration corresponding to the error caused by crosstalk between multiple transmission channels; and to redetermine the linear crosstalk cancellation coefficient and the nonlinear crosstalk cancellation coefficient based on the preset number of iterations, error threshold or duration.

[0099] In other embodiments of this application, the processing unit 704 is used to redetermine the linear crosstalk coefficient, the linear crosstalk cancellation coefficient, and the nonlinear crosstalk cancellation coefficient when the antenna beam scanning of the electronic device changes.

[0100] In other embodiments of this application, the digital predistortion module further includes an analog-to-digital conversion unit 706 and a synchronization unit 705, and the signals processed by the first predistortion unit 702, the second predistortion unit 703 and the third predistortion unit 701 come from the same analog-to-digital conversion unit and processing unit;

[0101] Synchronization unit 705 is used to synchronize the signals received by the first predistortion unit 702, the second predistortion unit 703 and the third predistortion unit 701.

[0102] The descriptions of the above device embodiments are similar to those of the above method embodiments, and have similar beneficial effects. For technical details not disclosed in the device embodiments of this application, please refer to the descriptions of the method embodiments of this application for understanding.

[0103] It should be noted that, in the embodiments of this application, if the above-described digital predistortion method is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiments of this application, or the part that contributes to the related technology, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a terminal device to execute all or part of the methods of the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, mobile hard drives, read-only memory (ROM), magnetic disks, or optical disks. Thus, the embodiments of this application are not limited to any specific hardware and software combination.

[0104] Figure 8 This is a schematic structural diagram of an electronic device 800 provided in an embodiment of this application. Figure 8 The illustrated electronic device 800 includes a processor 810, which can call and run computer programs from memory to implement the methods in the embodiments of this application.

[0105] Optionally, such as Figure 8As shown, the electronic device 800 may further include a memory 820. The processor 810 can retrieve and run computer programs from the memory 820 to implement the methods described in the embodiments of this application.

[0106] The memory 820 can be a separate device independent of the processor 810, or it can be integrated into the processor 810.

[0107] Optionally, such as Figure 8 As shown, the electronic device 800 may also include a transceiver 830, which the processor 810 can control to communicate with other devices. Specifically, it can send information or data to other devices or receive information or data sent by other devices.

[0108] The transceiver 830 may include a transmitter and a receiver. The transceiver 830 may further include an antenna, and the number of antennas may be one or more.

[0109] This application also provides a computer program product, including a computer program that can be executed by the processor 810 of an electronic device 800 to perform the steps described in any of the foregoing methods.

[0110] It should be understood that the processor in the embodiments of this application may be an integrated circuit chip with signal processing capabilities. In implementation, the steps of the above method embodiments can be completed by integrated logic circuits in the processor's hardware or by instructions in software form. The processor described above can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this application can be directly embodied in the execution of a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software modules can be located in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. The storage medium is located in memory, and the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above method.

[0111] As one embodiment, the processor may include one or more general-purpose central processing units (CPUs). Each of these processors may be a single-core processor or a multi-core processor. Here, "processor" may refer to one or more devices, circuits, and / or processing cores used for processing data (e.g., executing instructions).

[0112] It is understood that the memory in the embodiments of this application can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory can be ROM, Programmable Read-Only Memory (PROM), Erasable Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM), or flash memory. The volatile memory can be Random Access Memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDR SDRAM), Enhanced Synchronous DRAM (ESDRAM), Synchlink DRAM (SLDRAM), and Direct Rambus RAM (DR RAM). It should be noted that the memory used in the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0113] This application also provides a computer-readable storage medium for storing computer programs.

[0114] Optionally, the computer-readable storage medium can be applied to the electronic device in the embodiments of this application, and the computer program causes the computer to execute the corresponding processes implemented by the electronic device in the various methods of the embodiments of this application. For the sake of brevity, it will not be described in detail here.

[0115] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product.

[0116] A computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the flow or function according to the embodiments of this application is generated. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium may be any available medium that a computer can store or a data storage device such as a server or data center that integrates one or more available media. The available media may be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media (e.g., solid-state drives (SSDs)).

[0117] The digital predistortion method, electronic device, computer-readable storage medium, and computer program product provided in the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

[0118] It should be understood that the phrases "an embodiment," "an embodiment," "an embodiment of this application," "the foregoing embodiment," "some implementations," or "some embodiments" mentioned throughout the specification mean that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of this application. Therefore, the phrases "an embodiment," "an embodiment," "an embodiment of this application," "the foregoing embodiment," "some implementations," or "some embodiments" appearing throughout the specification do not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that in the various embodiments of this application, the sequence numbers of the above-described processes do not imply a sequential order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application. The sequence numbers of the above-described embodiments of this application are merely descriptive and do not represent the superiority or inferiority of the embodiments.

[0119] Unless otherwise specified, any step in the embodiments of this application performed by the electronic device may be executed by the processor of the electronic device. Unless otherwise specified, the embodiments of this application do not limit the order in which the electronic device performs the following steps. Furthermore, the methods used to process data in different embodiments may be the same or different methods.

[0120] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the various components shown or discussed can be through some interfaces, and the indirect coupling or communication connection between devices or units can be electrical, mechanical, or other forms.

[0121] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units. They may be located in one place or distributed across multiple network units. Some or all of the units may be selected to achieve the purpose of this embodiment according to actual needs.

[0122] In addition, each functional unit in the various embodiments of this application can be integrated into one processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit; the integrated unit can be implemented in hardware or in the form of hardware plus software functional units.

[0123] The methods disclosed in the several method embodiments provided in this application can be arbitrarily combined to obtain new method embodiments without conflict. The features disclosed in the several product embodiments provided in this application can be arbitrarily combined to obtain new product embodiments without conflict. The features disclosed in the several method or device embodiments provided in this application can be arbitrarily combined to obtain new method embodiments or device embodiments without conflict.

[0124] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media that can store program code, such as mobile storage devices, ROMs, magnetic disks, or optical disks.

[0125] Alternatively, if the integrated units described above are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer storage medium. Based on this understanding, the technical solutions of the embodiments of this application, or the parts that contribute to related technologies, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROMs, magnetic disks, or optical disks.

[0126] The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0127] It should be noted that in the various embodiments involved in this application, all steps or some steps may be performed, as long as a complete technical solution can be formed.

[0128] The above description is merely an embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A digital predistortion method, characterized in that, The invention is applied to an electronic device, which is equipped with a digital predistortion module for performing overall predistortion processing on the signal before signal amplification in multiple transmission channels of the electronic device. The digital predistortion module includes a first predistortion unit, a second predistortion unit, and a third predistortion unit; the first predistortion unit and the second predistortion unit are configured on a first platform of the electronic device. The third predistortion unit is configured on each transmitter chip in the first platform; The digital predistortion method includes: The third pre-distortion unit is invoked to eliminate power amplifier distortion in each transmission channel; The first predistortion unit is invoked to eliminate linear crosstalk between multiple transmission channels; The second predistortion unit is invoked to eliminate nonlinear crosstalk between multiple transmission channels.

2. The method according to claim 1, characterized in that, The invocation of the third pre-distortion unit to eliminate power amplifier distortion in each transmit channel includes: Each of the transmitting channels is individually excited to obtain the reference output signal and reference input signal of the first power amplifier in each transmitting channel; The third predistortion unit is invoked to determine the first predistortion coefficient for each transmission channel based on the reference output signal and the reference input signal; The third predistortion unit is invoked to perform predistortion correction on the target input signal entering the first power amplifier based on the first predistortion coefficient, thereby eliminating power amplifier distortion in each transmission channel.

3. The method according to claim 2, characterized in that, The method further includes: If there is a linear relationship between the output signal of the first power amplifier and the target input signal of the first power amplifier, the output signal of the first power amplifier is determined to be the target output signal of the first power amplifier, the first predistortion coefficient is the target predistortion coefficient of each transmission channel, and the linear crosstalk coefficient is obtained.

4. The method according to claim 3, characterized in that, The method further includes: If there is no linear relationship between the output signal of the first power amplifier and the target input signal of the first power amplifier, the third predistortion unit is invoked to repeatedly adjust the first predistortion coefficient to obtain the second predistortion coefficient; The third predistortion unit is invoked, and based on the second predistortion coefficient, the target input signal entering the first power amplifier is repeatedly predistorted until there is a linear relationship between the output signal of the first power amplifier and the target input signal of the first power amplifier. The output signal of the first power amplifier is determined to be the target output signal of the first power amplifier, the second predistortion coefficient is the target predistortion coefficient of each transmission channel, and the linear crosstalk coefficient is obtained.

5. The method according to claim 3, characterized in that, The step of calling the first predistortion unit to eliminate linear crosstalk between multiple transmission channels includes: When multiple transmission channels are in operation, the linear crosstalk cancellation coefficient is determined based on the target output signal, the target input signal, and the baseband signal. The first predistortion unit is invoked to eliminate linear crosstalk between multiple transmission channels based on the linear crosstalk cancellation coefficient.

6. The method according to claim 3, characterized in that, The step of calling the second predistortion unit to eliminate nonlinear crosstalk between multiple transmission channels includes: When multiple transmission channels are in operation, the nonlinear crosstalk cancellation coefficient is determined based on the target predistortion coefficient, the baseband signal, and the target input signal. The second predistortion unit is invoked to eliminate nonlinear crosstalk between multiple transmission channels based on the nonlinear crosstalk cancellation coefficient.

7. The method according to claim 5 or 6, characterized in that, The method further includes: Obtain the preset number of iterations and the error threshold or duration corresponding to the error caused by crosstalk between the multiple transmission channels; Based on the preset number of iterations, error threshold, or duration, the linear crosstalk cancellation coefficient and the nonlinear crosstalk cancellation coefficient are redefined.

8. The method according to claim 1, characterized in that, The method further includes: When the antenna beam scan of the electronic device changes, the linear crosstalk coefficient, the linear crosstalk cancellation coefficient, and the nonlinear crosstalk cancellation coefficient are re-determined.

9. The method according to claim 1, characterized in that, The digital predistortion module further includes an analog-to-digital conversion unit, a processing unit, and a synchronization unit. The signals processed by the first predistortion unit, the second predistortion unit, and the third predistortion unit originate from the same analog-to-digital conversion unit and the same processing unit. The method further includes: The synchronization unit is invoked to synchronize the signals received by the first predistortion unit, the second predistortion unit, and the third predistortion unit.

10. An electronic device, characterized in that, The electronic device is equipped with a digital predistortion module for performing overall predistortion processing on the signal before signal amplification in multiple transmission channels of the electronic device; the digital predistortion module includes a first predistortion unit, a second predistortion unit, and a third predistortion unit; the first predistortion unit and the second predistortion unit are disposed on a first platform of the electronic device; The third predistortion unit is configured on each transmitter chip in the first platform; The third pre-distortion unit is used to eliminate power amplifier distortion in each transmission channel; The first predistortion unit is used to eliminate linear crosstalk between multiple transmission channels; The second predistortion unit is used to eliminate nonlinear crosstalk between multiple transmission channels.

11. An electronic device, characterized in that, The electronic device includes: Memory, used to store executable instructions; A processor, when executing executable instructions stored in the memory, implements the digital predistortion method according to any one of claims 1 to 9.

12. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores one or more programs, which can be executed by one or more processors to implement the digital predistortion method according to any one of claims 1 to 9.

13. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the digital predistortion method according to any one of claims 1 to 9.

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