A laser marking and grid electrode collaborative design method for a solar cell and related equipment

By detecting the direction of silicon wafer dicing marks and optimizing the angle between laser marking and grid electrodes, the problems of uneven energy distribution and grid breakage caused by silicon wafer dicing marks were solved. This achieved a collaborative design between laser marking and grid electrodes, improving the production efficiency and quality of solar cells.

CN122641118APending Publication Date: 2026-08-25SICHUAN YIXIAN PHOTOVOLTAIC IND INNOVATION CENTER CO LTD +2
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Patent Information

Application Number
CN202610598431.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-04-30
Publication Date
2026-08-25

AI Technical Summary

Technical Problem

Silicon wafer dicing marks affect the uniformity and continuity of laser marking and gate electrodes, leading to problems such as uneven energy distribution and gate breakage. Existing technologies lack targeted solutions.

Method used

By detecting the direction of the dicing marks on the silicon wafer, the angle between the laser marking and the gate electrode is designed, the laser marking path and the direction of the gate electrode are optimized, the number of times the laser beam and conductive paste cross the dicing marks is limited, and the laser parameters are adjusted to maintain energy uniformity.

Benefits of technology

It significantly improves the uniformity of laser processing, reduces grid breakage rate, increases power generation efficiency and product yield, reduces process alignment accuracy requirements, and achieves synergistic effects between laser marking and grid line printing.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a kind of laser marking and grid line electrode collaborative design method and related equipment of solar cell, laser marking and grid line electrode collaborative design method of solar cell includes to the silicon wafer to be processed is detected, determine second direction, third direction and first included angle, according to first included angle determine laser marking included angle and fine grid electrode included angle, according to laser marking included angle and third direction determine fourth direction, according to fine grid electrode included angle and third direction determine fifth direction, according to fourth direction and fifth direction are carried out laser marking and grid line electrode design etc. Step.The application is when laser marking to the silicon wafer to be processed, the number of times that laser beam is crossed line mark groove in scanning process is limited in smaller range, avoids frequent defocus;When fine grid line is made on the silicon wafer to be processed, the number of times that conductive paste is crossed line mark groove in printing process is limited in smaller range, to reduce the risk of broken grid.The application is widely used in solar cell technical field.
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Description

Technical Field

[0001] This invention relates to the field of solar cell technology, and in particular to a method and related equipment for the co-design of laser marking and grid line electrodes for solar cells. Background Technology

[0002] In the production of solar cells, silicon rods are typically cut into silicon wafers using diamond wire cutting. This cutting process leaves cutting marks on the surface of the silicon wafers. These marks appear as continuous grooves along the cutting direction, and their width, depth, and distribution density are closely related to the cutting process parameters.

[0003] In solar cell manufacturing, laser marking technology is used in processes such as laser modification, grooving, and doping. However, the cutting lines on the silicon wafer affect the application of laser marking technology. On the other hand, in the subsequent electrode printing process, conductive pastes (such as silver paste, aluminum paste, copper paste, and silver-coated copper paste) need to be printed onto the silicon wafer surface to form grid electrodes (including fine grids and main grids). Solar cell grid lines need to balance conductivity and shading loss; they must be able to conduct current quickly while being as thin as possible to minimize sunlight obstruction. Therefore, the extension direction of the fine grid and the direction of the cutting lines affect electrode performance. Summary of the Invention

[0004] To address at least one of the aforementioned technical problems, the present invention aims to provide a method and related equipment for the collaborative design of laser marking and grid line electrodes for solar cells.

[0005] On one hand, embodiments of the present invention include a method for the collaborative design of laser marking and grid line electrodes in a solar cell, the method comprising the following steps: The silicon wafer to be processed is inspected to determine a second direction, a third direction, and a first included angle; the second direction is the extension direction of the line marks generated by the silicon ingot cutting process in manufacturing the silicon wafer to be processed, the third direction is the extension direction of the silicon wafer reference edge, and the first included angle is the size of the angle formed by the second direction and the third direction; Based on the first included angle, determine the laser marking included angle and the fine grid electrode included angle; The fourth direction is determined based on the laser marking angle and the third direction; The fifth direction is determined based on the included angle of the fine grid electrodes and the third direction; Laser marking and grid electrode design are performed based on the fourth and fifth directions.

[0006] Further, based on the first included angle, the laser marking angle and the fine grid electrode angle are determined: Set the range of included angle values; Within the range of the included angle values, a fourth included angle is determined; the fourth included angle is the angle between the fourth direction and the second direction. Within the range of the included angle values, a fifth included angle is determined; the fifth included angle is the angle between the fifth direction and the second direction. The laser marking angle is determined based on the first included angle and the fourth included angle; The included angle of the fine grid electrode is determined based on the first included angle and the fifth included angle.

[0007] Further, determining the laser marking angle based on the first included angle and the fourth included angle includes: According to the formula = or

[0008] Perform calculations; among which, The laser marking angle is... The first included angle, This is the fourth included angle.

[0009] Further, determining the included angle of the fine gate electrode based on the first included angle and the fifth included angle includes: According to the formula = or

[0010] Perform calculations; among which, The included angle of the fine grid electrodes, The first included angle, This refers to the fifth included angle.

[0011] Furthermore, the laser marking and grid electrode design based on the fourth and fifth directions includes: The fourth and fifth directions are optimized collaboratively. The optimized fourth direction is used as the laser marking path direction; The optimized fifth direction is used as the extension direction of the gate electrode; The scanning pattern of the laser marking equipment is customized according to the laser marking path direction; Customize the grid line template according to the extension direction of the grid line electrode; The laser marking equipment and the grid template are used to perform the preparation process.

[0012] Furthermore, the coordinated optimization of the fourth direction and the fifth direction includes: Define the first angle variable and the second angle variable; Set the angle step size; Based on the angle step size, the first angle variable and the second angle variable respectively traverse each angle value in the range of included angle values; For any pair of angle value combinations traversed by the first angle variable and the second angle variable, the solar cell is simulated according to the angle value combination to obtain the simulation results corresponding to the angle value combination; Obtain the global optimal solution from all the simulation results; The values ​​of the fourth included angle and the fifth included angle are determined based on the combination of angle values ​​corresponding to the global optimal solution.

[0013] Further, determining the values ​​of the fourth included angle and the fifth included angle based on the combination of angle values ​​corresponding to the global optimal solution includes: Calculate the average value of the combination of angle values; The fourth included angle and the fifth included angle are set to be equal to the average value.

[0014] On the other hand, embodiments of the present invention also include a computer device, including a memory and a processor, the memory for storing at least one program, and the processor for loading at least one program to execute the laser marking and grid electrode co-design method for solar cells in the embodiments.

[0015] On the other hand, embodiments of the present invention also include a computer-readable storage medium storing a processor-executable program, which, when executed by a processor, is used to perform the laser marking and grid electrode co-design method for solar cells in the embodiments.

[0016] On the other hand, embodiments of the present invention also include a solar cell, which is designed using the laser marking and grid electrode co-design method of the solar cell in the embodiments.

[0017] The beneficial effects of the present invention are as follows: the laser marking and grid line electrode co-design method of the solar cell in the embodiments can ensure that when laser marking is performed on the silicon wafer to be processed, the number of times the laser beam crosses the line groove during the scanning process is limited to a small range, avoiding frequent defocusing; when fine grid lines are made on the silicon wafer to be processed, the number of times the conductive paste crosses the line groove during the printing process is limited to a small range, thereby reducing the risk of grid breakage. Attached Figure Description

[0018] Figure 1 This is a schematic diagram illustrating the steps of the laser marking and grid electrode co-design method for solar cells in this embodiment; Figure 2This is a schematic diagram of the structure of the silicon wafer to be processed in the embodiment; Figure 3 This is a schematic diagram of the fourth included angle in the embodiment; Figure 4 This is a schematic cross-sectional view of the line mark morphology of the silicon wafer to be processed in the embodiment; Figure 5 This is a schematic diagram of the metal electrode pattern of the TOPCon solar cell in the embodiment; Figure 6 This is a schematic diagram of the cross-sectional area of ​​the TOPCon solar cell in the embodiment; Figure 7 This is a schematic diagram showing the metal electrodes and silicon wafer traces of the TOPCon solar cell stacked together in the embodiment; Figure 8 This is a schematic diagram of the battery metal electrode pattern that is in back contact with the sun in the embodiment. Figure 9 This is a schematic diagram showing the battery metal electrode and silicon wafer traces superimposed on each other in the embodiment, which are in back contact with the sun. Figure 10 This is a schematic diagram of the cross-section of the battery with its back in contact with the sun in the embodiment; The attached figures are labeled as follows: 001 - Silicon wafer; 002 - Silicon wafer trace; 003 - Non-line mark area on silicon wafer; 004 - Angle between the direction of the silicon wafer trace extension and the reference edge of the silicon wafer; 005 - Silicon wafer reference edge; 006 - Laser marking area; 007 - The laser marking path direction is the angle between the laser marking path and the line mark extension direction; 008 - Laser marking path 1 (bottom of the line mark groove); 009-Laser marking path 2 (top of the edge of the line mark groove or non-line mark area); 010 - Laser energy density corresponding to laser marking path 1; 011 - Laser energy density corresponding to laser marking path 2; 100-Solar cell main grid; 101 - Solar cell grid; 102 - The angle between the extension direction of the solar cell grid and the extension direction of the line mark; 201-laser selectively doped p-layer ++ ; 202 - Front-side fine gate electrode; 203-Silicon nitride; 204-alumina; 205-doped layer p+ ; 206-Tunneling oxide layer SiO X ; 207-n poly-Si; 208 - Backside fine grid electrode; 300-back contact solar cell main grid; 301 - Back contact solar cell fine grid electrode; 302 - The angle between the extension direction of the fine grid of the back contact solar cell and the extension direction of the line mark; 303-Silicon nitride; 304 aluminum oxide; 305-p poly-Si; 306-Tunneling Oxide Layer SiO X ; 307 - The isolation gap area formed by laser grooving; 308-n poly-Si; 309-Tunneling oxide layer SiO X . Detailed Implementation

[0019] The direction of the dicing marks caused by silicon rod cutting is usually at a certain angle α (0°≤α≤90°) to the edge direction of the silicon wafer, and the shape of the marks is arc-shaped. Laser marking techniques for silicon wafers include, but are not limited to, laser modification, laser doping, and laser grooving. The impact of dicing marks on silicon wafers on the application of laser marking technology includes: (1) In the polyfin process of TOPCon cells, SiO is sometimes grown by laser oxidation. X The mask is then etched with alkaline etching to form a polyfin tens of micrometers wide. This process requires extremely high uniformity of laser energy. When the laser scanning path intersects with the line mark, the focusing position fluctuates with the trench (several micrometers deep), and the laser focusing depth is also on the micrometer level. This leads to fluctuations in energy density. Where the energy is too high, the mask is too thick, and where the energy is too low, the mask is too thin or even missing, resulting in the polysilicon being etched incorrectly.

[0020] (2) Laser grooving, such as the p / n region isolation of BC cells, requires consistent groove width and depth and steep groove walls. When the grooving path is not parallel to the line mark direction, the ablation reference surface undulates with the line mark, the bottom of the groove is wavy, and the energy hitting the silicon wafer is uneven, resulting in uneven gap area after wet cleaning.

[0021] (3) In laser doping, laser scanning is used to allow impurity atoms from the doping source (such as borosilicate glass or phosphosilicate glass) to enter the surface layer of the silicon wafer, forming a heavily doped layer to reduce contact resistance. When the laser path intersects with the direction of the line mark (especially perpendicularly), the laser beam frequently crosses trenches of different depths, resulting in defocusing or uneven energy absorption, causing inconsistent doping depth and width, and uneven concentration distribution.

[0022] The impact of dicing marks on silicon wafers on the fabrication of grid electrodes includes the following: When the fine grid is printed perpendicular to the dicing direction, the silver paste needs to frequently cross the deep trenches formed by the dicing, which can easily interrupt the paste flow, causing localized thinning or even complete breakage of the electrode. Broken grids directly increase the series resistance (Rs) and contact resistance of the cell, reducing the fill factor (FF) and photoelectric conversion efficiency, while also lowering product yield. When the fine grid is printed parallel to the dicing direction, the breakage rate decreases significantly, but if the width of the dicing exceeds the design width of the fine grid, the silver paste will flow and accumulate in the trenches, resulting in localized coarse printing of the fine grid. Coarse printing not only affects the cell's appearance but also increases the light-shielding area, leading to uneven current density distribution, which also impairs cell performance.

[0023] Some related technologies improve printing quality by adjusting printing parameters (such as squeegee pressure and printing speed) or optimizing the rheological properties of the ink, but they lack specific solutions for the problems caused by the mismatch between the line marks and the grid lines. Furthermore, for laser marking, there is currently no method for actively designing the marking path and parameters based on the line mark direction. Therefore, a systematic solution is urgently needed to address the problem of uneven energy distribution caused by line mark grooves in laser marking, and the problems of grid breakage and coarse printing caused by the mismatch of line mark direction in grid line printing.

[0024] In summary, dicing marks on silicon wafers can cause the following problems: (1) Uneven energy in laser process: Overcome the problem of defocusing and uneven energy absorption caused by the laser beam frequently crossing the grooves of the laser marking path and the direction of the cutting line on the silicon wafer surface due to the large angle between them, which leads to unstable laser modification effect, fluctuation of groove depth / width, and inconsistent distribution of doping concentration; (2) Problem of broken grid in grid printing: Reduce the grid breakage defect caused by the conductive paste frequently crossing the grooves of the line due to the large angle between the direction of the fine grid and the direction of the line, and reduce the series resistance.

[0025] Based on the above principles, this embodiment provides a method for the collaborative design of laser marking and grid line electrodes in solar cells. (Refer to...) Figure 1 The method for co-designing laser marking and grid line electrodes for solar cells includes the following steps: S1. Inspect the silicon wafer to be processed to determine the second direction, the third direction, and the first included angle; S2. Determine the laser marking angle and the fine grid electrode angle based on the first included angle; S3. Determine the fourth direction based on the laser marking angle and the third direction; S4. Determine the fifth direction based on the included angle of the fine grid electrodes and the third direction; S5. Design laser marking and grid electrode based on the fourth and fifth directions.

[0026] In step S1, the silicon wafer to be processed (001) is a silicon wafer cut from a silicon rod, and its structure is as follows: Figure 2 As shown. (Refer to...) Figure 2 The surface of the silicon wafer to be processed (001) has line marks (002) left by cutting, while the area on the surface of the silicon wafer to be processed (001) without line marks (002) is the non-line mark area (003).

[0027] In this embodiment, the line mark (002) refers to a parallel line mark on the surface of the silicon wafer (001) to be processed, and its extension direction is the second direction. The surface of the silicon wafer (001) to be processed may also have vertical line marks perpendicular to the parallel line marks, and the extension direction of the vertical line marks is the first direction. In this embodiment, the parallel line mark is used as an example for explanation.

[0028] Reference Figure 2 The cutting process results in a silicon wafer reference edge (005) on the silicon wafer to be processed (001), and the extension direction of the silicon wafer reference edge (005) is a third direction.

[0029] Reference Figure 2 The extension direction of the line mark (002), i.e., the second direction, and the extension direction of the silicon wafer reference edge (005), i.e., the third direction, form a first angle (004). In this embodiment, the magnitude of the first angle (004) is denoted as . .

[0030] In this embodiment, when performing step S2, which is to determine the laser marking angle and the fine grid electrode angle based on the first included angle, the following steps can be performed: S201. Set the range of included angle values; S202. Within the range of included angle values, determine the fourth included angle; S203. Within the range of included angle values, determine the fifth included angle; S204. Determine the laser marking angle based on the first included angle and the fourth included angle; S205. Determine the included angle of the fine grid electrode based on the first included angle and the fifth included angle.

[0031] In this embodiment, refer to Figure 3The fourth included angle (007) to be determined in step S202 is the angle between the fourth direction along which the laser marking is performed on the silicon wafer to be processed and the extension direction of the line mark (002), i.e., the second direction. The size of the fourth included angle (007) is denoted as .

[0032] Figure 3 In the middle, the fourth direction corresponds to two laser marking paths, namely laser marking path 1 (008) located at the bottom of the line mark groove and laser marking path 2 (009) located at the top edge of the line mark groove or in the non-line mark area.

[0033] In this embodiment, refer to Figure 6 (Silicon wafers to be processed for TOPCon solar cells) and Figure 8 (The silicon wafer to be processed for back contact with the solar cell), the fifth included angle (102) to be determined in step S203 is the angle between the extension direction of the fine grid to be produced when fabricating the grid line electrode on the silicon wafer to be processed, i.e., the fifth direction, and the extension direction of the line mark (002), i.e., the second direction. The size of the fifth included angle (102) is denoted as .

[0034] For the fourth included angle (007) The fifth angle (102) In step S201, the same range of included angle values ​​can be set for them [0, ...]. ],in The preset maximum allowable angle is typically determined within the range of 0-45°. Size.

[0035] When the range of the included angle is determined to be [0, ...], Following this, in step S202, within the range of the included angle [0, ...], ... Determine the fourth included angle (007) within. The value of is set as the fourth included angle (007). satisfy 0≤ ≤

[0036] In step S203, within the range of included angle values ​​[0, ... Determine the fifth included angle (102) within the range. The value of is set as the fifth included angle (102). satisfy 0≤ ≤

[0037] In this embodiment, the fourth included angle (007) It can be combined with the fifth angle (102). equal.

[0038] In this embodiment, the laser marking angle to be determined in step S204 is the angle between the fourth direction along which the silicon wafer to be laser-marked is located and the extension direction of the silicon wafer reference edge (005), i.e., the third direction. The size of the laser marking angle is denoted as... .

[0039] In this embodiment, when performing step S204, since the first included angle (004) has already been determined... And the fourth angle (007) Therefore, based on the geometric relationship between the second, third, and fourth directions, it can be determined according to the first included angle (004). And the fourth angle (007) The laser marking angle was calculated. The specific calculation formula is as follows: = (1-1) or = (1-2) In this embodiment, the fine gate electrode angle to be determined in step S205 is the angle between the fifth direction along which the gate electrode is fabricated on the silicon wafer to be processed and the extension direction of the silicon wafer reference edge (005), i.e., the third direction. The size of the fine gate electrode angle is denoted as... .

[0040] In this embodiment, when performing step S205, since the first included angle (004) has already been determined... The fifth angle (102) Therefore, based on the geometric relationship between the second direction, the third direction and the fifth direction, it can be determined according to the first included angle (004). The fifth angle (102) The angle of the fine grid electrode was calculated. The specific calculation formula is as follows: = (2-1) or = (2-2) In steps S201-S205, the laser marking angle is determined according to formula (1-1) or (1-2). Subsequently, due to the laser marking angle This represents the angle between the fourth direction along which the silicon wafer is to be laser-marked and the extension direction of the silicon wafer reference edge (005), i.e., the third direction. Since the third direction is known, in step S3, the laser marking angle can be determined. By comparing with a third party, the specific direction of the fourth direction can be determined.

[0041] In steps S201-S205, the angle of the fine grid electrode is determined according to formula (2-1) or (2-2). Subsequently, due to the angle of the fine grid electrodes This represents the angle between the fifth direction along which the gate electrode is to be fabricated on the silicon wafer and the extension direction of the silicon wafer reference edge (005), i.e., the third direction. Since the third direction is known, in step S4, the determined fine gate electrode angle can be used as a reference direction. By comparing with a third party, the specific direction of the fifth direction can be determined.

[0042] In this embodiment, due to the laser marking angle There are two possible values: one calculated using formula (1-1) and the other calculated using formula (1-2). Similarly, the angle of the fine grid electrode... There are also two possible values: the value calculated using formula (2-1) and the value calculated using formula (2-2), which determines the laser marking angle. Angle with fine grid electrode Four possible combinations of values ​​can be formed [the combination of values ​​calculated according to formulas (1-1) and (2-1), the combination of values ​​calculated according to formulas (1-1) and (2-2), the combination of values ​​calculated according to formulas (1-2) and (2-1), and the combination of values ​​calculated according to formulas (1-2) and (2-2)], thus providing four specific direction combinations to choose from for the fourth and fifth directions.

[0043] In step S5, one of the four possible combinations of the fourth and fifth directions can be selected. The determined fourth direction is used as the laser marking path direction, and the determined fifth direction is used as the extension direction of the gate electrode. That is, when laser marking is performed on the silicon wafer to be processed, the laser marking equipment is used to perform laser marking along the determined fourth direction. When the gate electrode is fabricated on the silicon wafer to be processed, the gate template is customized along the determined fifth direction. Thus, when the fine gate line is fabricated on the silicon wafer to be processed using the gate template, the fine gate line is arranged along the fifth direction.

[0044] In this embodiment, the principle of the laser marking and grid electrode co-design method for solar cells, i.e., steps S1-S5, is as follows: when laser marking and grid electrode fabrication are performed on the silicon wafer to be processed, the laser beam or fine grid line, along its path length... Number of times the inner crossing line marks satisfy:

[0045] in The distance between two adjacent line marks (002) is the distance between them. The coefficient is determined based on the actual situation, and is related to the arc-shaped geometry of the line mark and the included angle. and path length Related to parameters, including the included angle Specifically, it refers to the fourth included angle (007). Or the fifth included angle (102) That is, the included angle when laser marking is performed on the silicon wafer to be processed. It equals the fourth included angle (007). When fabricating fine grid lines on the silicon wafer to be processed, the included angle It equals the fifth included angle (102). Generally, the included angle Satisfying 0°≤ ≤45°), when When θ = 0°, the laser marking direction or fine grid line is parallel to the line mark, and the number of crossings is zero; when θ > 0°, the number of times the laser marking direction or fine grid line crosses the line mark per unit length is related to sin... Proportional. By Keeping it within a small range can reduce the number of crossings to an acceptable level.

[0046] By performing steps S1-S5 to determine the fourth and fifth directions, it can be ensured that when laser marking is performed on the silicon wafer to be processed, the number of times the laser beam crosses the line mark groove during the scanning process is limited to a small range, avoiding frequent defocusing; when fine grid lines are made on the silicon wafer to be processed, the number of times the conductive paste crosses the line mark groove during the printing process is limited to a small range, thereby reducing the risk of grid breakage.

[0047] In this embodiment, the fourth and fifth directions are based on the laser marking angle. Angle with fine grid electrode It is certain, and the laser marking angle Angle with fine grid electrode It is based on the fourth included angle and the fifth angle It is certain, and the fourth included angle and the fifth angle The included angle can take values ​​in the range [0, ... The value is taken from [the value]. Therefore, the specific directions of the fourth and fifth directions, namely the laser marking path direction and the extension direction of the grid electrode, depend on the included angle of the fourth direction. and the fifth angle .

[0048] In this embodiment, the fourth included angle can be adjusted. and the fifth angle Perform collaborative optimization to determine the fourth included angle. and the fifth angle The optimal value is obtained to achieve coordinated optimization of the fourth direction, i.e. the laser marking path direction, and the fifth direction, i.e. the extension direction of the grid electrode.

[0049] Specifically, in this embodiment, a first angle variable can be set. Second angle variable First angle variable Second angle variable The included angle can take values ​​in the range [0, ... The value is taken from []. In this embodiment, the value is taken from []. Taking 45° as an example, this is the first angle variable. Second angle variable The included angle can be taken from the range [0, 45°].

[0050] In this embodiment, an angle step size is set. Specifically, the angle step size can be set to 0.5°.

[0051] In this embodiment, the first angle variable is adjusted according to the angle step size. Second angle variable Iterate through each angle value in the range [0, 45°].

[0052] In this embodiment, the included angle can be in the range of [0, ...]. Divide into two equal parts, for example, the first part [0, ] and Part Two , ],when When the angle is 45°, the first part is specifically [0, 22.5°], and the second part is specifically [22.5°, 45°], making the first angle variable... Take values ​​within the first part, that is, take values ​​separately. =0, 0.5°, 1°, 1.5°……21.5°, 22°, 22.5°, making the second angle variable Take values ​​within the second part, that is, take values ​​respectively. =23.5°, 24°, 24.5°……44°, 44.5°, 45°.

[0053] In this embodiment, due to the first angle variable Second angle variable Multiple angle values ​​can be taken separately, the first angle variable Any value of the second angle variable Any value can form a pair of angle values, thus multiple pairs of angle values ​​can be formed, for example ( , ) = (0, 23.5°), , ) = (0.5°, 23.5°), , = (1°, 23.5°) ... etc.

[0054] For any pair of angle values ​​( , If the fourth included angle (007) is taken as an example... Set to equal to the first angle variable , make the fifth angle Set to equal the second angle variable This allows us to determine a specific combination of laser marking path direction and grid electrode extension direction. Such a specific combination can define the specific structure of a solar cell, enabling simulation of the solar cell with this structure and obtaining simulation results. In this embodiment, the simulation results can specifically include parameters such as power generation efficiency. Because there are multiple combinations of angle values ​​( , Therefore, multiple simulation results can be obtained.

[0055] In this embodiment, the globally optimal solution is obtained from all simulation results. For example, when using power generation efficiency as the simulation result, the highest power generation efficiency can be obtained as the globally optimal solution.

[0056] In this embodiment, the global optimal solution will correspond to a specific combination of angle values ​​( , ), the first angle variable in this combination of angle values Second angle variable They may be equal or unequal. (From the first perspective variable) Second angle variable If they are not equal, the fourth included angle (007) can be used. With the fifth angle Set to be equal to the first angle variable Equal, or the fourth included angle (007) With the fifth angle Set to be equal to the second angle variable They are equal, thus determining the fourth included angle (007). With the fifth angle The specific value, and the fourth included angle (007). With the fifth angle equal.

[0057] In this embodiment, in the determined combination of angle values ​​( , The first angle variable in ) Second angle variable Even when they are not equal, the first angle variable can still be calculated. Second angle variable The average value of the fourth included angle (007) is used to calculate the fourth included angle. With the fifth angle Set all values ​​to be equal to this average, i.e. = =

[0058] Thus, the fourth included angle (007) is determined. With the fifth angle The specific value, and the fourth included angle (007). With the fifth angle equal.

[0059] In this embodiment, by traversing the range of included angle values ​​[0, ..., ...], ... Multiple angle values ​​in the

[007] are simulated separately to obtain the global optimal solution and determine the fourth included angle (007). With the fifth angle The included angle can take values ​​in the range [0, ... Determine the fourth included angle (007) within the range of ] With the fifth angle The optimal set of values ​​is obtained, thereby achieving the fourth included angle (007) while avoiding frequent defocusing during laser marking and reducing the risk of gate breakage when making fine gate lines on the silicon wafer to be processed. With the fifth angle Synergistic optimization improves the performance indicators of the manufactured solar cells.

[0060] Specifically, by taking the included angle in the range [0, ... The system is divided into two non-overlapping parts, and the first angular variable is applied within each of the first and second parts respectively. Second angle variable Traversing the data can speed up the traversal, thereby improving simulation efficiency.

[0061] By implementing the laser marking and grid electrode co-design method for solar cells, i.e., steps S1-S5, the following technical effects can be achieved: (1) Significantly improves the uniformity of laser processing: By controlling the angle between the laser marking path direction and the line mark direction within θmax, the number of times the laser beam crosses the line mark groove is greatly reduced. Even with a small angle, the crossing frequency is significantly lower than that of traditional perpendicular intersection (θ=90°) or large-angle oblique intersection. The laser focal plane is relatively stable, and the energy density fluctuation amplitude during laser marking is significantly reduced, thereby improving the uniformity of thin film modification during laser modification, obtaining a consistent groove depth / groove width during laser film opening, and obtaining a stable doping concentration distribution during laser doping; (2) Significantly reduce electrode printing grid breakage rate: By controlling the angle between the fine grid direction and the line mark direction within a certain range... θ max Within this range, the number of times the conductive paste crosses the trace is significantly reduced, the series resistance (Rs) decreases significantly, and the fill factor (FF) and photoelectric conversion efficiency are improved. (3) Allow a certain angular tolerance to improve process feasibility: It is not required that the fourth direction and the third direction, and the fifth direction and the third direction be absolutely parallel, allowing The limited angular deviation reduces the precision requirements of silicon wafer alignment and stencil design in the process, improving production feasibility and yield; at the same time, it can be flexibly adjusted according to the sensitivity of different processes. Balancing effectiveness and efficiency; (4) Synergy between laser process and printing process: The laser marking path and the fine grid direction are both designed based on the same line mark direction. The two directions are basically consistent, which ensures the natural alignment between the laser-modified area and the subsequent metal electrode, so that the laser marking process and the grid line printing process work together to achieve the whole process direction matching from laser modification to metallization.

[0062] This invention proposes a laser and gate line co-design method based on the extension direction of the dicing marks on a silicon wafer surface. The core idea is to design both the laser marking path direction and the fine gate extension direction to form a small angle (nearly parallel) with the dicing mark direction. This controls the number of times the laser beam and conductive paste cross the dicing grooves during scanning / printing to below a preset threshold, mitigating process defects caused by frequent groove crossings. Simultaneously, different laser parameters (such as adjusting laser frequency, power, current, spot size, or morphology) are set depending on whether the laser path traverses the bottom or top of the dicing groove, ensuring that the laser energy at the bottom and top of the groove remains as consistent as possible.

[0063] In this embodiment, during step S5, the scanning pattern of the laser marking equipment is customized according to the fourth direction designed in step S3, namely the laser marking path direction and laser parameters; and the grid line template is customized according to the fifth direction designed in step S4, namely the grid line electrode extension direction. Laser marking is performed according to the customized laser pattern, and then the remaining processes are completed according to conventional processes. Electrode printing is performed using the customized template to form a metal electrode.

[0064] It should be noted that, referring to Figure 4 When marking on the same silicon wafer, the marking path along the bottom of the line mark groove 002 in laser marking area 006 is 008, with a laser energy density of 010. The marking path along the top of the line mark groove edge or non-line mark area 003 in laser marking area 006 is 009, with a laser energy density of 011. By adjusting the laser parameters, the laser energy density 010 and laser energy density 011 are almost identical.

[0065] In this embodiment, steps S1-S5 are applicable to all silicon wafer cutting processes with traces, and to all battery types such as tunnel oxide passivation contact (TOPCon), emitter and back passivation (PERC), heterojunction (HJT), and back contact (BC). They are also applicable to all laser marking scenarios such as laser oxidation, laser doping, and laser grooving.

[0066] Specifically, steps S1-S5 can be applied to the manufacturing of TOPCon solar cells and back-contact solar cells.

[0067] (1) Example 1 - TOPCon solar cell (laser selective doping) In this embodiment, the laser marking and grid electrode co-design method for solar cells is applied to the laser selective emitting process on the front surface of TOPCon solar cells, such as... Figure 5 and Figure 7 As shown.

[0068] Applications and functions of laser design methods: After boron diffusion in the TOPCon cell, borosilicate glass (BSG) is applied to the front side as a dopant source. Using the method described in this invention, the angle α between the extension direction of the dicing line on the silicon wafer surface and the reference edge of the silicon wafer is first obtained. The laser doping scanning path direction is designed to form an angle θ with the dicing line direction. L Meanwhile, depending on whether the laser beam is located at the bottom or top of the line groove, the laser parameters are dynamically adjusted to compensate for defocusing loss, ensuring that the energy density actually applied to the silicon wafer surface remains uniform.

[0069] This design significantly reduces the number of times the laser beam crosses the line grooves during scanning, avoiding fluctuations in doping depth and width caused by frequent defocusing. Ultimately, this results in a heavily doped layer (p) with uniform width and stable concentration formed in the fine-gate printing area. ++ 201.

[0070] Applications and functions of fine grid design methods: The extension direction of the front fine gate is designed to be consistent with the laser doping path direction. This design ensures that the fine gate is precisely aligned with the laser doping area, while allowing the conductive paste to flow along the groove direction during printing with very few crossings of the groove, thereby significantly reducing gate breakage defects and forming continuous and uniform front and back fine gate electrodes 202 and 208.

[0071] (2) Example 2 - Back contact solar cell (TBC cell as an example) In this embodiment, the laser marking and grid electrode co-design method for solar cells is applied to the laser grooving and grid line printing processes of TBC (TOPCon and IBC superposition) back contact solar cells (e.g. Figure 8 , Figure 9 and Figure 10 (As shown).

[0072] Applications and functions of laser design methods: The back of the TBC battery requires the fabrication of interdigitated alternating n-regions and p-regions, which need to be separated by laser grooving to form an isolation gap (gap area 307) to prevent leakage. First, the angle α between the direction of the dicing line on the back of the silicon wafer and the reference edge of the silicon wafer is obtained. The laser grooving scanning path is designed to be at an angle to the dicing line direction. θ L Meanwhile, the laser power is adjusted according to the different heights at the bottom and top of the groove to ensure consistency in groove depth and width.

[0073] This design ensures that the ablation reference surface remains relatively stable when the laser beam scans along the line mark direction, resulting in a flat bottom without undulating waves and stable groove width fluctuations. After wet cleaning, the isolation effect between the p-region and n-region is excellent, with no leakage current or residual polysilicon issues caused by uneven grooving.

[0074] Applications and functions of fine grid design methods: The fine grid 301 in the n and p regions on the back of the TBC battery is designed to be at an angle to the direction of the line. θ F (In line with the laser grooving path direction). This design reduces grid breakage caused by crossing the groove and localized rough printing caused by slurry overflow.

[0075] A computer program for executing the laser marking and grid electrode co-design method for solar cells in this embodiment can be written into a computer device or storage medium. When the computer program is read and run, the laser marking and grid electrode co-design method for solar cells in this embodiment and / or the laser marking and grid electrode co-design method for solar cells in this embodiment can be executed, thereby achieving the same technical effect as the laser marking and grid electrode co-design method for solar cells in this embodiment and / or the laser marking and grid electrode co-design method for solar cells in this embodiment.

[0076] It should be noted that, unless otherwise specified, when a feature is referred to as "fixed" or "connected" to another feature, it can be directly fixed or connected to the other feature, or indirectly fixed or connected to the other feature. Furthermore, the descriptions of "upper," "lower," "left," and "right" used in this disclosure are only relative to the relative positional relationships of the components of this disclosure in the accompanying drawings. The singular forms "a," "an," and "the" used in this disclosure are also intended to include the plural forms, unless the context clearly indicates otherwise. Moreover, unless otherwise defined, all technical and scientific terms used in this embodiment have the same meaning as commonly understood by one of ordinary skill in the art. The terminology used in this embodiment specification is only for describing particular embodiments and is not intended to limit the invention. The term "and / or" as used in this embodiment includes any combination of one or more of the associated listed items.

[0077] It should be understood that although various elements may be described in this disclosure using terms such as "second," "third," etc., these elements should not be limited to these terms. These terms are used only to distinguish elements of the same type from one another. For example, an element may also be referred to as a second element without departing from the scope of this disclosure, and similarly, a second element may also be referred to as an element. The use of any and all instances or exemplary language ("e.g.," "such as," etc.) provided in this embodiment is intended only to better illustrate embodiments of the invention and, unless otherwise required, does not impose a limitation on the scope of the invention.

[0078] It should be recognized that embodiments of the present invention can be implemented or carried out by computer hardware, a combination of hardware and software, or by computer instructions stored in a non-transitory computer-readable storage medium. The method can be implemented using standard programming techniques—including a non-transitory computer-readable storage medium configured with a computer program, wherein such a storage medium causes the computer to operate in a specific and predefined manner—according to the methods and drawings described in the specific embodiments. Each program can be implemented in a high-level procedural or object-oriented programming language to communicate with the computer system. However, if desired, the program can be implemented in assembly or machine language. In any case, the language can be a compiled or interpreted language. Furthermore, for this purpose, the program can run on a programmed application-specific integrated circuit (ASIC).

[0079] Furthermore, the procedures described in this embodiment can be performed in any suitable order unless otherwise indicated by this embodiment or otherwise obviously contradict the context. The procedures (or variations and / or combinations thereof) described in this embodiment can be executed under the control of one or more computer systems configured with executable instructions, and can be implemented by hardware or a combination thereof as code (e.g., executable instructions, one or more computer programs, or one or more applications) that commonly executes on one or more processors. A computer program includes a plurality of instructions executable by one or more processors.

[0080] Furthermore, the method can be implemented in any suitable type of computing platform, including but not limited to personal computers, minicomputers, mainframes, workstations, networked or distributed computing environments, standalone or integrated computer platforms, or in communication with charged particle tools or other imaging devices, etc. Aspects of the invention can be implemented as machine-readable code stored on a non-transitory storage medium or device, whether removable or integrated into a computing platform, such as a hard disk, optical read and / or write storage medium, RAM, ROM, etc., such that it is readable by a programmable computer, and when the storage medium or device is read by the computer, it can be used to configure and operate the computer to perform the processes described herein. Furthermore, the machine-readable code, or portions thereof, can be transmitted via wired or wireless networks. The invention of this embodiment includes these and other different types of non-transitory computer-readable storage media when such media comprises instructions or programs that implement the steps above in conjunction with a microprocessor or other data processor. When programmed according to the methods and techniques of the invention, the invention also includes the computer itself.

[0081] A computer program can be applied to input data to perform the functions of this embodiment, thereby transforming the input data to generate output data stored in non-volatile memory. The output information can also be applied to one or more output devices, such as a display. In a preferred embodiment of the invention, the transformed data represents physical and tangible objects, including specific visual depictions of physical and tangible objects generated on the display.

[0082] The above are merely preferred embodiments of the present invention. The present invention is not limited to the above-described embodiments. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention, as long as they achieve the technical effects of the present invention by the same means, should be included within the scope of protection of the present invention. Within the scope of protection of the present invention, the technical solutions and / or implementation methods can have various modifications and variations.

Claims

1. A method for co-designing laser marking and grid line electrodes for solar cells, characterized in that, The laser marking and grid electrode co-design method for solar cells includes: The silicon wafer to be processed is inspected to determine a second direction, a third direction, and a first included angle; the second direction is the extension direction of the line marks generated by the silicon ingot cutting process in manufacturing the silicon wafer to be processed, the third direction is the extension direction of the silicon wafer reference edge, and the first included angle is the size of the angle formed by the second direction and the third direction; Based on the first included angle, determine the laser marking included angle and the fine grid electrode included angle; The fourth direction is determined based on the laser marking angle and the third direction; The fifth direction is determined based on the included angle of the fine grid electrodes and the third direction; Laser marking and grid electrode design are performed based on the fourth and fifth directions.

2. The method for co-designing laser marking and grid line electrodes for solar cells according to claim 1, characterized in that, The laser marking angle and the fine grid electrode angle are determined based on the first included angle: Set the range of values ​​for the included angle; Within the range of the included angle values, a fourth included angle is determined; the fourth included angle is the angle between the fourth direction and the second direction. Within the range of the included angle values, a fifth included angle is determined; the fifth included angle is the angle between the fifth direction and the second direction. The laser marking angle is determined based on the first included angle and the fourth included angle; The included angle of the fine grid electrode is determined based on the first included angle and the fifth included angle.

3. The method for co-designing laser marking and grid line electrodes for solar cells according to claim 2, characterized in that, Determining the laser marking angle based on the first included angle and the fourth included angle includes: According to the formula = or Perform calculations; among which, The laser marking angle is... The first included angle, This refers to the fourth included angle.

4. The method for co-designing laser marking and grid line electrodes for solar cells according to claim 2, characterized in that, Determining the included angle of the fine gate electrode based on the first included angle and the fifth included angle includes: According to the formula = or Perform calculations; among which, The included angle of the fine grid electrodes, The first included angle, This refers to the fifth included angle.

5. The method for co-designing laser marking and grid line electrodes for solar cells according to claim 4, characterized in that, The laser marking and grid electrode design based on the fourth and fifth directions includes: The fourth and fifth directions are optimized collaboratively. The optimized fourth direction is used as the laser marking path direction; The optimized fifth direction is used as the extension direction of the gate electrode; The scanning pattern of the laser marking equipment is customized according to the laser marking path direction; Customize the grid line template according to the extension direction of the grid line electrode; The laser marking equipment and the grid template are used to perform the preparation process.

6. The method for co-designing laser marking and grid line electrodes for solar cells according to claim 5, characterized in that, The coordinated optimization of the fourth and fifth directions includes: Define the first angle variable and the second angle variable; Set the angle step size; Based on the angle step size, the first angle variable and the second angle variable respectively traverse each angle value in the range of included angle values; For any pair of angle value combinations traversed by the first angle variable and the second angle variable, the solar cell is simulated according to the angle value combination to obtain the simulation results corresponding to the angle value combination; Obtain the global optimal solution from all the simulation results; The values ​​of the fourth included angle and the fifth included angle are determined based on the combination of angle values ​​corresponding to the global optimal solution.

7. The method for co-designing laser marking and grid line electrodes for solar cells according to claim 6, characterized in that, The step of determining the values ​​of the fourth included angle and the fifth included angle based on the combination of angle values ​​corresponding to the global optimal solution includes: Calculate the average value of the combination of angle values; The fourth included angle and the fifth included angle are set to be equal to the average value.

8. A computer device, characterized in that, It includes a memory and a processor, the memory being used to store at least one program, and the processor being used to load at least one program to execute the laser marking and grid electrode co-design method for solar cells according to any one of claims 1-7.

9. A computer-readable storage medium storing a processor-executable program, characterized in that, The processor-executable program, when executed by the processor, is used to perform the laser marking and grid electrode co-design method for solar cells according to any one of claims 1-7.

10. A solar cell, characterized in that, The solar cell is designed using the laser marking and grid electrode co-design method for solar cells as described in any one of claims 1-7.