Bipolar equalization dual active bridge direct current converter and dead zone sensing soft switching design method and control system

Abstract

The application discloses a bipolar voltage-sharing dual active bridge DC converter and a dead-zone sensing soft-switching design method and a control system. The converter comprises a primary side cross-parallel boost unit, a primary side active bridge, a high-frequency three-winding transformer, a secondary side active bridge, a split output capacitor and a secondary side voltage-balancing coupled inductor. The primary side cross-parallel boost unit makes the input branch high-frequency ripples offset each other through two coupled boost inductors and staggered driving. The secondary side voltage-balancing coupled inductor is respectively connected in series with two secondary side winding branches and simultaneously serves as a dual active bridge power transmission inductor and a bipolar output voltage automatic balancing channel. The design method is based on a reachable clamping state and a voltage clamping / current zero-crossing event propagation dead-zone commutation track. At the end of the dead zone, the zero-voltage turn-on condition is judged according to the secondary side bridge arm node voltage, so that the soft-switching boundary under different load imbalance degrees, output powers and coupling coefficients is obtained. The control system comprises a sampling module, a controller and a driving module.

Description

Technical Field

[0001] This invention belongs to the field of power electronic DC-DC converter technology, specifically relating to an input current ripple suppression type bipolar voltage equalizing dual active bridge DC-DC converter suitable for bipolar DC microgrids, photovoltaic power generation, fuel cell power generation, energy storage systems, and DC power distribution systems. It also relates to a method and control system for performing dead-zone commutation trajectory analysis and zero-voltage turn-on boundary design for the converter under unbalanced load conditions. Background Technology

[0002] Bipolar DC microgrids have a positive bus, a midpoint bus, and a negative bus, providing both positive and negative DC buses within the same system. This makes them suitable for distributed photovoltaic systems, fuel cells, energy storage batteries, and DC load connections. Compared to unipolar DC microgrids, bipolar DC microgrids offer advantages in power distribution, fault isolation, and load connection flexibility.

[0003] In a bipolar DC microgrid, the loads at the positive and negative terminals are typically not exactly equal. When the positive load R1 is not equal to the negative load R2, a midpoint current will be generated at the midpoint. This midpoint current will affect the positive output voltage V. o1 and negative output voltage V o2 Voltage offset occurs, resulting in an imbalance in the bipolar output voltage. If no compensation measures are taken, the voltage offset will reduce the power quality of the DC bus, increase the voltage stress on equipment connected to the overvoltage side, and may affect the long-term reliability of the system.

[0004] In existing technologies, to address the bipolar voltage imbalance problem, an independent voltage equalizer is typically connected to the bipolar output. This type of equalizer usually consists of several switching transistors, inductors, capacitors, or switched capacitor units, used to establish an additional energy flow path between the positive and negative buses. While this solution achieves voltage equalization, it increases the number of active switches and passive components, leading to increased system size, cost, losses, and control complexity.

[0005] Some technologies integrate voltage balancing into isolated DC-DC converters, such as using a three-active-bridge structure, auxiliary winding structure, coupled inductor structure, or switched-capacitor structure. However, these solutions often still require a large number of switching devices or magnetic components, and most solutions mainly focus on steady-state voltage balancing capabilities, with insufficient discussion on the impact of secondary branch current changes caused by load imbalance and the dead-zone commutation process on soft switching.

[0006] Besides bipolar voltage imbalance, input current ripple is also a significant issue for DC-DC converters used in renewable energy inputs. Input sources such as photovoltaic modules, fuel cells, and energy storage batteries are highly sensitive to high-frequency current ripple. Larger input ripple increases the size of the input filter, reduces the efficiency of the input source, and may shorten its lifespan. Interleaved parallel converters and coupled inductors can suppress input current ripple to some extent, but they are typically designed separately from the bipolar voltage balancing structure.

[0007] Dual active bridge DC-DC converters offer advantages such as electrical isolation, bidirectional power transfer, and simple single-phase-shift control, making them suitable for constructing high-frequency isolated bipolar DC-DC converters. However, after introducing a voltage-balancing coupling inductor into the secondary side to form a midpoint current path, their dead-time commutation characteristics differ significantly from those of traditional dual active bridge converters. In traditional dual active bridge converters, the currents in the two branches involved in dead-time commutation are typically approximated as being in opposite phase, and soft-switching conditions are often determined by the polarity of the dead-time initiation current. However, when the bipolar load is unbalanced, the common-mode current providing the midpoint current is superimposed on the differential-mode power transfer current, causing the currents in the two secondary branches to no longer be strictly in opposite phase. This alters the resonant trajectory of the bridge arm node voltages and the clamping sequence of the anti-parallel diodes.

[0008] Therefore, there is an urgent need for a bipolar active bridge DC-DC converter that simultaneously possesses input current ripple suppression, automatic bipolar voltage equalization, and dead-zone-aware soft-switching design capabilities, in order to improve system power density without adding an independent voltage equalizer and accurately assess the zero-voltage turn-on boundary under unbalanced load conditions. Summary of the Invention

[0009] The purpose of this invention is to overcome the deficiencies in the existing technology and provide a bipolar voltage-equalizing dual active bridge DC-DC converter and its control system. This converter achieves input current ripple suppression through primary-side interleaved parallel boost units, achieves automatic bipolar output voltage balancing through secondary-side voltage equalization coupling inductors, and determines the soft-switching boundary under different load imbalance levels, output power, and coupling coefficients using an event-driven dead-time analysis method.

[0010] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0011] The bipolar voltage equalizing dual active bridge DC-DC converter includes a primary-side interleaved parallel boost unit, a primary-side active bridge, a high-frequency three-winding transformer, a secondary-side active bridge, a split output capacitor, and a secondary-side voltage equalizing coupling inductor.

[0012] The primary-side interleaved parallel boost unit includes a first boost inductor L1 and a second boost inductor L2. The first boost inductor L1 and the second boost inductor L2 adopt a coupled inductor structure and are respectively connected to the midpoint of the two bridge arms of the primary-side active bridge.

[0013] The high-frequency three-winding transformer includes a primary winding, a first secondary winding, and a second secondary winding. The first secondary winding and the second secondary winding respectively establish a first secondary branch and a second secondary branch, which are connected to the secondary active bridge through the first winding L3 and the second winding L4 of the secondary voltage equalization coupling inductor.

[0014] The secondary active bridge is connected to the split output capacitor to form a positive output terminal, a midpoint terminal and a negative output terminal. The secondary voltage equalization coupling inductor also serves as a dual active bridge power transmission inductor and a bipolar output voltage automatic equalization channel.

[0015] The primary-side active bridge includes switches Q1, Q2, Q3 and Q4. Switches Q1 and Q2 form the first bridge arm of the primary side, and switches Q3 and Q4 form the second bridge arm of the primary side. Switches Q1 and Q4 are turned on or off synchronously, and switches Q2 and Q3 are turned on or off synchronously. Switches Q1 and Q2 are driven complementaryly.

[0016] The secondary active bridge includes switches Q5, Q6, Q7 and Q8. Switches Q5 and Q6 form the first secondary bridge arm, and switches Q7 and Q8 form the second secondary bridge arm. Switches Q5 and Q8 are turned on or off synchronously, and switches Q6 and Q7 are turned on or off synchronously. Switches Q5 and Q6 are driven complementaryly, and switches Q7 and Q8 are driven complementaryly.

[0017] Both the primary-side active bridge and the secondary-side active bridge employ single-phase-shift control. The drive signals for the switching transistors Q1 / Q4 have an outward phase shift angle φ relative to the drive signals for Q5 / Q8, and the switching frequency is f. s The switching period is: T s =1 / f s Dead time td is set between the complementary switches of each primary and secondary side bridge arm.

[0018] As a preferred embodiment of the present invention: the turns ratio of the first boost inductor L1 and the second boost inductor L2 is 1:1, and the input current i is satisfied when operating in an interleaved manner. in =i L1 +i L2 , where i in For the input current, i L1 i is the current of the first boost inductor. L2 The current of the second boost inductor; under ideal coupling and the same duty cycle, it satisfies: Δi L1 +Δi L2 ≈0, where Δi L1 The current ripple of the first boost inductor, Δi L2 This is to reduce the current ripple of the second boost inductor, thereby achieving input current ripple suppression.

[0019] As a preferred embodiment of the present invention: the self-inductance of the first winding L3 and the second winding L4 are equal and both are L, the mutual inductance is M, the coupling coefficient is k, and M=kL, the leakage inductance of the first secondary side branch and the second secondary side branch are both L. k ; with the first secondary branch current as i s The current in the second secondary branch is i t The voltages of the two windings are respectively v L3 and v L4 Then the secondary voltage equalization coupling inductor satisfies:

[0020] .

[0021] As a preferred embodiment of the present invention: the currents of the first secondary branch and the second secondary branch are decomposed into common-mode currents i CM Sum and difference mode currents i DM , satisfying: i CM =(i s +i t ) / 2、i DM =(i s -i t ) / 2, and i s =i CM +i DM i t =i CM -i DM ;where i DM Used to form a dual active bridge active power transmission channel, i CM Used to provide the midpoint current generated by load imbalance.

[0022] As a preferred embodiment of the present invention: let the output voltage of the positive output terminal be V. o1 The output voltage at the negative terminal is V. o2 The positive load is R1, the negative load is R2, and the single split output capacitor is C. o Then the current i at the midpoint N satisfy:

[0023] i.

[0024] As a preferred embodiment of the present invention: the secondary voltage equalization coupling inductor forms a common-mode equivalent inductance L. CM Sum and difference equivalent inductance L DM And L CM =L(1-k)+L k L DM =L(1+k)+L k ; where L DM Used for active power transmission, L CMUsed for dynamic adjustment of midpoint current under unbalanced load conditions.

[0025] As a preferred embodiment of the present invention: the secondary voltage balancing coupling inductor is configured to withstand the voltage drop caused by V during the positive and negative half-cycles, respectively. o1 and V o2 The two secondary bridge arm node voltages are formed, and V is made possible through volt-second balance and midpoint current path. o1 With V o2 It automatically tends towards equilibrium.

[0026] The dead-zone-sensing soft-switching design method includes the following steps:

[0027] S1. Obtain the input voltage V in 1. Single-pole output voltage reference value V o Output power P o Coupling coefficient k, leakage inductance L k Switching frequency f s Dead time t d and device output capacitance C oss The load imbalance factor K is determined based on the positive load R1 and the negative load R2. u ;

[0028] Among them, the load imbalance factor K u Satisfy: K u =(R2-R1) / (R1+R2);

[0029] Single-pole output voltage deviation includes differential-mode output voltage deviation ΔV o,DM and common-mode output voltage deviation ΔV o,CM ,

[0030] Where, ΔV o,DM =V o1 -V o2 , ΔV o,CM =(V o1 +V o2 ) / 2-V o ;

[0031] The outer loop voltage control makes ΔV o,CM When V is approximately zero o1 =V o +ΔV o,DM / 2、V o2 =V o -ΔV o,DM / 2, at this point the output voltage deviation can be considered equal to ΔV o,DM ;

[0032] S2. Based on the parameters obtained in step S1 and the voltage-current relationship of the secondary voltage equalization coupling inductor, the secondary voltage equalization coupling inductor is decoupled and equivalently processed. The first secondary branch current i... s Second secondary branch current i t Perform common-mode / different-mode decomposition and establish an equivalent model of secondary-side communication;

[0033] Wherein, the common-mode current i is defined. CM =(i s +i t ) / 2, differential mode current i DM =(i s -i t ) / 2;

[0034] Considering the coupling coefficient k and leakage inductance L of the secondary voltage balancing coupling inductor k Then, the common-mode equivalent inductance L can be obtained. CM =L(1-k)+L k Sum and difference equivalent inductance L DM =L(1+k)+L k Differential-mode equivalent inductance L DM Used to describe the active power path, common-mode equivalent inductance L CM Used to describe the midpoint current regulation channel under load imbalance conditions;

[0035] S3. The secondary dead zone commutation process is divided into reachable clamping states, and the clamping states are determined by the anti-parallel diodes of the switches.

[0036] The reachable clamping state includes S A S B S C S D S E and S ZVS S A This indicates that the first bridge arm node on the secondary side is in free resonance and the second bridge arm node on the secondary side is in positive clamping, S B This indicates that both secondary bridge arm nodes are in free resonance, S C S indicates that the first bridge arm node on the secondary side is in free resonance and the second bridge arm node on the secondary side is in negative clamping. D This indicates that both bridge arm nodes on the secondary side are positively clamped, S E This indicates that the first bridge arm node on the secondary side is positively clamped and the second bridge arm node on the secondary side is in free resonance, S ZVS This indicates that the first bridge arm node on the secondary side is positively clamped and the second bridge arm node on the secondary side is negatively clamped.

[0037] S4. Define voltage clamping events and current zero-crossing events;

[0038] The voltage clamping events include the first secondary arm node reaching a positive clamping voltage, the first secondary arm node reaching a negative clamping voltage, the second secondary arm node reaching a positive clamping voltage, and the second secondary arm node reaching a negative clamping voltage.

[0039] The current zero-crossing event includes the first secondary branch current i s Zero-crossing and second secondary branch current i t Crossing zero;

[0040] S5. Within the dead zone, switch the clamping state according to the earliest event and propagate the state variables;

[0041] Within any reachable clamping state, the state variables are propagated using the corresponding equivalent resonance equation or linear current equation based on the current clamping combination.

[0042] When a voltage clamping event occurs, the voltage at the corresponding bridge arm node is fixed to the corresponding output voltage clamping value; a positive clamp is clamped to +V. o Negative clamping corresponds to clamping to -V o ;

[0043] When a current zero-crossing event occurs, if the voltage clamping state is in effect, the diode clamping of the corresponding bridge arm node is released and the device enters free resonance.

[0044] Repeat the above steps until the dead zone ends or S is reached. ZVS state;

[0045] S6. Determine whether the secondary switch meets the zero-voltage turn-on condition based on the bridge arm node voltage at the end of the dead zone, and obtain the output voltage deviation.

[0046] The zero-voltage turn-on condition for the secondary switch at the end of the dead zone includes:

[0047] When Q5 and Q8 are about to conduct, determine v cg (t3)≥V o1 And v dg (t3)≤-V o2 ;

[0048] When Q6 and Q7 are about to conduct, determine v cg (t7)≤-V o2 And v dg (t7)≥V o1 ;

[0049] Where t3 and t7 are the dead zone end times in the two half-cycles, respectively.

[0050] As a preferred embodiment of the present invention, it further includes determining the equivalent residence of the bridge arm node voltage at +V during one switching cycle. o1 Time Tpos and equivalent reside in -V o2 Time T neg Estimate the steady-state bipolar voltage deviation to satisfy ΔV o,DM =V o (T neg -T pos ) / (T neg +T pos The steady-state bipolar voltage deviation is used to correct the slope of the branch current outside the dead zone and the starting current of the next dead zone.

[0051] The control system includes: a sampling module, a controller, and a drive module;

[0052] The sampling module is used to collect the input voltage V. in Positive output voltage V o1 Negative output voltage V o2 and output current; the controller is used to determine the outward phase shift angle φ and dead time t based on the sampling results. d Or allowable working area; the drive module is used to determine the outward phase shift angle φ and the dead time t d Generate drive signals for switching transistors Q1 to Q8.

[0053] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0054] 1. This invention uses primary-side interleaved parallel boost units and primary-side active bridge multiplexing structure to enable the first boost inductor L1 and the second boost inductor L2 to generate mutually canceling high-frequency ripple components under interleaved driving, thereby reducing input current ripple without adding an additional independent input ripple suppression branch, which helps to reduce the size of the input filter and improve the operating conditions of the input source.

[0055] 2. This invention uses a secondary voltage equalization coupling inductor to simultaneously serve as a dual active bridge power transmission inductor and a bipolar output voltage automatic equalization channel. This allows the midpoint current generated by load imbalance to be provided by the common-mode channel, avoiding the additional active switches, passive components, and complex control strategies required by independent voltage equalizers, thereby improving system integration and power density.

[0056] 3. This invention decomposes the secondary branch current into common-mode and differential-mode components, which can simultaneously describe the effects of active power transmission, midpoint current regulation, and load imbalance on dead-zone commutation. This makes the relationship between bipolar voltage deviation, initial branch current value, and soft-switching boundary clearer, facilitating parameter design and control constraints.

[0057] 4. The present invention provides a dead zone-aware soft-switching design method based on reachable clamping states and voltage clamping / current zero-crossing events, which can cover various dead zone commutation trajectories caused by load unbalance, output power variation and coupling coefficient variation; compared with the method of judging soft switching only based on the initial current polarity of the dead zone, this method can obtain the zero-voltage turn-on boundary of the secondary-side switching tubes more accurately. Description of Drawings

[0058] Figure 1 is a schematic diagram of the main circuit topology of the input current ripple suppression type bipolar voltage equalizing dual active bridge DC converter of the present invention;

[0059] Figure 2 is a schematic diagram of a typical steady-state operating waveform of the present invention under the working condition of R1<R2;

[0060] Figure 3 is a schematic diagram of a common-mode / differential-mode equivalent circuit of the secondary-side voltage equalizing coupled inductor of the present invention;

[0061] Figure 4 is a flow chart of the dead zone-aware soft-switching design method of the present invention;

[0062] Figure 5 is a schematic diagram of the control system structure of the present invention. Detailed Description of the Embodiments

[0063] The present invention will be further illustrated below with reference to the accompanying drawings and specific embodiments. It should be understood that the following specific embodiments are only used to illustrate the present invention rather than limit the scope of the present invention.

[0064] The present invention provides an input current ripple suppression type bipolar voltage equalizing dual active bridge DC converter. The converter comprises a primary-side interleaved parallel boost unit, a primary-side active bridge, a high-frequency three-winding transformer, a secondary-side voltage equalizing coupled inductor, a secondary-side active bridge and a split output capacitor.

[0065] The primary-side interleaved parallel boost unit comprises a first boost inductor L1 and a second boost inductor L2, which adopt a 1:1 coupling structure;

[0066] The primary-side active bridge comprises four switching tubes Q1, Q2, Q3 and Q4. The switching tube Q1 and Q2 form a first primary-side bridge arm, and the switching tubes Q3 and Q4 form a second primary-side bridge arm, which are reused as the switching network of the interleaved parallel boost unit and the power transmission network of the dual active bridge.

[0067] The secondary-side active bridge comprises switching tubes Q5, Q6, Q7 and Q8. The switching tube Q5 and Q6 form a first secondary-side bridge arm, and the switching tubes Q7 and Q8 form a second secondary-side bridge arm.

[0068] The high-frequency three-winding transformer includes a primary winding, a first secondary winding, and a second secondary winding. The first and second secondary windings respectively establish a first secondary branch and a second secondary branch, which are connected to the secondary active bridge via the first winding L3 and the second winding L4 of the secondary voltage balancing coupling inductor. The secondary active bridge is connected to the first output capacitor C. o1 Second output capacitor C o2 The connection forms the positive output terminal, the midpoint terminal, and the negative output terminal.

[0069] In one embodiment, the primary-side active bridge and the secondary-side active bridge employ single-phase-shift modulation, wherein Q1 is synchronized with Q4, Q2 with Q3, Q5 with Q8, and Q6 with Q7; Q1 / Q4 has an outward phase shift angle φ relative to Q5 / Q8, and the switching frequency is f. s The switching period is: T s =1 / f s Dead time t is set between the complementary switches of each primary and secondary side bridge arm. d .

[0070] By adjusting the outward phase shift angle φ, the total power P transmitted from the input side to the bipolar output side can be controlled. o .

[0071] The primary-side interleaved parallel boost unit is configured such that the current ripple of the two boost inductors cancels each other out in the input branch. Let the currents of the two boost inductors be i... L1 and i L2 The input current is i in Then i in =i L1 +i L2 , where i in For the input current, i L1 i is the current of the first boost inductor. L2 Let be the current of the second boost inductor; under ideal coupling and interleaved drive conditions, the high-frequency ripple components of the currents of the two boost inductors satisfy Δi L1 +Δi L2 ≈0, where Δi L1 The current ripple of the first boost inductor, Δi L2 This is the current ripple of the second boost inductor.

[0072] The two windings of the secondary voltage balancing coupling inductor have equal self-inductances of L and mutual inductance of M. The coupling coefficient is k, and M = kL. The leakage inductance of the first and second secondary branches is L. k ; with the first secondary branch current as i s The current in the second secondary branch is i t The voltages of the two windings are respectively v L3 and v L4Then the secondary voltage equalization coupling inductor satisfies:

[0073] .

[0074] The secondary branch current is decomposed into common-mode and differential-mode components, where i CM =(i s +i t ) / 2, i DM =(i s -i t ) / 2, and i s =i CM +i DM i t =i CM -i DM Among them, the differential modulus component i DM Used to form an active power transmission channel, common mode component i CM Used to provide the midpoint current generated by load imbalance.

[0075] Let the midpoint current be i N The positive load is R1, the negative load is R2, and the single split-type output capacitor is C. o The positive output voltage is V. o1 The negative output voltage is V. o2 Then the midpoint current satisfies:

[0076] .

[0077] Therefore, the midpoint current required for load imbalance is directly provided by the common-mode channel of the secondary voltage equalization coupling inductor.

[0078] The secondary-side voltage equalization coupling inductor can form a common-mode equivalent path and a differential-mode equivalent path. The common-mode equivalent inductance and differential-mode equivalent inductance can be expressed as: L CM =L(1-k)+L k L DM =L(1+k)+L k .

[0079] Among them, L DM L is the equivalent inductance of the main power transmission path. CM L is the equivalent inductance of the dynamic path of the midpoint current. As the coupling coefficient k increases, L... CM Decrease and L DM Increasing the voltage allows for the generation of the required midpoint current under a smaller common-mode voltage and improves the automatic voltage balancing capability of the bipolar circuit.

[0080] Based on the power transfer relationship of a single-phase-shifted dual-active bridge, the total output power P can be determined... o External phase angle φ and differential-mode equivalent inductance LDM The inductor parameters or the external phase shift angle are selected based on the relationship. In one embodiment, the inductor parameters or the external phase shift angle are selected based on the unipolar output voltage reference value V. o The primary-to-secondary turns ratio n and the switching frequency f s This relationship can be represented as:

[0081]

[0082] This invention also provides a dead-zone-aware soft-switching design method. This method does not solely rely on the polarity of the dead-zone initiation current to determine soft switching; instead, it considers the bridge arm node voltage clamping sequence within the dead zone, the branch current zero-crossing event, and the dead-zone end node voltage together, thereby obtaining a more accurate zero-voltage turn-on boundary for the switching transistor.

[0083] The dead-time sensing soft-switching design method includes the following steps:

[0084] S1. Obtain the input voltage V in 1. Single-pole output voltage reference value V o Output power P o Coupling coefficient k, leakage inductance L k Switching frequency f s Dead time t d and device output capacitance C oss The load imbalance factor K is determined based on the positive load R1 and the negative load R2. u ;

[0085] Among them, the load imbalance factor K u Satisfy: K u =(R2-R1) / (R1+R2);

[0086] Single-pole output voltage deviation includes differential-mode output voltage deviation ΔV o,DM and common-mode output voltage deviation ΔV o,CM ,

[0087] Where, ΔV o,DM =V o1 -V o2 ΔV o,CM =(V o1 +V o2 ) / 2-V o ;

[0088] The outer loop voltage control makes ΔV o,CM When V is approximately zero o1 =V o +ΔV o,DM / 2、V o2 =V o -ΔV o,DM / 2, at this point the output voltage deviation can be considered equal to ΔVo,DM ;

[0089] S2. Based on the parameters obtained in step S1 and the voltage-current relationship of the secondary voltage equalization coupling inductor, the secondary voltage equalization coupling inductor is decoupled and equivalently processed. The first secondary branch current i... s Second secondary branch current i t Perform common-mode / different-mode decomposition and establish an equivalent model of secondary-side communication;

[0090] Wherein, the common-mode current i is defined CM =(i s +i t ) / 2, differential mode current i DM =(i s -i t ) / 2;

[0091] Considering the coupling coefficient k and leakage inductance L of the secondary voltage balancing coupling inductor k Then, the common-mode equivalent inductance L can be obtained. CM =L(1-k)+L k Sum and difference equivalent inductance L DM =L(1+k)+L k Differential-mode equivalent inductance L DM Used to describe the active power path, common-mode equivalent inductance L CM Used to describe the midpoint current regulation channel under load imbalance conditions;

[0092] S3. The secondary dead zone commutation process is divided into reachable clamping states, and the clamping states are determined by the anti-parallel diodes of the switches.

[0093] The reachable clamping state includes S A S B S C S D S E and S ZVS S A S indicates that the first bridge arm node on the secondary side is in free resonance and the second bridge arm node on the secondary side is in positive clamping. B This indicates that both secondary bridge arm nodes are in free resonance, S C S indicates that the first bridge arm node on the secondary side is in free resonance and the second bridge arm node on the secondary side is in negative clamping. D This indicates that both bridge arm nodes on the secondary side are positively clamped, S E This indicates that the first bridge arm node on the secondary side is positively clamped and the second bridge arm node on the secondary side is in free resonance, S ZVS This indicates that the first bridge arm node on the secondary side is positively clamped and the second bridge arm node on the secondary side is negatively clamped.

[0094] S4. Define voltage clamping events and current zero-crossing events;

[0095] The voltage clamping events include the first secondary arm node reaching a positive clamping voltage, the first secondary arm node reaching a negative clamping voltage, the second secondary arm node reaching a positive clamping voltage, and the second secondary arm node reaching a negative clamping voltage.

[0096] The current zero-crossing event includes the first secondary branch current i s Zero-crossing and second secondary branch current i t Crossing zero;

[0097] S5. Within the dead zone, switch the clamping state according to the earliest event and propagate the state variables;

[0098] Within any reachable clamping state, the state variables are propagated using the corresponding equivalent resonance equation or linear current equation based on the current clamping combination.

[0099] When a voltage clamping event occurs, the voltage at the corresponding bridge arm node is fixed to the corresponding output voltage clamping value; a positive clamp is clamped to +V. o Negative clamping corresponds to clamping to -V o ;

[0100] When a current zero-crossing event occurs, if the voltage clamping state is in effect, the diode clamping of the corresponding bridge arm node is released and the device enters free resonance.

[0101] Repeat the above steps until the dead zone ends or S is reached. ZVS state;

[0102] S6. Determine whether the secondary switch meets the zero-voltage turn-on condition based on the bridge arm node voltage at the end of the dead zone, and obtain the output voltage deviation.

[0103] The zero-voltage turn-on condition for the secondary switch at the end of the dead zone includes:

[0104] When Q5 and Q8 are about to conduct, determine v cg (t3)≥V o1 And v dg (t3)≤-V o2 ;

[0105] When Q6 and Q7 are about to conduct, determine v cg (t7)≤-V o2 And v dg (t7)≥V o1 ;

[0106] Where t3 and t7 are the dead zone end times in the two half-cycles, respectively.

[0107] It also includes the equivalent residence at +V during a switching cycle based on the bridge arm node voltage. o1 Time Tpos And equivalent to reside in -V o2 Time T neg Estimate the steady-state bipolar voltage deviation to satisfy ΔV o,DM =V o (T neg -T pos ) / (T neg +T pos The steady-state bipolar voltage deviation is used to correct the slope of the dead zone branch current and the starting current of the next dead zone.

[0108] The present invention also provides a control system, including a sampling module, a controller, and a drive module; the sampling module is used to acquire the input voltage V. in Positive output voltage V o1 Negative output voltage V o2 and output current; the controller is used to determine the outward phase shift angle φ and dead time t based on the sampling results. d Or allowable working area; the drive module is used to determine the outward phase angle φ and the dead time t d Generate drive signals for switching transistors Q1 to Q8.

[0109] The present invention will be further described below with reference to specific embodiments.

[0110] Figure 1 The diagram shows the input current ripple suppression type bipolar voltage equalizing dual active bridge DC-DC converter of this embodiment, including an input terminal, primary-side interleaved parallel boost units, primary-side active bridge, and a high-frequency three-winding transformer T. r The system consists of a secondary-side voltage balancing coupling inductor, a secondary-side active bridge, and a split-output capacitor. The input terminal is connected to the primary-side interleaved parallel boost unit, which in turn is connected to the primary-side active bridge. The primary-side active bridge is connected via a high-frequency three-winding transformer T. r Electrical isolation and energy transfer are achieved with the secondary active bridge.

[0111] The primary-side interleaved parallel boost unit includes a first boost inductor L1 and a second boost inductor L2. The first boost inductor L1 and the second boost inductor L2 can be wound on the same magnetic core to form a coupled inductor, or a multi-winding magnetic integrated structure capable of meeting ripple cancellation requirements can be used. In a preferred embodiment, the turns ratio is 1:1, and the inductor current i L1 with i L2 The high-frequency ripple amplitudes are similar and differ by half a switching cycle.

[0112] The primary-side active bridge includes Q1, Q2, Q3, and Q4, where Q1 and Q4 are synchronously turned on or off, and Q2 and Q3 are synchronously turned on or off. Q1 and Q2 are driven complementaryly, and Q3 and Q4 are driven complementaryly. Through this driving method, the primary-side active bridge generates an AC square wave voltage on the input side of the dual active bridge, and also ensures that L1 and L2 operate in an interleaved state, thus increasing the input current i. in The high-frequency ripple components cancel each other out.

[0113] like Figure 2 As shown, under single-phase-shift modulation, the duty cycle of each switch can be set to 0.5. The drive signal of the primary-side synchronous switch group Q1 / Q4 has an outward phase shift angle φ relative to the drive signal of the secondary-side synchronous switch group Q5 / Q8, and the switching frequency is f. s The switching period is T s By adjusting the external phase shift angle φ, the total output power P transmitted from the input to the bipolar output can be adjusted. o .

[0114] High-frequency three-winding transformer T r It includes a primary winding, a first secondary winding, and a second secondary winding. The primary winding is connected to the primary active bridge. The first and second secondary windings are connected in series with the first winding L3 and the second winding L4 of the secondary voltage balancing coupling inductor, respectively, and then connected to the secondary active bridge. The high-frequency three-winding transformer T... r The equivalent turns ratio from the primary winding to the two secondary windings can be expressed as n:1:1.

[0115] The secondary-side active bridge includes Q5, Q6, Q7, and Q8, where Q5 and Q8 are synchronized, and Q6 and Q7 are synchronized. Q5 / Q6 and Q7 / Q8 are driven complementaryly. The secondary-side active bridge is connected to the first output capacitor C. o1 Second output capacitor C o2 Connect them to form a positive output terminal, a midpoint terminal g, and a negative output terminal; the positive load R1 is connected between the positive output terminal and the midpoint terminal g, and the negative load R2 is connected between the midpoint terminal g and the negative output terminal.

[0116] For the secondary voltage balancing coupling inductor, L3 and L4 both have a self-inductance of L, a mutual inductance of M, and a coupling coefficient of k, where M = kL. This coupling inductor is not only used as a regular power inductor, but also serves as a power transmission inductor and a midpoint current path: when the currents in the two secondary branches change in differential mode, it mainly participates in active power transmission; when the currents in the two secondary branches change in common mode, it provides a path for the midpoint current generated by load imbalance.

[0117] like Figure 3 As shown, in the case of actual coupling k < 1, the effect of the secondary voltage balancing coupling inductor can be described by a common-mode / differential-mode equivalent circuit. Where i DMCharacterizing the reverse current components of the two branches and passing through the differential-mode equivalent inductance L DM Undertake active power transmission, i CM Characterizing the current components in the same direction of the two branches and passing through the common-mode equivalent inductance L CM Provides the current required to compensate for the unbalanced load at the midpoint.

[0118] When R1=R2, the required midpoint current of the load is approximately zero. CM Approximately zero, the currents in the two secondary branches are approximately out of phase, and the converter's operating characteristics are close to those of a traditional dual active bridge. When R1≠R2, i CM No longer zero, the superposition of the two secondary branch currents creates a common-mode bias, which automatically balances the bipolar output voltage, but at the same time changes the resonant trajectory and clamping sequence of the bridge arm node voltage in the secondary dead zone.

[0119] A dead-zone-aware soft-switching design method.

[0120] like Figure 4 As shown, the dead-time sensing soft-switching design method provided in this embodiment includes: acquiring the input voltage V in 1. Single-pole output voltage reference value V o Output power P o Coupling coefficient k, leakage inductance L k Switching frequency f s Dead time t d and device output capacitance C oss The load imbalance factor K is determined based on the positive load R1 and the negative load R2. u Establish an equivalent AC model for the secondary side based on the common-mode / differential-mode decomposition of the secondary branch current; divide the secondary dead-zone commutation process into reachable clamping states; define voltage clamping events and current zero-crossing events; switch clamping states according to the earliest event and propagate state variables; determine whether the secondary switch meets the zero-voltage turn-on condition at the end of the dead zone.

[0121] The voltage clamping events include the first secondary arm node reaching a positive clamping voltage ε+c, the first secondary arm node reaching a negative clamping voltage ε-c, the second secondary arm node reaching a positive clamping voltage ε+d, and the second secondary arm node reaching a negative clamping voltage ε-d; the current zero-crossing events include the first secondary branch current i s Zero-crossing ε0 s and second secondary branch current i t Zero crossing ε0t. When a voltage clamping event occurs, the corresponding anti-parallel diode in the bridge arm begins to conduct; when a current zero crossing event occurs, the previously clamped node is released and enters free resonance.

[0122] As shown in Table 1, taking the secondary dead zone [t2,t3] as an example, the reachable clamping states can include S. A SB S C S D S E and S ZVS Among them, S A This indicates that the first bridge arm node on the secondary side is in free resonance and the second bridge arm node on the secondary side is in positive clamping; S B This indicates that both secondary bridge arm nodes are in free resonance; S C This indicates that the first bridge arm node on the secondary side is in free resonance and the second bridge arm node on the secondary side is in negative clamping; S D This indicates that both bridge arm nodes on the secondary side are positively clamped; S E This indicates that the first bridge arm node on the secondary side is positively clamped and the second bridge arm node on the secondary side is in free resonance; S ZVS This indicates that the first bridge arm node on the secondary side is positively clamped and the second bridge arm node on the secondary side is negatively clamped.

[0123] Table 1

[0124]

[0125] In any reachable clamping state, the propagation of state variables can be accomplished according to the corresponding equivalent circuit: when one bridge arm node is free, a single-sided equivalent resonance model is used; when both bridge arm nodes are free, a common-mode / differential-mode equivalent resonance model is used; and when both bridge arm nodes are clamped, a linear current change model is used. In actual calculations, starting from the initial value at the beginning of the dead zone, the current reachable clamping state is first determined, then the possible event roots in that state are solved, the event corresponding to the smallest positive root is selected for state switching, and the state variable at the event moment is used as the initial value of the next state, until the dead zone ends or S is reached. ZVS state.

[0126] Different load imbalance factors K u and output power P o This will change the initial dead-time current, thereby altering the event triggering sequence. Therefore, this embodiment employs an event-driven framework to manage S. A S B S C S D S E and S ZVS The combination of propagation can cover various dead zone trajectories such as single-sided resonance, dual-node resonance, clamp release and re-clamping, without the need to pre-assume a fixed dead zone waveform.

[0127] At the end of the dead zone, the zero-voltage turn-on condition of the secondary-side switches can be determined based on the switch group that is about to be turned on. When Q5 and Q8 are about to be turned on, if v cg (t3) reaches the clamping value corresponding to the positive output voltage and v dg(t3) When the clamping value corresponding to the negative output voltage is reached, Q5 and Q8 satisfy the zero-voltage turn-on condition; when Q6 and Q7 are about to turn on, if v cg (t7) reaches the clamping value corresponding to the negative output voltage and v dg If (t7) reaches the clamping value corresponding to the positive output voltage, then Q6 and Q7 meet the zero-voltage turn-on condition. If the above condition is not met, the secondary switch may be hard-turned under this operating condition.

[0128] Furthermore, the time T during which the bridge arm node voltage is equivalently stationary in the positive clamping state within one switching cycle can be used as a basis. pos and the equivalent time T to remain in the negative clamp state neg Estimate steady-state differential output voltage deviation ΔV o,DM This deviation is then used to correct the slope of the branch current outside the dead zone and the starting current of the next dead zone. By jointly solving for the steady-state voltage deviation, dead-zone event propagation, and zero-voltage turn-on condition, a more accurate secondary soft-switching boundary can be obtained.

[0129] A soft-switching boundary application method and a control system.

[0130] The control system in this embodiment includes a sampling module, a controller, and a drive module. The sampling module is used to acquire the input voltage V. in Positive output voltage V o1 Negative output voltage V o2 And the output current; the controller is used to determine the outward phase shift angle φ and dead time t based on the sampling results. d Or allowable working area; the drive module is used to determine the external phase shift angle φ and dead time t d Generate drive signals for Q1 to Q8.

[0131] In one offline design implementation, V is given in advance. in V o f s L, L k , k, C oss and t d and in the load imbalance factor K u With output power P o The in-plane scanning conditions. For each condition, combined with... Figure 4 The process shown and Figure 5 The event transition relationship is shown. Calculate the external phase shift angle φ and the steady-state bipolar voltage deviation ΔV. o,DM The initial dead-time current is determined, and then event-driven dead-time propagation is performed to finally obtain the zero-voltage turn-on region map or the allowed operating region for Q5 to Q8.

[0132] In one closed-loop control implementation, the controller uses V o1 +Vo2 Or its average value is used as the outer loop feedback quantity, which is used to obtain the outer phase shift angle φ through a PI controller or other voltage regulator, and combined with the pre-calculated or online updated soft-switching boundary limit φ or t d The value of is chosen so that the converter can maintain the secondary-side switching transistor at zero voltage as much as possible while meeting the output voltage regulation requirements.

[0133] In another application, the controller can use the load imbalance factor K u Output power P o Using the coupling coefficient k as an index, the allowed working region is read from a pre-stored soft-switching boundary table or fitted model, and the phase shift angle φ and dead time t are adjusted during operation. d Alternatively, power commands can be used to limit the signal, thereby preventing entry into the secondary side hard-on region.

[0134] In this embodiment, the dead zone of the primary side interleaved parallel boost unit is mainly related to the interleaved boost bridge arm, and can be verified using the conventional soft-switching analysis method of interleaved parallel boost converter; the secondary side bridge arm is significantly affected by the midpoint current bias, and the dead zone sensing soft-switching design method of this invention should be used for boundary design.

[0135] Through the above embodiments, the converter can maintain bipolar output voltage balance under both load balancing and severe load imbalance conditions, and achieve a predictable zero-voltage turn-on boundary over a wide power range. Simultaneously, the primary-side interleaved boost structure reduces input current ripple, which helps to reduce the size of the input filter and improve system integration.

[0136] It should be noted that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention in any other way. Any modifications or equivalent changes made based on the technical essence of the present invention shall still fall within the scope of protection claimed by the present invention.

Claims

1. A bipolar voltage-equalizing dual active bridge DC-DC converter, characterized in that, It includes a primary-side interleaved parallel boost unit, a primary-side active bridge, a high-frequency three-winding transformer, a secondary-side active bridge, a split output capacitor, and a secondary-side voltage balancing coupling inductor; The primary-side interleaved parallel boost unit includes a first boost inductor L1 and a second boost inductor L2. The first boost inductor L1 and the second boost inductor L2 adopt a coupled inductor structure and are respectively connected to the midpoint of the two bridge arms of the primary-side active bridge. The high-frequency three-winding transformer includes a primary winding, a first secondary winding, and a second secondary winding. The first secondary winding and the second secondary winding respectively establish a first secondary branch and a second secondary branch, which are connected to the secondary active bridge through the first winding L3 and the second winding L4 of the secondary voltage equalization coupling inductor. The secondary active bridge is connected to the split output capacitor to form a positive output terminal, a midpoint terminal and a negative output terminal. The secondary voltage equalization coupling inductor also serves as a dual active bridge power transmission inductor and a bipolar output voltage automatic equalization channel. The primary-side active bridge includes switches Q1, Q2, Q3 and Q4. Switches Q1 and Q2 form the first bridge arm of the primary side, and switches Q3 and Q4 form the second bridge arm of the primary side. Switches Q1 and Q4 are turned on or off synchronously, and switches Q2 and Q3 are turned on or off synchronously. Switches Q1 and Q2 are driven complementaryly. The secondary active bridge includes switches Q5, Q6, Q7 and Q8. Switches Q5 and Q6 form the first secondary bridge arm, and switches Q7 and Q8 form the second secondary bridge arm. Switches Q5 and Q8 are turned on or off synchronously, and switches Q6 and Q7 are turned on or off synchronously. Switches Q5 and Q6 are driven complementaryly, and switches Q7 and Q8 are driven complementaryly. Both the primary-side active bridge and the secondary-side active bridge employ single-phase-shift control. The drive signals for the switching transistors Q1 / Q4 have an outward phase shift angle φ relative to the drive signals for Q5 / Q8, and the switching frequency is f. s The switching period is: T s =1 / f s Dead time td is set between the complementary switches of each primary and secondary side bridge arm.

2. The bipolar voltage-equalizing dual active bridge DC-DC converter as described in claim 1, characterized in that, The turns ratio of the first boost inductor L1 and the second boost inductor L2 is 1:1, and when operating in alternating mode, the input current i in =i L1 +i L2 , where i in For the input current, i L1 i is the current of the first boost inductor. L2 The current of the second boost inductor; under ideal coupling and the same duty cycle, it satisfies: Δi L1 +Δi L2 ≈0, where Δi L1 The current ripple of the first boost inductor, Δi L2 This is to reduce the current ripple of the second boost inductor, thereby achieving input current ripple suppression.

3. The bipolar voltage-equalizing dual active bridge DC-DC converter as described in claim 1, characterized in that, The self-inductance of the first winding L3 and the second winding L4 are equal and both are L, the mutual inductance is M, the coupling coefficient is k, and M = kL. The leakage inductance of the first secondary branch and the second secondary branch are both L. k ; with the first secondary branch current as i s The current in the second secondary branch is i t The voltages of the two windings are respectively v L3 and v L4 Then the secondary voltage equalization coupling inductor satisfies: 。 4. The bipolar voltage-equalizing dual active bridge DC-DC converter as described in claim 3, characterized in that, The currents in the first and second secondary side branches are decomposed into common-mode currents i CM Sum and difference mode currents i DM , satisfying: i CM =(i s +i t ) / 2、i DM =(i s -i t ) / 2, and i s =i CM +i DM i t =i CM -i DM ;where i DM Used to form a dual active bridge active power transmission channel, i CM Used to provide the midpoint current generated by load imbalance.

5. The bipolar voltage-equalizing dual active bridge DC-DC converter as described in claim 1 or 3, characterized in that, it is provided that... The output voltage at the positive output terminal is V o1 The output voltage at the negative terminal is V. o2 The positive load is R1, the negative load is R2, and the single split output capacitor is C. o Then the current i at the midpoint N satisfy: i。 6. The bipolar voltage-equalizing dual active bridge DC-DC converter as described in claim 1, characterized in that, The secondary voltage equalization coupling inductor forms a common-mode equivalent inductance L. CM Sum and difference equivalent inductance L DM And L CM =L(1-k)+L k L DM =L(1+k)+L k ; where L DM Used for active power transmission, L CM Used for dynamic adjustment of midpoint current under unbalanced load conditions.

7. The bipolar voltage-equalizing dual active bridge DC-DC converter as described in any one of claims 1 to 6, characterized in that, The secondary voltage balancing coupling inductor is configured to withstand voltages of V during the positive and negative half-cycles, respectively. o1 and V o2 The two secondary bridge arm node voltages are formed, and V is made possible through volt-second balance and midpoint current path. o1 With V o2 It automatically tends towards equilibrium.

8. A dead-time sensing soft-switching design method applicable to the bipolar voltage-equalizing dual active bridge DC-DC converter according to any one of claims 1 to 7, characterized in that, Includes the following steps: S1. Obtain the input voltage V in 1. Single-pole output voltage reference value V o Output power P o Coupling coefficient k, leakage inductance L k Switching frequency f s Dead time t d and device output capacitance C oss The load imbalance factor K is determined based on the positive load R1 and the negative load R2. u ; Among them, the load imbalance factor K u Satisfy: K u =(R2-R1) / (R1+R2); Single-pole output voltage deviation includes differential-mode output voltage deviation ΔV o,DM and common-mode output voltage deviation ΔV o,CM , wherein, ΔV o,DM =V o1 -V o2 , ΔV o,CM =(V o1 +V o2 ) / 2-V o ; The outer loop voltage control makes ΔV o,CM When V is approximately zero o1 =V o +ΔV o,DM / 2、V o2 =V o -ΔV o,DM / 2, at this point the output voltage deviation can be considered equal to ΔV o,DM ; S2. Based on the parameters obtained in step S1 and the voltage-current relationship of the secondary voltage equalization coupling inductor, the secondary voltage equalization coupling inductor is decoupled and equivalently processed. The first secondary branch current i... s Second secondary branch current i t Perform common-mode / different-mode decomposition and establish an equivalent model of secondary-side communication; Wherein, the common-mode current i is defined. CM =(i s +i t ) / 2, differential mode current i DM =(i s -i t ) / 2; Considering the coupling coefficient k and leakage inductance L of the secondary voltage balancing coupling inductor k Then, the common-mode equivalent inductance L can be obtained. CM =L(1-k)+L k Sum and difference equivalent inductance L DM =L(1+k)+L k Differential-mode equivalent inductance L DM Used to describe the active power path, common-mode equivalent inductance L CM Used to describe the midpoint current regulation channel under load imbalance conditions; S3. The secondary dead zone commutation process is divided into reachable clamping states, and the clamping states are determined by the anti-parallel diodes of the switches. The reachable clamping state includes S A S B S C S D S E and S ZVS S A This indicates that the first bridge arm node on the secondary side is in free resonance and the second bridge arm node on the secondary side is in positive clamping, S B This indicates that both secondary bridge arm nodes are in free resonance, S C S indicates that the first bridge arm node on the secondary side is in free resonance and the second bridge arm node on the secondary side is in negative clamping. D This indicates that both bridge arm nodes on the secondary side are positively clamped, S E This indicates that the first bridge arm node on the secondary side is positively clamped and the second bridge arm node on the secondary side is in free resonance, S ZVS This indicates that the first bridge arm node on the secondary side is positively clamped and the second bridge arm node on the secondary side is negatively clamped. S4. Define voltage clamping events and current zero-crossing events; The voltage clamping events include the first secondary arm node reaching a positive clamping voltage, the first secondary arm node reaching a negative clamping voltage, the second secondary arm node reaching a positive clamping voltage, and the second secondary arm node reaching a negative clamping voltage. The current zero-crossing event includes the first secondary branch current i s Zero-crossing and second secondary branch current i t Crossing zero; S5. Within the dead zone, switch the clamping state according to the earliest event and propagate the state variables; Within any reachable clamping state, the state variables are propagated using the corresponding equivalent resonance equation or linear current equation based on the current clamping combination. When a voltage clamping event occurs, the voltage at the corresponding bridge arm node is fixed to the corresponding output voltage clamping value; a positive clamp is clamped to +V. o Negative clamping corresponds to clamping to -V o ; When a current zero-crossing event occurs, if the voltage clamping state is in effect, the diode clamping of the corresponding bridge arm node is released and the device enters free resonance. Repeat the above steps until the dead zone ends or S is reached. ZVS state; S6. Determine whether the secondary switch meets the zero-voltage turn-on condition based on the bridge arm node voltage at the end of the dead zone, and obtain the output voltage deviation. The zero-voltage turn-on condition for the secondary switch at the end of the dead zone includes: When Q5 and Q8 are about to conduct, determine v cg (t3)≥V o1 And v dg (t3)≤-V o2 ; When Q6 and Q7 are about to conduct, determine v cg (t7)≤-V o2 And v dg (t7)≥V o1 ; Where t3 and t7 are the dead zone end times in the two half-cycles, respectively.

9. The dead-zone sensing soft-switching design method as described in claim 8, characterized in that, It also includes the equivalent residence at +V during a switching cycle based on the bridge arm node voltage. o1 Time T pos and equivalent reside in -V o2 Time T neg Estimate the steady-state bipolar voltage deviation to satisfy ΔV o,DM =V o (T neg -T pos ) / (T neg +T pos The steady-state bipolar voltage deviation is used to correct the slope of the branch current outside the dead zone and the starting current of the next dead zone.

10. A control system for implementing the dead-time sensing soft-switching design method according to any one of claims 8 to 9, characterized in that, include: Sampling module, controller, and driver module; The sampling module is used to collect the input voltage V. in Positive output voltage V o1 Negative output voltage V o2 and output current; the controller is used to determine the outward phase shift angle φ and dead time t based on the sampling results. d Or allowable working area; the drive module is used to determine the outward phase shift angle φ and the dead time t d Generate drive signals for switching transistors Q1 to Q8.

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