Display panel, preparation method thereof and display device

Abstract

The display panel comprises a substrate, an inorganic laminated structure, a first conductive layer, a first planar layer and a second planar layer. The inorganic laminated structure is located on one side of the substrate. The inorganic laminated structure is defined with a groove. The groove is located in a bending area of the display panel. The first conductive layer is located on a side of the inorganic laminated structure away from the substrate. Part of the first conductive layer is located in the groove. The first conductive layer covers the projection of the groove on the substrate. The first planar layer and the second planar layer are sequentially stacked on a side of the first conductive layer away from the substrate. In the display panel, the first planar layer and the second planar layer can protect the part of the first conductive layer in the groove in the bending area to improve the problem of display abnormality caused by over-etching abnormality.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, specifically to a display panel and its manufacturing method, and a display device. Background Technology

[0002] Organic light-emitting diodes (OLEDs) are organic thin-film electroluminescent devices. They have attracted great attention and are widely used in electronic display products due to their advantages such as simple fabrication process, low cost, low power consumption, high brightness, wide viewing angle, high contrast and flexible display capability. The PPI (pixel density) of a display panel can be increased by setting an isolation structure in the display panel. For details on the composition and preparation of the isolation structure (also known as a partition structure or isolation column), please refer to the relevant descriptions in patents PCT / CN2023 / 134518, 202310759370.2, 202310740412.8, 202310707209.0, 202311346196.5, 202311499823.9, 202310692671.8, and 202311091555.7. These details will not be elaborated upon here.

[0003] However, current display products, limited by their structural design, struggle to achieve both high pixel density (PPI) and high product quality. Summary of the Invention

[0004] This disclosure provides a display panel comprising a substrate and an inorganic stacked structure, a first conductive layer, a first planarization layer, and a second planarization layer located on the substrate. The inorganic stacked structure is located on one side of the substrate and defines a groove located in a bending region of the display panel. The first conductive layer is located on the side of the inorganic stacked structure away from the substrate, a portion of the first conductive layer is located within the groove, and the orthographic projection of the first conductive layer on the substrate covers the orthographic projection of the groove on the substrate. The first planarization layer and the second planarization layer are sequentially stacked on the side of the first conductive layer away from the substrate.

[0005] In the above solution, the first planarization layer fills the groove and eliminates the step area formed by the groove, which can prevent the etchant from accumulating in this area and causing the etching rate in the step area to be relatively large compared to other areas. This reduces the risk of over-etching of the first conductive layer in the bending area due to excessively fast local etching rate. At the same time, the second planarization layer located on the side of the first planarization layer away from the groove increases the protection of the first planarization layer and the first conductive layer, which can reduce the risk of the first planarization layer and the first conductive layer being over-etched. This improves the problem of display abnormalities caused by signal line breakage due to over-etching of the first conductive layer in the bending area, and improves the product quality of the display panel.

[0006] In one specific embodiment of the first aspect of this disclosure, the display panel may further include a second conductive layer located in the display area of ​​the display panel and on the side of the first conductive layer away from the substrate. The orthographic projection of the first conductive layer on the substrate covers the orthographic projection of the second conductive layer on the substrate. In the display area, a first planarization layer is located between the first conductive layer and the second conductive layer, and the second planarization layer is located on the side of the second conductive layer away from the first conductive layer.

[0007] In the above scheme, the second conductive layer set in the display area can increase the wiring space in the display panel, and the corresponding signal lines in the second conductive layer can be transferred to the first conductive layer through via structures or other means, and extend to the non-display area of ​​the display panel, including the bending area, thereby reducing the wiring difficulty of the display panel.

[0008] In one specific embodiment of the first aspect of this disclosure, the display panel may further include an isolation structure located on the side of the second planarization layer away from the substrate and at least partially located in the display area, wherein the isolation structure encloses to form a plurality of isolation openings.

[0009] Optionally, the first conductive layer includes a first signal line, at least a portion of which is located in the bending region, and the orthographic projection of the portion of the first signal line located in the bending region onto the substrate covers the orthographic projection of the groove onto the substrate. This reduces the manufacturing cost of the display panel.

[0010] Optionally, the first signal line includes at least one of a first data signal line and a first power signal line.

[0011] In one specific embodiment of the first aspect of this disclosure, the second conductive layer includes a second signal line, which includes at least one of a second data signal line and a second power signal line.

[0012] In the above scheme, the second conductive layer can also be used to form a signal line, i.e., the second signal line. However, it is set in the display area, rather than in the bending area corresponding to the first signal line. In this way, the first conductive layer forming the first signal line is protected by more film layers, such as the first planarization layer and the second planarization layer, which is beneficial to improving product quality.

[0013] In one specific embodiment of the first aspect of this disclosure, the display panel may further include a plurality of thin-film transistors, at least some of which are located in the display area. The thin-film transistors are located between the substrate and the first planarization layer, and each thin-film transistor includes an active layer, a source, and a drain.

[0014] Optionally, at least a portion of the first conductive layer is reused as a source and a drain.

[0015] Optionally, the display panel also includes a third planarization layer located between the substrate and the active layer.

[0016] Optionally, the source and drain layers are located on the side of the active layer away from the substrate, and the display panel also includes a fourth planarization layer located between the active layer and the source and drain layers.

[0017] In one specific embodiment of the first aspect of this disclosure, the display panel may further include a plurality of light-emitting devices located on the side of the second planarization layer away from the substrate, and at least a portion of the light-emitting devices being located in an isolation opening.

[0018] In one specific embodiment of the first aspect of this disclosure, the light-emitting device includes a first electrode, a light-emitting functional layer, and a second electrode stacked sequentially on a substrate, wherein the light-emitting functional layer and the second electrode of the light-emitting device are located in corresponding isolation openings.

[0019] Optionally, the first electrode is located on the side of the second planarization layer away from the substrate and is in contact with the second planarization layer. In this way, the second planarization layer can provide a relatively flat surface for the first electrode, thereby improving the quality of the first electrode.

[0020] Optionally, the second electrode is electrically connected to the isolation structure. In this way, the second electrodes of multiple light-emitting devices are connected to each other through the isolation structure to act as a common electrode, thereby alleviating the voltage drop problem generated when driving the second electrode.

[0021] In one specific embodiment of the first aspect of this disclosure, the isolation structure includes a support portion and a crown portion, the support portion being located between the crown portion and a substrate, and the orthographic projection of the surface of the support portion away from the substrate onto the substrate being located within the orthographic projection of the crown portion onto the substrate.

[0022] In the above scheme, the width of the crown is greater than the width of the upper end of the support, thereby improving the partitioning effect of the isolation structure.

[0023] Optionally, the support portion is a conductive structure, and the second electrode is connected to the side surface of the support portion. The support portion does not need to consider light transmission, thus allowing for a larger design thickness (greater than the second electrode). That is, the sheet resistance of the support portion is less than the sheet resistance of the second electrode. In this design, the support portion can be connected to the second electrode of the light-emitting device to achieve a common potential, thereby reducing the voltage drop generated on the second electrode.

[0024] In one specific embodiment of the first aspect of this disclosure, the isolation structure further includes a bottom located between the support and the substrate, wherein the orthographic projection of the support on the substrate lies within the orthographic projection of the bottom on the substrate.

[0025] Optionally, the bottom is a conductive structure, and the second electrode is electrically connected to the portion of the bottom surface away from the substrate that is not covered by the support. The second electrode is more easily deposited on the bottom surface area away from the substrate compared to the sidewalls of the support, thereby reducing the impedance at the connection between the second electrode and the isolation structure.

[0026] Optionally, the orthographic projection of the bottom onto the substrate lies within the orthographic projection of the crown onto the substrate.

[0027] In one specific embodiment of the first aspect of this disclosure, the display panel may further include a pixel defining layer, at least a portion of which is located in the display area. Within the display area, the pixel defining layer is located on the side of the second planarization layer away from the substrate and is in contact with the second planarization layer. The pixel defining layer includes pixel openings corresponding to the isolation openings, and at least a portion of the light-emitting device is located in the pixel openings.

[0028] Optionally, the pixel defining layer is an inorganic film layer. In the process of fabricating light-emitting devices based on the isolation structure, the pixel defining layer does not need to be thick enough to accommodate the light-emitting device, which is beneficial for the thinner and lighter design of the display panel. In addition, as an inorganic film layer, the pixel defining layer can have a high bonding strength with the isolation structure (and also with the first electrode described below), thereby reducing the risk of the isolation structure and the first electrode falling off. Furthermore, the high density of the inorganic film layer can more effectively block the intrusion of water, oxygen, etc., thereby improving the encapsulation effect of the display panel.

[0029] Optionally, the isolation structure is located on the side of the pixel defining layer away from the substrate.

[0030] Optionally, the orthographic projection of the pixel opening onto the substrate falls within the orthographic projection of the first electrode onto the substrate, the orthographic projection of the gap of the first electrode onto the substrate falls within the orthographic projection of the pixel defining layer onto the substrate, and the edge portion of the first electrode lies between the pixel defining layer and the second planarization layer.

[0031] In one specific embodiment of the first aspect of this disclosure, the display panel may further include a first encapsulation layer, wherein the first encapsulation layer is located on the side of the light-emitting device and the isolation structure away from the substrate, and covers the isolation opening.

[0032] Optionally, the first encapsulation layer includes a plurality of encapsulation units corresponding to the isolation openings, and the encapsulation units cover the light-emitting devices defined by the corresponding isolation openings.

[0033] Optionally, the packaging units corresponding to adjacent light-emitting devices with different light-emitting colors are spaced apart from each other.

[0034] In one specific embodiment of the first aspect of this disclosure, the display panel may further include a second encapsulation layer and a third encapsulation layer, wherein the second encapsulation layer is located on the side of the first encapsulation layer away from the substrate, the third encapsulation layer is located on the side of the second encapsulation layer away from the substrate, and the orthographic projection of the second encapsulation layer on the substrate is within the orthographic projection of the third encapsulation layer on the substrate.

[0035] Optionally, the second encapsulation layer is an organic film layer.

[0036] Optionally, the third encapsulation layer is an inorganic film layer.

[0037] The second aspect of this disclosure discloses a method for fabricating a display panel, the method comprising: providing a substrate; forming an inorganic stacked structure on the substrate, the inorganic stacked structure being located on one side of the substrate, the inorganic stacked structure defining a groove located in a bending region; forming a first conductive layer on the substrate having the inorganic stacked structure, the first conductive layer being located on the side of the inorganic stacked structure away from the substrate, wherein a portion of the first conductive layer is located within the groove, and the orthogonal projection of the first conductive layer on the substrate covers the orthogonal projection of the groove on the substrate; forming a first planarization layer on the substrate having the first conductive layer, the first planarization layer being located on the side of the first conductive layer away from the substrate, and the orthogonal projection of the first planarization layer on the substrate covering the orthogonal projection of the first conductive layer on the substrate; and forming a second planarization layer on the side of the first planarization layer away from the substrate, the orthogonal projection of the second planarization layer on the substrate covering the orthogonal projection of the first conductive layer on the substrate.

[0038] In the above scheme, in the display panel obtained by the preparation method, the first planarization layer can eliminate the step area caused by the groove in the bending area, reduce the problem of abnormal brightness caused by the breakage of the corresponding signal line due to excessive etching of the first conductive layer in the bending area. At the same time, the second planarization layer located on the side of the first planarization layer away from the groove further increases the protection of the first planarization layer and the first signal line, reduces the occurrence of abnormal brightness of the display panel caused by excessive etching of the first conductive layer in the bending area, and improves the product quality of the display panel.

[0039] In one specific embodiment of the second aspect of this disclosure, after forming a first planarization layer on a substrate on which a first conductive layer is formed, and before forming a second planarization layer on the side of the first planarization layer away from the substrate, the method further includes: forming a second conductive layer on the substrate on which the first planarization layer is formed, the second conductive layer being located in the display area of ​​the display panel, and the orthographic projection of the second conductive layer on the substrate falling within the orthographic projection of the first conductive layer on the substrate.

[0040] Optionally, the first flat layer is located in the display area and the bending area of ​​the display panel.

[0041] Optionally, the second flat layer is located in the display area and the bending area of ​​the display panel.

[0042] Optionally, forming a first conductive layer on a substrate having an inorganic multilayer structure includes: forming a conductive material thin film on the substrate having an inorganic multilayer structure, wherein the conductive material thin film forms the first conductive layer in a display area and a non-display area; and patterning the first conductive layer such that at least a portion of the first conductive layer in the non-display area is formed as a first signal line, wherein at least a portion of the first signal line is located in a bend area, and the orthogonal projection of the first signal line on the substrate covers the orthogonal projection of the groove on the substrate.

[0043] Optionally, the first signal line includes at least one of a first power signal line and a first data signal line.

[0044] In one specific embodiment of the second aspect of this disclosure, after the formation of the second conductive layer and before the formation of the second planarization layer, the method for manufacturing the display panel may further include: patterning the second conductive layer to form a second signal line, wherein the second signal line includes at least one of a second data signal line and a second power signal line.

[0045] Optionally, the second signal line is located in the display area.

[0046] In one specific embodiment of the second aspect of this disclosure, the method for fabricating the display panel may further include: forming a thin-film transistor on a substrate before forming a first planarization layer, the thin-film transistor including an active layer and a source and a drain located on the side of the active layer away from the substrate.

[0047] Optionally, patterning the first conductive layer such that at least a portion of the first conductive layer located in the non-display area is formed as a first signal line includes: patterning the first conductive layer such that at least a portion of the first conductive layer located in the non-display area is formed as a first signal line, and forming at least a source and a drain of the first conductive layer located in the display area.

[0048] Optionally, before forming the first conductive layer on the substrate with the inorganic stacked structure, the method for fabricating the display panel may further include: forming a third planarization layer on the substrate, the third planarization layer being located in the display area and the bending area; and forming an active layer on the side of the third planarization layer away from the substrate.

[0049] Optionally, after forming an active layer on the side of the third planarization layer away from the substrate and before forming a first conductive layer on the substrate with the inorganic stacked structure, the method for fabricating the display panel may further include: forming a fourth planarization layer on the side of the active layer away from the substrate, the fourth planarization layer being located in the display area and the bending area.

[0050] In one specific embodiment of the second aspect of this disclosure, the display panel further includes a plurality of light-emitting devices, and the method for fabricating the display panel may further include: forming an isolation structure on the side of the second planarization layer away from the substrate, at least a portion of the isolation structure being formed in the display area, and the isolation structure enclosing a plurality of isolation openings located in the display area; forming light-emitting devices, the light-emitting devices being located on the substrate, and at least a portion of the light-emitting devices being located in the isolation openings.

[0051] In one specific embodiment of the second aspect of this disclosure, forming a light-emitting device includes: forming a plurality of spaced-apart first electrodes in a display area on the side of the second planarization layer away from the substrate before forming an isolation structure; and after forming the isolation structure, fabricating a light-emitting functional layer and a second electrode located in an isolation opening based on the isolation structure, wherein the first electrode, the light-emitting functional layer and the second electrode stacked in each isolation opening constitute a light-emitting device.

[0052] Optionally, the first electrode is in contact with the second planarization layer.

[0053] Optionally, the second electrode is electrically connected to the isolation structure.

[0054] In one specific embodiment of the second aspect of this disclosure, the fabrication of a light-emitting functional layer and a second electrode located in an isolation opening based on an isolation structure includes: depositing a light-emitting material thin film and a conductive material thin film, the light-emitting material thin film and the conductive material thin film covering the isolation structure and the isolation opening, wherein the portions of the light-emitting material thin film and the conductive material thin film located in the isolation opening respectively form the light-emitting functional layer and the second electrode; depositing an encapsulation material film layer to cover the light-emitting device; forming a photoresist layer on the encapsulation material film layer, and performing a patterning process on the photoresist layer to form a photoresist pattern, the photoresist pattern covering a portion of the isolation opening; etching the encapsulation material film layer, the light-emitting material thin film and the conductive material thin film based on the photoresist pattern, the remaining portion of the encapsulation material film layer forming an encapsulation unit, and the light-emitting functional layer and the second electrode not covered by the encapsulation unit being etched; repeating the above process to form a light-emitting device and an encapsulation unit at the isolation opening where no light-emitting device is formed, all encapsulation units constituting a first encapsulation layer.

[0055] In one specific embodiment of the second aspect of this disclosure, before forming the isolation structure, and after forming a plurality of spaced-apart first electrodes in the display area on the side of the second planarization layer away from the substrate, the method for fabricating the display panel may further include: depositing a pixel defining material film layer, the pixel defining material film layer being at least located in the display area; and performing a patterning process on the pixel defining material film layer to form a pixel defining layer, wherein pixel openings are formed in the pixel defining layer, the pixel openings corresponding to isolation openings respectively, to expose at least a portion of the first electrodes.

[0056] The third aspect of this disclosure is a display device, which includes the display panel described in the first aspect or the display panel obtained by the preparation method described in the second aspect. Attached Figure Description

[0057] Figure 1 This is a schematic diagram of the planar structure of a display panel provided in one embodiment of the present disclosure.

[0058] Figure 2 for Figure 1 The image shows an enlarged view of area S1 of the display panel in one design.

[0059] Figure 3A for Figure 2 The diagram shows a cross-sectional view of the display panel along M2-N2 in one design.

[0060] Figure 3B In order to be in Figure 1 The diagram shown is a cross-sectional view of the display panel along M1-N1 under one design. Figure 3B and Figure 3A The corresponding display panel is shown.

[0061] Figure 4 Figure 2 The diagram shows a cross-sectional view of the display panel along M2-N2 in another design.

[0062] Figure 5 for Figure 2 The diagram shows a cross-sectional view of the display panel along M2-N2 in another design.

[0063] Figure 6A This is a flowchart illustrating a method for manufacturing a display panel according to an embodiment of the present disclosure.

[0064] Figure 6B A flowchart illustrating another method for manufacturing a display panel according to an embodiment of this disclosure.

[0065] Figure 6C A flowchart illustrating another method for manufacturing a display panel according to an embodiment of this disclosure.

[0066] Figure 7A This is a flowchart of some steps in a method for manufacturing a display panel according to an embodiment of the present disclosure.

[0067] Figure 7B This is a flowchart of some steps in another method for manufacturing a display panel according to an embodiment of the present disclosure.

[0068] Figure 7C This is a flowchart of some steps in another method for manufacturing a display panel according to an embodiment of the present disclosure.

[0069] Figure 8A , 8B , Figure 9A , Figure 9B , Figure 10A , Figure 10B and Figures 11 to 13 An embodiment of this disclosure provides a method for forming such Figure 3A and Figure 3B The diagram shows a process diagram of one method for manufacturing a display panel.

[0070] Explanation of reference numerals in the attached figures:

[0071] 10-Display panel; 11-Display area; 12-Non-display area; 12a-Bending area; G-Groove; 100-Substrate; 110-Inorganic stacked structure; 110a-Gate insulating layer; 121-First conductive layer; 122-Second conductive layer; 122a-Second signal line; 131-First planarization layer; 132-Second planarization layer; 133-Third planarization layer; 134-Fourth planarization layer; 140-First signal line; 200-Isolation structure; 201-Isolation opening; 210-Support portion; 220-Crown portion; 230-Bottom; 300-Thin film transistor; 310-Active layer; 320-Source; 330-Drain; 3 40-Gate; 400-Light-emitting device; 410-First electrode; 420-Light-emitting functional layer; 421-First functional layer; 422-Light-emitting layer; 423-Second functional layer; 430-Second electrode; P1-First type of light-emitting device; P2-Second type of light-emitting device; P3-Third type of light-emitting device; 500-Pixel defining layer; 501-Pixel aperture; 500a-Pixel defining material layer; 600-Packaging structure; 610-First encapsulation layer; 610a-Encapsulation material film layer; 611-Packaging unit; 620-Second encapsulation layer; 630-Third encapsulation layer; 710-First photoresist pattern; 720-Second photoresist pattern. Detailed Implementation

[0072] The technical solutions in the embodiments of this specification will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this specification, and not all embodiments. Based on the embodiments in this specification, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this specification.

[0073] In some scenarios, functional films in light-emitting devices are formed by vapor deposition. Each light-emitting device has multiple functional films, and the material composition of some functional films (such as the light-emitting layer) in light-emitting devices that emit different light is different. Therefore, when vapor deposition of these functional films using a mask (such as a fine mask), multiple alignments are required. To solve the positional offset problem caused by alignment accuracy errors, sufficient space (a safety margin related to alignment errors) needs to be reserved between different light-emitting devices to ensure that the actual light-emitting area of ​​the light-emitting device can have a certain overlap with the designed position (design area). This is equivalent to compressing the designed area of ​​the light-emitting area of ​​the light-emitting device, which not only limits the light-emitting area of ​​the light-emitting device, but also prevents the arrangement density of the light-emitting devices from being further increased, thus making it difficult to further improve the PPI (pixel density) of the display panel.

[0074] In this disclosure, by setting an isolation structure at the gap between the light-emitting devices, the functional film layers of adjacent light-emitting devices are separated. Thus, in the evaporation process of the functional film layers, only the entire display panel needs to be evaporated, without the need to individually prepare the functional film layer for each light-emitting device using a mask. This process does not require consideration of alignment accuracy during evaporation, thereby allowing for a smaller gap design between the light-emitting devices to increase the PPI (the principle of which can be found in the following section). Figures 8A to 13 (Related descriptions in the relevant embodiments).

[0075] In some application scenarios, display panels need to have a bending area, or bending zone, based on application requirements. Specifically, the inorganic layer in the bending zone of the display panel is etched away to form a groove. Then, the traces of the metal layer are routed along the bottom of the groove in the bending zone. This reduces the thickness of the inorganic layer in the bending zone and improves the bending capability of the bending zone.

[0076] It should be noted that in the process of fabricating the light-emitting device of the display panel based on the above-mentioned isolation structure, multiple etching processes are performed, and the functional film layer is deposited on the entire surface. Therefore, the bending area of ​​the display panel will also be etched multiple times. That is, the metal layer in the bending area is at risk of being etched multiple times. When deploying the metal layer traces in the step area of ​​the groove, the problem of over-etching is very easy to occur, which will cause the metal layer traces to break in the step area, resulting in abnormal connection. This seriously affects the display effect of the display panel and reduces the product quality.

[0077] At least one embodiment of this disclosure provides a display panel, a method for manufacturing the same, and a display device to at least solve the aforementioned technical problems. The display panel includes a substrate and an inorganic stacked structure, a first conductive layer, a first planarization layer, and a second planarization layer located on the substrate. The inorganic stacked structure is located on one side of the substrate and defines a groove in the inorganic stacked structure. The groove is located in the bending region of the display panel. The first conductive layer is located on the side of the inorganic stacked structure away from the substrate. A portion of the first conductive layer is located within the groove, and the orthogonal projection of the first conductive layer on the substrate covers the orthogonal projection of the groove on the substrate. The first planarization layer and the second planarization layer are sequentially stacked on the side of the first conductive layer away from the substrate. In this display panel, the first planarization layer on the side of the groove away from the substrate in the bending area fills the groove step, making the surface relatively flat. This avoids excessively high local etchant concentration or excessively long etching time caused by the groove step, reducing the possibility of over-etching. At the same time, the second planarization layer on the side of the first planarization layer away from the groove provides a thicker physical barrier, which can better prevent external factors such as etching solution from directly contacting and damaging the first conductive layer in the groove. This effectively reduces the risk of trace breakage in the first conductive layer in the bending area due to multiple etchings and improves the flattening quality.

[0078] The structure of a display panel according to at least one embodiment of the present disclosure will now be described in detail with reference to the accompanying drawings. Furthermore, in these drawings, a spatial Cartesian coordinate system is established with the substrate as a reference to more intuitively present the positional relationships of the relevant structures in the display panel. In this spatial Cartesian coordinate system, the X-axis and Y-axis are parallel to the surface of the substrate, and the Z-axis is perpendicular to the surface of the substrate.

[0079] like Figure 1 , Figure 2 , Figure 3A and Figure 3B As shown, the planar area of ​​the display panel 10 can be divided into a display area 11 and a non-display area 12 located on at least one side of the display area 11. The display area 11 can contain sub-pixels (also called sub-pixels, etc.), such as P1, P2, and P3 sub-pixels. The physical structure of these sub-pixels can be the light-emitting device 400 described in the following embodiment. Adjacent sub-pixels with different emitted light colors constitute a pixel (also called a pixel unit, large pixel, etc.). The arrangement density of these pixels in the display area 11 represents the pixel density (PPI). A bending area 12a can be provided in the non-display area 12 to bend at least a portion of the non-display area 12 to the back of the display panel 10, thereby making the display panel 10 appear as having a narrow bezel or no bezel when in use.

[0080] The physical structure of the display panel 10 includes a substrate 100 and an inorganic stacked structure 110, a first conductive layer 121, a first planarization layer 131, and a second planarization layer 132 located on the substrate 100. The inorganic stacked structure 110 is located on the substrate 100 and in the display area 11 and the non-display area 12. The inorganic stacked structure 110 defines a groove G, which is located in the bending area 12a. The first conductive layer 121 is located on the side of the inorganic stacked structure 110 away from the substrate 100. A portion of the first conductive layer 121 is located within the groove G, and the orthographic projection of the first conductive layer 121 on the substrate 100 covers the orthographic projection of the groove G on the substrate 100. The first planarization layer 131 and the second planarization layer 132 are sequentially stacked on the side of the first conductive layer 121 away from the substrate 100.

[0081] In one embodiment of this disclosure, the display panel 10 may further include a second conductive layer 122, which is located in the display area 11 of the display panel 10 and on the side of the first conductive layer 121 away from the substrate 100. The orthographic projection of the first conductive layer 121 on the substrate 100 covers the orthographic projection of the second conductive layer 122 on the substrate 100. In the display area 11, a first planarization layer 131 is located between the first conductive layer 121 and the second conductive layer 122, and the second planarization layer 132 is located on the side of the second conductive layer 122 away from the first conductive layer 121.

[0082] For example, such as Figure 3A and Figure 3B As shown, the solid structure of the display panel 10 includes a substrate 100 and an inorganic stacked structure 110, a first conductive layer 121, a second conductive layer 122, a first planarization layer 131, and a second planarization layer 132 located on the substrate 100. The inorganic stacked structure 110 is located on the substrate 100 and in the display area 11 and the non-display area 12. The inorganic stacked structure 110 defines a groove G located in the bending area 12a. The first conductive layer 121 and the second conductive layer 122 are located on the substrate 100, with the first conductive layer 121 located between the substrate 100 and the second conductive layer 122. The first planarization layer 131 and the second planarization layer 132 are located on the substrate 100 and in the display area 11 and the non-display area 12. In the display area 11, the first conductive layer 121, the first planarization layer 131, and the second conductive layer 122 are connected. 2. The first conductive layer 121, the first planarization layer 131 and the second planarization layer 132 are stacked sequentially in the non-display area 12. The first conductive layer 121 is located between the first planarization layer 131 and the inorganic stacked structure 110. At least a portion of the first conductive layer 121 is located in the bending region 12a. The orthographic projection of the portion of the first conductive layer 121 located in the bending region 12a on the substrate 100 covers the orthographic projection of the groove G on the substrate 100 and is located within the orthographic projection of the first planarization layer 131 and the second planarization layer 132 on the substrate 100.

[0083] In the display panel 10, the inorganic stacked structure 110 includes, but is not limited to, a gate insulating layer 110a and an interlayer dielectric layer. The portion of the inorganic stacked structure 110 corresponding to the bending region 12a is removed, thereby forming a groove G corresponding to the bending region 12a. The first planarization layer 131 on the side of the first signal line 140 located in the groove G away from the groove G can fill the groove G to eliminate the step area, thereby protecting the first conductive layer 121 located in the groove G. This improves the problem that the etching rate of the groove G is relatively fast compared to other areas. At the same time, the second planarization layer 132 on the side of the first planarization layer 131 away from the groove G further enhances the protection of the first conductive layer 121 in the groove G, thereby effectively reducing the risk of display abnormalities in the display panel 10 caused by the breakage of the corresponding signal line of the first conductive layer 121, such as the first signal line 140 mentioned below due to excessive etching.

[0084] In one embodiment of this disclosure, the display panel 10 further includes an isolation structure 200, which is located on the side of the second planarization layer 132 away from the substrate 100 and is at least partially located in the display area 11. The isolation structure 200 encloses and forms a plurality of isolation openings 201.

[0085] In one embodiment of this disclosure, the display panel 10 further includes a plurality of light-emitting devices 400, which are located on the side of the second planarization layer 132 away from the substrate 100, and at least a portion of the light-emitting devices 400 are located in the isolation opening 201.

[0086] Based on the isolation structure 200 in the display panel 10, light-emitting devices 400 can be formed in the isolation openings 201 using a full-surface vapor deposition method, thereby increasing the PPI of the display panel 10. When the light-emitting devices 400 are of various types emitting different colors of light, each light-emitting device 400 emitting different colors is manufactured independently. However, the film layers (vaporized film layers, such as the light-emitting functional layer 420, etc.) in each light-emitting device 400 are vapor-deposited across the entire surface of the display panel 10 during the vapor deposition process. For example, the light-emitting device 400 is classified into a first type of light-emitting device P1, a second type of light-emitting device P2, and a third type of light-emitting device P3 that emit different colors of light. During the fabrication process, light-emitting devices P1, P2, and P3 are fabricated sequentially. When fabricating the first type of light-emitting device P1, a first type of light-emitting device P1 is formed in each isolation opening 201. Then, the second electrode 430 and the light-emitting functional layer 420 of the first type of light-emitting device P1 in some of the isolation openings 201 (used in the final product to form the second type of light-emitting device P2 and the third type of light-emitting device P3) are removed. Based on this method, the second type of light-emitting device P2 and the third type of light-emitting device P3 are then fabricated sequentially, ultimately forming the first encapsulation layer 610 as shown in Figure 3. This process can be seen below. Figures 8A to 13The relevant descriptions in the embodiments are not repeated here. In the above process, multiple etching processes (including cleaning processes) are used. If the first planarization layer 131 and the second planarization layer 132 are not used to protect the first signal line 140, the multiple etching processes may easily lead to over-etching of the first signal line 140, which may cause the first signal line 140 to break, resulting in display abnormalities and thus reducing product quality.

[0087] For example, the first type of light-emitting device P1, the second type of light-emitting device P2, and the third type of light-emitting device P3 can emit red light, green light, and blue light respectively (in no particular order).

[0088] In at least one embodiment of this disclosure, the first conductive layer 121 includes a first signal line 140, at least a portion of which is located in the bending region G. The orthographic projection of the portion of the first signal line 140 located in the bending region G onto the substrate 100 covers the orthographic projection of the groove G onto the substrate 100. This means that during the manufacturing process of the display panel 10, the first signal line 140 located in the bending region 12a of the non-display area 12 and other signal lines corresponding to the first conductive layer 121 can be formed simultaneously in one process, such as film deposition, photolithography, and etching. Compared to the need for multiple similar processes when different layers are set, this greatly reduces the number of process steps, shortens the production cycle, and improves production efficiency.

[0089] In at least one embodiment of this disclosure, the first signal line 140 and the first conductive layer 121 are in the same layer and made of the same material. This same-layer and same-material arrangement can further improve production efficiency and reduce production costs.

[0090] In at least one embodiment of this disclosure, the first signal line 140 includes at least one of a first data signal line and a first power signal line.

[0091] In one embodiment of this disclosure, the second conductive layer 122 includes a second signal line 122a, which includes at least one of a second data signal line and a second power signal line. Compared to the second signal line 122a located in the display area 11, which has a second planarization layer 132 disposed on the side away from the substrate 100, the first signal line 140 located in the bending area 12a has two planarization layers, namely a first planarization layer 131 and a second planarization layer 132, disposed on the side away from the substrate. Therefore, the first signal line 140 formed in the bending area 12a using the first conductive layer 121 or a conductive layer of the same layer as the first conductive layer 121 is more effectively protected than the corresponding signal line formed in the bending area 12a using the second conductive layer 122 or a conductive layer of the same layer as the second conductive layer 122, reducing the risk of over-etching abnormalities causing the first signal line 140 to break and resulting in a bright line abnormality.

[0092] It should be noted that the signals transmitted by the first signal line 140 of the first conductive layer 121 and the second signal line 122a of the second conductive layer 122, such as data signals and power signals, can be the same. For example, the signals on the second signal line 122a can be transferred to the first signal line 140 through via structures combined with metal wiring, fan-shaped wiring, etc., thereby enabling connection with at least one of the following: driving circuit, signal processing circuit, control circuit, or external devices such as motherboard, power supply, etc. These can be designed according to actual needs and will not be elaborated upon here.

[0093] In one embodiment of this disclosure, the display panel 10 further includes a plurality of thin-film transistors 300, wherein at least a portion of the thin-film transistors 300 are located in the display area 11, the thin-film transistors 300 are located between the substrate 100 and the first planarization layer 131, and the thin-film transistors 300 include an active layer 310, a source 320 and a drain 330.

[0094] In at least one embodiment of this disclosure, at least a portion of the first conductive layer 121 is reused as a source 320 and a drain 330;

[0095] In at least one embodiment of this disclosure, the display panel 10 further includes a third planarization layer 133, which is located between the substrate 100 and the active layer 310.

[0096] In at least one embodiment of this disclosure, the layer containing the source 320 and the drain 330 is located on the side of the layer containing the active layer 310 away from the substrate 100, and the display panel 10 further includes a fourth planarization layer 134, which is located between the layer containing the active layer 310 and the layer containing the source 320 and the drain 330.

[0097] For example, such as Figure 3A and 3BAs shown, the display panel 10 includes a substrate 100, a third planarization layer 133, an active layer 310, a gate insulating layer 110a, a gate 340, a fourth planarization layer 134, a source 320 and a drain 330, a first planarization layer 131 and a second planarization layer 132, which are stacked sequentially. The gate insulating layer 110a is an inorganic stacked structure 110, located in the display area 11 and the non-display area 12, and a portion of it is removed in the bending area 12a of the non-display area 12 to form a groove G. The active layer 310, the gate 340, the source 320 and the drain 330 constitute a thin-film transistor 300. The third planarization layer 133 can improve the surface flatness of the substrate 100, while also buffering the stress differences that may exist between the substrate 100 and the upper film layers, such as the first conductive layer and the second conductive layer 122, providing a more uniform surface for the deposition of subsequent film layers, which is beneficial to the formation of subsequent film layers. The fourth planarization layer 134 planarizes the layer containing the active layer 310, allowing the first conductive layer 121, which forms the source electrode 320 and drain electrode 330, to be deposited more uniformly, avoiding problems such as uneven thickness and voids. The first planarization layer 131 provides a flat and smooth surface for the formation of the second conductive layer 122, enabling the first conductive layer 121 to be deposited uniformly and ensuring good conductivity and stability. Similarly, the second planarization layer 132 provides a good interface for subsequent film layers, such as the first electrode 410 of the light-emitting device 400, improving the performance and reliability of the display panel 10.

[0098] In at least one embodiment of this disclosure, such as Figure 3A and Figure 3B As shown, the light-emitting device 400 includes a first electrode 410, a light-emitting functional layer 420, and a second electrode 430 stacked sequentially on a substrate 100, and the light-emitting functional layer 420 and the second electrode 430 of the light-emitting device 400 are located in corresponding isolation openings 201.

[0099] For example, the light-emitting functional layer 420 may further include a first functional layer 421, a light-emitting layer 422, and a second functional layer 423, which are sequentially stacked on the first electrode 410. The first functional layer 421 may include a hole injection layer, a hole transport layer, an electron blocking layer, etc. The second functional layer 423 may include an electron injection layer, an electron transport layer, a hole blocking layer, etc. It should be noted that since charge carriers (holes and electrons) mainly crosstalk between adjacent light-emitting devices 400 through the first functional layer 421, the isolation structure 200 needs to ensure that the first functional layers 421 of each light-emitting device 400 are electrically disconnected from each other.

[0100] For example, in at least one embodiment of this disclosure, the first electrode 410 may be configured as an anode and the second electrode 430 may be configured as a cathode.

[0101] For example, the second electrode 430 is electrically connected to an isolation structure, that is, the second electrodes 430 of multiple light-emitting devices 400 are connected to each other through the isolation structure 200 to act as a common electrode, thereby alleviating the voltage drop problem generated when driving the second electrode 430.

[0102] For example, the first electrode 410 may include a body electrode and a light-shielding electrode (reflective electrode). The body electrode may be made of a high work function material such as ITO, and the light-shielding electrode may be made of a metal material with high conductivity, and may be configured as a composite structure to have high conductivity. For example, the light-shielding electrode may be a composite film structure such as molybdenum-aluminum-molybdenum or titanium-aluminum-titanium.

[0103] See again for at least one embodiment of this disclosure. Figure 3A and Figure 3B The isolation structure 200 includes a support portion 210 and a crown portion 220. The support portion 210 is located between the crown portion 220 and the substrate 100. The orthographic projection of the surface of the support portion 210 away from the substrate 100 onto the substrate 100 is located within the orthographic projection of the crown portion 220 onto the substrate 100. That is, the isolation structure 200 is generally wider at the top and narrower at the bottom. Thus, when some film layers (e.g., light-emitting functional layer 420) in the light-emitting device 400 are deposited, these film layers will be broken at the edge of the isolation structure 200 to reduce the risk of crosstalk between adjacent light-emitting devices 400.

[0104] For example, the support portion 210 is a conductive structure, and the second electrode 430 is connected to the side surface of the support portion 210. The support portion 210 is designed without considering light transmission, thus allowing for a larger design thickness (greater than the second electrode 430). That is, the sheet resistance of the support portion 210 is less than the sheet resistance of the second electrode 430. In this design, the support portion 210 can be connected to the second electrode 430 of the light-emitting device 400 to achieve a common potential, thereby reducing the voltage drop across the second electrode 430.

[0105] In at least one embodiment of this disclosure, such as Figure 4 As shown, the isolation structure 200 also includes a bottom 230, which is located between the support portion 210 and the substrate 100. The orthographic projection of the support portion 210 on the substrate 100 is located within the orthographic projection of the bottom 230 on the substrate 100.

[0106] For example, the bottom 230 is a conductive structure, and the second electrode 430 is electrically connected to the portion of the bottom 230's surface away from the substrate 100 that is not covered by the support 210. The second electrode 430 is more easily deposited on the surface area of ​​the bottom 230 away from the substrate 100 compared to the sidewall of the support 210, thereby reducing the impedance at the connection between the second electrode 430 and the isolation structure 200.

[0107] For example, the orthographic projection of the bottom 230 onto the substrate 100 lies within the orthographic projection of the crown 220 onto the substrate 100. In this way, the blocking effect of the isolation structure 200 on the light-emitting functional layer 420 can be increased.

[0108] For example, the bottom 230, the support 210, and the crown 220 can be made of molybdenum, aluminum, and titanium, respectively, with the corrosion resistance of aluminum, molybdenum, and titanium increasing in that order. During etching, the film formed by these materials can form a film such as... Figure 4 The isolation structure 200 is shown.

[0109] In at least one embodiment of this disclosure, such as Figure 3A and Figure 3B As shown, the display panel 10 may further include a pixel defining layer 500, at least a portion of which is located in the display area 11. In the display area 11, the pixel defining layer 500 is located on the side of the second planarization layer 132 away from the substrate 100 and is in contact with the second planarization layer 132. The pixel defining layer 500 includes pixel openings 501 corresponding to the isolation openings 201 respectively. At least a portion of the light-emitting device 400 is located in the pixel openings 501. Thus, the second planarization layer 132 provides a planar interface for a portion of the film layer of the subsequent light-emitting device 400.

[0110] For example, the pixel defining layer 500 is an inorganic film layer. In the process of fabricating the light-emitting device 400 based on the isolation structure 200, the pixel defining layer 500 does not need to be thick enough to accommodate the light-emitting device 400, which is beneficial for the thinner and lighter design of the display panel 10. In addition, as an inorganic film layer, the pixel defining layer 500 can have a high bonding strength with the isolation structure 200 (and also with the first electrode 410 described below), which reduces the risk of the isolation structure 200 and the first electrode 410 falling off. Furthermore, the high density of the inorganic film layer can more effectively block the intrusion of water, oxygen, etc., thereby improving the encapsulation effect of the display panel 10.

[0111] For example, the isolation structure 200 is located on the side of the pixel defining layer 500 away from the substrate 100, such that the pixel defining layer 500 spaces the first electrode 410 and the isolation structure 200.

[0112] For example, the orthographic projection of the pixel opening 501 onto the substrate 100 falls within the orthographic projection of the first electrode 410 onto the substrate 100, the orthographic projection of the gap of the first electrode 410 onto the substrate 100 falls within the orthographic projection of the pixel defining layer 500 onto the substrate 100, and the edge portion of the first electrode 410 lies between the pixel defining layer 500 and the second planarization layer 132. Thus, the second planarization layer 132 provides a good interface for the formation of the first electrode 410, ensuring that the first electrode 410 can be formed uniformly. This is beneficial for improving the conductivity of the first electrode 410, such as the anode, ensuring that the current is evenly distributed on the anode, thereby making the display panel 10 emit light more uniformly.

[0113] In at least one embodiment of this disclosure, such as Figure 5 As shown, the display panel 10 may also include a first encapsulation layer 610, which is located on the side of the light-emitting device 400 and the isolation structure 200 away from the substrate 100 and covers the isolation opening 201.

[0114] For example, the first encapsulation layer 610 includes a plurality of encapsulation units 611 corresponding to the isolation opening 201, and the encapsulation unit 611 covers the light-emitting device 400 defined by the corresponding isolation opening 201.

[0115] During the fabrication of the display panel 10, light-emitting devices P1, P2, and P3 are fabricated sequentially. When fabricating the first type of light-emitting device P1, a first type of light-emitting device P1 is formed in each isolation opening 201. A first encapsulation layer 610 is fabricated on the display panel 10 to cover the first type of light-emitting device P1. Then, the first encapsulation layer 610, as well as the second electrode 430 and the light-emitting functional layer 420 of the first type of light-emitting device P1, are removed from some of the isolation openings 201 (used in the final product to form the second type of light-emitting device P2 and the third type of light-emitting device P3) to obtain an encapsulation unit 611. In this process, the encapsulation unit 611 is used to protect the first type of light-emitting device P1 in other isolation openings 201. Based on this method, the second type of light-emitting device P2 and the third type of light-emitting device P3 are fabricated sequentially, ultimately forming a display panel 10 as shown in the image. Figure 5 The first encapsulation layer 610 shown, that is, the first encapsulation layer 610 on the entire display panel 10, is obtained by multiple processes. This process can be seen below. Figures 8A to 13 The relevant descriptions in the embodiments are not repeated here.

[0116] For example, the packaging units 611 corresponding to adjacent light-emitting devices 400 that emit different colors are spaced apart from each other. This process can be seen below. Figures 8A to 13 The relevant descriptions in the related embodiments will not be repeated here. For example, the packaging units 611 corresponding to adjacent light-emitting devices 400 with the same light emission color can be spaced apart from each other, or they can be connected together.

[0117] See again for at least one embodiment of this disclosure. Figure 5 The display panel 10 may further include a second encapsulation layer 620 and a third encapsulation layer 630. The second encapsulation layer 620 and the third encapsulation layer 630 extend from the display area 11 to the non-display area 12, respectively. The second encapsulation layer 620 is located on the side of the first encapsulation layer 610 away from the substrate 100, and the third encapsulation layer 630 is located on the side of the second encapsulation layer 620 away from the substrate 100. The orthographic projection of the second encapsulation layer 620 on the substrate 100 is within the orthographic projection of the third encapsulation layer 630 on the substrate 100.

[0118] For example, the second encapsulation layer 620 is an organic film layer. In this way, the second encapsulation layer 620 can improve the flatness of the surface of the display panel 10, so as to facilitate the placement of other components on the encapsulation layer; in addition, the second encapsulation layer 620 can have a certain degree of flexibility to release stress, thereby improving the reliability of the display panel 10 and making it more suitable for application in the field of flexible displays.

[0119] For example, the third encapsulation layer 630 is an inorganic film layer. The third encapsulation layer 630 has high density and a high barrier effect against water, oxygen, etc., and the third encapsulation layer 630 has higher strength, so that other components (such as touch function-related structures, optical films, etc.) can be fabricated on it.

[0120] At least one embodiment of this disclosure provides a method for manufacturing the above-described display panel, the method including, for example, Figure 6A Steps S100 to S500 are as follows.

[0121] S100, a substrate is provided. The structure of the substrate can be referred to the description of the above embodiments, and will not be repeated here.

[0122] S200, an inorganic stacked structure is formed on the substrate. The inorganic stacked structure is located on one side of the substrate and defines a groove in the bending region.

[0123] S300, a first conductive layer is formed on a substrate having an inorganic stacked structure. The first conductive layer is located on the side of the inorganic stacked structure away from the substrate. A portion of the first conductive layer is located within a groove, and the orthogonal projection of the first conductive layer on the substrate covers the orthogonal projection of the groove on the substrate.

[0124] S400, a first planarization layer is formed on a substrate on which a first conductive layer is formed. The first planarization layer is located on the side of the first conductive layer away from the substrate, and the orthogonal projection of the first planarization layer on the substrate covers the orthogonal projection of the first conductive layer on the substrate.

[0125] S500, a second planarization layer is formed on the side of the first planarization layer away from the substrate, and the orthographic projection of the second planarization layer on the substrate covers the orthographic projection of the first conductive layer on the substrate.

[0126] In the display panel obtained in steps S100 to S500 above, the first planarization layer and the second planarization layer located in the non-display area protect the first conductive layer in the groove of the bending area, reducing the risk of the first conductive layer breaking due to excessive etching and improving the product quality of the display panel. The specific structure of the display panel obtained by this preparation method, the technical problems solved, and the corresponding technical effects can be found in the relevant descriptions in the foregoing embodiments, and will not be repeated here.

[0127] In at least one embodiment of this disclosure, after forming a first planarization layer on a substrate on which a first conductive layer is formed, and before forming a second planarization layer on the side of the first planarization layer away from the substrate, the method further includes: forming a second conductive layer on the substrate on which the first planarization layer is formed, the second conductive layer being located in the display area of ​​the display panel, and the orthographic projection of the second conductive layer on the substrate falling within the orthographic projection of the first conductive layer on the substrate.

[0128] For example, the first flat layer is located in the display area and the bending area of ​​the display panel.

[0129] For example, the second flat layer is located in the display area and the bending area of ​​the display panel.

[0130] In at least one embodiment of this disclosure, forming a first conductive layer on a substrate having an inorganic multilayer structure includes: forming a conductive material thin film on the substrate having an inorganic multilayer structure, wherein the conductive material thin film forms the first conductive layer in a display area and a non-display area; and patterning the first conductive layer such that at least a portion of the first conductive layer in the non-display area is formed as a first signal line, wherein at least a portion of the first signal line is located in a bend area, and the orthogonal projection of the first signal line on the substrate covers the orthogonal projection of the groove on the substrate.

[0131] For example, the first signal line includes at least one of a first power signal line and a first data signal line.

[0132] For example, the method for manufacturing the display panel may include, as follows: Figure 6B Steps S10 to S70 are as follows.

[0133] S10 provides a substrate.

[0134] S20, an inorganic multilayer structure is formed on the substrate. The inorganic multilayer structure is located on one side of the substrate and defines a groove in the bending region.

[0135] S30, a conductive material thin film is formed on a substrate having an inorganic multilayer structure, and the conductive material thin film forms a first conductive layer in the display area and the non-display area.

[0136] S40, the first conductive layer is patterned so that at least a portion of the first conductive layer located in the non-display area is formed as a first signal line, wherein at least a portion of the first signal line is located in the bending area, and the orthogonal projection of the first signal line on the substrate covers the orthogonal projection of the groove on the substrate.

[0137] S50, a first planarization layer is formed on a substrate on which the first conductive layer is formed. The first planarization layer is located on the side of the first conductive layer away from the substrate, and the orthogonal projection of the first planarization layer on the substrate covers the orthogonal projection of the first conductive layer on the substrate.

[0138] S60, a second conductive layer is formed on a substrate on which a first planarization layer is formed. The second conductive layer is located in the display area of ​​the display panel, and the orthogonal projection of the second conductive layer on the substrate falls within the orthogonal projection of the first conductive layer on the substrate.

[0139] S70, a second planarization layer is formed on the side of the first planarization layer away from the substrate, and the orthogonal projection of the second planarization layer on the substrate covers the orthogonal projection of the first conductive layer on the substrate.

[0140] In at least one embodiment of this disclosure, after the formation of the second conductive layer and before the formation of the second planarization layer, the second conductive layer is further patterned to form a second signal line, the second signal line including at least one of a second data signal line and a second power signal line.

[0141] For example, the second signal line is located in the display area. The working relationship between the second signal line and the first signal line can be referred to the description of the above embodiments, and will not be repeated here.

[0142] For example, the method for manufacturing the display panel may include, as follows: Figure 6C Steps S10a to S80a are as follows.

[0143] S10a provides a substrate.

[0144] S20a, an inorganic multilayer structure is formed on the substrate. The inorganic multilayer structure is located on one side of the substrate and defines a groove in the bending region.

[0145] S30a, a conductive material thin film is formed on a substrate having an inorganic multilayer structure, and the conductive material thin film forms a first conductive layer in the display area and the non-display area.

[0146] S40a, the first conductive layer is patterned such that at least a portion of the first conductive layer located in the non-display area is formed as a first signal line, wherein at least a portion of the first signal line is located in the bending area, and the orthogonal projection of the first signal line on the substrate covers the orthogonal projection of the groove on the substrate.

[0147] S50a, a first planarization layer is formed on a substrate on which the first conductive layer is formed. The first planarization layer is located on the side of the first conductive layer away from the substrate, and the orthogonal projection of the first planarization layer on the substrate covers the orthogonal projection of the first conductive layer on the substrate.

[0148] S60a, a second conductive layer is formed on a substrate on which a first planarization layer is formed. The second conductive layer is located in the display area of ​​the display panel, and the orthographic projection of the second conductive layer on the substrate falls within the orthographic projection of the first conductive layer on the substrate.

[0149] S70a, the second conductive layer is patterned to form a second signal line, the second signal line including at least one of a second data signal line and a second power signal line.

[0150] S80a, a second planarization layer is formed on the side of the first planarization layer away from the substrate, and the orthogonal projection of the second planarization layer on the substrate covers the orthogonal projection of the first conductive layer on the substrate.

[0151] In at least one embodiment of this disclosure, the method for fabricating the display panel further includes forming a thin-film transistor on a substrate before forming a first planarization layer. The thin-film transistor includes an active layer and a source and a drain located on the side of the active layer away from the substrate.

[0152] For example, in step S40 above, the first conductive layer is patterned so that at least a portion of the first conductive layer located in the non-display area is formed as a first signal line. This includes patterning the first conductive layer so that at least a portion of the first conductive layer located in the non-display area is formed as a first signal line, and at least a portion of the first conductive layer located in the display area is formed as a source and a drain.

[0153] In at least one embodiment of this disclosure, before forming a first conductive layer on a substrate having an inorganic stacked structure, the method for fabricating the display panel further includes forming a third planarization layer on the substrate, the third planarization layer being located in the display area and the bending area, and forming an active layer on the side of the third planarization layer away from the substrate.

[0154] In at least one embodiment of this disclosure, after an active layer is formed on the side of the third planarization layer away from the substrate, and before a first conductive layer is formed on the substrate having an inorganic stacked structure, the method for fabricating the display panel further includes forming a fourth planarization layer on the side of the active layer away from the substrate, the fourth planarization layer being located in the display area and the bending area.

[0155] Based on the above embodiments, in at least one embodiment of this disclosure, the display panel further includes a plurality of light-emitting devices, and the method for manufacturing the display panel may further include, for example... Figure 7A Steps S800 to S900 are as follows.

[0156] S800, an isolation structure is formed on the side of the second planarization layer away from the substrate, at least a portion of the isolation structure is formed in the display area, and the isolation structure encloses a plurality of isolation openings located in the display area.

[0157] S900, forming a light-emitting device, the light-emitting device being located on a substrate, and at least a portion of the light-emitting device being located in an isolation opening.

[0158] In at least one embodiment of this disclosure, step S900 forms a light-emitting device, including as follows: Figure 7B Steps S910 to S920 are as follows.

[0159] S910, before forming the isolation structure, a plurality of first electrodes spaced apart from each other are formed in the display area on the side of the second planar layer away from the substrate.

[0160] S920, after forming the isolation structure, a light-emitting functional layer and a second electrode are fabricated based on the isolation structure and located in the isolation opening. The first electrode, the light-emitting functional layer and the second electrode stacked on each other in each isolation opening constitute a light-emitting device.

[0161] For example, the first electrode is in contact with the second planarization layer. For example, the second electrode is electrically connected to the isolation structure.

[0162] In at least one embodiment of this disclosure, step S920, which involves fabricating a light-emitting functional layer and a second electrode located within an isolation opening based on an isolation structure, includes, as follows: Figure 7C Steps S921 to S925 are as follows:

[0163] S921, depositing a light-emitting material thin film and a conductive material thin film, the light-emitting material thin film and the conductive material thin film covering the isolation structure and the isolation opening, the portions of the light-emitting material thin film and the conductive material thin film located in the isolation opening respectively forming the light-emitting functional layer and the second electrode.

[0164] S922, deposits a film of encapsulating material to cover the light-emitting device.

[0165] S923, a photoresist layer is formed on the packaging material film layer, and a patterning process is performed on the photoresist layer to form a photoresist pattern, the photoresist pattern covering part of the isolation opening.

[0166] S924, based on photoresist pattern etching of encapsulation material film, light-emitting material film and conductive material film, the remaining part of encapsulation material film is formed into encapsulation unit, and the light-emitting functional layer and second electrode not covered by the encapsulation unit are etched.

[0167] S925, repeat the above process to form a light-emitting device and a packaging unit at the isolation opening where no light-emitting device is formed, and all the packaging units constitute the first packaging layer.

[0168] In at least one embodiment of this disclosure, before forming the isolation structure and after forming a plurality of spaced-apart first electrodes in the display area on the side of the second planarization layer away from the substrate, a pixel defining material film layer is deposited. The pixel defining material film layer is at least located in the display area. The pixel defining material film layer is patterned to form a pixel defining layer. Pixel openings are formed in the pixel defining layer, and the pixel openings correspond to the isolation openings to expose at least a portion of the first electrodes. The specific structure of the display panel obtained by this fabrication method, the technical problems solved, and the corresponding technical effects can be found in the relevant descriptions in the foregoing embodiments, and will not be repeated here.

[0169] The manufacturing method of the display panel provided in at least one embodiment of this disclosure may further include: forming an organic encapsulation material on the side of the first encapsulation layer away from the substrate to form a second encapsulation layer, the second encapsulation layer extending from the display area to the non-display area; forming an inorganic encapsulation material on the side of the second encapsulation layer away from the substrate to form a third encapsulation layer, the third encapsulation layer extending from the display area to the non-display area; and the orthographic projection of the second encapsulation layer on the substrate lies within the orthographic projection of the third encapsulation layer on the substrate. The specific structure of the display panel obtained by this manufacturing method, the technical problems solved, and the corresponding technical effects can be found in the relevant descriptions in the foregoing embodiments, and will not be repeated here.

[0170] For example, methods for forming the second encapsulation layer include inkjet printing.

[0171] Below, as follows Figure 3A and Figure 3B Taking the display panel 10 shown as an example, the manufacturing method of the display panel 10 will be described by way of example.

[0172] like Figure 8A and Figure 8B As shown, a substrate 100 is provided, which is divided into a display area 11 and a non-display area 12. The non-display area 12 includes a bending area 12a, in which the inorganic stacked structure 110 is removed to form a groove G. A first electrode 410 arranged in an array is formed on the substrate 100. Then, a pixel defining material layer 500a is formed on the substrate 100 where the first electrode 410 is formed.

[0173] like Figure 9A and Figure 9B As shown, an isolation structure 200 is formed on a pixel defining material layer 500a, at least partially located in the display area 11. The isolation structure 200 has a support portion 210 and a crown portion 220, which define the isolation opening 201.

[0174] like Figure 9A and Figure 9B As shown, a patterning process is performed on the pixel defining material layer 500a (e.g., using...). Figure 9A and Figure 9B The first photoresist pattern 710 shown is etched as a mask, so that the pixel defining material layer 500a is formed as a pixel defining layer 500, and a pixel opening 501 located in the display area 11 is formed in the pixel defining layer 500. Figure 9A and Figure 9B The structure shown, after undergoing a patterning process, forms the following: Figure 10A and Figure 10B The structure shown.

[0175] In embodiments of this disclosure, the patterning process can be a photolithographic patterning process, which may include, for example, coating a structural layer to be patterned with photoresist, exposing the photoresist using a photomask, developing the exposed photoresist to obtain a first photoresist pattern 710, etching the structural layer using the first photoresist pattern 710 (optionally wet or dry etching), and then optionally removing the first photoresist pattern 710. It should be noted that when the material of the structural layer (e.g., the second photoresist pattern 720 described below) includes photoresist, the structural layer can be directly exposed using a photomask to form the desired pattern.

[0176] like Figure 11 As shown, a light-emitting material thin film and a conductive material thin film are vapor-deposited on the substrate 100 to form a light-emitting functional layer 420 and a second electrode 430 in each isolation opening 201 of the isolation structure 200. The first electrode 410, the light-emitting functional layer 420 and the second electrode 430 stacked on each other at the isolation opening 201 form a light-emitting device 400. No mask is used in the vapor deposition process, so the vapor-deposited material will also be deposited on the crown 220. It should be noted that in the actual process, the vapor-deposited material will be deposited on the upper surface and sidewalls of the crown 220 away from the substrate 100 (not shown in the figure) to form a filling film. Then, an encapsulation material film layer is deposited to cover the light-emitting device 400 and the isolation structure 200.

[0177] For example, the light-emitting layer 422 in the vapor-deposited light-emitting functional layer 420 can be light of the color corresponding to the first type of light-emitting device P1. That is, in this stage, the first type of light-emitting device P1 is formed in each isolation opening 201 of the isolation structure 200.

[0178] like Figure 12 As shown, a photoresist is formed (e.g., coated) on a substrate 100 on which an encapsulation material film layer is formed, and then a patterning process is performed on it to form a second photoresist pattern 720, which only covers a portion of the isolation opening 201 of the isolation structure 200.

[0179] like Figure 13 As shown, the surface of the display panel 10 is etched using the second photoresist pattern 720 as a mask to remove the encapsulation material film layer, the second electrode 430 and the light-emitting functional layer 420 that are not covered by the second photoresist pattern 720. The remaining part of the encapsulation material film layer forms the encapsulation unit 611 of the first encapsulation layer 610. Then, the remaining second photoresist pattern 720 is removed.

[0180] Repeat the above Figures 12 to 13 The steps are as follows: to form a second type of light-emitting device P2 and a third type of light-emitting device P3 in other isolation openings 201 respectively, and to form as shown in the figure. Figure 3A and Figure 3BThe process of forming the second type of light-emitting device P2 and the third type of light-emitting device P3 differs from that of forming the first type of light-emitting device 400P2 and the third type of light-emitting device P3 in that the isolation opening 201 covered by the second photoresist pattern 720 is different.

[0181] At least one embodiment of this disclosure provides a display device, which may include the display panel in the above embodiments or a display panel obtained by the manufacturing method in the above embodiments. For example, the display device may include a touch structure, an optical film (e.g., a microlens, a polarizer), a cover plate, or other structures disposed on the light-emitting side of the display panel.

[0182] For example, the display device can be any product or component with a display function, such as a television, digital camera, mobile phone, watch, tablet computer, laptop computer, or navigator.

[0183] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0184] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

[0185] The above description is merely a preferred embodiment of this specification and is not intended to limit this specification. Any modifications or equivalent substitutions made within the spirit and principles of this specification should be included within the scope of protection of this specification.

Claims

1. A display panel, characterized in that, include: Substrate; An inorganic multilayer structure is located on one side of the substrate, and the inorganic multilayer structure defines a groove, which is located in the bending area of ​​the display panel; A first conductive layer is located on the side of the inorganic stacked structure away from the substrate, wherein a portion of the first conductive layer is located within the groove, and the orthographic projection of the first conductive layer on the substrate covers the orthographic projection of the groove on the substrate; A first planarization layer and a second planarization layer are stacked sequentially on the side of the first conductive layer away from the substrate.

2. The display panel according to claim 1, characterized in that, It also includes a second conductive layer, wherein the second conductive layer is located in the display area of ​​the display panel and is located on the side of the first conductive layer away from the substrate, wherein the orthographic projection of the first conductive layer on the substrate covers the orthographic projection of the second conductive layer on the substrate, and in the display area, the first planarization layer is located between the first conductive layer and the second conductive layer, and the second planarization layer is located on the side of the second conductive layer away from the first conductive layer; Preferably, it further includes an isolation structure, wherein the isolation structure is located on the side of the second planarization layer away from the substrate and is at least partially located in the display area, wherein the isolation structure encloses and forms a plurality of isolation openings; Preferably, the first conductive layer includes a first signal line, at least a portion of which is located in the bending region, and the orthographic projection of the portion of the first signal line located in the bending region onto the substrate covers the orthographic projection of the groove onto the substrate. Preferably, the first signal line includes at least one of a first data signal line and a first power signal line.

3. The display panel according to claim 2, characterized in that, The second conductive layer includes a second signal line, which includes at least one of a second data signal line and a second power signal line.

4. The display panel according to claim 2, characterized in that, It also includes a plurality of thin-film transistors, wherein at least a portion of the thin-film transistors are located in the display area, the thin-film transistors are located between the substrate and the first planarization layer, and the thin-film transistors include an active layer, a source, and a drain. Preferably, at least a portion of the first conductive layer is reused as the source and the drain; Preferably, the display panel further includes a third planarization layer, the third planarization layer being located between the substrate and the active layer; Preferably, the source and drain layers are located on the side of the active layer layer away from the substrate, and the display panel further includes a fourth planarization layer located between the active layer layer and the source and drain layers.

5. The display panel according to any one of claims 2 to 4, characterized in that, It also includes a plurality of light-emitting devices, wherein the light-emitting devices are located on the side of the second planarization layer away from the substrate, and at least a portion of the light-emitting devices are located in the isolation opening.

6. The display panel according to claim 5, characterized in that, The light-emitting device includes a first electrode, a light-emitting functional layer, and a second electrode stacked sequentially on the substrate, wherein the light-emitting functional layer and the second electrode of the light-emitting device are located in the corresponding isolation opening; Preferably, the first electrode is located on the side of the second planarization layer away from the substrate and is in contact with the second planarization layer; Preferably, the second electrode is electrically connected to the isolation structure.

7. The display panel according to claim 6, characterized in that, The isolation structure includes a support portion and a crown portion, the support portion being located between the crown portion and the substrate, and The orthographic projection of the surface of the support portion away from the substrate onto the substrate lies within the orthographic projection of the crown portion onto the substrate; Preferably, the support portion is a conductive structure, and the second electrode is connected to the side surface of the support portion.

8. The display panel according to claim 7, characterized in that, The isolation structure further includes a bottom, which is located between the support and the substrate, and the orthographic projection of the support on the substrate is located within the orthographic projection of the bottom on the substrate; Preferably, the bottom is a conductive structure, and the second electrode is electrically connected to the portion of the bottom surface away from the substrate that is not covered by the support portion; Preferably, the orthographic projection of the bottom on the substrate lies within the orthographic projection of the crown on the substrate.

9. The display panel according to claim 7, characterized in that, It also includes a pixel defining layer, wherein at least a portion of the pixel defining layer is located in the display area, and within the display area, the pixel defining layer is located on the side of the second planarization layer away from the substrate and is in contact with the second planarization layer, the pixel defining layer includes pixel openings corresponding to the isolation openings respectively, and at least a portion of the light-emitting device is located in the pixel openings; Preferably, the pixel defining layer is an inorganic film layer; Preferably, the isolation structure is located on the side of the pixel defining layer away from the substrate; Preferably, the orthographic projection of the pixel opening on the substrate falls within the orthographic projection of the first electrode on the substrate, the orthographic projection of the gap of the first electrode on the substrate falls within the orthographic projection of the pixel defining layer on the substrate, and the edge portion of the first electrode is between the pixel defining layer and the second planarization layer.

10. The display panel according to claim 7, characterized in that, It also includes a first encapsulation layer, wherein the first encapsulation layer is located on the side of the light-emitting device and the isolation structure away from the substrate, and covers the isolation opening; Preferably, the first encapsulation layer includes a plurality of encapsulation units corresponding to the isolation openings, and the encapsulation units cover the light-emitting device defined by the corresponding isolation openings; Preferably, the packaging units corresponding to adjacent light-emitting devices with different light-emitting colors are spaced apart from each other.

11. The display panel according to claim 10, characterized in that, It also includes a second encapsulation layer and a third encapsulation layer, wherein the second encapsulation layer is located on the side of the first encapsulation layer away from the substrate, the third encapsulation layer is located on the side of the second encapsulation layer away from the substrate, and the orthographic projection of the second encapsulation layer on the substrate is within the orthographic projection of the third encapsulation layer on the substrate; Preferably, the second encapsulation layer is an organic film layer; Preferably, the third encapsulation layer is an inorganic film layer.

12. A method for manufacturing a display panel, characterized in that, include: Provide substrate; An inorganic multilayer structure is formed on the substrate, the inorganic multilayer structure is located on one side of the substrate, the inorganic multilayer structure defines a groove, and the groove is located in the bending region; A first conductive layer is formed on the substrate on which the inorganic stacked structure is formed. The first conductive layer is located on the side of the inorganic stacked structure away from the substrate. A portion of the first conductive layer is located within the groove, and the orthographic projection of the first conductive layer on the substrate covers the orthographic projection of the groove on the substrate. A first planarization layer is formed on the substrate on which the first conductive layer is formed. The first planarization layer is located on the side of the first conductive layer away from the substrate, and the orthographic projection of the first planarization layer on the substrate covers the orthographic projection of the first conductive layer on the substrate. A second planarization layer is formed on the side of the first planarization layer away from the substrate, and the orthographic projection of the second planarization layer on the substrate covers the orthographic projection of the first conductive layer on the substrate.

13. The preparation method according to claim 12, characterized in that, After forming a first planarization layer on the substrate where the first conductive layer is formed, and before forming a second planarization layer on the side of the first planarization layer away from the substrate, the method further includes: A second conductive layer is formed on a substrate on which a first planarization layer is formed. The second conductive layer is located in the display area of ​​the display panel, and the orthographic projection of the second conductive layer on the substrate falls within the orthographic projection of the first conductive layer on the substrate. Preferably, the first flattening layer is located in the display area and the bending area of ​​the display panel; Preferably, the second flattening layer is located in the display area and the bending area of ​​the display panel; Preferably, forming the first conductive layer on the substrate on which the inorganic multilayer structure is formed includes: A conductive material thin film is formed on the substrate on which the inorganic multilayer structure is formed, and the conductive material thin film forms the first conductive layer in the display area and the non-display area; The first conductive layer is patterned such that at least a portion of the first conductive layer located in the non-display area is formed as the first signal line, wherein at least a portion of the first signal line is located in the bending area, and the orthographic projection of the first signal line on the substrate covers the orthographic projection of the groove on the substrate. Preferably, the first signal line includes at least one of a first power signal line and a first data signal line.

14. The preparation method according to claim 13, characterized in that, After the formation of the second conductive layer and before the formation of the second planarization layer, the method further includes: The second conductive layer is patterned to form a second signal line, the second signal line including at least one of a second data signal line and a second power signal line; Preferably, the second signal line is located in the display area.

15. The preparation method according to claim 14, characterized in that, Also includes: Before forming the first planarization layer, a thin-film transistor is formed on the substrate, wherein the thin-film transistor includes an active layer and a source and a drain located on the side of the active layer away from the substrate; Preferably, the patterning of the first conductive layer to form at least a portion of the first conductive layer in the non-display area as the first signal line includes: patterning the first conductive layer to form at least a portion of the first conductive layer in the non-display area as the first signal line, and forming at least a portion of the first conductive layer in the display area as the source and the drain. Preferably, before forming the first conductive layer on the substrate having the inorganic multilayer structure, the method further includes: A third planarization layer is formed on the substrate, the third planarization layer being located in the display area and the bending area; The active layer is formed on the side of the third planarization layer away from the substrate; Preferably, after the active layer is formed on the side of the third planarization layer away from the substrate, and before the first conductive layer is formed on the substrate on which the inorganic stacked structure is formed, the method further includes: A fourth planarization layer is formed on the side of the active layer away from the substrate, the fourth planarization layer being located in the display area and the bending area.

16. The preparation method according to claim 14, characterized in that, The display panel further includes multiple light-emitting devices, and the method for manufacturing the display panel further includes: An isolation structure is formed on the side of the second planar layer away from the substrate, wherein at least a portion of the isolation structure is formed in the display area, and the isolation structure encloses a plurality of isolation openings located in the display area; A light-emitting device is formed, wherein the light-emitting device is located on the substrate, and at least a portion of the light-emitting device is located in the isolation opening.

17. The preparation method according to claim 16, characterized in that, The process of forming the light-emitting device includes: Before forming the isolation structure, a plurality of first electrodes spaced apart from each other are formed in the display area on the side of the second planar layer away from the substrate; After forming the isolation structure, a light-emitting functional layer and a second electrode are fabricated based on the isolation structure and located in the isolation opening. The first electrode, the light-emitting functional layer and the second electrode stacked on top of each other in each isolation opening constitute the light-emitting device. Preferably, the first electrode is in contact with the second planarization layer; Preferably, the second electrode is electrically connected to the isolation structure.

18. The preparation method according to claim 17, characterized in that, The fabrication of the light-emitting functional layer and the second electrode located in the isolation opening based on the isolation structure includes: A light-emitting material film and a conductive material film are deposited, wherein the light-emitting material film and the conductive material film cover the isolation structure and the isolation opening, wherein the portions of the light-emitting material film and the conductive material film located in the isolation opening respectively form the light-emitting functional layer and the second electrode; Deposit an encapsulation material film to cover the light-emitting device; A photoresist layer is formed on the encapsulation material film, and the photoresist layer is patterned to form a photoresist pattern, the photoresist pattern covering a portion of the isolation opening; The encapsulation material film, the light-emitting material film, and the conductive material film are etched based on the photoresist pattern, wherein the remaining portion of the encapsulation material film is formed into an encapsulation unit, and the light-emitting functional layer and the second electrode not covered by the encapsulation unit are etched. The above process is repeated to form the light-emitting device and the packaging unit at the isolation opening where the light-emitting device is not formed, and all the packaging units constitute the first packaging layer.

19. The preparation method according to claim 18, characterized in that, Before forming the isolation structure, and after forming a plurality of spaced-apart first electrodes in the display area on the side of the second planarization layer away from the substrate before forming the isolation structure, the method further includes: Depositing a pixel-defining material film layer, the pixel-defining material film layer being at least located in the display area; and The pixel defining material film is patterned to form a pixel defining layer, wherein pixel openings are formed in the pixel defining layer, and the pixel openings correspond to the isolation openings respectively, so as to expose at least a portion of the first electrode.

20. A display device, characterized in that, The display panel includes any one of claims 1 to 11 or a display panel obtained by the preparation method of any one of claims 12 to 19.

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