Imaging device and camera system

Abstract

The imaging device (190) includes a photoelectric conversion layer (51), a counter electrode (52), an insulating film (130), and an electrode (115). The counter electrode (52) is located on the photoelectric conversion layer (51). The insulating film (130) covers at least a portion of a side surface (51s) of the photoelectric conversion layer (51) including a lowermost end (51j). The electrode (115) is in contact with a side surface (52s) of the counter electrode (52). The electrode (115) opposes the side surface (51s) of the photoelectric conversion layer (51) via the insulating film (130).

Description

Technical Field

[0001] This disclosure relates to camera devices and camera systems. Background Technology

[0002] Various studies have been conducted on imaging devices. In the imaging device described in Patent Document 1, a first electrode film, an organic photoelectric conversion film, and a second electrode film are sequentially arranged on a substrate. A metal wiring film is electrically connected to the second electrode film. The metal wiring film covers the entire end of the organic photoelectric conversion film. Reference 1 describes how the metal wiring film suppresses the infiltration of moisture and gas from the end of the organic photoelectric conversion film into its interior.

[0003] Existing technical documents Patent documents Patent Document 1: Japanese Patent Application Publication No. 2015-12239 Patent Document 2: International Publication No. 2023 / 176245 Patent Document 3: International Publication No. 2017 / 081847 Summary of the Invention

[0004] This disclosure provides a technique suitable for implementing a camera device with high reliability.

[0005] The present invention provides a camera device comprising: a photoelectric conversion layer; a counter electrode on the photoelectric conversion layer; an insulating film covering at least the lowermost portion of the side surface of the photoelectric conversion layer; and an electrode that is opposed to the side surface of the photoelectric conversion layer via the insulating film and in contact with the side surface of the counter electrode.

[0006] The technology disclosed herein is suitable for implementing a camera device with high reliability. Attached Figure Description

[0007] Figure 1 This is a circuit diagram showing the circuit structure of the camera device according to Embodiment 1.

[0008] Figure 2 This is a cross-sectional view showing the device structure of the pixel according to Embodiment 1.

[0009] Figure 3A This is a cross-sectional view of the pixel array according to Embodiment 1.

[0010] Figure 3B This is a top view of the pixel array in Implementation Method 1.

[0011] Figure 4 This is a partial cross-sectional view of the pixel array according to the first structural example of Embodiment 1.

[0012] Figure 5AThis is an explanatory diagram of the first manufacturing method example.

[0013] Figure 5B This is an explanatory diagram of the first manufacturing method example.

[0014] Figure 5C This is an explanatory diagram of the first manufacturing method example.

[0015] Figure 5D This is an explanatory diagram of the first manufacturing method example.

[0016] Figure 6A This is an explanatory diagram of a variation of the first manufacturing method example.

[0017] Figure 6B This is an explanatory diagram of a variation of the first manufacturing method example.

[0018] Figure 7 This is a partial cross-sectional view of the pixel array according to the second structural example of Embodiment 1.

[0019] Figure 8A This is an explanatory diagram of the second manufacturing method example.

[0020] Figure 8B This is an explanatory diagram of the second manufacturing method example.

[0021] Figure 8C This is an explanatory diagram of the second manufacturing method example.

[0022] Figure 9 This is a partial cross-sectional view of the pixel array according to Embodiment 2.

[0023] Figure 10 This is a partial cross-sectional view of the pixel array according to Embodiment 3.

[0024] Figure 11 This is a partial cross-sectional view of the pixel array according to embodiment 4.

[0025] Figure 12A This is an explanatory diagram of an example of a pixel array manufacturing method according to Embodiment 4.

[0026] Figure 12B This is an explanatory diagram of an example of a pixel array manufacturing method according to Embodiment 4.

[0027] Figure 13 This is a partial cross-sectional view of the pixel array according to embodiment 5.

[0028] Figure 14 This is a partial cross-sectional view of the pixel array according to the first structural example of Embodiment 6.

[0029] Figure 15 This is a partial cross-sectional view of the pixel array according to the second structural example of Embodiment 6.

[0030] Figure 16 This is a cross-sectional view of the pixel array according to Embodiment 7.

[0031] Figure 17 These are schematic exploded plan views of the pixel arrays in embodiments 1 to 7.

[0032] Figure 18A This is a top view of the pixel array in embodiment 8.

[0033] Figure 18B This is a schematic exploded plan view of the pixel array in embodiment 8.

[0034] Figure 19A This is a top view of the pixel array in embodiment 9.

[0035] Figure 19B This is a schematic decomposed plan view of the pixel array according to Embodiment 9.

[0036] Figure 20 This is a schematic diagram of the structure of the camera system in Embodiment 10.

[0037] Figure 21 This is an explanatory diagram of a pixel array based on a reference method.

[0038] Figure 22A This is an explanatory diagram of the concave shape.

[0039] Figure 22B This is an explanatory diagram of the concave shape. Detailed Implementation

[0040] (The insights that form the basis of this disclosure) Figure 21 This is an explanatory diagram of a pixel array 901 according to a reference configuration. The pixel array 901 includes a photoelectric conversion layer 951, a counter electrode 952, a protective film 919, and a connecting electrode 915. The counter electrode 952 is located on the photoelectric conversion layer 951. The protective film 919 is located on the counter electrode 952.

[0041] The connecting electrode 915 contacts the side 952s of the opposing electrode 952. This establishes an electrical connection between the connecting electrode 915 and the opposing electrode 952. In the pixel array 901, a voltage is applied to the opposing electrode 952 via the connecting electrode 915, and an electric field is applied to the photoelectric conversion layer 951. Under the applied electric field, the photoelectric conversion layer 951 converts light transmitted through the opposing electrode 952 and incident on itself into electrical charge.

[0042] The inventors investigated improvements in the reliability of a pixel array 901 according to a reference configuration. Discontinuities at the bottommost point 951j of the side surface 951s of the photoelectric conversion layer 951 can be a factor reducing the reliability of the pixel array 901. By protecting this bottommost point 951j, reliability degradation originating from the bottommost point 951j can be suppressed.

[0043] Through research, the inventors conceived of a structure in which the connecting electrode 915 contacts the side surface 952s of the opposing electrode 952, and an insulating film is positioned between the connecting electrode 915 and the lowermost end 951j of the side surface 951s of the photoelectric conversion layer 951. Therefore, the lowermost end 951j is protected by the insulating film, and the reliability of the pixel array 901 can be improved.

[0044] The embodiments of this disclosure will now be described. The embodiments shown below are preferred examples for illustrating this disclosure and are not intended to limit the scope of this disclosure. In the figures, some elements are sometimes omitted. In the figures, dimensions, the angle of a cone, etc., are sometimes depicted exaggeratedly.

[0045] In this implementation, terms such as "vertical," "up," "down," and "side" are used merely to specify the relative configurations of elements and are not intended to limit the orientation of the pixel array or the camera device. "Height" refers to the position in the vertical direction. The lateral direction is the direction orthogonal to the vertical direction.

[0046] In the implementation, "plan view" refers to the view when viewed from the thickness direction of the photoelectric conversion layer.

[0047] In the implementation method, "the material of element A is the same as the material of element B" specifically means that the composition of the material of element A is the same as that of the material of element B. "The material of element A is different from the material of element B" specifically means that the composition of the material of element A is different from that of the material of element B.

[0048] In the implementation, a "cone" can be straight or curved. In the implementation, a "cone" includes both a "positive cone" and an "inverted cone." In the implementation, a positive cone shape for the side surface of the photoelectric conversion layer means that, in a cross-section parallel to and passing through the thickness direction of the photoelectric conversion layer, the angle between the lower surface of the photoelectric conversion layer and the side surface of the photoelectric conversion layer is greater than 0° and less than 90°. An inverted cone shape for the side surface of the photoelectric conversion layer means that, in a cross-section parallel to the thickness direction of the photoelectric conversion layer, the angle between the lower surface of the photoelectric conversion layer and the side surface of the photoelectric conversion layer is greater than 90° and less than 180°.

[0049] In this implementation, contact between element A and element B means that at least a portion of element A is in contact with at least a portion of element B. For example, side contact between the connecting electrode and the counter electrode means that at least a portion of the connecting electrode is in contact with at least a portion of the side of the counter electrode.

[0050] In the implementation method, such as Figure 22A As shown, the side surface W has a recess Z in the following manner: the side surface W has a receding surface X and a reference surface Y located on one side of the receding surface X. The receding surface X recedes from the reference surface Y, and the recess Z is divided by the receding surface X. Additionally, as... Figure 22B As shown, the side surface W has a depression Z with the following shape: the side surface W has a receding surface X, a reference surface Y1 located on one side of the receding surface X, and a reference surface Y2 located on the other side of the receding surface X. The receding surface X recedes from both reference surfaces Y1 and Y2, and the depression Z is divided by the receding surface X. The same applies to the depression of the side surface W.

[0051] In implementation, as long as there is no particular contradiction, p-type elements can be replaced with n-type elements, and n-type elements can be replaced with p-type elements.

[0052] (Implementation Method 1) (Overview of the camera device) Figure 1 This is a circuit diagram showing the circuit structure of the camera device 190 according to Embodiment 1. The camera device 190 includes a pixel array 101 and peripheral circuitry 102. The pixel array 101 includes a plurality of pixels 14.

[0053] Multiple pixels 14 are arranged two-dimensionally in a semiconductor substrate. Thus, the multiple pixels 14 constitute a pixel region. Figure 1 In the example, multiple pixels 14 are arranged in two dimensions along both the row and column directions. That is, multiple rows and multiple columns are formed by multiple pixels 14. The row direction is the direction in which the rows extend. Figure 1 The left and right directions within the column. The column direction is the direction in which the column extends. Figure 1 The up and down directions in the middle.

[0054] The pixel array 101 can be a line sensor. In this case, the multiple pixels 14 can also be arranged in one dimension.

[0055] Each pixel 14 includes a photodetector 10, an amplifying transistor 11, a reset transistor 12, and an address transistor 13. The photodetector 10 includes a pixel electrode 50, a photoelectric conversion layer 51, and a counter electrode 52. The pixel electrode 50 is located below the photoelectric conversion layer 51. The counter electrode 52 is located above the photoelectric conversion layer 51. The pixel electrode 50 can also be referred to as the lower electrode. The counter electrode 52 can also be referred to as the upper electrode. In this embodiment, the address transistor 13 is a row selection transistor.

[0056] Peripheral circuit 102 includes voltage control circuit 60. Voltage control circuit 60 applies a control voltage to counter electrode 52 via electrode signal line 16. By changing the control voltage, the spectral sensitivity characteristics of photoelectric conversion layer 51 can be altered.

[0057] Signal charges are generated by irradiating the photoelectric conversion layer 51 with light and collected by the pixel electrode 50. When holes are used as signal charges, a control voltage is applied to the counter electrode 52 to make the potential of the pixel electrode 50 lower than that of the counter electrode 52. When electrons are used as signal charges, a control voltage is applied to the counter electrode 52 to make the potential of the pixel electrode 50 higher than that of the counter electrode 52. The potential difference between the pixel electrode 50 and the counter electrode 52 can also be set by changing the voltage applied to the pixel electrode 50.

[0058] The pixel electrode 50 is connected to the gate electrode of the amplifying transistor 11. The signal charge collected by the pixel electrode 50 is stored in the charge storage node 24.

[0059] The charge accumulation node 24 includes a pixel electrode 50, a gate electrode of an amplifying transistor 11, and an n-type impurity region 41B (see [link]). Figure 2 In this embodiment, the n-type impurity region 41B is one of the source and drain of the reset transistor 12. The n-type impurity region 41B can also be referred to as the charge accumulation region.

[0060] A voltage corresponding to the amount of signal charge stored in charge storage node 24 is applied to the gate electrode of amplifying transistor 11. The voltage applied to the gate electrode is amplified by amplifying transistor 11. The amplified voltage is selectively read out as a signal voltage by address transistor 13.

[0061] One of the source and drain terminals of the reset transistor 12 is connected to the pixel electrode 50. Through the reset transistor 12, the signal charge accumulated in the charge accumulation node 24 is reset, and the potential of the gate electrode of the amplification transistor 11 and the pixel electrode 50 is reset.

[0062] The camera device 190 includes a power supply line 21, multiple vertical signal lines 17, multiple address signal lines 26, and multiple reset signal lines 27. By connecting these lines to multiple pixels 14, the aforementioned actions can be selectively performed on multiple pixels 14.

[0063] Specifically, power supply line 21 is connected to one of the source and drain of amplifying transistor 11. Vertical signal line 17 is connected to one of the source and drain of address transistor 13. Address signal line 26 is connected to the gate electrode of address transistor 13. Reset signal line 27 is connected to the gate electrode of reset transistor 12.

[0064] The peripheral circuitry 102 includes a vertical scanning circuit 15, a horizontal signal readout circuit 20, multiple column signal processing circuits 19, multiple load circuits 18, and multiple differential amplifiers 22. The vertical scanning circuit 15 is also referred to as a row scanning circuit. The horizontal signal readout circuit 20 is also referred to as a column scanning circuit. The column signal processing circuit 19 is also referred to as a row signal accumulation circuit. The differential amplifiers 22 are also referred to as feedback amplifiers.

[0065] The vertical scan circuit 15 is connected to the address signal line 26 and the reset signal line 27. The vertical scan circuit 15 selects multiple pixels 14 configured in each row, reads the signal voltage, and resets the potential of the pixel electrode 50.

[0066] Power supply wiring 21 is the source follower power supply. Power supply wiring 21 supplies a specified power supply voltage to each pixel 14.

[0067] Multiple pixels 14 configured in each column are electrically connected to column signal processing circuits 19 corresponding to each column via vertical signal lines 17. These column signal processing circuits 19 are electrically connected to horizontal signal readout circuits 20.

[0068] Multiple pixels 14 arranged in each column are electrically connected to the corresponding load circuit 18 via vertical signal lines 17. The load circuit 18 and the amplifying transistor 11 constitute a source follower circuit.

[0069] Multiple pixels 14 arranged in each column are electrically connected to the input terminal on the negative side of the differential amplifier 22 corresponding to that column via a vertical signal line 17 corresponding to that column. The output terminal of the differential amplifier 22 corresponding to each column is connected to the multiple pixels 14 arranged in that column via a feedback line 23 corresponding to that column.

[0070] The vertical scan circuit 15 applies a row selection signal to the gate electrode of the address transistor 13 via the address signal line 26. The row selection signal controls the on and off states of the address transistor 13. By applying the row selection signal, the row to be read is scanned and selected. A signal voltage is read from each pixel 14 located in the selected row to the vertical signal line 17 of the column to which that pixel 14 belongs.

[0071] The vertical scan circuit 15 applies a reset signal to the gate electrode of the reset transistor 12 via the reset signal line 27. The reset signal controls the on and off states of the reset transistor 12. By applying the reset signal, the row of pixel 14 to be reset is selected. The vertical signal line 17 transmits the signal voltage read from the pixel 14 selected by the vertical scan circuit 15 to the column signal processing circuit 19 of the column to which pixel 14 belongs.

[0072] The signal processing circuit 19 performs noise suppression signal processing, analog-to-digital conversion (AD conversion), etc. Noise suppression signal processing includes, for example, correlated double sampling.

[0073] The horizontal signal readout circuit 20 reads signals sequentially from multiple column signal processing circuits 19 onto the horizontal common signal line (not shown).

[0074] The output terminal of the differential amplifier 22 is connected to one of the source and drain terminals of the reset transistor 12 via feedback line 23. When the address transistor 13 and the reset transistor 12 are in the ON state, the output voltage of the address transistor 13 is supplied to the negative input terminal of the differential amplifier 22. The differential amplifier 22 performs feedback operation so that the voltage output from the differential amplifier 22 and applied to the gate electrode of the amplifying transistor 11 becomes a predetermined feedback voltage. The feedback voltage is 0V or a positive voltage near 0V.

[0075] Figure 2 This is a cross-sectional view showing the device structure of pixel 14 according to embodiment 1. Pixel 14 includes a semiconductor substrate 31, a charge detection circuit 25, and a photodetector 10. The semiconductor substrate 31 is, for example, a p-type silicon substrate. The charge detection circuit 25 detects the signal charge captured by the pixel electrode 50 and outputs a signal voltage. The charge detection circuit 25 includes an amplifying transistor 11, a reset transistor 12, and an address transistor 13. The charge detection circuit 25 is disposed on the semiconductor substrate 31.

[0076] The amplifying transistor 11 includes an n-type impurity region 41C, an n-type impurity region 41D, a gate insulating layer 38B, and a gate electrode 39B. The n-type impurity region 41C is located within the semiconductor substrate 31 and functions as one of the source and drain electrodes of the amplifying transistor 11. The n-type impurity region 41D is located within the semiconductor substrate 31 and functions as the other of the source and drain electrodes of the amplifying transistor 11. The gate insulating layer 38B is located on the semiconductor substrate 31. The gate electrode 39B is located on the gate insulating layer 38B.

[0077] The reset transistor 12 includes an n-type impurity region 41B, an n-type impurity region 41A, a gate insulating layer 38A, and a gate electrode 39A. The n-type impurity region 41B is located in the semiconductor substrate 31 and functions as one of the source and drain of the reset transistor 12. The n-type impurity region 41A is located in the semiconductor substrate 31 and functions as the other of the source and drain of the reset transistor 12. The gate insulating layer 38A is located on the semiconductor substrate 31. The gate electrode 39A is located on the gate insulating layer 38A.

[0078] Address transistor 13 includes an n-type slag region 41D, an n-type slag region 41E, a gate insulating layer 38C, and a gate electrode 39C. The n-type slag region 41E is located within the semiconductor substrate 31 and functions as one of the source and drain terminals of address transistor 13. The n-type slag region 41D is located within the semiconductor substrate 31 and functions as the other of the source and drain terminals of address transistor 13. The gate insulating layer 38C is located on the semiconductor substrate 31. The gate electrode 39C is located on the gate insulating layer 38C.

[0079] The n-type impurity region 41D is shared by the amplifying transistor 11 and the address transistor 13. Thus, the amplifying transistor 11 and the address transistor 13 are connected in series.

[0080] A component isolation region 42 is provided on the semiconductor substrate 31. The component isolation region 42 is provided between adjacent pixels 14 and between the amplifying transistor 11 and the reset transistor 12. The component isolation region 42 provides electrical isolation between adjacent pixels 14 and also suppresses the leakage of signal charge accumulated at the charge accumulation node 24.

[0081] Between the semiconductor substrate 31 and the photodetector 10, interlayer insulating layers 43A, 43B, and 43C are stacked sequentially from bottom to top. Inserts 45A, 45B, and 47A, and wiring 46A are embedded in interlayer insulating layer 43A. Wiring 46B and insert 47B are embedded in interlayer insulating layer 43B. Wiring 46C and insert 47C are embedded in interlayer insulating layer 43C.

[0082] Plug 45A is connected to an n-type impurity region 41B, which serves as one of the source and drain electrodes of the reset transistor 12. Plug 45B is connected to the gate electrode 39B of the amplifying transistor 11. Wiring 46A connects plug 45A and plug 45B. Therefore, the n-type impurity region 41B of the reset transistor 12 is electrically connected to the gate electrode 39B of the amplifying transistor 11. In addition, wiring 46A is electrically connected to the pixel electrode 50 via plugs 47A, 46B, 47C, and 47C.

[0083] The photodetector 10 is located on the interlayer insulating layer 43C. In the photodetector 10, the photoelectric conversion layer 51 is located between the counter electrode 52 and the pixel electrode 50. The pixel electrode 50 is located closer to the semiconductor substrate 31 than the counter electrode 52. Specifically, the pixel electrode 50 is located on the interlayer insulating layer 43C.

[0084] In Embodiment 1, interlayer insulating layers 43A, 43B, and 43C comprise oxides. Specifically, the oxides are silicon oxides, more specifically, silicon dioxide (SiO2). More specifically, the silicon dioxide (SiO2) is obtained based on tetraethoxysilane (TEOS). The silicon oxide may be silicon oxynitride. Additionally, interlayer insulating layers 43A, 43B, and 43C may also comprise nitrides. Specifically, the nitride may be silicon nitride.

[0085] In this embodiment, the photoelectric conversion layer 51 is an organic film. Specifically, the photoelectric conversion layer 51 includes an organic semiconductor. Known organic p-type semiconductors and organic n-type semiconductors can be used.

[0086] In this embodiment, the counter electrode 52 is transparent to the light to be detected. Furthermore, the counter electrode 52 comprises a conductive semiconductor. For example, the counter electrode 52 comprises indium tin oxide (ITO).

[0087] In this embodiment, the pixel electrode 50 comprises a metal. The metal may include, for example, at least one selected from the group consisting of aluminum and copper. The pixel electrode 50 may also be polycrystalline silicon doped with impurities and endowed with conductivity.

[0088] exist Figure 2 In this example, the photodetector 10 also includes a protective film 119 and a protective film 120. The protective film 119 covers at least a portion of the upper surface of the counter electrode 52. The protective film 120 covers at least a portion of the upper surface of the protective film 119.

[0089] exist Figure 2 In this example, pixel 14 also includes a color filter 53 and a microlens 54. The color filter 53 is located on the photodetector 10. The microlens 54 is located on the color filter 53.

[0090] In this embodiment, the photoelectric conversion layer 51 of each pixel 14 is contained in a film connected together. The opposing electrode 52 of each pixel 14 is contained in an electrode connected together. On the other hand, the pixel electrodes 50 of each pixel 14 are isolated from each other.

[0091] The photoelectric conversion layer 51 of each pixel 14 can be isolated from each other. The opposing electrode 52 of each pixel 14 can also be isolated from each other.

[0092] In this embodiment, the pixel array 101 detects charge based on photoelectric conversion. Specifically, the photoelectric conversion layer 51 generates electron-hole pairs according to the intensity of the incident light. One of the holes and electrons is detected as a signal charge. Therefore, the incident light incident on the photoelectric conversion layer 51 is detected.

[0093] In a modified example, the capacitance of the photoelectric conversion layer changes according to the intensity of the incident light. This change is detected. Thus, incident light directed towards the photoelectric conversion layer is detected. For example, a pixel array including such a photoelectric conversion layer is disclosed in Patent Document 3.

[0094] (Structure of a pixel array) Figure 3A and Figure 3B These are cross-sectional and top views of the pixel array 101 according to Embodiment 1, respectively. Hereinafter, the semiconductor substrate 31, interlayer insulating layer 43A, interlayer insulating layer 43B, and interlayer insulating layer 43C will sometimes be collectively referred to as substrate 100. Furthermore, the photodetector 10 includes a plurality of insulating films 130, but... Figure 3A and Figure 3B The illustration of insulating film 130 is omitted.

[0095] exist Figure 3A In this context, direction D1 is the vertical direction, and direction D2 is the lateral direction. The vertical direction D1 and the lateral direction D2 are orthogonal to each other. In embodiment 1, the vertical direction D1 is the thickness direction of the photoelectric conversion layer 51. Figure 3A In the diagram, the central axis 150 is an axis that passes through the geometric center of the photoelectric conversion layer 51 in the plan view and extends in a straight line in the vertical direction D1.

[0096] The pixel array 101 includes a plurality of control electrodes 112 and a plurality of connection electrodes 115. Within the pixel array 101, a circuit section comprising a plurality of pixel electrodes 50 and a plurality of control electrodes 112 is formed. The connection electrodes 115 are part of the electrode signal line 16.

[0097] Multiple pixel electrodes 50 are located on substrate 100. A photoelectric conversion layer 51 covers the upper surface 50a of the multiple pixel electrodes 50 and the upper surface 100a of substrate 100 from above. A counter electrode 52 covers the upper surface 51a of photoelectric conversion layer 51 from above, specifically, the entire upper surface 51a. A protective film 119 covers at least a portion of the upper surface 52a of counter electrode 52 from above. The counter electrode 52 and the protective film 119 overlap with the multiple pixel electrodes 50 in a planar view.

[0098] The connecting electrode 115 contacts the control electrode 112 and the counter electrode 52, electrically connecting the control electrode 112 and the counter electrode 52. Specifically, the connecting electrode 115 contacts the upper surface 112a of the control electrode 112 and the side surface 52s of the counter electrode 52. The upper surface 119a of the protective film 119 has a portion that does not overlap with the plurality of pixel electrodes 50 in a planar view, and the connecting electrode 115 contacts this portion.

[0099] A voltage is applied to the counter electrode 52 via the control electrode 112 and the connection electrode 115, and an electric field is applied to the photoelectric conversion layer 51. Under the applied electric field, the photoelectric conversion layer 51 converts light that has passed through the counter electrode 52 and is incident on the photoelectric conversion layer 51 into electric charge.

[0100] In this embodiment, in the plan view, the photoelectric conversion layer 51, the protective film 119, and the counter electrode 52 each have a rectangular shape. The counter electrode 52 has sides 52c, 52d, 52e, and 52f. Sides 52c, 52d, 52e, and 52f are the sides of the lower surface 52u of the counter electrode 52.

[0101] The plurality of control electrodes 112 include control electrode 112e and control electrode 112f. The plurality of connection electrodes 115 include connection electrode 115e and connection electrode 115f.

[0102] Control electrode 112e is located near edge 52e. Control electrode 112f is located near edge 52f. Connecting electrode 115e contacts the upper surface 112a of control electrode 112e and the side surface 52s of counter electrode 52. Connecting electrode 115f contacts the upper surface 112a of control electrode 112f and the side surface 52s of counter electrode 52. Control electrode 112e, control electrode 112f, and counter electrode 52 are electrically connected through connecting electrode 115e and connecting electrode 115f. Protective film 120 covers connecting electrode 115, protective film 119, and substrate 100 from above.

[0103] The material used for the control electrode 112 can be any material exemplified as the material for the pixel electrode 50. In this embodiment, the material of the control electrode 112 is the same as the material of the pixel electrode 50.

[0104] In this embodiment, the connecting electrode 115 has light-shielding properties. The connecting electrode 115 may contain at least one material selected from the group consisting of metals and metal compounds. In one specific example, the connecting electrode 115 contains at least one material selected from the group consisting of titanium, titanium nitride, aluminum, silicon, copper-added aluminum (AlSiCu), copper, and tungsten. The connecting electrode 115 may also contain an alloy containing at least two of the materials listed in the above specific examples. The connecting electrode 115 may have a single-layer structure or a multilayer structure.

[0105] In embodiment 1, the protective film 119 is an insulating film. The protective film 119 may comprise at least one material selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, organic polymers, and inorganic polymers. The protective film 119 may be transparent to light of the wavelength to be detected by the pixel array 101. The protective film 119 may have a single-layer structure or a multilayer structure. In one specific example, the protective film 119 is a multilayer film in which a silicon oxynitride layer is disposed on an aluminum oxide layer.

[0106] The materials and structures exemplified for the materials and structures used for the protective film 119 can be used as the protective film 120. The material of the protective film 120 can be the same as that of the protective film 119. The structure of the protective film 120 can be the same as that of the protective film 119.

[0107] Figure 4 This is a partial cross-sectional view of the pixel array 101 according to the first structural example of Embodiment 1. In the following text, reference will be made to... Figure 4 The pixel array 101 according to this embodiment is further described.

[0108] like Figure 4 As shown, the photodetector 10 includes an insulating film 130. The side surface 51s of the photoelectric conversion layer 51 has a lowermost end 51j. The insulating film 130 covers at least the portion of the side surface 51s including the lowermost end 51j. The connecting electrode 115 contacts the side surface 52s of the opposing electrode 52 and is opposed to the side surface 51s of the photoelectric conversion layer 51 via the insulating film 130. According to the above structure, an electrical connection between the connecting electrode 115 and the opposing electrode 52 can be established, and discontinuities such as the lowermost end 51j are protected by the insulating film 130. This improves the reliability of the pixel array 101.

[0109] For example, with the insulating film 130 according to the above structure, moisture, gas, etc., are difficult to penetrate to the photoelectric conversion layer 51. Furthermore, in the manufacturing method of the imaging device 190 according to the example, the photoelectric conversion layer 51 is patterned by dry etching. In this case, the portion of the side 51s including the lowermost end 51j may be damaged by dry etching. However, with the insulating film 130 according to the above structure, even if the aforementioned portion is damaged, it can be protected by the insulating film 130. These improvements can enhance the reliability of the pixel array 101.

[0110] The angle between the lower surface 51u of the photoelectric conversion layer 51 and the side surface 51s of the photoelectric conversion layer 51 is represented by θ. In Embodiment 1, the angle θ is 70° or more and 90° or less. Specifically, the angle θ is 80° or more and 90° or less. For example, this range of angle θ can be formed when the photoelectric conversion layer 51 is patterned by dry etching.

[0111] When the angle between the lower surface and the side surface of the photoelectric conversion layer is close to 90°, stress may be applied to the connection electrodes extending along the lower surface and the side surface. (See below for reference.) Figure 21 This point will be explained. In the reference configuration, the angle between the lower surface 951u of the photoelectric conversion layer 951 and the side surface 951s of the photoelectric conversion layer 951 is marked as... In the reference method, angle The angle is between 70° and 90°. In this case, the connecting electrode 915 is bent approximately vertically in the region 915n near the lowermost end 951j of the side surface 951s of the photoelectric conversion layer 951. This applies stress to the nearby region 915n, potentially causing cracks. Liquids such as water can be trapped in these cracks. These traps can lead to an increase in leakage current and a decrease in withstand voltage in the pixel array 901.

[0112] In this regard, in Embodiment 1, the insulating film 130 is located between the lowermost end 51j of the side surface 51s of the photoelectric conversion layer 51 and the connecting electrode 115. This intervention makes the bending angle of the connecting electrode 115 in the vicinity of the lowermost end 51j more gradual. Therefore, the stress applied to the vicinity 115n can be reduced. This stress-relieving effect can suppress the formation of cracks in the vicinity 115n. This can improve the reliability of the pixel array 101.

[0113] like Figure 4 As shown, with the lower surface 51u of the photoelectric conversion layer 51 as a reference, the insulating film 130 has a first portion 51m located at a first height H1 and a second portion 51n located at a second height H2. The second height H2 is a height higher than the first height H1. Figure 4 In the example, the lateral direction D2 of the second portion 51n is smaller than the lateral direction D2 of the first portion 51m. This structure is advantageous from the viewpoint of mitigating the bending angle of the connecting electrode 115 and suppressing the generation of cracks in the connecting electrode 115.

[0114] Specifically, in Figure 4 In the example, the insulating film 130 has a region whose size in the lateral direction D2 decreases as it moves upward. Alternatively, the insulating film 130 may extend entirely over its vertical direction D1, with the size in the lateral direction D2 decreasing as it moves upward.

[0115] At the same height as the lower surface 51u of the photoelectric conversion layer 51, the thickness of the insulating film 130 is, for example, more than 5 nm and less than 100 nm, typically about 30 nm.

[0116] The insulating film 130 has an uppermost end 130k. Here, the height of the uppermost end 130k with reference to the lower surface 51u of the photoelectric conversion layer 51 is marked as height Ht, the thickness of the photoelectric conversion layer 51 is marked as thickness T1, and the thickness of the counter electrode 52 is marked as thickness T2.

[0117] In embodiment 1, the height Ht is less than the sum of thickness T1 and thickness T2. In the first example, the height Ht is greater than 80% and less than 100% of the sum of thickness T1 and thickness T2. In the second example, the height Ht is greater than 90% and less than 100% of the sum of thickness T1 and thickness T2. The height Ht can also be the same as the thickness T1.

[0118] In one example, the insulating film 130 does not have a portion that contacts the side 52s of the counter electrode 52. According to this example, it is easy to reduce the contact resistance between the connecting electrode 115 and the counter electrode 52.

[0119] In Embodiment 1, the insulating film 130 comprises an oxide. Specifically, the oxide is a silicon oxide, more specifically, silicon dioxide (SiO2). More specifically, the silicon dioxide (SiO2) is obtained based on tetraethoxysilane (TEOS). The silicon oxide may be silicon oxynitride. Alternatively, the insulating film 130 may also comprise a nitride. Specifically, the nitride may be silicon nitride.

[0120] Figures 5A to 5D This is an explanatory diagram of a manufacturing method example (hereinafter referred to as the first manufacturing method example) of the pixel array 101 according to the first structural example of Embodiment 1.

[0121] Production Figure 5A The structure 201 shown includes a photoelectric conversion layer 51, a counter electrode 52, and a protective film 119. The counter electrode 52 is located on the photoelectric conversion layer 51. The protective film 119 is located on the counter electrode 52.

[0122] Next, resist 252 is coated onto the protective film 119 of structure 201. Then, the protective film 119, the counter electrode 52, and the photoelectric conversion layer 51 are patterned using photolithography with the resist 252. This yields... Figure 5B The structure shown is 202.

[0123] In the first manufacturing method example, the photolithography includes: patterning the protective film 119 by dry etching using a photoresist 252 as a mask; patterning the counter electrode 52 by dry etching using a photoresist 252 as a mask; and patterning the photoelectric conversion layer 51 by dry etching using a photoresist 252 as a mask. If the photoelectric conversion layer 51 contains organic matter, an oxygen-containing etching gas can be used for the dry etching of the photoelectric conversion layer 51.

[0124] Next, the resist 252 of the protective film 119 is removed. Then, layer 253 is deposited on the structure 202 and the sides of the structure 202. This yields... Figure 5C The structure shown is 203.

[0125] Next, layer 253 is processed into an insulating film 130. Thus, the following is obtained: Figure 5D The structure 204 is shown. Specifically, this process is performed by etching back. By adjusting the etching back time, an insulating film 130 extending to a desired extent can be formed. Specifically, the insulating film 130 can be formed such that part or all of the side surface 52s of the counter electrode 52 is not covered by the insulating film 130.

[0126] Then, connecting electrodes 115 are formed on and on the side of structure 204.

[0127] about Figure 5C and Figure 5D Specifically, the insulating film 130 can be formed using the same method as that used to form the sidewalls of a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).

[0128] In a specific example, in structure 201, the photoelectric conversion layer 51 is an organic film with a thickness of 500 nm, the counter electrode 52 is an ITO film with a thickness of 30 nm, and the protective film 119 is an ALO film with a thickness of 50 nm. In structure 202, the photoresist 252 has a thickness of 2 μm. In structure 203, the layer 253 has a thickness of 100 nm.

[0129] Figure 6A and Figure 6B This is an explanatory diagram of a variation of the first manufacturing method example. In the variation, the changes are... Figure 5B The process. Specifically, in the variant example, with Figure 5B Similarly, a resist 252 is applied to the protective film 119. The protective film 119 is then patterned by dry etching using the resist 252 as a mask. This yields... Figure 6A The structure 282 is shown. Next, the resist 252 is removed. Then, the counter electrode 52 is patterned by dry etching using the patterned protective film 119 as a hard mask. Thus, the desired structure is obtained. Figure 6B The structure 292 is shown. Next, the photoelectric conversion layer 51 is patterned by dry etching using the patterned protective film 119 as a hard mask. Thus, the following is obtained: Figure 5B The structure shown is 202.

[0130] Figure 7 This is a partial cross-sectional view of the pixel array 101 according to the second structural example of Embodiment 1.

[0131] exist Figure 7 In the example, the photoelectric conversion layer 51, the insulating film 130, and the connecting electrode 115 are located on the substrate insulating film 140. The insulating film 130 is a stacked film.

[0132] The substrate insulating film 140 has a recess 293. The side surface 130s of the insulating film 130 and the dividing surface 293s that divides the recess 293 form a continuous surface. The depth Dc of the recess 293 relative to the lower surface 51u of the photoelectric conversion layer 51 is, for example, 5 nm or more and 50 nm or less.

[0133] The material used for the base insulating film 140 can be the same as that used for the insulating film 130. Specifically, in this modified example, the material of the base insulating film 140 is the same as that of the insulating film 130. The base insulating film 140 may correspond to the interlayer insulating layer 43C.

[0134] Figures 8A to 8C yes Figure 7 An explanatory diagram of a manufacturing method example (hereinafter referred to as the second manufacturing method example) of the pixel array 101 of the second structural example shown.

[0135] Production Figure 8A The structure 301 is shown. In structure 301, the photoelectric conversion layer 51 is located on the substrate insulating film 140, the counter electrode 52 is located on the photoelectric conversion layer 51, and the protective film 119 is located on the counter electrode 52.

[0136] Next, in the second manufacturing method embodiment, the protective film 119, the counter electrode 52, and the photoelectric conversion layer 51 are patterned. This patterning includes dry etching of the protective film 119, dry etching of the counter electrode 52, and dry etching of the photoelectric conversion layer 51. The dry etching of the photoelectric conversion layer 51 according to the second manufacturing method embodiment not only patterns the photoelectric conversion layer 51 but also reduces the thickness of the substrate insulating film 140. That is, over-etching is performed.

[0137] The photoelectric conversion layer 51 is formed sequentially in a time sequence through dry etching. Figure 8B The structure 302 shown and Figure 8C The structure 303 is shown. (As shown) Figure 8C As shown, through over-etching, a portion of the substrate insulating film 140 is removed and dispersed toward the side 51s of the photoelectric conversion layer 51. In this way, the substrate insulating film 140 retreats downward to form a depression 293, and the removed portion accumulates on the side 51s, thereby forming the insulating film 130.

[0138] Alternatively, a film can be formed by scattering a portion of the substrate insulating film 140 to cover at least a portion of the side surface 52s of the counter electrode 52, and then removing the film from that portion.

[0139] After obtaining structure 303, connecting electrodes 115 are formed on structure 303 and on the side of structure 303.

[0140] Hereinafter, other embodiments will be described. The same reference numerals will be used to denote common elements in the embodiments and their modifications already described and those described later, and their descriptions may sometimes be omitted. The descriptions of the various embodiments and their modifications can be applied to each other as long as they do not contradict each other technically. The various embodiments and their modifications can also be combined with each other as long as they do not contradict each other technically.

[0141] (Implementation Method 2) Figure 9 This is a partial cross-sectional view of the pixel array 101 according to Embodiment 2.

[0142] In Embodiment 2, compared to Embodiment 1, the ratio of height Ht to the sum of thickness T1 and thickness T2 is smaller. Therefore, in Embodiment 2, compared to Embodiment 1, it is less likely that the electrical connection between the connecting electrode 115 and the counter electrode 52 will be obstructed by the insulating film 130. This is advantageous from the viewpoint of stabilizing the contact resistance of the connecting electrode 115 and the counter electrode 52. For example, this advantage can be greatly enjoyed when mass-producing the imaging device 190.

[0143] In the first example of Embodiment 2, the height Ht is 80% or less of the sum of thickness T1 and thickness T2, specifically 10% or more and 80% or less. In the second example of Embodiment 2, the height Ht is 90% or less of the sum of thickness T1 and thickness T2, specifically 10% or more and 90% or less. In Embodiment 2, the side surface 52s of the counter electrode 52 does not contact the insulating film 130. The uppermost end 51k of the side surface 51s of the photoelectric conversion layer 51 does not contact the insulating film 130.

[0144] (Implementation Method 3) Figure 10 This is a partial cross-sectional view of the pixel array 101 according to Embodiment 3.

[0145] In embodiment 3, at least the portion of the side surface 51s of the photoelectric conversion layer 51, including the uppermost end 51k, recedes inward as it advances upward. Here, "inward" refers to the portion in the lateral direction D2 that faces the central axis 150 of the photoelectric conversion layer 51. Figure 3A The direction of ). As described above, in embodiment 3, at least the portion of the side surface 51s of the photoelectric conversion layer 51, including the uppermost end 51k, has a positive cone shape.

[0146] In embodiment 3, the side surface 51s of the photoelectric conversion layer 51 has a recess 380 adjacent to the counter electrode 52. That is, the recess 380 is divided by the side surface 51s of the photoelectric conversion layer 51. Specifically, the recess 380 is divided by the side surface 51s of the photoelectric conversion layer 51 and the lower surface 52u of the counter electrode 52.

[0147] In embodiment 3, a portion of the connecting electrode 115 is located within the recess 380. Furthermore, this portion of the connecting electrode 115 contacts the lower surface 52u of the counter electrode 52. This structure is advantageous from the viewpoint of increasing the contact area between the connecting electrode 115 and the counter electrode 52 and reducing the contact resistance between them.

[0148] In the manufacturing method of the pixel array 101 according to the example of Embodiment 3, the recess 380 can be formed as follows: The dry etching for patterning the photoelectric conversion layer 51 includes etching components in the lateral direction D2. In the dry etching, the counter electrode 52 is essentially not etched, and the portion of the side of the photoelectric conversion layer 51 near the counter electrode 52 is exposed to the etching gas for a prolonged period. These effects interact to form the recess 380. The dry etching can be isotropic etching.

[0149] In one specific example, during dry etching for patterning the photoelectric conversion layer 51, a space is formed on the underside of the counter electrode 52 and the outside of the photoelectric conversion layer 51, exposing the side surface of the photoelectric conversion layer 51. Etching gas is trapped in this space. Therefore, it is difficult for fresh etching gas to spread from the side above the counter electrode 52 into this space. This allows the photoelectric conversion layer 51 to be removed from the outside while reducing damage to the side surface caused by plasma or the like during dry etching. Therefore, a pixel array 101 with reduced leakage current can be fabricated.

[0150] Regarding the structure and formation method of the recess 380, see, for example, Patent Document 2.

[0151] (Implementation Method 4) Figure 11 This is a partial cross-sectional view of the pixel array 101 according to Embodiment 4.

[0152] In embodiment 4, at least the portion of the side surface 51s of the photoelectric conversion layer 51, including the lowermost end 51j, recedes inward as it moves upward. As described above, the portion of the side surface 51s of the photoelectric conversion layer 51, including at least the lowermost end 51j, has a conical shape.

[0153] The insulating film 130 covers at least the conical portion of the side surface 51s, including the lowermost end 51j. The connecting electrode 115 contacts the side surface 52s of the opposing electrode 52 and is opposed to the side surface 51s of the photoelectric conversion layer 51 via the insulating film 130. According to this structure, the bending angle of the connecting electrode 115 is reduced, which can suppress the generation of cracks in the connecting electrode 115. This can improve the reliability of the pixel array 101.

[0154] Specifically, in Embodiment 4, the entire side surface 51s of the photoelectric conversion layer 51 recedes inward as it moves upward. As described above, in Embodiment 4, the entire side surface 51s of the photoelectric conversion layer 51 has a conical shape.

[0155] In embodiment 4, the angle θ is, for example, 30° or more and less than 90°, typically around 60°.

[0156] Figure 12A and Figure 12B This is an explanatory diagram of a manufacturing method example of pixel array 101 according to Embodiment 4.

[0157] In the dry etching of the photoelectric conversion layer 51 according to the manufacturing method example, an etching gas with deposition characteristics can be used. Through such dry etching, the photoelectric conversion layer 51 is patterned. Thus, a... Figure 12A The structure 401 is shown. In structure 401, etching is performed while protecting the sides of the photoelectric conversion layer 51. As a result, layer 451 is deposited on the sides 51s of the photoelectric conversion layer 51. Then, layer 451 is removed by cleaning. Thus, a [structure / details] is obtained. Figure 12B The structure 402 is shown. In structure 402, the aforementioned portion of the side surface 51s of the photoelectric conversion layer 51, specifically, the side surface 51s is generally in a conical shape.

[0158] (Implementation Method 5) Figure 13 This is a partial cross-sectional view of the pixel array 101 according to Embodiment 5.

[0159] In embodiment 5, the photoelectric conversion layer 51 includes a first layer 51p and a second layer 51q. The second layer 51q is located closer to the counter electrode 52 than the first layer 51p. In embodiment 5, at least one of the following relationships (x) and (y) is selected: • Relationship (x) is the relationship that the density of the first layer 51p is less than the density of the second layer 51q.

[0160] • Relationship (y) is the relationship between the binding energy of molecules in the first layer 51p and the binding energy of molecules in the second layer 51q.

[0161] In embodiment 5, the second layer 51q generates electron-hole pairs through photoelectric conversion. The first layer 51p is a carrier blocking layer. The carrier blocking layer can be, for example, an electron blocking layer that blocks electrons, a hole blocking layer that blocks holes, etc. The first layer 51p can suppress leakage current.

[0162] The photoelectric conversion layer 51 may include a third layer. The third layer is located closer to the counter electrode 52 than the second layer 51q. The third layer is a carrier blocking layer. The carrier blocking layer may be, for example, an electron blocking layer that blocks electrons, a hole blocking layer that blocks holes, etc. The third layer can suppress leakage current.

[0163] (Implementation Method 6) Figure 14 This is a partial cross-sectional view of the pixel array 101 according to the first structural example of Embodiment 6. Figure 15 This is a partial cross-sectional view of the pixel array 101 according to the second structural example of Embodiment 6.

[0164] exist Figure 14 In the first structural example shown, the side 51s of the photoelectric conversion layer 51 has a recess 601 adjacent to the lowermost end 51j. Figure 15 In the second structural example shown, the side 51s of the photoelectric conversion layer 51 has a recess 602 adjacent to the lowermost end 51j.

[0165] exist Figure 14 In the first structural example shown, a recess 601 is defined on the side 51ps of the first layer 51p. In contrast, Figure 15 In the second structural example shown, a recess 602 is defined by the side surface 51ps of the first layer 51p. Figure 15 In the second structural example shown, the side 51ps is an inverted cone shape.

[0166] Specifically, Figure 14 In the first structural example shown, the side surface 51ps of the first layer 51p is separately divided into recesses 601. In contrast, Figure 15 In the second structural example shown, the first layer 51p is located on layer 701, and the side 51ps of the first layer 51p cooperates with layer 612 to divide the recess 602. Layer 612 is, for example, an interlayer insulating layer 43C, or a substrate insulating film 140.

[0167] Similar to Embodiment 5, in Embodiment 6, at least one of relation (x) and relation (y) is true. In this case, during the dry etching of the photoelectric conversion layer 51, the etching rate of the first layer 51p can be higher than the etching rate of the second layer 51q. Therefore, recesses 601 and 602 can be formed.

[0168] If a portion of the connecting electrode is located within a recess in the photoelectric conversion layer, significant stress may be applied to the connecting electrode. However, in Embodiment 6, the insulating film 130 is positioned between the side 51s of the photoelectric conversion layer 51 and the connecting electrode 115, such that a portion of the insulating film 130 is located within a recess 601 or 602. This intervention mitigates the stress applied to the vicinity 115n of the connecting electrode 115. This stress mitigation helps suppress the formation of cracks in the vicinity 115n. This improves the reliability of the pixel array 101.

[0169] (Implementation Method 7) Figure 16 This is a cross-sectional view of the pixel array 101 according to Embodiment 7.

[0170] exist Figure 16 In this example, the connecting electrode 115 is light-shielding, covering the upper surface 119a of the protective film 119, and has a portion 115a that overlaps with at least one pixel electrode 50 in a planar view. In the pixel 14x to which the pixel electrode 50 that overlaps with the portion 115a in the planar view belongs, the connecting electrode 115 functions as a light-shielding film. Therefore, the pixel 14x can be used to obtain optical black.

[0171] The technology of Implementation 7 can be applied to any of Implementation 1 to Implementation 6.

[0172] (Planar structure of pixel arrays in embodiments 1 to 7) Figure 17 This is a schematic exploded plan view of the pixel array 101 according to embodiments 1 to 7.

[0173] For ease of drawing, Figure 17 This illustrates a case where the angle θ between the lower surface 51u and the side surface 51s of the photoelectric conversion layer 51 is less than 90°. The angle θ can be 90°, less than 90°, or greater than 90°. Furthermore, in... Figure 17 For ease of illustration, the case where the angle between the lower surface 52u and the side surface 52s of the counter electrode 52 is less than 90° is shown. This angle can be 90°, less than 90°, or greater than 90°. These points are for... Figure 18B and Figure 19B The same applies.

[0174] In embodiments 1 to 7 described above, the lower surface 52u of the counter electrode 52 has a rectangular shape. The lower surface 52u of the counter electrode 52 has sides 52c, 52d, 52e, and 52f. Sides 52c and 52d are opposite to each other. Sides 52e and 52f are opposite to each other.

[0175] In embodiments 1 to 7, the side surface 52s of the counter electrode 52 includes a side surface portion 52sc extending from side 52c, a side surface portion 52sd extending from side 52d, a side surface portion 52se extending from side 52e, and a side surface portion 52sf extending from side 52f.

[0176] Side portion 52sc and side portion 52sd are opposite each other. Side portion 52se and side portion 52sf are opposite each other.

[0177] In embodiments 1 to 7, the side surface 51s of the photoelectric conversion layer 51 includes: Side section 51sc, Side section 51sd, Side section 51se, and Side profile 51sf.

[0178] Side portion 51sc and side portion 51sd are side portions facing each other. Side portion 51se and side portion 51sf are side portions facing each other.

[0179] In embodiments 1 to 7, the plurality of connecting electrodes 115 include connecting electrode 115e and connecting electrode 115f. The plurality of insulating films 130 include insulating film 130e and insulating film 130f.

[0180] The terminology in Embodiments 1 to 7 can be appropriately replaced with the terminology in "the structure of the planar view of the pixel array in Embodiments 1 to 7".

[0181] For example, possible replacements include replacing "side 51s" with "side part 51se", replacing "connecting electrode 115" with "connecting electrode 115e", replacing "side 52s" with "side part 52se", and replacing "insulating film 130" with "insulating film 130e".

[0182] This substitution leads to, for example, the following description. Specifically, the side portion 51se of the photoelectric conversion layer 51 has a lowermost end. An insulating film 130e covers at least the portion of the side portion 51se that includes the lowermost end. The connecting electrode 115e contacts the side portion 52se of the opposing electrode 52 and is opposed to the side portion 51se of the photoelectric conversion layer 51 via the insulating film 130e.

[0183] Additionally, possible replacements include, for example, replacing "side 51s" with "side portion 51sf", replacing "connecting electrode 115" with "connecting electrode 115f", replacing "side 52s" with "side portion 52sf", and replacing "insulating film 130" with "insulating film 130f".

[0184] This substitution leads to, for example, the following description. Specifically, the side portion 51sf of the photoelectric conversion layer 51 has a lowermost end. An insulating film 130f covers at least the portion of the side portion 51sf that includes the lowermost end. The connecting electrode 115f contacts the side portion 52sf of the opposing electrode 52 and is opposed to the side portion 51sf of the photoelectric conversion layer 51 via the insulating film 130f.

[0185] (Implementation Method 8) Figure 18A This is a top view of the pixel array 101 according to embodiment 8. Figure 18B This is a schematic exploded plan view of the pixel array 101 according to embodiment 8.

[0186] In embodiment 8, in a plan view, a connecting electrode 115 has a shape that opens in one direction, specifically, a rectangular or square shape that is missing one side.

[0187] In embodiment 8, a connecting electrode 115 includes: Electrode portion 815c that contacts the side portion 52sc of the counter electrode 52 The electrode portion 815d that contacts the side portion 52sd of the counter electrode 52, and The electrode portion 815f is in contact with the side portion 52sf of the counter electrode 52.

[0188] This structure is advantageous from the viewpoint of increasing the contact area between the connecting electrode 115 and the counter electrode 52 and reducing the contact resistance between them.

[0189] In embodiment 8, an insulating film 130 includes an insulating portion 830c, an insulating portion 830d, and an insulating portion 830f.

[0190] The terminology used in Embodiments 1 to 7 can be appropriately replaced with the terminology used in Embodiment 8.

[0191] For example, possible replacements include replacing "side 51s" with "side 51sc", replacing "connecting electrode 115" with "electrode 815c", replacing "side 52s" with "side 52sc", and replacing "insulating film 130" with "insulating part 830c".

[0192] This substitution leads to, for example, the following description: The side portion 51sc of the photoelectric conversion layer 51 has a lowermost end. The insulating portion 830c covers at least the portion of the side portion 51sc that includes the lowermost end. The electrode portion 815c contacts the side portion 52sc of the opposing electrode 52 and is opposed to the side portion 51sc of the photoelectric conversion layer 51 via the insulating portion 830c.

[0193] Additionally, possible replacements include, for example, replacing "side 51s" with "side 51sd", replacing "connecting electrode 115" with "electrode portion 815d", replacing "side 52s" with "side 52sd", and replacing "insulating film 130" with "insulating portion 830d".

[0194] This substitution leads to, for example, the following description. That is, the side portion 51sd of the photoelectric conversion layer 51 has a lowermost end. The insulating portion 830d covers at least the portion of the side portion 51sd that includes the lowermost end. The electrode portion 815d contacts the side portion 52sd of the counter electrode 52 and is opposed to the side portion 51sd of the photoelectric conversion layer 51 via the insulating portion 830d.

[0195] Additionally, possible replacements include, for example: Replacement from "Side 51s" to "Side Part 51sf" Replacement from "connecting electrode 115" to "electrode section 815f", The replacement from "side 52s" to "side part 52sf", and Replacement from "insulating film 130" to "insulating part 830f".

[0196] This substitution leads to, for example, the following description: The side portion 51sf of the photoelectric conversion layer 51 has a lowermost end. The insulating portion 830f covers at least the portion of the side portion 51sf that includes the lowermost end. The electrode portion 815f contacts the side portion 52sf of the counter electrode 52 and is opposed to the side portion 51sf of the photoelectric conversion layer 51 via the insulating portion 830f.

[0197] (Implementation Method 9) Figure 19A This is a top view of the pixel array 101 according to embodiment 9. Figure 19B This is a schematic exploded plan view of the pixel array 101 according to embodiment 9.

[0198] In embodiment 9, in a plan view, a connecting electrode 115 is a closed frame, specifically a rectangular or square shape.

[0199] In embodiment 9, a connecting electrode 115 includes: Electrode portion 815c that contacts the side portion 52sc of the counter electrode 52 The electrode portion 815d that contacts the side portion 52sd of the counter electrode 52 The electrode portion 815e that contacts the side portion 52se of the opposing electrode 52, and The electrode portion 815f is in contact with the side portion 52sf of the counter electrode 52.

[0200] This structure is advantageous from the viewpoint of increasing the contact area between the connecting electrode 115 and the counter electrode 52 and reducing the contact resistance between them.

[0201] In embodiment 9, an insulating film 130 includes: Insulation part 830c, Insulation part 830d, Insulation part 830e, and Insulation part 830f.

[0202] The terminology in Embodiments 1 to 7 can be appropriately replaced with the terminology in Embodiment 9.

[0203] For example, possible substitutions include those described in Implementation 8.

[0204] Opposite to sd.

[0205] Additionally, possible replacements include, for example: Replacement from "Side 51s" to "Side Part 51se" Replacement from "connecting electrode 115" to "electrode section 815e" The replacement from "Side 52s" to "Side 52se", and Replacement from "insulating film 130" to "insulating part 830e".

[0206] This substitution leads to, for example, the following description. Specifically, the side portion 51se of the photoelectric conversion layer 51 has a lowermost end. The insulating portion 830e covers at least the portion of the side portion 51se that includes the lowermost end. The electrode portion 815e contacts the side portion 52se of the opposing electrode 52 and is opposed to the side portion 51se of the photoelectric conversion layer 51 via the insulating portion 830e.

[0207] Specifically, in embodiment 9, the connecting electrode 115 is in continuous contact with the side surface 52s of the opposing electrode 52 in the direction surrounding the side surface 52s. Additionally, the insulating portion 830e is in continuous contact with the lowermost end of the side surface 51s of the photoelectric conversion layer 51 in the direction surrounding the side surface 51s.

[0208] Although the illustrations are omitted, the connecting electrode 115f and the insulating film 130f can also be omitted from the pixel array 101 of Embodiments 1 to 7. Additionally, the connecting electrode 115e and the insulating film 130e can also be omitted from the pixel array 101 of Embodiments 1 to 7.

[0209] (Implementation Method 10) Reference Figure 20 The camera system 1000 of this embodiment is described.

[0210] Figure 20 A schematic example of the structure of a camera system 1000 according to this embodiment is shown. The camera system 1000 includes a lens optical system 1100, an imaging device 1200, a system controller 1300, and a camera signal processing circuit 1400. The camera system 1000 may be, for example, a smartphone, a digital camera, a camcorder, or a vehicle-mounted camera.

[0211] The lens optical system 1100 may include, for example, an autofocus lens, a lens group including a zoom lens, and an aperture. The lens optical system 1100 focuses light onto the imaging surface of the imaging device 1200. As the imaging device 1200, the imaging device 190 of the embodiments 1 to 9 described above and their variations can be widely used.

[0212] The system controller 1300 controls the overall camera system 1000. The system controller 1300 is typically a semiconductor integrated circuit, such as a CPU (Central Processing Unit).

[0213] The camera signal processing circuit 1400 has the function of processing the output signal from the imaging device 1200. The camera signal processing circuit 1400 receives output data from the imaging device 1200 and performs processes such as gamma correction, color interpolation, spatial interpolation, and automatic white balance. The imaging device 1200 and the camera signal processing circuit 1400 can be implemented as a single semiconductor device. The semiconductor device can be, for example, a so-called SoC (System on a Chip). With such a structure, it is possible to further miniaturize the electronic device that includes the imaging device 1200 as a part. The camera signal processing circuit 1400 is, for example, a DSP (Digital Signal Processor).

[0214] (Supplementary Explanation) According to this disclosure, the following technologies are disclosed.

[0215] (Technology 1) A camera device, comprising: Photoelectric conversion layer; Counter electrode, on the photoelectric conversion layer; An insulating film, covering at least the lowermost portion of the sides of the photoelectric conversion layer; and The electrode is positioned opposite the side of the photoelectric conversion layer via the insulating film and is in contact with the side of the opposing electrode.

[0216] (Technology 2) According to the camera device of technology 1, wherein, With the lower surface of the photoelectric conversion layer as a reference, the height of the uppermost end of the insulating film is less than the sum of the thickness of the photoelectric conversion layer and the thickness of the counter electrode.

[0217] (Technology 3) The camera device according to technology 1 or 2, wherein, The side surface of the photoelectric conversion layer has a first recess adjacent to the counter electrode.

[0218] (Technology 4) The camera device according to any one of techniques 1 to 3, wherein, The portion of the side surface of the photoelectric conversion layer, including the lowest part, is a conical shape.

[0219] (Technology 5) The camera device according to any one of techniques 1 to 4, wherein, The photoelectric conversion layer comprises a first layer and a second layer that is closer to the counter electrode than the first layer. At least one of the following is true: the density of the first layer is less than that of the second layer, and the binding energy of the molecules in the material contained in the first layer is lower than that of the molecules in the material contained in the second layer.

[0220] (Technology 6) The camera device according to any one of techniques 1 to 5, wherein, The side surface of the photoelectric conversion layer has a second recess adjacent to the lowermost end.

[0221] (Technology 7) A camera system, comprising: The camera device according to any one of techniques 1 to 6; The lens optical system focuses light onto the photographic surface of the imaging device; and The camera signal processing circuit processes the output signal from the camera device.

[0222] Industrial applicability The camera device of the present invention can be used for various purposes.

[0223] Symbol Explanation 10. Photodetector 11 Amplifying Transistors 12 Reset Transistors 13 Address Transistors 14, 14x pixels 15 Vertical Scanning Circuit 16 Electrode Signal Lines 17 Vertical signal lines 18 Load Circuit 19-column signal processing circuits 20 Horizontal Signal Readout Circuit 21 Power Wiring 22 Differential Amplifier 23 Feedback Line 24 Charge accumulation nodes 25 Charge Detection Circuit 26 address signal lines 27 Reset signal line 31 Semiconductor substrate 38A, 38B, 38C gate insulating layer 39A, 39B, 39C gate electrodes 41A, 41B, 41C, 41D, 41E n-type impurity regions 42 Component isolation area 43A, 43B, 43C interlayer insulation 45A, 45B, 47A, 47B, 47C plugs 46A, 46B, 46C wiring 50 pixel electrode 50a, 51a, 52a, 100a, 112a, 119a upper surface 51, 951 photoelectric conversion layer 51m and 51n locations 51j, 951j bottom 51k Top 51p First Floor 51ps, 51s, 52s, 130s, 951s, 952s, W (side view) 51q Second layer 51sc, 51sd, 51se, 51sf, 52sc, 52sd, 52se, 52sf Side profile 51u, 52u, 951u lower surface 52, 952 Opposite Electrodes 52c, 52d, 52e, 52f edges 53 Color Filters 54 microlenses 60 Voltage control circuit 100 substrates 101 and 901 pixel arrays 102 Peripheral Circuits 112, 112e, 112f, 115, 115e, 115f, 915 connecting electrodes Part 115a Areas near 115n and 915n 119, 120, 919 protective film 130, 130e, 130f insulating films 130k Top 140 Substrate insulating film 150 central axis 190 and 1200 camera devices Structures 201, 202, 203, 204, 282, 292, 301, 302, 303, 401, 402 252 Corrosion Resist Floors 253, 451, 612, and 701 293, 380, 601, 602, Z depressions 293s dividing surface Electrode sections of 815c, 815d, 815e, and 815f Insulation parts of 830c, 830d, 830e, and 830f 1000 Camera System 1100 Lens Optical System 1300 System Controller 1400 Camera Signal Processing Circuit D1 Up and down directions D2 Lateral direction X Back face Y, Y1, Y2 reference planes

Claims

1. A camera device, comprising: Photoelectric conversion layer; Counter electrode, on the photoelectric conversion layer; An insulating film covering at least the lowermost portion of the sides of the photoelectric conversion layer; as well as The electrode is positioned opposite the side of the photoelectric conversion layer via the insulating film and is in contact with the side of the opposing electrode.

2. The camera device according to claim 1, wherein, With the lower surface of the photoelectric conversion layer as a reference, the height of the uppermost end of the insulating film is less than the sum of the thickness of the photoelectric conversion layer and the thickness of the counter electrode.

3. The camera device according to claim 1 or 2, wherein, The side surface of the photoelectric conversion layer has a first recess adjacent to the counter electrode.

4. The camera device according to claim 1 or 2, wherein, The portion of the side surface of the photoelectric conversion layer, including the lowermost end, is a conical shape.

5. The camera device according to claim 1 or 2, wherein, The photoelectric conversion layer comprises a first layer and a second layer that is closer to the counter electrode than the first layer. At least one of the following is true: the density of the first layer is less than that of the second layer, and the binding energy of the molecules in the material contained in the first layer is lower than that of the molecules in the material contained in the second layer.

6. The camera device according to claim 1 or 2, wherein, The side surface of the photoelectric conversion layer has a second recess adjacent to the lowermost end.

7. A camera system comprising: The camera device according to claim 1 or 2; The lens optical system focuses light onto the photographic surface of the imaging device; and The camera signal processing circuit processes the output signal from the camera device.

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