Numerical control machine tool IO conversion system based on data acquisition control

Abstract

The present application relates to the technical field of electrical control and industrial data acquisition of numerical control machine tools, in particular to a numerical control machine tool IO conversion system based on data acquisition control, comprising a physical IO interface layer, a signal conditioning and double-channel conversion layer, a digital sampling layer and a main control communication layer connected in sequence, and an electromagnetic interference detection module and a power supply monitoring module connected thereto; through interface adaptation, surge protection and pre-filtering of the physical IO signals on the machine tool side, isolation conversion and charge integration sampling are completed through the main and standby photoelectric coupling channels and the integration sampling module, and analog-to-digital conversion, timestamp marking, comparison determination, window determination and channel switching are performed by the digital sampling layer, and finally logical checking, cause determination, degradation processing and interface output are performed by the main control communication layer, realizing high-reliable output of IO state in an interference environment where electromagnetic radiation exceeds the preset threshold.

Description

Technical Field

[0001] This invention relates to the field of electrical control and industrial data acquisition technology for CNC machine tools, specifically to an I / O conversion system for CNC machine tools based on data acquisition and control. Background Technology

[0002] CNC machine tool I / O conversion refers to the acquisition, isolation, conversion, and transmission of digital or continuous signals from the machine tool field, so that the upper control system can identify and process the machine tool's operating status. Current CNC machine tool I / O processing methods typically include front-end interface access, level isolation conversion, and subsequent digital sampling and communication output. However, when performing CNC machine tool I / O conversion based on existing technologies, on the one hand, in environments with electromagnetic interference where the radiation intensity exceeds the preset threshold, surge impact, and multi-level mixed access, the front-end signal is prone to distortion, false triggering, or device damage; on the other hand, existing solutions lack effective monitoring and verification of the internal state during the conversion process, and multi-channel sampling also suffers from timing jitter, difficulty in determining the cause of abnormalities, and decreased reliability after a single point of failure, all of which reduce the accuracy and stability of machine tool I / O status acquisition and output. Summary of the Invention

[0003] The purpose of this invention is to provide a CNC machine tool I / O conversion system based on data acquisition and control, and to solve the following technical problems: To avoid problems such as distortion, false triggering, timing jitter, or single-point failure of front-end signals in electromagnetic interference with radiation intensity exceeding the preset threshold and multi-level mixed access environments, it can achieve deterministic integrity and traceability of the entire link, accurately attribute faults at the component level, and ensure the accuracy and stability of core IO status acquisition and output through multi-level fault tolerance processing.

[0004] The objective of this invention can be achieved through the following technical solutions: The CNC machine tool I / O conversion system based on data acquisition and control includes a physical I / O interface layer, a signal conditioning and dual-channel conversion layer, a digital sampling layer and a main control communication layer connected in sequence, as well as an electromagnetic interference detection module and a power monitoring module connected to the digital sampling layer and the main control communication layer, respectively. In the signal conditioning and dual-channel conversion layer, each IO signal is equipped with a main channel, a backup channel, and an integral sampling module. The main channel and the backup channel respectively include a first optocoupler and a second optocoupler. The integral sampling module is connected to the input-side node and the output-side node of the first optocoupler and the second optocoupler. The digital sampling layer includes an analog-to-digital conversion module, a timestamp module, a comparison and determination module, a window determination module, and a channel switching module; The main control communication layer includes a data receiving module, a relationship checking module, a cause judgment module, a degradation processing module, and an interface output module; the system defines channel status, which includes the main channel normal status, the main channel fault and the backup channel in operation status, and the sampling abnormal status.

[0005] Preferably, the physical I / O interface layer includes an interface adapter module, a surge protection module, and a pre-filtering module; the interface adapter module includes input adapter circuits corresponding to 5V digital signals, 12V digital signals, 24V digital signals, and 4-20mA continuous signals, respectively. The surge protection module includes a gas discharge tube, a transient suppression diode, and a fuse; the pre-filter module includes a common-mode choke and a π-type inductor-capacitor network with a cutoff frequency of 1.2MHz.

[0006] Preferably, the first optocoupler in the main channel and the second optocoupler in the backup channel are heterogeneous optocouplers with different current transmission bit characteristics.

[0007] Preferably, the integral sampling module includes an input-side integral unit, an output-side integral unit, and a sampling window control unit; The relationship checking module is used to detect abnormal wiring status based on a pre-stored mutual exclusion logic relationship configuration table in the same frame of data with the same timestamp, and generates an abnormal wiring flag when a violation of the mutual exclusion logic relationship in the mutual exclusion logic relationship configuration table is detected. The output side integration unit is connected to the output side of the first optocoupler and the second optocoupler. The sampling window control unit controls the sampling window to be 50μs. The integrating capacitors in both the input-side and output-side integrating units are made of high-frequency thermally stable ceramic material with a capacitance of 100pF and a temperature coefficient of no more than ±30ppm / ℃.

[0008] Preferably, the analog-to-digital conversion module of the digital sampling layer includes a parallel sampling module and a data reading module, and the digital sampling layer also includes a field-programmable gate array; the parallel sampling module includes several sets of synchronous sampling successive approximation analog-to-digital conversion modules, each set corresponding to eight IO signals; The data reading module is connected to the analog-to-digital conversion module through multiple independent serial peripheral interface buses; the timestamp module includes a 64-bit free-running counter driven by a 100MHz system clock, with a timestamp resolution of 10ns. Field-programmable gate arrays (FPGAs) are used to perform sampling control, data aggregation and buffer management, and control the interval of data output from all channels in two adjacent frames to be 5 μs.

[0009] Preferably, the digital sampling layer further includes a charge conversion module and a threshold calculation module; the charge conversion module converts the analog-to-digital conversion result corresponding to the input-side integrated charge collected by the input-side integration unit into the input-side integrated charge value according to the pre-calibrated current transfer ratio of each channel. The threshold calculation module determines the verification threshold based on the converted input-side integrated charge, output-side integrated charge, background charge, and interference level coefficient. When the difference between the integrated charge on the input side and the output side is greater than the verification threshold, the comparison and judgment module marks the current sample as an abnormal sample; when the difference is less than or equal to the verification threshold, the current sample is marked as a normal sample. The interference level coefficient is determined by the electromagnetic interference detection module based on the comparison between the detected electromagnetic interference intensity and the intensity classification thresholds pre-stored by the system. The electromagnetic interference detection module includes a loop antenna and a detection circuit installed in the electrical cabinet, which are used to detect the electromagnetic interference intensity and determine the interference level coefficient.

[0010] Preferably, the digital sampling layer further includes a calibration module; the calibration module is used to inject calibration current into the main channel and the backup channel and update the current transfer ratio of each channel; The window judgment module is used to judge the number of consecutive abnormal samples according to the judgment window pre-configured by the system. Different types of IO channels correspond to different judgment windows and fault judgment counts. The judgment window and fault judgment counts are pre-configured and stored by the system. Different types of IO channels are at least one of digital input channels, digital output channels and continuous input channels. The channel switching module is used to switch the faulty channel from the main channel to the backup channel when the channel fails, and write the switching action and fault flag into the preset storage unit.

[0011] Preferably, the data receiving module of the main control communication layer receives frame data sent by the digital sampling layer via industrial Ethernet; The relationship checking module is used to detect abnormal wiring status based on a pre-stored mutual exclusion logic relationship configuration table in the same frame of data with the same timestamp, and to generate an abnormal wiring flag when a violation of the mutual exclusion logic relationship in the mutual exclusion logic relationship configuration table is detected. The cause determination module is used to determine the cause of the fault by combining the integrated charge on the input side, the integrated charge on the output side, the power supply monitoring results, and the electromagnetic interference detection results; the interface output module is used to output the processed IO status data to the host system through an industrial communication protocol based on the transmission control protocol or an open platform communication unified architecture protocol.

[0012] Preferably, the degradation processing module of the main control communication layer includes a capacitance detection unit, a hardware damage judgment unit, a transparent transmission switching unit, a buffer upload unit, a hardware watchdog, and an independent parallel I / O interface; The capacitance detection unit is connected to each integrating capacitor to detect abnormalities in the integrating capacitor and trigger a bypass path. The bypass path includes a backup hardware comparator. When the bypass path is triggered, the transparent switching unit enables the corresponding channel to bypass the integrating sampling module and the analog-to-digital conversion module and output through an independent parallel IO interface. The hardware damage judgment unit is used to determine that a hardware damage anomaly has occurred in the corresponding channel when the analog-to-digital conversion data of the corresponding channel maintains an abnormal sampling mark for multiple consecutive sampling cycles. The pass-through switching unit determines the response status of the field-programmable gate array (FPGA) through heartbeat queries, and drives the hardware watchdog to perform a hard reset of the FPGA when it reaches no response multiple times in a row. The FPGA includes a buffer unit, which is used to buffer a preset number of frame data during the reset of the master control communication layer, and upload them after the master control communication layer recovers.

[0013] The beneficial effects of this invention are: 1. This invention adopts a layered collaborative architecture consisting of a physical I / O interface layer, a signal conditioning and dual-channel conversion layer, a digital sampling layer, and a main control communication layer. Combined with an electromagnetic interference detection module and a power monitoring module, it performs full-link processing of the physical I / O signals on the machine tool side, including interface adaptation, surge protection, pre-filtering, isolation conversion, integral sampling, digital verification, and communication output. This effectively solves the problems of electromagnetic interference with radiation intensity exceeding a preset threshold, surge impact, and front-end signal distortion, false triggering, or device damage in multi-level mixed access environments. 2. This invention sets up a main channel and a backup channel for each IO signal and uses different types of optocouplers to form a heterogeneous redundant path. At the same time, it sets up an integral sampling module on the input and output sides of the optocoupler, and with the help of a micro-current mirror network, a fixed sampling window and a stable material integral capacitor, it transforms the traditional level conversion process into a quantifiable integral charge acquisition process. This ensures that the internal state of the conversion node can be monitored and verified in real time, thereby effectively overcoming the logic misjudgment caused by device aging, temperature drift and threshold drift. 3. This invention, by setting up a parallel sampling module, a timestamp module, a field-programmable gate array, a charge conversion module, a threshold calculation module, and a comparison and judgment module, performs synchronous analog-to-digital conversion, precise time alignment, and dynamic differential verification combined with electromagnetic interference intensity on multiple integrated voltage signals. This can accurately reflect the transmission consistency between the input and output sides, effectively avoiding the timing jitter, transient signal omission, and fixed threshold failure caused by time-division scanning in interference environments where electromagnetic radiation exceeds the preset threshold. Attached Figure Description

[0014] Other features, objects, and advantages of the invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings: Figure 1This is a system block diagram of the CNC machine tool I / O conversion system according to an embodiment of the present invention. Detailed Implementation

[0015] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0016] Please see Figure 1 A CNC machine tool I / O conversion system based on data acquisition and control. It includes a physical I / O interface layer, a signal conditioning and dual-channel conversion layer, a digital sampling layer and a main control communication layer connected in sequence, as well as an electromagnetic interference detection module and a power monitoring module connected to the digital sampling layer and the main control communication layer respectively; In the signal conditioning and dual-channel conversion layer, each IO signal is provided with a main channel, a backup channel and an integral sampling module. The main channel and the backup channel respectively include a first optocoupler and a second optocoupler. The integral sampling module is connected to the input-side node and the output-side node of the first optocoupler and the second optocoupler. The digital sampling layer includes an analog-to-digital conversion module, a timestamp module, a comparison and determination module, a window determination module, and a channel switching module; The main control communication layer includes a data receiving module, a relationship checking module, a cause judgment module, a degradation processing module, and an interface output module; The system defines channel status, which includes the main channel normal status, the main channel failure and the backup channel in operation status, and the sampling abnormal status. The physical I / O interface layer includes an interface adapter module, a surge protection module, and a pre-filtering module; the interface adapter module includes input adapter circuits corresponding to 5V digital signals, 12V digital signals, 24V digital signals, and 4-20mA continuous signals, respectively. The surge protection module includes a gas discharge tube, a transient suppression diode, and a fuse; the pre-filter module includes a common-mode choke and a π-type inductor-capacitor network, with a cutoff frequency of 1.2MHz for the π-type inductor-capacitor network. The first optocoupler in the main channel and the second optocoupler in the backup channel are heterogeneous optocouplers with different current transmission bit characteristics; The integration sampling module includes an input-side integration unit, an output-side integration unit, and a sampling window control unit; the relationship checking module is used to detect abnormal wiring status according to a pre-stored mutual exclusion logic relationship configuration table in the same frame of data with the same timestamp, and generates an abnormal wiring flag when a violation of the mutual exclusion logic relationship in the mutual exclusion logic relationship configuration table is detected; the output-side integration unit is connected to the output side of the first optocoupler and the second optocoupler. The sampling window control unit controls the sampling window to be 50μs; the integrating capacitors in the input-side integrating unit and the output-side integrating unit are all made of high-frequency thermally stable ceramic material with a capacitance of 100pF and a temperature coefficient of no more than ±30ppm / ℃.

[0017] This embodiment provides a CNC machine tool I / O conversion system based on data acquisition and control. The system as a whole receives physical I / O signals under specific electromagnetic radiation intensities on the machine tool side, performs primary filtering and protection through the physical I / O interface layer, performs isolation and charge integration sampling through signal conditioning and dual-channel conversion layer, completes analog-to-digital conversion and differential verification judgment with a predetermined synchronization rate by the digital sampling layer, and finally performs logic checks and degradation processing by the main control communication layer, and outputs input and output status including verification status to the host system. This architecture achieves deterministic integrity and traceability of the entire chain from physical acquisition and level conversion to digital output, and solves the problem of easy distortion and misjudgment of IO signals under interference environments where electromagnetic radiation exceeds the preset threshold. Furthermore, based on the above embodiments, the physical I / O signals on the machine tool side are acquired, and the physical I / O signals are subjected to interface adaptation and targeted suppression processing according to the signal type to generate primary conditioning signals; wherein, the physical I / O signals refer to the original signals of different level domains in the machine tool field, such as 5V digital signals, 12V digital signals, 24V digital signals and 4-20mA continuous signals. This invention uses interface adapter modules to correspond to different signal types, and combines surge protection modules and pre-filtering modules, including a common-mode choke and a π-type inductor-capacitor network with a cutoff frequency of 1.2MHz, to filter out common-mode and differential-mode high-frequency interference, thereby achieving steady-state signal transmission in a wideband noise environment. Furthermore, the primary conditioning signal is acquired, and based on the dual-channel heterogeneous redundancy design, the primary conditioning signal is isolated, converted, and integrated to determine the input-side integrated charge and the output-side integrated charge. Among them, the dual-channel heterogeneous redundancy design means that each IO signal is configured with an independent main channel and a backup channel, and different types of optocouplers are used. For example, the main channel uses a TLP185 optocoupler and the backup channel uses an EL357N optocoupler. In a specific implementation, the integral sampling module is connected to the input-side node and the output-side node of the optocoupler, and includes an input-side integration unit, an output-side integration unit, and a sampling window control unit. The sampling window control unit controls the sampling window to be 50μs. The integrating capacitors are all made of high-frequency thermally stable ceramic material with a capacitance of 100pF and a temperature coefficient of no more than ±30ppm / ℃. In terms of specific physical quantity matching, since the primary drive current on the industrial IO side is usually in the milliampere level, if the current is directly integrated on the 100pF capacitor within a 50μs sampling window, the accumulated charge will cause the voltage across the capacitor to exceed the limit and break down the device. Therefore, this invention introduces a proportionally decaying microcurrent mirror network between the optocoupler node and the integrator unit, which precisely scales the milliampere-level drive current to the microampere to nanoampere-level charging current, so that the accumulated charge on the 100pF capacitor is strictly limited to the safe level of 100pC within a 50μs window. This invention introduces the aforementioned network and integral sampling module at the conversion node to capture the charge accumulation at the input and output ends of the optocoupler within a fixed window. Without changing the inherent operating characteristics of the optocoupler, the level conversion process is transformed into a quantifiable safe charge physical quantity at the microampere level, realizing the conversion of logic level transmission into a verifiable energy envelope form.

[0018] In a preferred embodiment of the present invention, the analog-to-digital conversion module of the digital sampling layer includes a parallel sampling module and a data reading module, and the digital sampling layer further includes a field-programmable gate array; the parallel sampling module includes several groups of synchronous sampling successive approximation analog-to-digital conversion modules, each group corresponding to 8 I / O signals; The data reading module is connected to the analog-to-digital conversion module through multiple independent serial peripheral interface buses; the timestamp module includes a 64-bit free-running counter driven by a 100MHz system clock, with a timestamp resolution of 10ns; the field-programmable gate array is used to perform sampling control, data aggregation and buffer management, and controls the interval of data output from all channels in two adjacent frames to be 5μs; The digital sampling layer also includes a charge conversion module and a threshold calculation module; the charge conversion module converts the analog-to-digital conversion result corresponding to the input-side integrated charge collected by the input-side integration unit into the input-side integrated charge value according to the pre-calibrated current transfer ratio of each channel. The threshold calculation module determines the verification threshold based on the converted input-side integrated charge, output-side integrated charge, background charge, and interference level coefficient. When the difference between the integrated charge on the input side and the output side is greater than the verification threshold, the comparison and judgment module marks the current sample as an abnormal sample; when the difference is less than or equal to the verification threshold, the current sample is marked as a normal sample. The interference level coefficient is determined by the electromagnetic interference detection module based on the comparison result between the detected electromagnetic interference intensity and the intensity classification thresholds pre-stored by the system. The electromagnetic interference detection module includes a loop antenna and a detection circuit installed in the electrical cabinet, used to detect the intensity of electromagnetic interference and determine the interference level coefficient; The digital sampling layer also includes a calibration module; the calibration module is used to inject calibration current into the main channel and the backup channel and update the current transfer ratio of each channel. The window judgment module is used to judge the number of consecutive abnormal samples according to the judgment window pre-configured by the system. Different types of IO channels correspond to different judgment windows and fault judgment counts. The judgment window and fault judgment counts are pre-configured and stored by the system. Different types of IO channels are at least one of digital input channels, digital output channels and continuous input channels. The channel switching module is used to switch the faulty channel from the primary channel to the backup channel when a channel fails, and writes the switching action and fault flag into the preset storage unit.

[0019] Furthermore, based on the above embodiments, the integral voltage signal of each channel is obtained, and according to the parallel pipeline architecture, the integral voltage signal is synchronously converted into digital and timestamped to generate digital charge data with timestamps. Among them, the parallel pipeline architecture refers to the non-time-division multiplexing sampling mechanism scheduled by the field-programmable gate array. For example, every 8 I / O signals share a set of synchronous sampling successive approximation analog-to-digital converter modules, and the field-programmable gate array reads in parallel through multiple sets of independent serial peripheral interface buses. In the specific implementation, the timestamp module is driven by a 64-bit free-running counter with a 100MHz system clock, providing a timestamp with a resolution of 10ns. The field-programmable gate array controls the interval of 5μs between the output of 64 channels of data in two adjacent frames. This invention uses a parallel pipeline analog-to-digital conversion module for sampling and scheduling, processes multiple concurrent requests in parallel, eliminates timing jitter introduced by multi-channel I / O expansion, overcomes the problem of uncertain response time between channels, and achieves microsecond-level full-channel synchronous refresh. Furthermore, digital charge data with timestamps is acquired, and differential verification of the charge on the input and output sides is performed based on the pre-calibrated current transfer ratio and real-time electromagnetic interference intensity to determine the abnormal state of the current sampling. In specific implementation, the charge conversion module converts the analog-to-digital conversion result corresponding to the integrated charge on the input side into the value of the integrated charge on the input side according to the pre-calibrated current transfer ratio of each channel. The specific conversion logic uses the following formula for calculation: In the formula, The integral charge on the input side, in C; The numerical value is the result of the analog-to-digital conversion and is dimensionless. The reference voltage for the analog-to-digital converter module is expressed in volts (V). For quantization resolution; This represents the corresponding integrating capacitor value, in F. This represents the current transfer ratio corresponding to the current channel, a dimensionless percentage. The analog-to-digital conversion result is a dimensionless digital quantity. Multiplying this quantity by the reference voltage of the analog-to-digital conversion module and dividing by the quantization resolution yields the integral voltage. This is based on the physical equations of a capacitor. In the formula, For the integral charge, This is the capacitance value of the integrating capacitor. This is the integrated voltage; multiplying this voltage by the integrated capacitance value in farads converts it into an integrated charge in coulombs, which is then divided by the current transfer ratio to compensate for the static transmission error caused by the aging of the optocoupler and to achieve consistent conversion of physical quantity units. The threshold calculation module determines the verification threshold, which is configured to dynamically follow the fluctuation amplitude caused by normal signal transmission amplitude and external interference. In the specific calculation, the verification threshold is calculated using the following formula: In the formula, This is the differential verification threshold, in units of C, and is often expressed as pC in industrial applications; (This is the converted input-side integrated charge, in C). This is the converted output-side integrated charge, in C. This is the interference level coefficient, which is dimensionless and used to characterize the severity of current space radiation interference. The background charge, in C, is used to characterize the static quantization noise of the system. The selection criteria for the interference level coefficient are as follows: the electromagnetic interference detection module obtains the spatial electromagnetic field radiation intensity through a loop antenna, and the system's pre-configured intensity classification thresholds include the boundaries of mild, moderate, and severe interference; for example, when the radiation intensity is less than 10V / m, it is determined to be mild interference, and the interference level coefficient selected from the classification coefficient table is 0.05; when it is greater than or equal to 10V / m and less than or equal to 30V / m, it is moderate interference, and the coefficient is selected as 0.08. A value greater than 30V / m indicates severe interference, and a coefficient of 0.15 is selected. When the difference between the integrated charge on the input side and the output side exceeds the verification threshold, the comparison and judgment module marks the current sample as an abnormal sample. In a specific parameter configuration example: the measured background charge is set to 5pC when there is no signal input to the current channel; During a normal signal transmission, the converted integrated charge on the input side is 100pC and the integrated charge on the output side is 96pC. At this time, there is no external electromagnetic radiation interference exceeding the preset threshold, and the interference level coefficient is 0.05. The calculated verification threshold is (100+96) / 2 multiplied by 0.05 plus 5, which is 9.9pC. Since the absolute value of the difference between the input side and the output side is 4pC, which is less than the verification threshold of 9.9pC, it is determined to be normal sampling. If, at this moment, a sudden electromagnetic interference with radiation intensity exceeding the preset threshold occurs, causing the output charge to surge to 115 pC, the difference becomes 15 pC. Simultaneously, the electromagnetic interference detection module detects an increase in electromagnetic interference intensity, causing the interference level coefficient to jump to 0.08. The new verification threshold is (100 + 115) / 2 multiplied by 0.08 plus 5, which is 13.6 pC. Since the difference of 15 pC is still greater than the new verification threshold of 13.6 pC, the system accurately captures and marks the current sample as an abnormal sample. This invention introduces a differential verification mechanism, which enables the verification threshold to change in sync with the external electromagnetic environment, overcoming the problem that fixed thresholds are easily overwhelmed by noise and achieving accurate removal of transient interference. Furthermore, abnormal sampling markers are acquired, and the number of consecutive abnormal samplings is judged by sliding window debouncing based on the judgment window pre-configured by the system, generating a channel switching instruction. The judgment window refers to the continuous abnormal judgment threshold set for different types of IO channels. For example, digital input channels, digital output channels, and continuous input channels correspond to different judgment windows and fault judgment counts. The length of the sliding window debouncing judgment is [length missing]. The state history queue is used to calculate the total number of exceptions within the judgment window, using the state accumulation formula: In the formula, The length of the state history queue. To determine the total number of anomalies within the window, This is the sequence index of the sampling queue. When the current sample is marked as an abnormal sample... During normal sampling If and only if In time, it was confirmed that a real fault had occurred, among which The number of fault determinations is pre-configured for the system; taking a typical configuration as an example, for a digital input channel, based on its preset first response time index, the judgment window length is set to 3, and the number of fault determinations is set to 3 consecutive abnormalities. For continuous input channels, considering the environmental thermal noise and quantization error during analog-to-digital conversion, the judgment window length is set to 5, and the number of fault judgments is set to a cumulative total of 4 abnormalities within the window. The window judgment module only confirms that a non-transient real fault has occurred when the number of abnormal flags in the queue reaches the corresponding number of fault judgments. In practice, the calibration module periodically injects a constant calibration current of known amplitude into the main and backup channels during idle periods when there is no signal input in the system. It measures and records the output side charge within the window and uses the ratio of the output side charge to the theoretical input side calibration charge as the latest current transfer ratio of the channel. This updates the internal calibration data to offset temperature drift aging. The window judgment module confirms the fault when the number of consecutive abnormalities reaches a set value; the channel switching module switches the faulty channel from the main channel to the backup channel when a channel fails, and writes the switching action and fault flag into the preset storage unit.

[0020] In a preferred embodiment of the present invention, the data receiving module of the main control communication layer receives frame data sent by the digital sampling layer via industrial Ethernet; The relationship checking module is used to detect abnormal wiring status based on a pre-stored mutual exclusion logic relationship configuration table in the same frame of data with the same timestamp, and to generate an abnormal wiring flag when a violation of the mutual exclusion logic relationship in the mutual exclusion logic relationship configuration table is detected. The cause determination module is used to determine the cause of the fault by combining the integrated charge on the input side, the integrated charge on the output side, the power supply monitoring results, and the electromagnetic interference detection results; the interface output module is used to output the processed IO status data to the host system through an industrial communication protocol based on the transmission control protocol or an open platform communication unified architecture protocol. The degradation processing module of the main control communication layer includes a capacitance detection unit, a hardware damage judgment unit, a transparent transmission switching unit, a buffer upload unit, a hardware watchdog, and an independent parallel I / O interface; The capacitance detection unit is connected to each integrating capacitor to detect abnormalities in the integrating capacitor and trigger a bypass path. The bypass path includes a backup hardware comparator. When the bypass path is triggered, the transparent switching unit enables the corresponding channel to bypass the integrating sampling module and the analog-to-digital conversion module and output through an independent parallel IO interface. The hardware damage detection unit is used to detect continuous analog-to-digital conversion data in the corresponding channel. If the abnormal sampling flag is maintained for each sampling period, it is determined that a hardware failure has occurred in the corresponding channel. It is a preset positive integer greater than or equal to 2; The pass-through switching unit determines the response status of the field-programmable gate array through heartbeat queries and continuously... When the system becomes unresponsive, the hardware watchdog timer performs a hard reset of the field-programmable gate array (FPGA). The value is a preset positive integer; the field-programmable gate array includes a buffer unit for buffering a preset number of frame data during master control communication layer reset and uploading them after master control communication layer recovery.

[0021] Furthermore, based on the above embodiments, the frame data sent by the digital sampling layer is obtained, and cross-channel correlation analysis and fault attribution judgment are performed on the frame data according to the mutual exclusion logic relationship configuration table and multi-source monitoring data to generate processed IO status data and abnormal alarms. Frame data refers to a data set containing valid I / O status, differential check data, and precise timestamps; in specific implementations, the data receiving module receives frame data via industrial Ethernet. The relationship checking module detects abnormal wiring status based on a pre-stored mutual exclusion logic relationship configuration table in the same frame of data with the same timestamp. For example, the spindle forward and reverse signals are valid at the same timestamp. When a violation of the mutual exclusion logic relationship is detected, an abnormal wiring flag is generated. The cause judgment module combines the integrated charge on the input side, the integrated charge on the output side, the power supply monitoring results, and the electromagnetic interference detection results to determine the cause of the fault. For example, if the input charge is abnormal and the electromagnetic interference detection module simultaneously reports a jump in the interference level coefficient, the cause is attributed to spatial radiation interference. To enable the system to perform structured mapping of monitoring data and configure corresponding combined boundary conditions, the specific judgment rules include: when it is determined that the current input charge is within ±5% of the initial calibration reference value, and the drop in output charge is greater than or equal to 20%, causing the difference to exceed the limit, and at the same time the power supply monitoring is normal and the interference level coefficient is less than or equal to the preset static environment threshold, that is, the coefficient is not greater than 0.05, the system will accurately attribute the fault to the aging of the optocoupler light-emitting diode or the breakdown of the phototransistor. If, at the same timestamp, the charge change rate of multiple independent channels exceeds the preset threshold, and the power monitoring module reports a transient low voltage of more than 100μs and a drop of more than 20% on the 24V power supply bus, the system will attribute the fault to a power supply surge or a power supply overload drop, thereby avoiding false alarms about the IO conversion system itself. This invention overcomes the problem of ambiguous fault location by cross-channel fusion and in-depth analysis of multi-dimensional features, and achieves fault attribution accurate to the component level. Furthermore, the status of each integrating capacitor and the system response status are obtained, and multi-level fault tolerance processing is performed on system hardware anomalies according to the preset degradation strategy to ensure the continuous output of core IO signals. In practical implementation, the capacitor detection unit periodically detects abnormalities in the integrating capacitor and triggers the bypass path. The specific abnormality detection logic is as follows: During system power-on initialization or a set low-frequency maintenance cycle, a preset constant diagnostic current is injected into the integrating capacitor. The charging time required for the voltage across the capacitor to rise from 0 to the reference voltage is measured. If the absolute value of the difference between this charging time and the theoretical design time exceeds a preset tolerance threshold, such as ±15%, the theoretical design time is... The following formula is used for calculation: In the formula, The theoretical design time required to charge the capacitor to the reference voltage, in seconds; The set reference voltage, in volts (V); This is the nominal capacitance value of the integrating capacitor, in F; The constant diagnostic current injected is expressed in amperes (A). When the bypass path is triggered, the transparent switching unit causes the corresponding channel to bypass the integral sampling module and the analog-to-digital conversion path, and output through an independent parallel IO interface. The hardware damage detection unit continuously detects analog-to-digital conversion data in the corresponding channel. When an abnormal sampling marker is maintained for each sampling cycle, it is determined that a hardware failure has occurred in the corresponding channel; in addition, the transparent switching unit determines the response status of the field-programmable gate array through heartbeat query, and in continuous If there is no response, the driver hardware watchdog will perform a hard reset. The buffer unit in the field programmable gate array buffers a preset number of frame data during reset and uploads them after recovery; in a specific degraded fault-tolerant state, if the pass-through switching unit detects an abnormal leakage index of the integral capacitor of a certain channel, resulting in a disordered charging and discharging timing, the bypass path is triggered, so that the signal of that channel is directly passed out through the backup hardware comparator and the independent parallel IO interface. If, in this bypass mode, the heartbeat query response delay of the field-programmable gate array exceeds three consecutive cycles, that is... When the value is set to 3, a local communication deadlock is determined to have occurred. Therefore, a forced hard reset is immediately performed within 5μs via the hardware watchdog. At the same time, the cache unit automatically saves the most recent 50 frames of historical data before the reset using the internal isolated power supply for subsequent tracing. As an application embodiment of the present invention, the above-mentioned CNC machine tool IO conversion system based on data acquisition and control is deployed in the machine tool electrical control cabinet; during the operation of the machine tool, physical IO signals generated by various sensors and actuators continuously flow into the physical IO interface layer; after pre-filtering, the signal enters the dual-channel conversion layer, and the transient current is converted into charge integral quantity through the integral sampling module; The high-speed analog-to-digital conversion module array of the digital sampling layer synchronously collects the charge of the entire channel, and the field-programmable gate array performs differential verification and dynamic threshold comparison in real time. If a sudden plasma arc interference exceeding the limit causes a single difference to exceed the limit, the system filters out the transient interference through a sliding window anti-shake mechanism. If the main channel optocoupler is actually damaged due to aging, the system switches to the backup channel within microseconds. Finally, the main control communication layer aggregates all verification status and IO data and uploads them to the upper system through the unified architecture protocol interface of industrial communication or open platform communication based on transmission control protocol, triggering production line-level status monitoring and maintenance dispatch, forming a complete data flow channel from the bottom signal acquisition to the upper business decision.

Claims

1. A CNC machine tool I / O conversion system based on data acquisition and control, characterized in that, It includes a physical I / O interface layer, a signal conditioning and dual-channel conversion layer, a digital sampling layer and a main control communication layer connected in sequence, as well as an electromagnetic interference detection module and a power monitoring module connected to the digital sampling layer and the main control communication layer respectively; Each IO signal in the signal conditioning and dual-channel conversion layer is provided with a main channel, a backup channel and an integral sampling module. The main channel and the backup channel respectively include a first optocoupler and a second optocoupler. The integral sampling module is connected to the input-side node and the output-side node of the first optocoupler and the second optocoupler. The digital sampling layer includes an analog-to-digital conversion module, a timestamp module, a comparison and determination module, a window determination module, and a channel switching module; The main control communication layer includes a data receiving module, a relationship checking module, a cause judgment module, a degradation processing module, and an interface output module; The system defines channel states, which include the main channel normal state, the main channel fault and the backup channel in operation state, and the sampling abnormal state.

2. The CNC machine tool I / O conversion system based on data acquisition and control according to claim 1, characterized in that, The physical I / O interface layer includes an interface adaptation module, a surge protection module, and a pre-filtering module; The interface adapter module includes input adapter circuits corresponding to 5V digital signals, 12V digital signals, 24V digital signals and 4-20mA continuous signals respectively; The surge protection module includes a gas discharge tube, a transient suppression diode, and a fuse; The pre-filtering module includes a common-mode choke and a π-type inductor-capacitor network, the cutoff frequency of which is 1.2MHz.

3. The CNC machine tool I / O conversion system based on data acquisition and control according to claim 1, characterized in that, The first optocoupler in the main channel and the second optocoupler in the backup channel are heterogeneous optocouplers with different current transmission bit characteristics.

4. The CNC machine tool I / O conversion system based on data acquisition and control according to claim 3, characterized in that, The integral sampling module includes an input-side integral unit, an output-side integral unit, and a sampling window control unit; The input-side integration unit is connected to the input side of the first optocoupler and the second optocoupler, and the output-side integration unit is connected to the output side of the first optocoupler and the second optocoupler; The sampling window control unit controls the sampling window to be 50μs. The integrating capacitors in both the input-side and output-side integrating units are made of high-frequency thermally stable ceramic material with a capacitance of 100pF and a temperature coefficient of no more than ±30ppm / ℃.

5. The CNC machine tool I / O conversion system based on data acquisition and control according to claim 4, characterized in that, The analog-to-digital conversion module of the digital sampling layer includes a parallel sampling module and a data reading module, and the digital sampling layer also includes a field-programmable gate array; The parallel sampling module includes several sets of synchronous sampling successive approximation analog-to-digital conversion modules, each set corresponding to 8 IO signals; The data reading module is connected to the analog-to-digital conversion module through multiple sets of independent serial peripheral interface buses; The timestamp module includes a 64-bit free-running counter driven by a 100MHz system clock, with a timestamp resolution of 10ns; The field-programmable gate array is used to perform sampling control, data aggregation and buffer management, and controls the interval of data output of all channels in two adjacent frames to be 5μs.

6. The CNC machine tool I / O conversion system based on data acquisition and control according to claim 5, characterized in that, The digital sampling layer also includes a charge conversion module and a threshold calculation module; The charge conversion module converts the analog-to-digital conversion result corresponding to the input-side integrated charge collected by the input-side integration unit into the input-side integrated charge value according to the pre-calibrated current transmission ratio of each channel. The threshold calculation module determines the verification threshold based on the converted input-side integrated charge, output-side integrated charge, background charge, and interference level coefficient. When the difference between the integrated charge on the input side and the output side is greater than the verification threshold, the comparison and determination module marks the current sample as an abnormal sample; when the difference is less than or equal to the verification threshold, the current sample is marked as a normal sample. The interference level coefficient is determined by the electromagnetic interference detection module based on the comparison result between the detected electromagnetic interference intensity and the intensity classification thresholds pre-stored by the system. The electromagnetic interference detection module includes a loop antenna and a detection circuit installed in the electrical cabinet, used to detect the intensity of electromagnetic interference and determine the interference level coefficient.

7. The CNC machine tool I / O conversion system based on data acquisition and control according to claim 6, characterized in that, The digital sampling layer also includes a calibration module; The calibration module is used to inject calibration current into the main channel and the backup channel and update the current transfer ratio of each channel; The window judgment module is used to judge the number of consecutive abnormal samples according to the judgment window pre-configured by the system. Different types of IO channels correspond to different judgment windows and fault judgment counts. The judgment window and fault judgment count are pre-configured and stored by the system. The different types of IO channels are at least one of digital input channels, digital output channels and continuous input channels. The channel switching module is used to switch the faulty channel from the main channel to the backup channel when a channel failure occurs, and writes the switching action and fault flag into a preset storage unit.

8. The CNC machine tool I / O conversion system based on data acquisition and control according to claim 6, characterized in that, The data receiving module of the main control communication layer receives frame data sent by the digital sampling layer via industrial Ethernet; The relationship checking module is used to detect abnormal wiring status based on a pre-stored mutual exclusion logic relationship configuration table in the same frame of data with the same timestamp, and to generate an abnormal wiring flag when a violation of the mutual exclusion logic relationship in the mutual exclusion logic relationship configuration table is detected. The cause determination module is used to determine the cause of the fault by combining the integrated charge on the input side, the integrated charge on the output side, the power supply monitoring results, and the electromagnetic interference detection results. The interface output module is used to output processed IO status data to the host system through an industrial communication protocol based on the transmission control protocol or an open platform communication unified architecture protocol.

9. The CNC machine tool I / O conversion system based on data acquisition and control according to claim 6, characterized in that, The degradation processing module of the main control communication layer includes a capacitance detection unit, a hardware damage judgment unit, a transparent transmission switching unit, a cache upload unit, a hardware watchdog, and an independent parallel I / O interface. The capacitance detection unit is connected to each integrating capacitor of the integrating sampling module and is used to detect abnormalities in the integrating capacitor and trigger a bypass path. The bypass path includes a backup hardware comparator. When the bypass path is triggered, the transparent switching unit causes the corresponding channel to bypass the integral sampling module and the analog-to-digital conversion module, and outputs through the independent parallel IO interface. The hardware damage judgment unit is used to determine that a hardware damage anomaly has occurred in the corresponding channel when the analog-to-digital conversion data of the corresponding channel maintains an abnormal sampling mark for N consecutive sampling cycles, where N is a preset positive integer greater than or equal to 2. The transparent switching unit determines the response status of the field-programmable gate array through heartbeat query and in continuous When the system becomes unresponsive, the hardware watchdog timer performs a hard reset of the field-programmable gate array (FPGA). It is a preset positive integer; The field-programmable gate array includes a buffer unit for buffering a preset number of frame data during master control communication layer reset and uploading it after master control communication layer recovery.

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