A frequency reconfigurable low noise amplifier
By designing a frequency-reconfigurable low-noise amplifier and utilizing transformer structure and switching inductor technology, the gain-frequency characteristics of the low-noise amplifier can be adjusted in multiple frequency bands. This solves the problems of poor anti-interference capability and discontinuous bandwidth in existing technologies, and achieves a wide operating range and excellent anti-interference capability.
Patent Information
- Application Number
- CN202611286522.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-08-24
- Publication Date
- 2026-11-03
AI Technical Summary
Existing low-noise amplifiers have poor anti-interference capabilities over a wide frequency range and in multi-band operation, and are limited by discrete frequency amplification and discontinuous bandwidth in multi-mode operation.
Employing a frequency-reconfigurable low-noise amplifier, the design of the first to fourth amplification stages, combined with transformer structure, switching inductor technology, and digital control, enables rich adjustment of the load inductance value, flexibly changes the gain frequency characteristics, and supports seamless switching between various narrowband and wideband amplification modes.
It achieves adjustable gain-frequency characteristics of low-noise amplifiers across multiple frequency bands, possesses excellent anti-interference capabilities, solves the problems of out-of-band signal interference and signal blocking in existing technologies, and realizes a wide operating range and continuous bandwidth coverage.
Smart Images

Figure CN123034800A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of radio frequency integrated circuit technology, and more specifically to a frequency-reconfigurable low-noise amplifier. Background Technology
[0002] The first stage of the receiver's RF front-end module is typically a low-noise amplifier (LNA). Its function is to amplify the RF signal received by the antenna while generating the lowest possible noise, providing appropriate signal gain to reduce the impact of noise generated by subsequent modules on the signal.
[0003] Currently, there are two main ways to achieve a wide operating frequency range or multi-band operation for low-noise amplifiers. One is to use various bandwidth enhancement techniques to extend the amplifier's -3 dB bandwidth; the other is to reconfigure the circuit to achieve different gain-frequency characteristics, thereby covering multiple different frequency bands and achieving a wider overall operating range. However, existing ordinary broadband LNAs have poor anti-interference capabilities, and reconfigurable low-noise amplifiers are limited by discrete frequency amplification and the discontinuous bandwidth of multi-mode operation.
[0004] Therefore, there is an urgent need to construct a frequency-reconfigurable low-noise amplifier to achieve adjustable gain-frequency characteristics and continuous coverage of different operating bandwidths in the radio frequency band. Summary of the Invention
[0005] To address the aforementioned technical problems, this invention provides a frequency-reconfigurable low-noise amplifier.
[0006] To achieve the above objectives, the present invention adopts the following technical solution:
[0007] A frequency-reconfigurable low-noise amplifier, comprising a first-stage amplification stage through a fourth-stage amplification stage;
[0008] The input terminal of the first stage amplification stage constitutes the input terminal of the low-noise amplifier; the output terminal of the first stage amplification stage is connected in series with the second stage amplification stage to the fourth stage amplification stage; the output terminal of the fourth stage amplification stage constitutes the output terminal of the low-noise amplifier.
[0009] The first amplification stage is used to perform broadband input impedance matching on the received RF signal and to suppress the reverse propagation of impedance changes caused by the load reconfigurable tuning of the subsequent stage to the input terminal through reverse isolation; the second amplification stage is used to perform load reconfigurable tuning on the operating frequency band of the low noise amplifier; the third amplification stage is used to provide stable voltage gain; and the fourth amplification stage is used to perform broadband output impedance matching on the RF signal amplified by the previous stage.
[0010] Furthermore, the first amplification stage includes a first capacitor C1, a second capacitor C2, a third capacitor C3, a first inductor L1 to a fourth inductor L4, a first resistor R1, and a first transistor M1;
[0011] One end of the first capacitor C1 serves as the input terminal of the first amplification stage, and the other end of the first capacitor C1 is connected to one end of the first inductor L1 and one end of the second inductor L2. The other end of the first inductor L1 is connected to one end of the first resistor R1 and one end of the second capacitor C2. The other end of the first resistor R1 is connected to the first bias voltage Vbias1. The other end of the second capacitor C2 is grounded. The other end of the second inductor L2 is connected to the gate of the first transistor M1. The source of the first transistor M1 is grounded through the fourth inductor L4. The drain of the first transistor M1 is connected to the power supply voltage VDD through the third inductor L3, and the drain of the first transistor M1 is connected to one end of the third capacitor C3. The other end of the third capacitor C3 serves as the output terminal of the first amplification stage.
[0012] Furthermore, the second amplification stage includes at least two tunable amplification stages connected in series and having the same structure, wherein each tunable amplification stage includes a second transistor M2 to a tenth transistor M1. 10 The second resistor R2, the third resistor R3, the fourth capacitor C4 to the eleventh capacitor C 11 The fifth inductor L5 to the eighth inductor L8, and the fifth inductor L5 and the sixth inductor L6 form the first transformer structure, and the seventh inductor L7 and the eighth inductor L8 form the second transformer structure;
[0013] The tenth transistor M 10 The gate of transistor M serves as the input of the tunable amplifier stage, and the tenth transistor M... 10 The gate of the transistor is connected to the second bias voltage Vbias2 through the third resistor R3; the tenth transistor M 10 The source of transistor M is grounded; the tenth transistor M 10 The drain of transistor M1 is connected to the source of transistor M9; the gate of transistor M9 is connected to the tenth capacitor C1. 10 One end of the capacitor is connected to one end of the second resistor R2; the tenth capacitor C is connected to the other end of the capacitor R2. 10 The other end of the resistor is grounded; the other end of the second resistor R2 is connected to the power supply voltage VDD; the drain of the ninth transistor M9 is connected to the power supply voltage VDD through the series-connected eighth inductor L8 and sixth inductor L6, and the drain of the ninth transistor M9 is connected to the eleventh capacitor C. 11 One end is connected; the eleventh capacitor C 11 The other end serves as the output of the tunable amplifier stage;
[0014] The sixth inductor L6 is connected in parallel between the drain and source of the fifth transistor M5; the gate of the fifth transistor M5 is connected to the enable bit EN1; one end of the fifth inductor L5 is grounded; the other end of the fifth inductor L5 is connected to one end of the fourth capacitor C4, one end of the fifth capacitor C5, and one end of the sixth capacitor C6; the other ends of the fourth capacitor C4, the fifth capacitor C5, and the sixth capacitor C6 are respectively grounded through the second transistor M2 to the fourth transistor M4.
[0015] One end of the seventh inductor L7 is grounded; the other end of the seventh inductor L7 is connected to one end of the seventh capacitor C7, one end of the eighth capacitor C8, and one end of the ninth capacitor C9 respectively; the other ends of the seventh capacitor C7, the eighth capacitor C8, and the ninth capacitor C9 are grounded through the sixth transistor M6 to the eighth transistor M8 respectively.
[0016] The gates of the second transistor M2 to the eighth transistor M8 are respectively connected to each digital control bit.
[0017] Furthermore, when the second amplification stage includes two sequentially connected, identically structured first and second tunable amplification stages, the first tunable amplification stage includes the second transistor M2 to the tenth transistor M... 10 The second resistor R2, the third resistor R3, the fourth capacitor C4 to the eleventh capacitor C 11 The fifth inductor L5 to the eighth inductor L8; the second tunable amplifier stage includes the eleventh transistor M. 11 Up to the nineteenth transistor M 19 Fourth resistor R4, fifth resistor R5, twelfth capacitor C 12 Up to the nineteenth capacitor C 19 Ninth inductor L9 to twelfth inductor L 12 Furthermore, each component in the second tunable amplifier stage corresponds one-to-one with the component in the first tunable amplifier stage.
[0018] Furthermore, the equivalent load inductance value of the first tunable amplifier stage is specifically as follows:
[0019] ;
[0020] in, This is the equivalent load inductance value of the first tunable amplifier stage. This is the enable bit, used to control the on or off state of the fifth transistor; It is the fifth inductor. It is the sixth inductor. It is the seventh inductor. It is the eighth inductor. The quality factor of the fifth inductor. The quality factor of the seventh inductor. Angular frequency, For the index of the cyclic summation, This is the gate control level of the fourth transistor M4. This is the gate control level of the third transistor M3. This is the gate control level of the second transistor M2. This is the gate control level of the eighth transistor M8. This is the gate control level for the seventh transistor M7. This is the gate control level of the sixth transistor M6. This is the coupling coefficient between the fifth inductor L5 and the sixth inductor L6. This is the coupling coefficient between the seventh inductor L7 and the eighth inductor L8. For the first The capacitance value of each capacitor, For the first The capacitance value of each capacitor;
[0021] The equivalent load inductance value of the second tunable amplifier stage is as follows:
[0022] ;
[0023] in, This is the equivalent load inductance value of the second tunable amplifier stage. The enable bit is used to control the on or off state of the eleventh transistor; It is the ninth inductor. It is the tenth inductor. It is the eleventh inductor. The twelfth inductor, The quality factor of the tenth inductor. The quality factor of the twelfth inductor is among them. This is the equivalent load inductance value of the second tunable amplifier stage. The enable bit is used to control the on or off state of the eleventh transistor; It is the ninth inductor. It is the tenth inductor. It is the eleventh inductor. The twelfth inductor, The quality factor of the tenth inductor. The quality factor of the twelfth inductor. For the twelfth transistor M 12 Gate control level, For the thirteenth transistor M 13 Gate control level, For the fourteenth transistor M14 Gate control level, For the fifteenth transistor M 15 Gate control level, For the sixteenth transistor M 16 Gate control level, For the seventeenth transistor M 17 Gate control level, For the ninth inductor L9 and the tenth inductor L 10 The coupling coefficient between them For the eleventh inductor L 11 With the twelfth inductor L 12 The coupling coefficient between them For the first The capacitance value of each capacitor, For the first The capacitance value of each capacitor.
[0024] Furthermore, the third amplification stage includes a twentieth transistor M. 20 Twenty-first transistor M 21 The twentieth capacitor C 20 Sixth resistor R6, seventh resistor R7, thirteenth inductor L 13 Fourteenth inductor L 14 ;
[0025] The 21st transistor M 21 The gate of transistor M serves as the input of the third amplification stage, and the twenty-first transistor M... 21 The gate of transistor M is connected to the fourth bias voltage Vbias4 via the seventh resistor R7; the twenty-first transistor M 21 The source is grounded; the twenty-first transistor M 21 The drain of the twentieth transistor M 20 The source connection; the twentieth transistor M 20 The gates of the capacitors are respectively connected to the twentieth capacitor C. 20 One end of the sixth resistor R6 is connected; the twentieth capacitor C 20 The other end is grounded; the other end of the sixth resistor R6 is connected to the power supply voltage VDD; the twentieth transistor M 20 The drain is connected in series with the thirteenth inductor L 13 Fourteenth inductor L 14 Connect to the power supply voltage VDD.
[0026] Furthermore, the fourth amplification stage includes a twenty-second transistor M. 22 Eighth resistor R8, fifteenth inductor L 15 Up to the eighteenth inductor L 18 Capacitor C (21st) 21 Capacitor C (22nd)22 And the eighteenth inductor L 18 With the thirteenth inductor L 13 Forming a transformer structure;
[0027] The twentieth transistor M 22 The gates of the capacitors are respectively connected to the twenty-second capacitor C. 22 One end of the eighth resistor R8 is connected; the twenty-second capacitor C 22 The other end is grounded; the other end of the eighth resistor R8 is connected to the fifth bias voltage Vbias5; the twenty-second transistor M 22 The source electrode is through the eighteenth inductor L 18 Ground; Twenty-second transistor M 22 The drain and the sixteenth inductor L 16 One end is connected to the sixteenth inductor L 16 The other end is connected to the fifteenth inductor L. 15 One end, the twenty-first capacitor C 21 One end is connected; the fifteenth inductor L 15 The other end is connected to the power supply voltage VDD; the twenty-first capacitor C 21 The other end serves as the output of the fourth amplification stage, and the twenty-first capacitor C 21 The other end is grounded through the seventeenth inductor.
[0028] The beneficial effects of adopting the above technical solution are as follows:
[0029] (1) The frequency reconfigurable low-noise amplifier of the present invention can achieve different gain frequency characteristics, cover multiple different frequency bands, and achieve a wider overall operating range. It has better resistance to out-of-band signal interference, suppression of amplifier desensitization and signal blocking.
[0030] (2) This invention adopts a multi-mode primary winding equivalent inductance adjustment technology based on a transformer structure and multiple switchable capacitors connected in parallel to the secondary winding, and combines it with switching inductor technology to achieve rich adjustment of the load inductance value, thereby enabling flexible changes to the gain frequency characteristics of the low noise amplifier.
[0031] (3) The frequency reconfigurable low-noise amplifier of the present invention not only has multiple narrowband amplification modes that can be seamlessly switched within the operating frequency range, but also realizes a wideband amplification mode with a relatively large bandwidth that can be selected, thus solving the problem of being limited by discrete frequency amplification and discontinuous operating bandwidth of multiple modes in the prior art. Attached Figure Description
[0032] Figure 1 This is a block diagram of the circuit structure of the low-noise amplifier in this embodiment; Figure 2This is the schematic diagram of the first stage amplifier circuit. Figure 3 This is the schematic diagram of the first tunable amplifier stage circuit; Figure 4 This is the schematic diagram of the second tunable amplifier stage circuit; Figure 5 The circuit schematics for the third and fourth amplifier stages are shown. Figure 6 The following are the post-simulation results of the gain amplitude-frequency characteristics of the low-noise amplifier in different operating modes in this embodiment; Figure 7 The following are the post-simulation results of the noise figure of the low-noise amplifier in different operating modes in this embodiment. Detailed Implementation
[0033] The technical solution of the present invention will be described in detail below with reference to the accompanying drawings.
[0034] refer to Figure 1 A frequency reconfigurable low-noise amplifier includes a first stage to a fourth stage of amplification, and the second stage of amplification includes two first tunable amplification stages and a second tunable amplification stage connected in series and having the same structure.
[0035] The input terminal of the first amplification stage constitutes the input terminal P of the low-noise amplifier. IN The output of the first stage amplifier is connected in series with the second stage amplifier to the fourth stage amplifier; the output of the fourth stage amplifier constitutes the output P of the low-noise amplifier. OUT ;
[0036] The first amplification stage performs broadband input impedance matching on the received RF signal and suppresses the back propagation of impedance changes caused by the reconfigurable tuning of the subsequent load to the input terminal through reverse isolation. The second amplification stage utilizes the primary coil equivalent inductance adjustment technology based on transformer electromagnetic coupling. By controlling the capacitor array connected in parallel with the transformer secondary coil through transistor switching, the equivalent parallel capacitance value of the secondary coil is changed. Utilizing the electromagnetic coupling effect of the transformer, a wide range of adjustable equivalent inductance values of the primary coil is achieved. Switching inductor technology enables rich adjustment and switching of the load inductance value, thereby flexibly changing the gain-frequency characteristics of the low-noise amplifier. The third amplification stage provides stable voltage gain. The fourth amplification stage performs broadband output impedance matching on the RF signal amplified by the previous stage.
[0037] In this embodiment, the first amplification stage is a common-source amplification stage, which uses wideband input matching technology and a fixed load at its input; the second amplification stage is a common-source cascode amplification stage with a tunable load; the third amplification stage is a common-source cascode amplification stage with a fixed load; and the fourth amplification stage is a cascode amplification stage, which uses wideband output matching technology at its output.
[0038] refer to Figure 2 The first amplification stage includes a first capacitor C1, a second capacitor C2, a third capacitor C3, a first inductor L1 to a fourth inductor L4, a first resistor R1, and a first transistor M1; wherein the first inductor L1 and the fourth inductor L4 form a mutual inductance coupling structure with a coupling coefficient of k1.
[0039] Specifically, one end of the first capacitor C1 serves as the input terminal of the first amplification stage, and the other end of the first capacitor C1 is connected to one end of the first inductor L1 and one end of the second inductor L2, respectively; the other end of the first inductor L1 is connected to one end of the first resistor R1 and one end of the second capacitor C2, respectively; the other end of the first resistor R1 is connected to the first bias voltage Vbias1; the other end of the second capacitor C2 is grounded; the other end of the second inductor L2 is connected to the gate of the first transistor M1; the source of the first transistor M1 is grounded through the fourth inductor L4; the drain of the first transistor M1 is connected to the power supply voltage VDD through the third inductor L3, and the drain of the first transistor M1 is connected to one end of the third capacitor C3; the other end of the third capacitor C3 serves as the output terminal of the first amplification stage.
[0040] refer to Figure 3 The first tunable amplifier stage includes the second transistor M2 to the tenth transistor M1. 10 The second resistor R2, the third resistor R3, the fourth capacitor C4 to the eleventh capacitor C 11 The fifth inductor L5 to the eighth inductor L8, and the fifth inductor L5 and the sixth inductor L6 form the first transformer structure with a coupling coefficient of k2; the seventh inductor L7 and the eighth inductor L8 form the second transformer structure with a coupling coefficient of k3.
[0041] The second tunable amplifier stage includes the eleventh transistor M. 11 Up to the nineteenth transistor M 19 Fourth resistor R4, fifth resistor R5, twelfth capacitor C 12 Up to the nineteenth capacitor C 19 Ninth inductor L9 to twelfth inductor L 12 And the ninth inductor L9 and the tenth inductor L 10 The third transformer structure is formed, with a coupling coefficient of k4; the eleventh inductor L 11 With the twelfth inductor L 12A fourth transformer structure is formed, with a coupling coefficient of k5.
[0042] Among them, the tenth transistor M 10 The gate of transistor M serves as the input of the first tunable amplifier stage, and the tenth transistor M... 10 The gate of the transistor is connected to the second bias voltage Vbias2 through the third resistor R3; the tenth transistor M 10 The source of transistor M is grounded; the tenth transistor M 10 The drain of transistor M9 is connected to the source of transistor C; the gate of transistor M9 is connected to the tenth capacitor C. 10 One end of the capacitor is connected to one end of the second resistor R2; the tenth capacitor C is connected to the other end of the capacitor R2. 10 The other end of the resistor is grounded; the other end of the second resistor R2 is connected to the power supply voltage VDD; the drain of the ninth transistor M9 is connected to the power supply voltage VDD through the series-connected eighth inductor L8 and sixth inductor L6, and the drain of the ninth transistor M9 is connected to the eleventh capacitor C. 11 One end is connected; the eleventh capacitor C 11 The other end serves as the output of the first tunable amplifier stage;
[0043] The sixth inductor L6 is connected in parallel between the drain and source of the fifth transistor M5; the fifth transistor M... 10 The gate of the fifth inductor L5 is connected to the enable bit EN1; one end of the fifth inductor L5 is grounded; the other end of the fifth inductor L5 is connected to one end of the fourth capacitor C4, one end of the fifth capacitor C5, and one end of the sixth capacitor C6 respectively; the other ends of the fourth capacitor C4, the other ends of the fifth capacitor C5, and the other ends of the sixth capacitor C6 are respectively connected to the fourth transistor M4 through the second transistor M2;
[0044] One end of the seventh inductor L7 is grounded; the other end of the seventh inductor L7 is connected to one end of the seventh capacitor C7, one end of the eighth capacitor C8, and one end of the ninth capacitor C9 respectively; the other ends of the seventh capacitor C7, the eighth capacitor C8, and the ninth capacitor C9 are grounded through the sixth transistor M6 to the eighth transistor M8 respectively.
[0045] The gates of the second transistor M2 to the fourth transistor M4 are connected to digital control bits bit2, bit1, and bit0, respectively; the gates of the sixth transistor M6 to the eighth transistor M8 are connected to digital control bits bit5, bit4, and bit3, respectively.
[0046] refer to Figure 4 In this embodiment, each component in the second tunable amplifier stage corresponds one-to-one with the component in the first tunable amplifier stage, namely the eleventh transistor M. 11 Up to the nineteenth transistor M 19 Respectively connected to the second transistor M2 to the tenth transistor M 10Corresponding to: the fourth resistor R4 corresponds to the second resistor R2; the fifth resistor R5 corresponds to the third resistor R3; the twelfth capacitor C... 12 Up to the nineteenth capacitor C 19 Respectively connected to capacitors C4 through C11. 11 Corresponding to the ninth inductor L9 to the twelfth inductor L 12 These correspond to the fifth inductor L5 to the eighth inductor L8, respectively.
[0047] Therefore, based on the circuit structure of the first tunable amplifier stage, it can be known that the nineteenth transistor M in the second tunable amplifier stage... 19 The gate of the eleventh transistor is connected to the third bias voltage Vbias3 through the fifth resistor R5; 11 The gate of the twelfth transistor M is connected to the enable bit EN2; 12 Up to the fourteenth transistor M 14 The gates of the transistors are connected to digital control bits 6, 7, and 8 respectively; the fifteenth transistor M 15 Up to the seventeenth transistor M 17 The gates are connected to the digital control bits bit9, bit10, and bit11, respectively.
[0048] Furthermore, the equivalent load inductance value of the first tunable amplifier stage is specifically as follows:
[0049] ;
[0050] in, This is the equivalent load inductance value of the first tunable amplifier stage. This is the enable bit, used to control the on or off state of the fifth transistor; It is the fifth inductor. It is the sixth inductor. It is the seventh inductor. It is the eighth inductor. The quality factor of the fifth inductor. The quality factor of the seventh inductor. Angular frequency, For the index of the cyclic summation, This is the gate control level of the fourth transistor M4. This is the gate control level of the third transistor M3. This is the gate control level of the second transistor M2. This is the gate control level of the eighth transistor M8. This is the gate control level for the seventh transistor M7. This is the gate control level of the sixth transistor M6. This is the coupling coefficient between the fifth inductor L5 and the sixth inductor L6. This is the coupling coefficient between the seventh inductor L7 and the eighth inductor L8. For the first The capacitance value of each capacitor, For the first The capacitance value of each capacitor;
[0051] The equivalent load inductance value of the second tunable amplifier stage is as follows:
[0052] ;
[0053] in, This is the equivalent load inductance value of the second tunable amplifier stage. The enable bit is used to control the on or off state of the eleventh transistor; It is the ninth inductor. It is the tenth inductor. It is the eleventh inductor. The twelfth inductor, The quality factor of the tenth inductor. The quality factor of the twelfth inductor. For the twelfth transistor M 12 Gate control level, For the thirteenth transistor M 13 Gate control level, For the fourteenth transistor M 14 Gate control level, For the fifteenth transistor M 15 Gate control level, For the sixteenth transistor M 16 Gate control level, For the seventeenth transistor M 17 Gate control level, For the ninth inductor L9 and the tenth inductor L 10 The coupling coefficient between them For the eleventh inductor L 11 With the twelfth inductor L 12 The coupling coefficient between them For the first The capacitance value of each capacitor, For the first The capacitance value of each capacitor.
[0054] refer to Figure 5 The third amplification stage includes the twentieth transistor M. 20 Twenty-first transistor M 21 The twentieth capacitor C 20 Sixth resistor R6, seventh resistor R7, thirteenth inductor L13 Fourteenth inductor L 14 ;
[0055] The 21st transistor M 21 The gate of transistor M serves as the input of the third amplification stage, and the twenty-first transistor M... 21 The gate of transistor M is connected to the fourth bias voltage Vbias4 via the seventh resistor R7; the twenty-first transistor M 21 The source is grounded; the twenty-first transistor M 21 The drain of the twentieth transistor M 20 The source connection; the twentieth transistor M 20 The gates of the capacitors are respectively connected to the twentieth capacitor C. 20 One end of the sixth resistor R6 is connected; the twentieth capacitor C 20 The other end is grounded; the other end of the sixth resistor R6 is connected to the power supply voltage VDD; the twentieth transistor M 20 The drain is connected in series with the thirteenth inductor L 13 Fourteenth inductor L 14 Connect to the power supply voltage VDD.
[0056] refer to Figure 5 The fourth amplification stage includes a twenty-second transistor M. 22 Eighth resistor R8, fifteenth inductor L 15 Up to the eighteenth inductor L 18 Capacitor C (21st) 21 Capacitor C (22nd) 22 The eighteenth inductor L 18 With the thirteenth inductor L 13 A transformer structure is formed, with a coupling coefficient of k6;
[0057] The twentieth transistor M 22 The gates of the capacitors are respectively connected to the twenty-second capacitor C. 22 One end of the eighth resistor R8 is connected; the twenty-second capacitor C 22 The other end is grounded; the other end of the eighth resistor R8 is connected to the fifth bias voltage Vbias5; the twenty-second transistor M 22 The source electrode is through the eighteenth inductor L 18 Ground; Twenty-second transistor M 22 The drain and the sixteenth inductor L 16 One end is connected to the sixteenth inductor L 16 The other end is connected to the fifteenth inductor L. 15 One end, the twenty-first capacitor C 21 One end is connected; the fifteenth inductor L 15 The other end is connected to the power supply voltage VDD; the twenty-first capacitor C 21The other end serves as the output of the fourth amplification stage, and the twenty-first capacitor C 21 The other end is grounded through the seventeenth inductor.
[0058] In this embodiment, by controlling the second transistor M2 to the fourth transistor M4, the sixth transistor M6 to the eighth transistor M8, and the twelfth transistor M... 12 Up to the fourteenth transistor M 14 The fifteenth transistor M 15 Up to the seventeenth transistor M 17 The conduction state of the fifth transistor M5 and the eleventh transistor M 11 The operating state allows for the combined tuning of multiple transformer resonant networks and switching inductors, thereby changing the operating frequency band of the frequency reconfigurable low-noise amplifier.
[0059] The technical effects of this embodiment will be further explained below with reference to simulation experiments.
[0060] Figure 6 This is a post-simulation result diagram of the gain amplitude-frequency characteristics of the low-noise amplifier in different operating modes of this embodiment. From Figure 6 As can be observed, the total operating frequency range of the frequency-reconfigurable low-noise amplifier designed in this embodiment is 17.8-35.8 GHz in post-simulation, with a relative bandwidth of 67%. The total operating frequency band is divided into 7 sub-bands, i.e., the low-noise amplifier is divided into 7 operating modes. The operating frequency ranges for each mode are: 17.8-21.6 GHz (Mode 1), 18.6-24.3 GHz (Mode 2), 22.5-28.7 GHz (Mode 3), 26.8-31.6 GHz (Mode 4), 29.3-33.4 GHz (Mode 5), 27.7-35.8 GHz (Mode 6), and 19.7-34.8 GHz (Mode 7). The highest gain of this low-noise amplifier is 26.0 dB, and the lowest gain is 11.9 dB.
[0061] Figure 7 This is a post-simulation result diagram of the noise figure of the low-noise amplifier in this embodiment under different operating modes. From Figure 7 It can be observed that, in the range of 17.8-35.8 GHz, the highest noise figure of this low-noise amplifier is 6.3 dB, and the lowest noise figure is 3.4 dB; the noise figure ranges for the seven operating modes are: 4.2-5.4 dB (Mode 1), 3.4-4.1 dB (Mode 2), 4.1-5.2 dB (Mode 3), 4.7-5.3 dB (Mode 4), 5.0-5.3 dB (Mode 5), 5.5-6.3 dB (Mode 6), and 3.7-5.9 dB (Mode 7).
[0062] The above description is merely a preferred embodiment of the present invention and does not constitute any limitation on the present invention. Any simple modifications, alterations, or equivalent structural changes made to the above embodiments based on the technical essence of the present invention shall still fall within the protection scope of the present invention.
Claims
1. A frequency-reconfigurable low-noise amplifier, characterized in that, Including the first to fourth amplification stages; The input terminal of the first stage amplification stage constitutes the input terminal of the low-noise amplifier; the output terminal of the first stage amplification stage is connected in series with the second stage amplification stage to the fourth stage amplification stage; the output terminal of the fourth stage amplification stage constitutes the output terminal of the low-noise amplifier. The first amplification stage is used to perform broadband input impedance matching on the received RF signal and to suppress the reverse propagation of impedance changes caused by the load reconfigurable tuning of the subsequent stage to the input terminal through reverse isolation; the second amplification stage is used to perform load reconfigurable tuning on the operating frequency band of the low noise amplifier; the third amplification stage is used to provide stable voltage gain; and the fourth amplification stage is used to perform broadband output impedance matching on the RF signal amplified by the previous stage.
2. The frequency-reconfigurable low-noise amplifier according to claim 1, characterized in that, The first amplification stage includes a first capacitor C1, a second capacitor C2, a third capacitor C3, a first inductor L1 to a fourth inductor L4, a first resistor R1, and a first transistor M1; One end of the first capacitor C1 serves as the input terminal of the first amplification stage, and the other end of the first capacitor C1 is connected to one end of the first inductor L1 and one end of the second inductor L2. The other end of the first inductor L1 is connected to one end of the first resistor R1 and one end of the second capacitor C2. The other end of the first resistor R1 is connected to the first bias voltage Vbias1. The other end of the second capacitor C2 is grounded. The other end of the second inductor L2 is connected to the gate of the first transistor M1. The source of the first transistor M1 is grounded through the fourth inductor L4. The drain of the first transistor M1 is connected to the power supply voltage VDD through the third inductor L3, and the drain of the first transistor M1 is connected to one end of the third capacitor C3. The other end of the third capacitor C3 serves as the output terminal of the first amplification stage.
3. The frequency-reconfigurable low-noise amplifier according to claim 1, characterized in that, The second amplification stage includes at least two tunable amplification stages connected in series and having the same structure, wherein each tunable amplification stage includes a second transistor M2 to a tenth transistor M1. 10 The second resistor R2, the third resistor R3, the fourth capacitor C4 to the eleventh capacitor C 11 The fifth inductor L5 to the eighth inductor L8, and the fifth inductor L5 and the sixth inductor L6 form the first transformer structure, and the seventh inductor L7 and the eighth inductor L8 form the second transformer structure; The tenth transistor M 10 The gate of transistor M serves as the input of the tunable amplifier stage, and the tenth transistor M... 10 The gate of the transistor is connected to the second bias voltage Vbias2 through the third resistor R3; the tenth transistor M 10 The source of transistor M is grounded; the tenth transistor M 10 The drain of transistor M1 is connected to the source of transistor M9; the gate of transistor M9 is connected to the tenth capacitor C1. 10 One end of the capacitor is connected to one end of the second resistor R2; the tenth capacitor C is connected to the other end of the capacitor R2. 10 The other end of the resistor is grounded; the other end of the second resistor R2 is connected to the power supply voltage VDD; the drain of the ninth transistor M9 is connected to the power supply voltage VDD through the series-connected eighth inductor L8 and sixth inductor L6, and the drain of the ninth transistor M9 is connected to the eleventh capacitor C. 11 One end is connected; the eleventh capacitor C 11 The other end serves as the output of the tunable amplifier stage; The sixth inductor L6 is connected in parallel between the drain and source of the fifth transistor M5; the gate of the fifth transistor M5 is connected to the enable bit EN1; one end of the fifth inductor L5 is grounded; the other end of the fifth inductor L5 is connected to one end of the fourth capacitor C4, one end of the fifth capacitor C5, and one end of the sixth capacitor C6; the other ends of the fourth capacitor C4, the fifth capacitor C5, and the sixth capacitor C6 are respectively grounded through the second transistor M2 to the fourth transistor M4. One end of the seventh inductor L7 is grounded; the other end of the seventh inductor L7 is connected to one end of the seventh capacitor C7, one end of the eighth capacitor C8, and one end of the ninth capacitor C9 respectively; the other ends of the seventh capacitor C7, the eighth capacitor C8, and the ninth capacitor C9 are grounded through the sixth transistor M6 to the eighth transistor M8 respectively. The gates of the second transistor M2 to the eighth transistor M8 are respectively connected to each digital control bit.
4. The frequency-reconfigurable low-noise amplifier according to claim 3, characterized in that, When the second-stage amplification stage includes two sequentially connected, identical first and second tunable amplification stages, the first tunable amplification stage includes transistors M2 through M1. 10 The second resistor R2, the third resistor R3, the fourth capacitor C4 to the eleventh capacitor C 11 The fifth inductor L5 to the eighth inductor L8; the second tunable amplifier stage includes the eleventh transistor M. 11 Up to the nineteenth transistor M 19 Fourth resistor R4, fifth resistor R5, twelfth capacitor C 12 Up to the nineteenth capacitor C 19 Ninth inductor L9 to twelfth inductor L 12 Furthermore, each component in the second tunable amplifier stage corresponds one-to-one with the component in the first tunable amplifier stage.
5. The frequency-reconfigurable low-noise amplifier according to claim 4, characterized in that, The equivalent load inductance value of the first tunable amplifier stage is as follows: ; in, This is the equivalent load inductance value of the first tunable amplifier stage. This is the enable bit, used to control the on or off state of the fifth transistor; It is the fifth inductor. It is the sixth inductor. It is the seventh inductor. It is the eighth inductor. The quality factor of the fifth inductor. The quality factor of the seventh inductor. Angular frequency, For the index of the cyclic summation, This is the gate control level of the fourth transistor M4. This is the gate control level of the third transistor M3. This is the gate control level of the second transistor M2. This is the gate control level of the eighth transistor M8. This is the gate control level for the seventh transistor M7. This is the gate control level of the sixth transistor M6. This is the coupling coefficient between the fifth inductor L5 and the sixth inductor L6. This is the coupling coefficient between the seventh inductor L7 and the eighth inductor L8. For the first The capacitance value of each capacitor, For the first The capacitance value of each capacitor; The equivalent load inductance value of the second tunable amplifier stage is as follows: ; in, This is the equivalent load inductance value of the second tunable amplifier stage. The enable bit is used to control the on or off state of the eleventh transistor; It is the ninth inductor. It is the tenth inductor. It is the eleventh inductor. The twelfth inductor, The quality factor of the tenth inductor. The quality factor of the twelfth inductor. For the twelfth transistor M 12 Gate control level, For the thirteenth transistor M 13 Gate control level, For the fourteenth transistor M 14 Gate control level, For the fifteenth transistor M 15 Gate control level, For the sixteenth transistor M 16 Gate control level, For the seventeenth transistor M 17 Gate control level, For the ninth inductor L9 and the tenth inductor L 10 The coupling coefficient between them For the eleventh inductor L 11 With the twelfth inductor L 12 The coupling coefficient between them For the first The capacitance value of each capacitor, For the first The capacitance value of each capacitor.
6. The frequency-reconfigurable low-noise amplifier according to claim 1, characterized in that, The third amplification stage includes the twentieth transistor M. 20 Twenty-first transistor M 21 The twentieth capacitor C 20 Sixth resistor R6, seventh resistor R7, thirteenth inductor L 13 Fourteenth inductor L 14 ; The 21st transistor M 21 The gate of transistor M serves as the input of the third amplification stage, and the twenty-first transistor M... 21 The gate of transistor M is connected to the fourth bias voltage Vbias4 via the seventh resistor R7; the twenty-first transistor M 21 The source is grounded; the twenty-first transistor M 21 The drain of the twentieth transistor M 20 The source connection; the twentieth transistor M 20 The gates of the capacitors are respectively connected to the twentieth capacitor C. 20 One end of the sixth resistor R6 is connected; the twentieth capacitor C 20 The other end is grounded; the other end of the sixth resistor R6 is connected to the power supply voltage VDD; the twentieth transistor M 20 The drain is connected in series with the thirteenth inductor L 13 Fourteenth inductor L 14 Connect to the power supply voltage VDD.
7. The frequency-reconfigurable low-noise amplifier according to claim 6, characterized in that, The fourth amplification stage includes the twenty-second transistor M. 22 Eighth resistor R8, fifteenth inductor L 15 Up to the eighteenth inductor L 18 Capacitor C (21st) 21 Capacitor C (22nd) 22 And the eighteenth inductor L 18 With the thirteenth inductor L 13 Forming a transformer structure; The twentieth transistor M 22 The gates of the capacitors are respectively connected to the twenty-second capacitor C. 22 One end of the eighth resistor R8 is connected; the twenty-second capacitor C 22 The other end is grounded; the other end of the eighth resistor R8 is connected to the fifth bias voltage Vbias5; the twenty-second transistor M 22 The source electrode is through the eighteenth inductor L 18 Ground; Twenty-second transistor M 22 The drain and the sixteenth inductor L 16 One end is connected to the sixteenth inductor L 16 The other end is connected to the fifteenth inductor L. 15 One end, the twenty-first capacitor C 21 One end is connected; the fifteenth inductor L 15 The other end is connected to the power supply voltage VDD; the twenty-first capacitor C 21 The other end serves as the output of the fourth amplification stage, and the twenty-first capacitor C 21 The other end is grounded through the seventeenth inductor.
