SM4 cipher algorithm circuit capable of configurable wheel fusion and encryption and decryption method

Abstract

The application relates to a configurable round fusion SM4 cryptographic algorithm circuit and an encryption and decryption method, which comprises an SM4 control module, a round key and system parameter management module, a round fusion module and a shared S-box module. The state conversion of the finite state machine of the SM4 control module can accurately control the entire key expansion, encryption and decryption process, ensuring efficient and accurate operation of the system. The round key and system parameter management module outputs round keys based on different working states, avoiding repeated consumption of hardware resources. The round fusion module integrates multiple round functions into a combination logic block, realizes multiple state updates and iterative calculations within a single clock cycle, significantly improves the calculation efficiency of the SM4 algorithm, and through parameterized configuration of the round fusion depth, can realize flexible balance between low resource consumption and high performance, and through the introduction of round function logic reuse technology and shared S-box strategy, the resource utilization efficiency and encryption performance are significantly optimized.

Description

Technical Field

[0001] This application relates to the field of data encryption technology, and in particular to a configurable round-fusion SM4 cryptographic algorithm circuit and encryption / decryption method. Background Technology

[0002] With the rapid development of Internet of Things (IoT) technology, information security faces unprecedented challenges. The SM4 algorithm, as a commercial cryptographic standard independently developed in my country and now an international standard, plays a crucial role in protecting personal privacy and data confidentiality. With its 128-bit block length and 32 rounds of iterative computation, this algorithm is widely used in data encryption and is suitable for encrypting and decrypting large amounts of data.

[0003] Existing SM4 hardware implementations primarily employ pipelined and iterative architectures. Pipeline architectures achieve high throughput through multiple rounds of parallel processing, but require the independent deployment of numerous S-boxes and registers, resulting in significant hardware resource consumption and making them unsuitable for resource-constrained IoT terminals. Iterative architectures reduce resource overhead by reusing single-round functions, but only one round of computation can be completed per clock cycle; 32 rounds of encryption require 32 clock cycles, leading to substantial encryption latency and failing to meet the demands of high-speed scenarios. In summary, existing technologies suffer from either high hardware resource consumption or significant encryption latency, making it difficult to meet the needs of different application scenarios and limiting the widespread applicability of the SM4 algorithm across various applications.

[0004] Furthermore, in traditional designs, key expansion and encryption / decryption round functions are implemented independently, leading to redundant consumption of hardware resources. The S-box, as a core component of nonlinear transformations, is typically deployed independently in multi-round architectures, further exacerbating resource waste. These issues further limit the application of the SM4 algorithm in resource-constrained environments, necessitating a novel SM4 cryptographic algorithm circuit that optimizes resource utilization and improves performance. Summary of the Invention

[0005] Therefore, it is necessary to provide a configurable round-fusion SM4 cryptographic algorithm circuit and encryption / decryption method to address the above-mentioned technical problems. Through modular design and parameterized configuration, a flexible balance between resource consumption and encryption performance of the SM4 algorithm can be achieved to meet the needs of diverse scenarios.

[0006] A configurable round-fusion SM4 cryptographic algorithm circuit includes: an SM4 control module, a round key and system parameter management module, a round fusion module, and a shared S-box module; The SM4 control module receives external control commands, clock signals, and reset signals, and outputs state control signals in the form of a finite state machine to control the switching of the wheel key and system parameter management module and the wheel fusion module in different working states. It outputs a wheel index signal to indicate the current round of operation, outputs a data input switching signal to control the input data of the wheel fusion module in different working states, and outputs a completion flag signal to indicate the completion status of different working states. The working states include key expansion, encryption, and decryption. The wheel key and system parameter management module is used to output wheel keys for different working states based on the status control signal and wheel index signal; The round fusion module is used to receive round keys and data input switching signals. Through the parameterized round fusion depth dp, it uses the internally serialized dp nested logic multiplexed round functions to complete the dp round iteration operation in a single clock cycle. It completes 32 rounds of key expansion, encryption or decryption iteration calculation in 32 / dp clock cycles and outputs the final iteration result to the result register. The shared S-box module is used to provide nonlinear transformation support for the wheel fusion module by being serially called by the dp wheel function within a single clock cycle through a multi-port design.

[0007] An encryption / decryption method for a configurable round-fusion SM4 cryptographic algorithm circuit includes the following steps: Initialization Phase: After the circuit is powered on, the finite state machine of the SM4 control module enters the idle state IDLE. It generates an initial key key_initial by XORing the user key with system parameters FK0-FK3, and assigns the initial key key_initial to the data input switching signal sm4_round_din. At the same time, it initializes the round index signal round_idx=0, the encryption initialization key ikey_en=0, the decryption initialization key ikey_de=31, the round key address index signal rki_wr_idx=0, and the round key generation completion signal key_exp_done is set to 0. Key expansion phase: When the external control command cmd=2'b01 is executed, the finite state machine jumps to the key expansion state KEYEXP. The system parameters CKI generated by the system parameter CKI generation unit in the round key and system parameter management module are used as the round key input to the round fusion module. The control round fusion module, based on the parameterized round fusion depth dp, uses the internally serialized dp nested logic multiplexed round functions to perform dp round iteration operations on the initial key key_initial. The generated dp round keys are written into the round key rki storage unit of the round key and system parameter management module through an array of dp elements data_for_write[0:dp]. After each round of writing is completed, rki_wr_idx increments by dp, and round_idx is synchronously incremented by dp. When rki_wr_idx=24, the writing of the last dp round keys is completed, key_exp_done is set to 1, and the key expansion completion flag signal key_res_vld is set to 1. The finite state machine returns to the IDLE state. Encryption Phase: When cmd=2'b10 and key_exp_done=1, the finite state machine enters the encryption state ENCRYPT. Plaintext data is input to the round fusion module through sm4_round_din. The round fusion module completes dp round iterations every clock cycle with dp as the round fusion depth. round_idx increments by dp every clock cycle. The round keys stored in the round key rki storage unit are called in ascending order. 32 rounds of encryption iteration calculation are completed in 32 / dp clock cycles, and the encryption result is updated to the result register result_reg. When round_idx+dp≥31, the encryption completion signal encrypt_done is set to 1, res_vld is set to 1, and the finite state machine returns to the IDLE state. The final encryption result is output through sm4_dout after byte reversal. sm4_dout is used to concatenate the byte-reversed result. Decryption Phase: When cmd=2'b11 and key_exp_done=1, the finite state machine enters the DECRYPT state. The ciphertext data is input to the round fusion module through sm4_round_din. The round fusion module completes dp round iterations every clock cycle with dp as the round fusion depth. round_idx increments by dp every clock cycle. The round keys stored in the round key rki storage unit are called in reverse order. 32 rounds of decryption iteration calculations are completed in 32 / dp clock cycles. The decryption result is updated to the result register result_reg. When round_idx+dp≥31, the decryption completion signal decrypt_done is set to 1, res_vld is set to 1, and the finite state machine returns to the IDLE state. The final decryption result is also output through sm4_dout after byte reversal.

[0008] The aforementioned configurable round-fusion SM4 cryptographic algorithm circuit and encryption / decryption method, by integrating multiple round functions into a single round-fusion combinational logic block, achieves multiple state updates and iterative calculations within a single clock cycle, significantly improving the computational efficiency of the SM4 algorithm. Furthermore, by parameterizing the round-fusion depth, a flexible balance between low resource consumption and high performance can be achieved, making it suitable for various IoT application scenarios. Moreover, by introducing round function logic reuse technology and a shared S-box strategy, resource utilization efficiency and encryption performance are significantly optimized. Simultaneously, the entire key expansion, encryption, and decryption process is precisely controlled through a finite state machine (FSM), ensuring efficient and accurate system operation. In summary, this application, based on a round-fusion architecture, implements a low-logic-consumption, low-processing-latency SM4 circuit through round function logic reuse and a shared S-box, possessing broad application prospects and applicable to various electronic information security fields, providing more reliable protection for electronic information security. Attached Figure Description

[0009] Figure 1 This is a schematic diagram of the overall framework of a configurable round-fusion SM4 cryptographic algorithm circuit in one embodiment; Figure 2 This is a schematic diagram of the state transitions of the finite state machine of the SM4 control module in one embodiment; Figure 3 This is a schematic diagram of the structure of the round key and system parameter management module in one embodiment; Figure 4 This is a schematic diagram of parameter selection logic in one embodiment; Figure 5 This is a schematic diagram of the wheel fusion module in one embodiment; Figure 6 This is a schematic diagram of a round function for logic multiplexing in one embodiment; Figure 7 This is a schematic diagram of the shared S-box module in one embodiment. Detailed Implementation

[0010] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0011] In one embodiment, such as Figure 1 As shown, a configurable round-fusion SM4 cryptographic algorithm circuit is provided, including: an SM4 control module, a round key and system parameter management module, a round fusion module, and a shared S-box module.

[0012] The SM4 control module receives external control commands (cmd), clock signals (clk), and reset signals (rst_n). It outputs a state control signal (state_c) in the form of a finite state machine to control the switching between different working states of the round key and system parameter management module and the round fusion module. It also outputs a round index signal (round_idx) to indicate the current round, a data input switching signal (sm4_round_din) to control the input data of the round fusion module in different working states, and completion flags (res_vld and key_res_vld) to indicate the completion status of different working states. These working states include key expansion, encryption, and decryption.

[0013] The wheel key and system parameter management module is used to output wheel keys for different working states based on the status control signal and wheel index signal.

[0014] The round fusion module is used to receive round keys and data input switching signals. Through the parameterized round fusion depth dp, it uses the internally serialized dp nested logic multiplexed round functions to complete the dp round iteration operation in a single clock cycle. It completes 32 rounds of key expansion, encryption or decryption iteration calculation in 32 / dp clock cycles and outputs the final iteration result to the result register.

[0015] The shared S-box module is used to provide nonlinear transformation support for the wheel fusion module by being serially called by the dp wheel function within a single clock cycle through a multi-port design.

[0016] The four modules mentioned above interact with each other via an internal signal bus, collaboratively realizing the complete functionality of the SM4 algorithm. Specifically, the finite state machine (FSM) state transitions of the SM4 control module precisely control the entire key expansion, encryption, and decryption process, ensuring efficient and accurate system operation. The round key and system parameter management module outputs corresponding round keys based on different operating states, avoiding redundant consumption of hardware resources. The round fusion module integrates multiple round functions into a combinational logic block, enabling multiple state updates and iterative calculations within a single clock cycle, significantly improving the computational efficiency of the SM4 algorithm. Furthermore, by parameterizing the round fusion depth, a flexible balance between low resource consumption and high performance can be achieved, making it suitable for various IoT application scenarios. Additionally, by introducing round function logic reuse technology and a shared S-box strategy, resource utilization efficiency and encryption performance are significantly optimized. In summary, the configurable round fusion SM4 cryptographic algorithm circuit provided in this application is suitable for various scenarios such as IoT secure communication, industrial control data encryption, smart terminal information protection, and cloud data storage encryption, and can achieve a flexible balance between resource consumption and encryption performance through parameterized configuration.

[0017] In one embodiment, the finite state machine of the SM4 control module includes four states: IDLE, KEYEXP, ENCRYPT, and DECRYPT. The SM4 control module controls the switching of different working states and process scheduling through state transitions. The IDLE state is the default state entered after the circuit is powered on and is used to complete initialization operations; the KEYEXP state is used to complete 32 rounds of key generation through key expansion; the ENCRYPT state is used to perform plaintext encryption; and the DECRYPT state is used to perform ciphertext decryption.

[0018] In one embodiment, such as Figure 2 As shown, the state transition logic of the SM4 control module is as follows: When the external control command cmd=2'b00 is executed, the finite state machine maintains the IDLE state, initializes the round index signal round_idx=0, encrypts the initialization key likey_en=0, decrypts the initialization key likey_de=31, and configures the data input switching signal sm4_round_din to be the XOR result of the user key and system parameters FK0-FK3. The round key generation completion signal key_exp_done is set to 0. Specifically, FK0=32'ha3b1bac6, FK1=32'h56aa3350, FK2=32'h677d9197, and FK3=32'hb27022dc.

[0019] When the external control command cmd=2'b01 is executed, the finite state machine enters the KEYEXP state. round_idx increments by dp every clock cycle (round_idx=round_idx+dp) until round_idx=24. At this time, the round key generation completion signal key_exp_done is set to 1, the finite state machine jumps back to the IDLE state, and the key expansion completion flag signal key_res_vld is set to 1.

[0020] When the external control command cmd=2'b10 and key_exp_done=1, the finite state machine enters the ENCRYPT state, sm4_round_din switches the plaintext data input round fusion module, round_idx increments by dp every clock cycle, and when round_idx+dp≥31, the encryption completion signal encrypt_done is set to 1, the finite state machine jumps back to the IDLE state, and res_vld is set to 1.

[0021] When the external control command cmd=2'b11 and key_exp_done=1, the finite state machine enters the DECRYPT state, sm4_round_din switches the ciphertext data input round fusion module, round_idx increments by dp every clock cycle, and when round_idx+dp≥31, the decryption completion signal decrypt_done is set to 1, the finite state machine jumps back to the IDLE state, and res_vld is set to 1; where res_vld is the encryption or decryption completion flag signal.

[0022] It should be understood that 2'b00, 2'b01, 2'b10 and 2'b11 are 2-bit wide binary control signals, corresponding to 00, 01, 10 and 11.

[0023] In one embodiment, such as Figure 3 As shown, the round key and system parameter management module includes: a round key (rki) storage unit, a system parameter (CKi) generation unit, and parameter selection logic. The round key (rki) storage unit uses a 32×32-bit register array (rki_mem) to store the round keys required for 32 rounds of encryption / decryption. In the key expansion state, the round fusion module writes the round keys to the round key (rki) storage unit in batches according to the round fusion depth (dp), and completes the update of all 32-bit round keys within 32 / dp clock cycles. The system parameter (CKi) generation unit generates 32-bit system parameters (CKi) using the combinational logic function (get_ck) and an index, avoiding waste of register resources. The parameter selection logic provides round keys for the round functions through a two-stage selection logic, including selecting the system parameter (CKi) as the round key in the key expansion state; selecting the forward-order data of rki_mem as the round key required for the current round in the encryption state (rki_0 - rki_(dp-1)); and selecting the reverse-order data of rki_mem as the round key required for the current round in the decryption state.

[0024] In one embodiment, such as Figure 4As shown, the parameter selection logic implements round key switching through a two-stage MUX (multiplexer). The first-stage MUX selects either CKi or rki_mem data as the round key based on the round key generation completion signal key_exp_done. The second-stage MUX selects either forward-order or reverse-order data for rki_mem based on the state control signal state_c. Specifically, when key_exp_done=0, the round key output is the system parameter CKi; when key_exp_done=1 and state_c=2'b10, the round key output is forward-order rki_mem data; and when key_exp_done=1 and state_c=2'b11, the round key output is reverse-order rki_mem data. Through the multiplexer, the round key and system parameter management module can provide the correct round key to the round fusion module based on the state control signals of the finite state machine, thereby achieving efficient execution of key expansion and data encryption / decryption.

[0025] For example, when dp=8, the parameter selection logic of the round key and system parameter management module is as follows: when key_exp_done=0 (key expansion stage), the round key output is the system parameter CKI, i.e., rki_0=get_ck(round_base+0), rki_1=get_ck(round_base+1), rki_2=get_ck(round_base+2), rki_3=get_ck(round_base+3), rki_4=get_ck(round_base+4), rki_5=get_ ck(round_base+5), rki_6=get_ck(round_base+6), rki_7=get_ck(round_base+7), where round_base is the current round base address; when key_exp_done=1 and state_c=2'b10 (encryption phase), the round key output is rki_mem in ascending order, i.e., rki_0=rki_mem[round_base+0], rki_1=rki_mem[round_base+1], rki_2=rki_mem[ro The round key output is rki_mem[round_base+2], rki_3=rki_mem[round_base+3], rki_4=rki_mem[round_base+4], rki_5=rki_mem[round_base+5], rki_6=rki_mem[round_base+6], rki_7=rki_mem[round_base+7]; when key_exp_done=1 and state_c=2'b11 (decryption phase), the round key output is the reverse of rki_mem, that is, rki_0=rki_mem[round_base+2]. m[31-round_base], rki_1=rki_mem[30-round_base], rki_2=rki_mem[29-round_base], rki_3=rki_mem[28-round_base], rki_4= rki_mem[27-round_base], rki_5=rki_mem[26-round_base], rki_6=rki_mem[25-round_base], rki_7=rki_mem[24-round_base].

[0026] In one embodiment, within the round fusion module, the round keys and dp round keys output by the system parameter management module and the data input switching signal sm4_round_din output by the SM4 control module are received in each clock cycle, and the round fusion depth is determined. Configured as The round function configuration for DP nested logic multiplexing is as follows: The output of the last-stage round function is set in the result register result_reg.

[0027] Specifically, the wheel fusion module can adapt to different scenarios by adjusting the wheel fusion depth dp: dp = 1 is a lightweight state, suitable for resource-constrained IoT terminals; dp = 8 is a balanced state, suitable for scenarios with medium performance requirements; and dp = 32 is a fully pipelined state, suitable for high-speed encryption scenarios. For example, At that time, the wheel fusion module connects 8 sets of wheel functions in series ( to The output result register is set only at the last stage. Eight rounds of iteration are completed in a single clock cycle, and 32 rounds of encryption / decryption require only 4 clock cycles.

[0028] like Figure 5 As shown, the data flow in each clock cycle of the round fusion module is as follows: the initial data data_0, controlled by the data input switching signal sm4_round_din, is input into the first-level round function. After calculation, the first-level iteration result data_1 is output; data_1 is input into the second-level round function. Output the second-level iteration result data_2; and so on, the dp-1-th iteration result data_(dp-1) is input into the dp-th iteration function. Output the dp-th iteration result data_dp and store it in result_reg, which will be used as data_0 for the next clock cycle.

[0029] In one embodiment, the input signals for each round function include: 128-bit round input data `round_din` split into four 32-bit words, a 32-bit round key, a 1-bit state control signal `keyexp_mode`, and four 8-bit S-box input addresses `sbox_bin0`-`sbox_bin3`; the output signals for each round function include: 128-bit round output data `round_dout` and four 8-bit S-box output results `sbox_bout0`-`sbox_bout3`; wherein, .

[0030] like Figure 6 As shown, the internal logic of each round function is as follows: First, calculate the intermediate value. ,in This indicates an XOR operation; the 32-bit t_in is then split into four 8-bit bytes b0-b3 as sbox_bin0-sbox_bin3, which are transformed by the shared S-box module to obtain sbox_bout0-sbox_bout3. The outputs of the four 8-bit S-boxes are then merged into a 32-bit sbox_out; then, the working state is switched according to keyexp_mode, and the corresponding linear transformation mode is selected to generate the linear transformation result lin_tr for the current round; finally... When keyexp_mode=0, the round function switches to key expansion mode, using the L_key linear transformation, i.e.: ; When keyexp_mode=1, the round function switches to encryption / decryption mode, using the L_enc linear transformation, i.e.: .

[0031] In one embodiment, the shared S-box module is implemented using a 4×dp port distributed RAM to provide 4×dp groups of 8-bit address lines (sbox_addr_0 to sbox_addr_(4×dp-1)) and data lines (sbox_dout_0 to sbox_dout_(4×dp-1)) for the dp round function. Each round function transmits input data through the 4 groups of address lines, and returns the result through the corresponding data lines after being transformed by the S-box.

[0032] For example, such as Figure 7 As shown, when dp=8, the shared S-box module requires a total of 4×dp = 32 ports. The shared S-box module is implemented using 32-port distributed RAM. Each round function transmits input data through 4 sets of address lines, and after transformation by the S-box, the result is returned through the corresponding data lines. For example, Use sbox_addr_0 to sbox_addr_3, and output sbox_dout_0 to sbox_dout_3 accordingly; Using sbox_addr_4 to sbox_addr_7, the corresponding outputs are sbox_dout_4 to sbox_dout_7. And so on, the dp roundabout function calls the shared S-box sequentially within a single clock cycle, without any data conflicts.

[0033] When dp=8, the signal interface of the shared S-box module is defined as follows: Address input: sbox_addr_0 (sbox_bin0 of u_round0), sbox_addr_1 (sbox_bin1 of u_round0), sbox_addr_2 (sbox_bin2 of u_round0), sbox_addr_3 (sbox_bin3 of u_round0); sbox_addr_4 (sbox_bin0 of u_round1) to sbox_addr_31 (sbox_bin3 of u_round7); Data output: sbox_dout_0 (corresponding to sbox_addr_0) to sbox_dout_31 (corresponding to sbox_addr_31). The output signals correspond one-to-one with the address signals. Asynchronous reading is achieved through distributed RAM, ensuring that the nonlinear transformation of 8 round functions is completed within a single clock cycle.

[0034] In one embodiment, a method for encryption and decryption of a configurable round-fusion SM4 cryptographic algorithm circuit is provided, comprising the following steps: Initialization Phase: After the circuit is powered on, the finite state machine of the SM4 control module enters the idle state (IDLE) and is activated via the user key. The initial key `key_initial` is generated by XORing the system parameters FK0-FK3, and then assigned to the data input switching signal `sm4_round_din`. Simultaneously, the round index signal `round_idx` is initialized to 0, the encryption initialization key `ikey_en` is initialized to 0, the decryption initialization key `ikey_de` is initialized to 31, the round key address index signal `rki_wr_idx` is initialized to 0, and the round key generation completion signal `key_exp_done` is set to 0. Specifically, .

[0035] Key expansion phase: When the external control command cmd=2'b01 is executed, the finite state machine jumps to the key expansion state KEYEXP. The system parameters CKI generated by the system parameter CKI generation unit in the round key and system parameter management module are used as the round key input to the round fusion module. The control round fusion module, based on the parameterized round fusion depth dp, uses the internally serialized dp nested logic multiplexed round functions to perform dp round iteration operations on the initial key key_initial. The generated dp round keys are written into the round key rki storage unit of the round key and system parameter management module through an array of dp elements data_for_write[0:dp]. After each round of writing is completed, rki_wr_idx increments by dp, and round_idx is synchronously incremented by dp. When rki_wr_idx=24, the writing of the last dp round keys is completed, key_exp_done is set to 1, and the key expansion completion flag signal key_res_vld is set to 1. The finite state machine returns to the IDLE state.

[0036] Encryption Phase: When cmd=2'b10 and key_exp_done=1, the finite state machine enters the encryption state ENCRYPT. Plaintext data is input to the round fusion module through sm4_round_din. The round fusion module completes dp round iterations every clock cycle with dp as the round fusion depth. round_idx increments by dp every clock cycle. The round keys stored in the round key rki storage unit are called in ascending order. 32 / dp clock cycles are used to complete 32 rounds of encryption iteration calculations. The encryption result is updated to the result register result_reg. When round_idx+dp≥31, the encryption completion signal encrypt_done is set to 1, res_vld is set to 1, and the finite state machine returns to the IDLE state. Finally, the encryption result is output through sm4_dout after byte reversal. For example, the round fusion module uses dp=8 as the fusion depth and completes 8 rounds of iteration per clock cycle: First clock cycle: round_base=0, using rki_mem[0:7] as the round key, completes rounds 0-7, and stores the results in result_reg; Second clock cycle: round_base=8, using rki_mem[8:15] as the round key, completes rounds 8-15, and updates the results in result_reg; Third clock cycle: round_base=16, using rki_mem[16:23] as the round key, completes rounds 16-23, and updates the results in result_reg; Fourth clock cycle: round_base=24, using rki_mem[24:31] as the round key, completes rounds 24-31, and updates the results in result_reg. At this point, round_idx + 8 ≥ 31, encrypt_done is set to 1, res_vld is set to 1, and the finite state machine returns to the IDLE state. The final encryption result is then output via sm4_dout after byte reversal ({result_reg[31:0], result_reg[63:32], result_reg[95:64], result_reg[127:96]}). sm4_dout is used to concatenate the byte-reversed result. For example, if wordx represents a 32-bit word, the encryption or decryption result is {word0, word1, word2, word3}, which are four 32-bit words. After byte reversal, they become {word3, word2, word1, word0}. Finally, sm4_dout concatenates the byte-reversed result into a 128-bit data set before outputting it.

[0037] Decryption Phase: When cmd=2'b11 and key_exp_done=1, the finite state machine enters the DECRYPT state. The ciphertext data is input to the round fusion module through sm4_round_din. The round fusion module completes dp round iterations every clock cycle with dp as the round fusion depth. round_idx increments by dp every clock cycle. The round keys stored in the round key rki storage unit are called in reverse order. 32 / dp clock cycles are used to complete 32 rounds of decryption iteration calculations. The decryption result is updated to the result register result_reg. When round_idx+dp≥31, the decryption completion signal decrypt_done is set to 1, res_vld is set to 1, and the finite state machine returns to the IDLE state. The final decryption result is also output after byte reversal. For example, the round fusion module uses dp=8 as the fusion depth and completes 8 rounds of iteration per clock cycle: In the first clock cycle, rki_mem[31:24] is used as the round key to complete the corresponding decryption round operation; in subsequent clock cycles, rki_mem[23:16], rki_mem[15:8], and rki_mem[7:0] are used in sequence, and the final decryption result is also output through sm4_dout after byte reversal.

[0038] In one embodiment, the method further includes: during the key expansion phase, encryption phase, and decryption phase, the dp wheel function serially calls the shared S-box module within a single clock cycle, with the shared S-box module providing nonlinear change support.

[0039] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0040] The above embodiments are merely illustrative of several implementation methods of this application, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make several modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application.

Claims

1. A configurable round-fusion SM4 cryptographic algorithm circuit, characterized in that, include: SM4 control module, round key and system parameter management module, round fusion module, and shared S-box module; The SM4 control module receives external control commands, clock signals, and reset signals, and outputs state control signals in the form of a finite state machine to control the switching of the round key and system parameter management module and the round fusion module in different working states. It outputs a round index signal to indicate the current round of operation, outputs a data input switching signal to control the input data of the round fusion module in different working states, and outputs a completion flag signal to indicate the completion status of different working states. The working states include key expansion, encryption, and decryption. The wheel key and system parameter management module is used to output wheel keys for different working states based on the state control signal and wheel index signal; The round fusion module is used to receive the round key and data input switching signal, and through the parameterized round fusion depth dp, it uses the internally serialized dp nested logic multiplexed round functions to complete the dp round iteration operation in a single clock cycle. It completes 32 rounds of key expansion, encryption or decryption iteration calculation in 32 / dp clock cycles, and outputs the final iteration result to the result register. The shared S-box module is used to provide nonlinear transformation support for the wheel fusion module by being serially called by the dp wheel function within a single clock cycle through a multi-port design.

2. The configurable round-fusion SM4 cryptographic algorithm circuit according to claim 1, characterized in that, The finite state machine of the SM4 control module includes four states: IDLE, KEYEXP, ENCRYPT, and DECRYPT. The SM4 control module controls the switching of different working states and process scheduling through state transitions. Among them, the IDLE state is the default state that the circuit enters after power-on and is used to complete the initialization operation; the KEYEXP state is used to complete 32 rounds of key generation through key expansion; the ENCRYPT state is used to complete plaintext encryption; and the DECRYPT state is used to complete ciphertext decryption.

3. The configurable round-fusion SM4 cryptographic algorithm circuit according to claim 2, characterized in that, The state transition logic of the SM4 control module is as follows: When the external control command cmd=2'b00 is executed, the finite state machine maintains the IDLE state, initializes the round index signal round_idx=0, encrypts the initialization key ikey_en=0, decrypts the initialization key ikey_de=31, and configures the data input switching signal sm4_round_din to be the XOR result of the user key and system parameters FK0-FK3. The round key generation completion signal key_exp_done is set to 0. When the external control command cmd=2'b01 is executed, the finite state machine enters the KEYEXP state. round_idx increments by dp every clock cycle until round_idx=24. At this time, the round key generation completion signal key_exp_done is set to 1, and the finite state machine jumps back to the IDLE state. At the same time, the key expansion completion flag signal key_res_vld is set to 1. When the external control command cmd=2'b10 and key_exp_done=1, the finite state machine enters the ENCRYPT state, sm4_round_din switches the plaintext data input round fusion module, round_idx increments by dp every clock cycle, and when round_idx+dp≥31, the encryption completion signal encrypt_done is set to 1, the finite state machine jumps back to the IDLE state, and res_vld is set to 1; When the external control command cmd=2'b11 and key_exp_done=1, the finite state machine enters the DECRYPT state, sm4_round_din switches the ciphertext data input round fusion module, round_idx increments by dp every clock cycle, and when round_idx+dp≥31, the decryption completion signal decrypt_done is set to 1, the finite state machine jumps back to the IDLE state, and res_vld is set to 1; where res_vld is the encryption or decryption completion flag signal.

4. The configurable round-fusion SM4 cryptographic algorithm circuit according to claim 1, characterized in that, The round key and system parameter management module includes: a round key rki storage unit, a system parameter CTi generation unit, and parameter selection logic; The round key rki storage unit uses a 32×32-bit register array rki_mem to store the round keys required for 32 rounds of encryption / decryption. In the key expansion state, the round fusion module writes the round keys into the round key rki storage unit in batches according to the round fusion depth dp, and completes the update of all 32-bit round keys in 32 / dp clock cycles. The system parameter CTi generation unit is used to generate 32-bit system parameter CTi through combinational logic function get_ck and index; The parameter selection logic is used to provide a round key for the round function through a two-level selection logic, including selecting the system parameter CTi as the round key in the key expansion state; selecting the forward-order data of rki_mem as the round key required for the current round in the encryption state; and selecting the reverse-order data of rki_mem as the round key required for the current round in the decryption state.

5. The configurable round-fusion SM4 cryptographic algorithm circuit according to claim 4, characterized in that, The parameter selection logic implements round key switching through a two-level MUX. The first-level MUX selects either CKi or rki_mem data as the round key based on the round key generation completion signal key_exp_done. The second-level MUX selects either forward or reverse-order data for rki_mem based on the state control signal state_c. Specifically, when key_exp_done=0, the round key output is the system parameter CKi; when key_exp_done=1 and state_c=2'b10, the round key output is forward-order rki_mem data; and when key_exp_done=1 and state_c=2'b11, the round key output is reverse-order rki_mem data.

6. The configurable round-fusion SM4 cryptographic algorithm circuit according to claim 1, characterized in that, In the round fusion module, within each clock cycle, it receives dp round keys output by the round key and system parameter management module, and the data input switching signal sm4_round_din output by the SM4 control module, indicating the round fusion depth. Configured as The round function configuration for DP nested logic multiplexing is as follows: The output of the last round function is set in the result register result_reg; The data flow in each clock cycle of the round fusion module is as follows: the initial data data_0, controlled by the data input switching signal sm4_round_din, is input into the first-level round function. After calculation, the first-level iteration result data_1 is output; data_1 is input into the second-level round function. Output the second-level iteration result data_2; and so on, the dp-1-th iteration result data_(dp-1) is input into the dp-th iteration function. Output the dp-th iteration result data_dp and store it in result_reg, which will be used as data_0 for the next clock cycle.

7. The configurable round-fusion SM4 cryptographic algorithm circuit according to claim 6, characterized in that, The input signals for each round function include: 128-bit round input data `round_din` split into four 32-bit words, a 32-bit round key, a 1-bit status control signal `keyexp_mode`, and four 8-bit S-box input addresses `sbox_bin0`-`sbox_bin3`; the output signals for each round function include: 128-bit round output data `round_dout` and four 8-bit S-box output results `sbox_bout0`-`sbox_bout3`; where... ; The internal logic of each round function is as follows: First, calculate the intermediate value. ,in This indicates an XOR operation; the 32-bit t_in is then split into four 8-bit bytes b0-b3 as sbox_bin0-sbox_bin3, which are transformed by the shared S-box module to obtain sbox_bout0-sbox_bout3. The outputs of the four 8-bit S-boxes are then merged into a 32-bit sbox_out; then, the working state is switched according to keyexp_mode, and the corresponding linear transformation mode is selected to generate the linear transformation result lin_tr for the current round; finally... When keyexp_mode=0, the round function switches to the key expansion state and uses the L_key linear transformation; when keyexp_mode=1, the round function switches to the encryption / decryption state and uses the L_enc linear transformation.

8. The configurable round-fusion SM4 cryptographic algorithm circuit according to claim 6, characterized in that, The shared S-box module is implemented using a 4×dp port distributed RAM, which provides 4×dp groups of 8-bit address lines and data lines for the dp round function. Each round function transmits input data through 4 groups of address lines, and returns the result through the corresponding data lines after transformation by the S-box.

9. An encryption / decryption method based on a configurable round-fusion SM4 cryptographic algorithm circuit according to any one of claims 1-8, characterized in that, The method includes: Initialization Phase: After the circuit is powered on, the finite state machine of the SM4 control module enters the idle state IDLE. It generates an initial key key_initial by XORing the user key with system parameters FK0-FK3, and assigns the initial key key_initial to the data input switching signal sm4_round_din. At the same time, it initializes the round index signal round_idx=0, the encryption initialization key ikey_en=0, the decryption initialization key ikey_de=31, the round key address index signal rki_wr_idx=0, and the round key generation completion signal key_exp_done is set to 0. Key expansion phase: When the external control command cmd=2'b01 is executed, the finite state machine jumps to the key expansion state KEYEXP. The system parameters CKI generated by the system parameter CKI generation unit in the round key and system parameter management module are used as the round key input to the round fusion module. The control round fusion module, based on the parameterized round fusion depth dp, uses the internally serialized dp nested logic multiplexed round functions to perform dp round iteration operations on the initial key key_initial. The generated dp round keys are written into the round key rki storage unit of the round key and system parameter management module through an array of dp elements data_for_write[0:dp]. After each round of writing is completed, rki_wr_idx increments by dp, and round_idx is synchronously incremented by dp. When rki_wr_idx=24, the writing of the last dp round keys is completed, key_exp_done is set to 1, and the key expansion completion flag signal key_res_vld is set to 1. The finite state machine returns to the IDLE state. Encryption Phase: When cmd=2'b10 and key_exp_done=1, the finite state machine enters the encryption state ENCRYPT. Plaintext data is input to the round fusion module through sm4_round_din. The round fusion module completes dp round iterations every clock cycle with dp as the round fusion depth. round_idx increments by dp every clock cycle. The round keys stored in the round key rki storage unit are called in ascending order. 32 rounds of encryption iteration calculation are completed in 32 / dp clock cycles, and the encryption result is updated to the result register result_reg. When round_idx+dp≥31, the encryption completion signal encrypt_done is set to 1, res_vld is set to 1, and the finite state machine returns to the IDLE state. The final encryption result is output through sm4_dout after byte reversal. sm4_dout is used to concatenate the byte-reversed result. Decryption Phase: When cmd=2'b11 and key_exp_done=1, the finite state machine enters the DECRYPT state. The ciphertext data is input to the round fusion module through sm4_round_din. The round fusion module completes dp round iterations every clock cycle with dp as the round fusion depth. round_idx increments by dp every clock cycle. The round keys stored in the round key rki storage unit are called in reverse order. 32 rounds of decryption iteration calculations are completed in 32 / dp clock cycles. The decryption result is updated to the result register result_reg. When round_idx+dp≥31, the decryption completion signal decrypt_done is set to 1, res_vld is set to 1, and the finite state machine returns to the IDLE state. The final decryption result is also output through sm4_dout after byte reversal.

10. The encryption and decryption method for a configurable round-fusion SM4 cryptographic algorithm circuit according to claim 9, characterized in that, The method further includes: During the key expansion, encryption, and decryption phases, the dp wheel function serially calls the shared S-box module within a single clock cycle, which provides nonlinear variation support.

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