Display device and upgrade progress bar display method of dual-chip architecture

Abstract

The application discloses a display device and an upgrade progress bar display method of a dual-chip architecture. The display device comprises a display, a first controller and a second controller. The dual controllers are respectively loaded with different operating systems and perform upgrade tasks in parallel using a differentiated upgrade architecture. The first controller synchronously collects the upgrade states and upgrade progress of itself and the second controller. When the upgrade process of the first controller enters a verification stage, the first controller compares the upgrade progress of the second controller with a preset threshold, matches a corresponding global progress calculation strategy, generates a unified global upgrade progress through the global progress calculation strategy fusion, and drives the display to update and display in real time. The application solves the problem of progress lag and distortion caused by only displaying the master control progress in the dual-chip heterogeneous parallel OTA upgrade scene by adapting the progress fusion logic from the chip progress, realizes unified upgrade progress display, and improves the user experience.

Description

Technical Field

[0001] This application relates to the field of display device technology, and in particular to a display device and a method for displaying an upgrade progress bar using a dual-chip architecture. Background Technology

[0002] Display devices are intelligent devices capable of presenting a user interface and supporting user interaction. Taking smart TVs as an example, smart TVs are television products based on Internet application technology, equipped with open operating systems and chips, possessing open application platforms, enabling two-way human-computer interaction, and integrating multiple functions such as audio-visual, entertainment, and data to meet diverse and personalized user needs.

[0003] Display devices can employ a master-slave dual-chip heterogeneous architecture, for example, where a master chip running the Android system and a slave chip running a Linux (Unix-like open-source system) work together for image processing. For system upgrades (OTA, Over-The-Air), the master chip uses a virtual A / B upgrade architecture, dividing the installation progress into two stages: flashing and verification, each presented as a progress bar from 0 to 100%. The slave chip uses a traditional A / B partitioning architecture, reporting only the installation progress of a single stage (0 to 99%). When the two chips are upgraded in parallel, the upgrade package contains two firmware files. The master and slave chips execute the upgrade task independently, either using only the master chip's progress as the global progress bar or alternately distributing progress values ​​to different chips.

[0004] However, due to differences in hardware performance, firmware size, and upgrade logic between the main chip and the slave chip, their upgrade speeds are inconsistent, resulting in severe distortion of the global progress bar. For example, if the main chip completes first, the progress bar may remain stuck near 100% for an extended period, while if the slave chip completes first, the progress may jump or regress. Users cannot accurately judge the upgrade progress and remaining time, thus affecting the predictability of the upgrade process and the user experience. Summary of the Invention

[0005] This application provides a method for displaying an upgrade progress bar in a display device and a dual-chip architecture, in order to solve the problems of predictability and poor user experience in the upgrade process of a dual-chip architecture.

[0006] In a first aspect, this application provides a display device, comprising: The monitor is configured to display the user interface; The first controller is configured to run the first operating system and execute the first upgrade task using the first upgrade architecture; The second controller is configured to run a second operating system and execute a second upgrade task using a second upgrade architecture, wherein the second upgrade task is executed in parallel with the first upgrade task; The first controller is also configured to: Obtain the first upgrade status and first upgrade progress of the first controller, and obtain the second upgrade status and second upgrade progress of the second controller; In response to the first upgrade state entering the verification phase, the target calculation method for the global upgrade progress is determined based on the numerical relationship between the second upgrade progress and the preset threshold. Based on the target calculation method, the first upgrade progress and the second upgrade progress are merged to generate the global upgrade progress; Control the display to update the global upgrade progress in the user interface.

[0007] The above technical solution has the following beneficial effects or advantages: A dual-controller parallel upgrade hardware architecture is built, which can simultaneously collect the upgrade progress of two independent channels from heterogeneous dual chips. When the main controller enters the verification phase, a differentiated fusion algorithm based on the real-time progress matching of the slave chips is used to uniformly generate a single-channel global progress display for the user. This solves the problem of progress distortion caused by only displaying the progress of a single chip, and realizes a unified and intuitive display of the dual-chip parallel upgrade progress, thereby improving the user's perception and experience of the upgrade process.

[0008] In some embodiments of this application, the second controller is further configured to: The second upgrade status and the second upgrade progress are reported to the first controller; The first controller obtains the second upgrade status and the second upgrade progress of the second controller, specifically configured as follows: A polling request is sent to the second controller at a preset period; Receive the second upgrade status and the second upgrade progress returned by the second controller in response to the polling request.

[0009] The above technical solution has the following beneficial effects or advantages: Through a cross-chip interaction mechanism that uses periodic polling by the main controller, the chip upgrade status and progress data are reported in real time and stably, avoiding communication congestion and data loss caused by proactive chip push.

[0010] In some embodiments of this application, the first controller, in response to the first upgrade state entering the verification phase, determines the target calculation method for the global upgrade progress based on the numerical relationship between the second upgrade progress and a preset threshold, specifically configured as follows: Obtain the current value of the second upgrade progress when entering the verification phase; Compare the current value of the second upgrade progress with the preset threshold; If the current value of the second upgrade progress is greater than or equal to the preset threshold, the target calculation method is determined to be the first calculation method; If the current value of the second upgrade progress is less than the preset threshold, the target calculation method is determined to be the second calculation method, and the first calculation method is different from the second calculation method.

[0011] The above technical solution has the following beneficial effects or advantages: The progress of the slave chip is used as the basis for judgment at the moment the master control enters the verification. The progress fusion strategy is adapted for two scenarios: fast slave chip upgrade and slow slave chip upgrade. This avoids the defect that a single computing logic cannot adapt to the speed difference between the two chips, so that the global progress is consistent with the actual upgrade process.

[0012] In some embodiments of this application, when the target calculation method is the first calculation method, the first controller, based on the target calculation method, merges the first upgrade progress and the second upgrade progress to generate the global upgrade progress, specifically configured as follows: During the verification phase, the global upgrade progress corresponding to the first upgrade progress is limited to not exceeding the display value corresponding to the preset threshold; Upon completion of the first upgrade task, the second upgrade progress is retrieved again; If the second upgrade progress obtained again does not reach the target value, the global upgrade progress is controlled to increase from the display value corresponding to the preset threshold to the target value at a preset rate. The target value represents the progress reaching the end point. If the second upgrade progress that has been reacquired has reached the target value, control the global upgrade progress to jump to the target value.

[0013] The above technical solution has the following beneficial effects or advantages: For scenarios with faster chip upgrades, the global progress of the verification phase is capped at a threshold to avoid the problem of the main control verification phase progress rapidly reaching 100% and then experiencing prolonged lag. After the main control upgrade is completed, the remaining progress is gradually and evenly replenished, with smooth progress changes and no jumps, ensuring that users will not mistakenly believe that the upgrade has stalled or that the device has malfunctioned.

[0014] In some embodiments of this application, after the first controller controls the global upgrade progress to increase from the displayed value corresponding to the preset threshold to the target value at a preset rate, it is further configured to: Get the second upgrade progress again; If the second upgrade progress obtained again still does not reach the target value, the global upgrade progress is maintained at the target value; In addition, the second upgrade progress is obtained at preset time intervals until the second upgrade progress reaches the target value.

[0015] The above technical solution has the following beneficial effects or advantages: Once the overall progress reaches its endpoint, the system continuously polls and monitors the actual chip upgrade status, preventing the entire device upgrade from being considered complete simply because the progress bar shows 100%. This prevents users from prematurely restarting the device, avoiding the risk of device malfunctions such as image quality failure or firmware corruption due to an incomplete chip upgrade.

[0016] In some embodiments of this application, when the target calculation method is the second calculation method, the first controller, based on the target calculation method, merges the first upgrade progress and the second upgrade progress to generate the global upgrade progress, specifically configured as follows: The second upgrade progress is normalized and used as the global upgrade progress; Upon completion of the first upgrade task, the second upgrade progress is retrieved again; If the second upgrade progress obtained again does not reach the target value, the global upgrade progress is controlled to be displayed as the normalized second upgrade progress until the second upgrade progress reaches the target value. If the second upgrade progress that has been reacquired has reached the target value, control the global upgrade progress to jump to the target value.

[0017] The above technical solution has the following beneficial effects or advantages: It adapts to scenarios where the upgrade speed of the slave chip lags behind that of the main controller. It uses the normalized slave chip progress as the global display benchmark, which can reflect the bottleneck of the whole machine upgrade and avoid the problem of the main controller verification progress continuously rising, causing the global progress to be inflated and misleading users to judge the remaining upgrade time.

[0018] In some embodiments of this application, the first controller normalizes the second upgrade progress, specifically configured as follows: Record the progress of the second upgrade as a baseline value; The second upgrade progress will be retrieved again at preset time intervals; The global upgrade progress is obtained by normalizing the second upgrade progress obtained from the re-acquired second upgrade progress and the baseline value.

[0019] The above technical solution has the following beneficial effects or advantages: By dynamically normalizing the chip progress based on the start time of the verification phase, the time window of the main control verification phase can be accurately matched. The changes in the chip segment progress are uniformly mapped to the global progress bar, which can eliminate the numerical discontinuities and jumps caused by the incompatibility between the chip single-stage progress and the main control dual-stage progress architecture.

[0020] In some embodiments of this application, the first upgrade state includes a flashing phase and a verification phase; the first controller obtains the first upgrade state and the first upgrade progress of the first controller, specifically configured as follows: During the flashing phase, the first upgrade progress is determined based on the proportion of the number of flashed storage blocks to the total number of storage blocks in the upgrade package. During the verification phase, the first upgrade progress is determined based on the ratio of the number of verified storage blocks to the total number of storage blocks in the upgrade package.

[0021] The above technical solution has the following beneficial effects or advantages: It is compatible with the Virtual A / B (Virtual A / B Partition) upgrade framework, and accurately calculates the native progress of the master controller's write and verification stages based on storage block statistics, without requiring any changes to the original single-chip upgrade underlying logic.

[0022] In some embodiments of this application, the first controller is further configured to: In response to the second upgrade status being failed, the display is controlled to show an upgrade failure message in the user interface; In response to the second upgrade status being successful and the first upgrade status being completed, the display is controlled to show an upgrade completion prompt in the user interface.

[0023] The above technical solution has the following beneficial effects or advantages: The system provides unified monitoring of the success or failure of dual-chip upgrades, with the overall upgrade result determined jointly by the status of both chips. It promptly alerts users to any chip upgrade anomalies via pop-up windows, and only displays a completion message after both chips have finished upgrading. This avoids device malfunctions caused by prompting a restart upon completion of only one chip upgrade, thus improving the security of the upgrade process.

[0024] Secondly, this application provides a method for displaying an upgrade progress bar for a dual-chip architecture, comprising: Obtain the first upgrade status and first upgrade progress of the first controller, and obtain the second upgrade status and second upgrade progress of the second controller; In response to the first upgrade state entering the verification phase, the target calculation method for the global upgrade progress is determined based on the numerical relationship between the second upgrade progress and the preset threshold. Based on the target calculation method, the first upgrade progress and the second upgrade progress are merged to generate the global upgrade progress; Control the display to update the global upgrade progress in the user interface.

[0025] The above technical solution has the following beneficial effects or advantages: The first controller actively acquires the upgrade status and progress of each of the two chips. When the first upgrade task enters the verification stage, it dynamically determines the calculation method of the global progress based on the numerical relationship between the second upgrade progress and the preset threshold. This enables the accurate fusion of the global progress bar in the scenario of parallel upgrade of heterogeneous dual chips, solves the problems of progress lag, jumps and rollback caused by the global display driven by the progress of a single chip, and allows users to perceive the overall upgrade process of the dual chips in a real and smooth way through a unified progress bar, thereby improving the predictability of the upgrade process and the user experience. Attached Figure Description

[0026] To more clearly illustrate the technical solution of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is a schematic diagram illustrating the operation scenarios of a display device provided in some embodiments of this application; Figure 2 This is a schematic diagram of the hardware configuration of a display device provided in some embodiments of this application; Figure 3 This is a schematic diagram of the software configuration of a display device provided in some embodiments of this application; Figure 4 A schematic diagram illustrating a dual-chip heterogeneous architecture provided in some embodiments of this application; Figure 5 A flowchart illustrating an upgrade progress bar display method for a dual-chip architecture provided in some embodiments of this application; Figure 6 This is a schematic diagram illustrating the effect of a progress bar provided in some embodiments of this application; Figure 7 A schematic diagram illustrating the process of determining the global upgrade progress calculation method provided in some embodiments of this application; Figure 8 A schematic diagram of the progress fusion process for a first calculation method provided in some embodiments of this application; Figure 9 A schematic diagram illustrating the effect of a progress bar during the verification phase provided in some embodiments of this application; Figure 10A schematic diagram illustrating the effect of a progress bar when the second upgrade progress has reached the target value, as provided in some embodiments of this application. Figure 11 A schematic diagram of the progress fusion process for a second calculation method provided in some embodiments of this application; Figure 12 This is a schematic diagram illustrating the effect of upgrade failure notification information provided in some embodiments of this application; Figure 13 This is a schematic diagram illustrating the effect of the upgrade completion prompt provided in some embodiments of this application; Figure 14 Interactive diagrams illustrating the display of an upgrade progress bar provided in some embodiments of this application; Figure 15 A layered block diagram of a dual-controller parallel upgrade architecture provided in some embodiments of this application. Detailed Implementation

[0028] The embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described below do not represent all embodiments consistent with this application. They are merely examples of systems and methods consistent with some aspects of this application as detailed in the claims.

[0029] In this embodiment, display device 200 generally refers to a device with screen display and data processing capabilities. For example, display device 200 includes, but is not limited to, smart TVs, mobile terminals, computers, monitors, advertising screens, wearable devices, virtual reality devices, augmented reality devices, etc.

[0030] Figure 1 This is a schematic diagram illustrating an operational scenario between a display device and a control device provided in some embodiments of this application. For example... Figure 1 As shown, users can operate the display device 200 via touch operation, mobile terminal 300, and control device 100. For example, control device 100 can be a remote control, stylus, gamepad, etc.

[0031] The mobile terminal 300 can function as a control device for human-computer interaction between the user and the display device 200. It can also function as a communication device for establishing a communication connection with the display device 200 and exchanging data. In some embodiments, the mobile terminal 300 can have software applications installed on it and communicate with the display device 200 via network communication protocols to achieve one-to-one control and data communication. Furthermore, it can transmit audio and video content displayed on the mobile terminal 300 to the display device 200 for synchronized display.

[0032] like Figure 1The diagram also shows that the display device 200 communicates with the server 400 via various communication methods. This allows the display device 200 to communicate via a local area network (LAN), a wireless local area network (WLAN), and other networks.

[0033] Display device 200 can provide broadcast television reception function, and can also be equipped with intelligent network television function that provides computer support function, including but not limited to network television, smart television, Internet Protocol television (IPTV), etc.

[0034] Figure 2 Provided for some embodiments of this application Figure 1 Hardware configuration block diagram of display device 200.

[0035] In some embodiments, the display device 200 may include at least one of a tuner 210, a communication device 220, a detector 230, a device interface 240, a controller 250, a display 260, an audio output device 270, a memory, a power supply, and a user input interface 280.

[0036] In some embodiments, detector 230 is used to collect signals from the external environment or signals interacting with the outside world. For example, detector 230 may include millimeter-wave radar, which can be used to detect whether a user is present within a preset range. Detector 230 may also include a voice acquisition unit to collect voice commands input by the user.

[0037] In some embodiments, the display 260 includes display function components for presenting images and driving components for driving image display. The display 260 is used to receive and display image signals output from the controller 250. For example, the display 260 can be used to display video content, image content, menu control interface components, and user control UI interfaces, etc.

[0038] In some embodiments, the communication device 220 is a component used to communicate with external devices or the server 400 according to various communication protocol types. The display device 200 may have multiple communication devices 220 depending on the supported communication methods. For example, when the display device 200 supports wireless network communication, it may have a communication device 220 with WiFi functionality. When the display device 200 supports Bluetooth connectivity, it needs to have a communication device 220 with Bluetooth functionality.

[0039] The communication device 220 enables the display device 200 to communicate with external devices or the server 400 via wireless or wired connections. Wired connections utilize data cables, interfaces, or other components to connect the display device 200 to external devices. Wireless connections utilize wireless signals or wireless networks. The display device 200 can directly establish a connection with external devices or indirectly through gateways, routers, or other connection devices.

[0040] In some embodiments, the controller 250 may include at least one of a central processing unit, a video processor, an audio processor, a graphics processor, and a power processor, and a first to an nth interface for input / output. The controller 250 controls the operation of the display device and responds to user operations through various software control programs stored in memory. The controller 250 controls the overall operation of the display device 200.

[0041] In some embodiments, the controller 250 and the tuner 210 may be located in different separate devices, that is, the tuner 210 may also be located in an external device of the main device where the controller 250 is located, such as an external set-top box.

[0042] In some embodiments, a user can input user commands through a graphical user interface (GUI) displayed on a display 260, and the user input interface receives user input commands through the graphical user interface (GUI).

[0043] In some embodiments, the audio output device 270 can be a built-in speaker of the display device 200 or an external audio output device connected to the display device 200. For the external audio output device connected to the display device 200, the display device 200 may also be provided with an external audio output terminal, through which the audio output device can be connected to the display device 200 to output sound from the display device 200.

[0044] In some embodiments, the user input interface 280 can be used to receive instructions input by a user. The user input interface 280 may include at least one of a microphone, touchpad, sensor, remote control, etc. The display device 200 can then receive user-input instructions based on the user input interface 280 to perform interactive functions with the user.

[0045] In some embodiments, to enable user interaction, the display device 200 may run an operating system. An operating system is a computer program that manages and controls the hardware and software resources of the display device 200. The operating system can control the display device to provide a user interface; for example, the operating system can directly control the display device to provide a user interface, or it can provide a user interface by running applications. The operating system also allows users to interact with the display device 200.

[0046] It should be noted that the operating system can be a native operating system based on a specific operating platform, a third-party operating system that is deeply customized based on a specific operating platform, or an independent operating system specifically developed for display devices.

[0047] An operating system can be divided into different modules or levels based on the functions it implements, for example... Figure 3 As shown, in some embodiments, the system is divided into four layers, from top to bottom: the Applications layer (referred to as the "Application Layer"), the Application Framework layer (referred to as the "Framework Layer"), the System Library layer, and the Kernel layer.

[0048] In some embodiments, the application layer provides services and interfaces for applications, enabling the display device 200 to run applications and interact with the user based on the applications. The application layer may contain at least one application, which may be a built-in Windows program, system settings program, or clock program of the operating system; or it may be an application developed by a third-party developer. In specific implementations, the application packages in the application layer are not limited to the examples above.

[0049] The framework layer provides application programming interfaces (APIs) and a programming framework for applications. The application framework layer includes predefined functions. It acts as a central processing unit, determining the actions taken by applications within the application layer. Through the API, applications can access system resources and obtain system services during execution.

[0050] like Figure 3As shown, the application framework layer in this embodiment includes a view system, managers, and content providers. The view system designs and implements the application's interface and interactions, and includes lists, grids, text boxes, and buttons. The managers include at least one of the following modules: an activity manager for interacting with all running activities in the system; a location manager for providing system services or applications with access to system location services; a package manager for retrieving various information related to application packages currently installed on the device; a notification manager for controlling the display and clearing of notification messages; and a window manager for managing icons, windows, toolbars, wallpapers, and desktop widgets on the user interface.

[0051] In some embodiments, the Activity Manager manages the lifecycle of individual applications and common navigation and back functions, such as controlling application exit, opening, and back actions. The Window Manager manages all window programs, such as obtaining the screen size, determining if a status bar is present, locking the screen, capturing the screen, and controlling changes to the display window, such as shrinking the display window, shaking the display, or distorting the display.

[0052] In some embodiments, the system runtime library layer can provide support for the framework layer. When the framework layer is used, the operating system runs the instruction library contained in the system runtime library layer, such as the C / C++ instruction library, to implement the functions to be performed by the framework layer.

[0053] In some embodiments, the kernel layer is a functional layer situated between the hardware and software of the display device 200. The kernel layer can implement functions such as hardware abstraction, multitasking, and memory management. For example, ... Figure 3 As shown, hardware drivers can be configured in the kernel layer. The kernel layer can contain at least one of the following drivers: audio driver, display driver, Bluetooth driver, camera driver, WIFI driver, USB driver, HDMI driver, sensor driver (such as fingerprint sensor, temperature sensor, pressure sensor, etc.), and power driver, etc.

[0054] In this embodiment of the application, the display device 200 adopts a dual-chip heterogeneous architecture, such as... Figure 4As shown, the dual-chip heterogeneous architecture controller 250 includes a first controller 251 and a second controller 252. The first controller 251 is the main control chip of the display device 200, configured to run a first operating system, which can be Android. The first controller 251 is responsible for core functions of the display device 200, such as application processing, user interaction, and system management. The second controller 252 is the slave chip of the display device 200, configured to run a second operating system, which can be Linux. The second controller 252 is responsible for specific functions of the display device 200, such as image processing, audio processing, artificial intelligence calculations, or digital signal processing. The first controller 251 and the second controller 252 establish a communication connection through a communication bus or a self-developed communication SDK (Software Development Kit) to achieve cross-chip data interaction and state synchronization.

[0055] It should be noted that the specific types of the first and second operating systems described above are merely illustrative and do not constitute a limitation on this application. For example, the first operating system could also be a third-party operating system deeply customized based on Android, and the second operating system could also be other Unix-like operating systems or real-time operating systems. Similarly, the functional division of the first controller 251 and the second controller 252 can also be adjusted according to actual product requirements, and this application does not impose any restrictions.

[0056] In this embodiment, the first controller 251 is the master chip, and the second controller 252 is the slave chip.

[0057] In some embodiments, the display device 200 can implement system upgrade functionality. Regarding system upgrades (OTA, Over-The-Air), the first controller 251 employs a first upgrade architecture to execute a first upgrade task. This first upgrade architecture can be a Virtual A / B upgrade architecture. The Virtual A / B upgrade architecture simulates A / B partitions virtually, achieving upgrade functionality similar to A / B partitions without consuming a large amount of additional storage space. The first upgrade task of the first controller 251 divides the installation progress into two stages: a flashing stage and a verification stage, each presented as 0% to 100% progress. The second controller 252 employs a second upgrade architecture to execute a second upgrade task. This second upgrade architecture can be a traditional A / B partition upgrade architecture. The second upgrade task of the second controller 252 only reports the installation progress of a single stage, presented as 0% to 99% progress. The first and second upgrade tasks are executed in parallel; that is, the first controller 251 and the second controller 252 each execute their upgrade tasks independently, and their upgrade processes are asynchronous and parallel.

[0058] In some embodiments, when the display device 200 performs a system upgrade, the upgrade package includes firmware for both the first controller 251 and the second controller 252. However, due to differences in hardware performance, firmware size, and upgrade logic between the first controller 251 and the second controller 252, their upgrade speeds are inconsistent, resulting in severe distortion of the global progress bar. For example, when the first controller 251 completes the upgrade first, the progress bar remains stuck near 100% for an extended period; when the second controller 252 completes the upgrade first, the progress may jump or regress, making it impossible for the user to accurately judge the upgrade progress and remaining time, thus affecting the predictability of the upgrade process and the user experience.

[0059] To address the aforementioned issues, this application provides a method for displaying an upgrade progress bar in a display device and a dual-chip architecture. Using the first controller 251 of the display device 200 as the upgrade progress management center, the upgrade status and progress of both the first controller 251 and the second controller 252 are collected synchronously. When the upgrade process of the first controller 251 enters the verification phase, a corresponding global progress calculation strategy is matched based on the numerical relationship between the upgrade progress of the second controller 252 and a preset threshold. This global progress calculation strategy is then used to generate a unified global upgrade progress, which is then driven to be updated and displayed in real time on the display 260. This achieves accurate fusion and unified display of the global progress bar in a dual-chip parallel upgrade scenario, resolving the issues of progress lag, jumps, and regressions caused by displaying only the progress of a single chip.

[0060] In some embodiments, the display device 200 includes at least a display 260, a first controller 251, and a second controller 252. The display 260 is configured to display a user interface; the first controller 251 is configured to run a first operating system and execute a first upgrade task using a first upgrade architecture; the second controller 252 is configured to run a second operating system and execute a second upgrade task using a second upgrade architecture, with the second upgrade task and the first upgrade task executed in parallel. The first controller 251 is also coupled to the display 260 and the second controller 252 to synchronously acquire the upgrade status and progress of each of the two chips, and to perform fusion calculation and display control of the global upgrade progress.

[0061] Figure 5 This is a flowchart illustrating a method for displaying an upgrade progress bar using a dual-chip architecture, as provided in some embodiments of this application. Figure 5 As shown, the first controller 251 is configured to perform the following steps: S501. Obtain the first upgrade status and first upgrade progress of the first controller, and obtain the second upgrade status and second upgrade progress of the second controller.

[0062] During the execution of the first upgrade task, the first controller 251 acquires its own first upgrade status and first upgrade progress in real time. The first upgrade status represents the current upgrade stage of the first controller 251, and the first upgrade progress represents the completion percentage of the current stage. Simultaneously, the first controller 251 also acquires the second upgrade status and second upgrade progress of the second controller 252 to synchronously monitor the upgrade progress of both chips.

[0063] In some embodiments, the first upgrade state of the first controller 251 includes a flashing phase and a verification phase. In the flashing phase, the first controller 251 flashes the firmware data in the upgrade package to the target partition; in the verification phase, the first controller 251 performs integrity verification on the flashed firmware data to ensure the correctness of the flashed data.

[0064] In some embodiments, the second upgrade status of the second controller 252 includes upgrading in progress, upgrading successfully, and upgrading failed. The second upgrade progress of the second controller 252 is the installation progress of a single stage, represented by a value from 0 to 99%. When the second upgrade progress reaches the target value (such as 99% or 100%), the second controller 252 completes the second upgrade task and reports the upgrade successful status.

[0065] S502. In response to the first upgrade state entering the verification phase, determine the target calculation method for the global upgrade progress based on the numerical relationship between the second upgrade progress and the preset threshold.

[0066] When the first upgrade state of the first controller 251 switches from the flashing stage to the verification stage, the first controller 251 obtains the second upgrade progress of the second controller 252 at the current moment and compares this second upgrade progress with a preset threshold. Based on the comparison result, the target calculation method for the global upgrade progress is determined. The preset threshold can be set according to actual needs, for example, it can be set to 80%.

[0067] In some embodiments, if the current value of the second upgrade progress is greater than or equal to a preset threshold, it indicates that the upgrade progress of the second controller 252 is relatively fast and is close to completion. In this case, the target calculation method is determined to be the first calculation method. If the current value of the second upgrade progress is less than the preset threshold, it indicates that the upgrade progress of the second controller 252 is relatively slow and is still in the early stage of the upgrade. In this case, the target calculation method is determined to be the second calculation method. The first calculation method and the second calculation method adopt different progress fusion strategies to adapt to the two scenarios of faster chip upgrade and slower chip upgrade respectively.

[0068] S503. Based on the target calculation method, the first upgrade progress and the second upgrade progress are merged to generate the global upgrade progress.

[0069] After determining the target calculation method, the first controller 251 merges the first upgrade progress and the second upgrade progress based on this target calculation method to generate a unified global upgrade progress. The global upgrade progress is a value from 0 to 100%, used to characterize the overall upgrade completion degree of the entire machine.

[0070] When the target calculation method is the first calculation method, the first controller 251 limits the global upgrade progress to no more than the displayed value corresponding to the preset threshold during the verification phase. After the first upgrade task is completed, the global upgrade progress is increased at a preset rate according to the real-time progress of the second controller 252, or the process jumps directly to the target value. When the target calculation method is the second calculation method, the first controller 251 normalizes the upgrade progress of the second controller 252 and uses the normalized progress as the global upgrade progress until the second controller 252 completes the upgrade.

[0071] S504: Control the display to update the global upgrade progress in the user interface.

[0072] After generating the global upgrade progress, the first controller 251 controls the display 260 to update and display the global upgrade progress in the user interface. For example, as... Figure 6 As shown, the user interface of display 260 can display a progress bar, the fill ratio of which corresponds to the global upgrade progress value. As the global upgrade progress updates in real time, the progress bar also changes dynamically, allowing users to intuitively perceive the overall upgrade process of the dual chips through a unified progress bar.

[0073] In this embodiment, the upgrade status and progress of each of the two chips are synchronously acquired by the first controller 251. When the first upgrade task enters the verification stage, the calculation method of the global progress is dynamically determined according to the numerical relationship between the second upgrade progress and the preset threshold. This achieves accurate fusion of the global progress bar in the scenario of parallel upgrade of heterogeneous dual chips, solves the problem of progress lag, jumps and regression caused by only displaying the progress of a single chip, and enables users to perceive the overall upgrade process of the dual chips in a real and smooth way through a unified progress bar, thereby improving the predictability of the upgrade process and the user experience.

[0074] Since the second controller 252 adopts an independent operating system and upgrade architecture, the first controller 251 needs to obtain the upgrade status and upgrade progress of the second controller 252 through a cross-chip communication mechanism.

[0075] In some embodiments, the second controller 252 is configured to report a second upgrade status and a second upgrade progress to the first controller 251. The first controller 251 sends a polling request to the second controller 252 at a preset period and receives the second upgrade status and the second upgrade progress returned by the second controller 252 in response to the polling request.

[0076] For example, the first controller 251 establishes a communication connection with the second controller 252 through a communication SDK. During the parallel execution of the upgrade task by the first controller 251 and the second controller 252, the first controller 251 sends a polling request to the second controller 252 at a preset period (e.g., every 1 second, 2 seconds, or 5 seconds) to query the current upgrade status and progress of the second controller 252. Upon receiving the polling request, the second controller 252 encapsulates the current upgrade status and progress into a response message and returns it to the first controller 251.

[0077] In some implementations, the polling request and response messages use a custom communication protocol format, including request type fields, chip identifier fields, status fields, and progress fields. The first controller 251 parses the response message and extracts the second upgrade status and the second upgrade progress.

[0078] In some implementations, the preset period can be dynamically adjusted based on the communication bandwidth between the first controller 251 and the second controller 252 and the update frequency of the upgrade progress. For example, in the early stage of the flashing phase, the upgrade progress changes rapidly, so a shorter polling period (e.g., 1 second) can be set; in the later stage of the verification phase, the upgrade progress changes slowly, so a longer polling period (e.g., 3 seconds) can be set to reduce communication overhead.

[0079] In this embodiment of the disclosure, the cross-chip interaction mechanism of periodic polling by the first controller 251 enables the real-time and stable reporting of the upgrade status and progress data of the second controller 252, avoiding communication congestion and data loss caused by the second controller 252 actively pushing data, and ensuring that the second upgrade progress obtained by the first controller 251 is accurate and reliable.

[0080] Figure 7 This is a schematic diagram illustrating the process for determining the global upgrade progress calculation method provided in some embodiments of this application. For example... Figure 7 As shown, the first controller 251 enters the verification phase in response to the first upgrade state. Based on the numerical relationship between the second upgrade progress and the preset threshold, it determines the target calculation method for the global upgrade progress, specifically configured to execute the following steps: S701. Obtain the current value of the second upgrade progress when entering the verification phase.

[0081] When the first upgrade state of the first controller 251 switches from the flashing stage to the verification stage, the first controller 251 obtains the second upgrade progress of the second controller 252 at the current moment through the above-mentioned cross-chip polling mechanism, and uses it as the current value of the second upgrade progress when entering the verification stage.

[0082] S702. Compare the current value of the second upgrade progress with the preset threshold.

[0083] The first controller 251 compares the current value of the acquired second upgrade progress with a preset threshold. The preset threshold is a pre-configured progress judgment threshold used to distinguish whether the upgrade progress of the second controller 252 is nearing completion. In some embodiments, the preset threshold can be set to 80%. It should be noted that the specific value of the preset threshold can be adjusted according to the firmware size of the second controller 252, the upgrade speed, and user experience requirements; this application does not impose any limitations on this.

[0084] S703. If the current value of the second upgrade progress is greater than or equal to the preset threshold, the target calculation method is determined to be the first calculation method.

[0085] When the current value of the second upgrade progress is greater than or equal to the preset threshold, it indicates that the upgrade progress of the second controller 252 has exceeded the preset threshold and is in the late stage of the upgrade, about to be completed. At this time, the target calculation method is determined to be the first calculation method. The first calculation method aims to verify that the global upgrade progress within the stage does not exceed the display value corresponding to the preset threshold. After the first controller 251 completes the upgrade, the remaining progress is made up at a preset rate or directly jumps to the endpoint according to the real-time progress of the second controller 252.

[0086] S704. If the current value of the second upgrade progress is less than the preset threshold, the target calculation method is determined to be the second calculation method.

[0087] When the current value of the second upgrade progress is less than the preset threshold, it indicates that the upgrade progress of the second controller 252 has not yet reached the preset threshold and is still in the early to mid-stage of the upgrade, with a considerable distance to go before completion. At this point, the target calculation method is determined to be the second calculation method. The second calculation method aims to normalize the upgrade progress of the second controller 252, using the normalized chip progress as the benchmark for displaying the global upgrade progress, so that the global progress can truly reflect the bottleneck of the entire system upgrade.

[0088] In this embodiment, the progress of the second controller 252 at the moment the first controller 251 enters the verification stage is used as the judgment basis. Different progress fusion strategies are adapted for two scenarios: faster chip upgrade and slower chip upgrade. This avoids the defect that a single computing logic cannot adapt to the speed difference between the two chips, and makes the global progress fit the real upgrade process.

[0089] Figure 8 This is a schematic diagram illustrating the progress fusion process of a first calculation method provided in some embodiments of this application. When the target calculation method is the first calculation method, that is, when the first controller 251 enters the verification stage, the second upgrade progress is greater than or equal to a preset threshold. Based on the first calculation method, the first controller 251 fuses the first upgrade progress and the second upgrade progress to generate a global upgrade progress. Figure 8As shown, it is specifically configured to perform the following steps: S801. During the verification phase, the global upgrade progress corresponding to the first upgrade progress is limited to not exceeding the display value corresponding to the preset threshold.

[0090] When the first controller 251 enters the verification phase, although its own verification progress will gradually increase from 0% to 100%, in order to prevent the global progress bar from quickly reaching 100% and then getting stuck for a long time, the first controller 251 caps the global upgrade progress during the verification phase.

[0091] In some implementations, the upper limit of the global upgrade progress is limited to the displayed value corresponding to a preset threshold. For example, when the preset threshold is 80%, during the verification phase, regardless of how the verification progress of the first controller 251 increases, such as... Figure 9 As shown, the global upgrade progress does not exceed 80%. It should be noted that the dotted lines in the figure are not the actual display effect, but are only used to explain this scenario.

[0092] In some implementations, the first controller 251 can proportionally map the verification progress during the verification phase to a range below a preset threshold. For example, the verification progress from 0% to 100% can be linearly mapped to the range from the current value of the global upgrade progress to 80%, so that the global progress can still show a smooth increase during the verification phase, but does not exceed the upper limit of 80%.

[0093] S802. When the first upgrade task is completed, reacquire the second upgrade progress.

[0094] Once the first controller 251 completes the flashing and verification phases, the first upgrade task is complete. At this point, the first controller 251 re-obtains the second upgrade progress of the second controller 252 through a polling mechanism to determine whether the second controller 252 has completed the upgrade.

[0095] S803. If the second upgrade progress obtained again does not reach the target value, control the global upgrade progress to increase from the displayed value corresponding to the preset threshold to the target value at a preset rate.

[0096] If the reacquired second upgrade progress still has not reached the target value (e.g., 99% or 100%), it indicates that the second controller 252 has not yet completed the upgrade. The first controller 251 controls the global upgrade progress to increase uniformly from the displayed value corresponding to the preset threshold to the target value at a preset rate. The target value represents the progress reaching its endpoint, i.e., 100%. The preset rate can be set according to actual needs; for example, it can be set to advance by 1% every second, i.e., increasing by 1% per second.

[0097] By increasing the global upgrade progress at a preset rate, users can observe the progress bar moving steadily forward, avoiding the mistaken belief that the upgrade is stuck or the equipment is malfunctioning due to the progress bar remaining at a fixed value for an extended period. Simultaneously, the uniformly increasing progress provides a time window for the second controller 252 to complete the remaining upgrade tasks. When the global upgrade progress reaches the target value, the second controller 252 has typically completed or is about to complete the upgrade.

[0098] S804. If the second upgrade progress that has been reacquired has reached the target value, control the global upgrade progress to jump to the target value.

[0099] If the re-acquired second upgrade progress has reached the target value, it indicates that the second controller 252 has completed the upgrade. Figure 10 As shown, the first controller 251 directly controls the global upgrade progress to jump to the target value (i.e., 100%) to reflect the status of the entire machine upgrade in real time.

[0100] After the first controller 251 controls the global upgrade progress to increase from the displayed value corresponding to the preset threshold to the target value at a preset rate, since the second controller 252 may not have actually completed the upgrade, the first controller 251 obtains the second upgrade progress again; if the second upgrade progress obtained again still does not reach the target value, the global upgrade progress is maintained at the target value; and the second upgrade progress is obtained at a preset time interval until the second upgrade progress reaches the target value.

[0101] For example, once the global upgrade progress has increased to 100% (the target value), the first controller 251 does not immediately determine that the entire system upgrade is complete. Instead, it continues to send polling requests to the second controller 252 at preset time intervals (e.g., every 2 seconds) to obtain the second upgrade progress. If the second upgrade progress has not yet reached the target value, the first controller 251 maintains the global upgrade progress at 100% while continuously monitoring the upgrade status of the second controller 252. Only when the second upgrade progress reaches the target value does the first controller 251 determine that the entire system upgrade is complete.

[0102] Reaching 100% in the global upgrade progress only indicates that the progress bar has reached its end, but it does not mean that the actual upgrade task of the second controller 252 has been completed. If the user is prompted to restart the device before the second controller 252 has completed the upgrade, it may lead to firmware corruption or malfunction of the second controller 252. Therefore, by continuously polling and monitoring the actual upgrade status of the second controller 252 after the global progress reaches 100%, the user can be prevented from restarting the display device 200 prematurely, avoiding the risk of device failure such as image quality failure or firmware corruption due to incomplete upgrade of the chip (second controller 252).

[0103] For example, the preset threshold is 80%, and the preset rate is 1% per second. When the first controller 251 enters the verification phase, if the progress of the second controller 252 is 85% (greater than 80%), then the first calculation method is determined to be used. During the verification phase, the global upgrade progress is limited to below 80%. After the first controller 251 completes the verification, if the progress of the second controller 252 is again obtained and is 92% (not yet 100%), then the global upgrade progress starts from 80% and increases at a rate of 1% per second, reaching 100% after 20 seconds. At this time, if the progress of the second controller 252 is obtained again and is 98% (still not yet 100%), then the global upgrade progress is maintained at 100%, and polling continues every 2 seconds until the progress of the second controller 252 reaches 100%.

[0104] In this embodiment, for scenarios where the second controller 252 upgrades rapidly, the global progress of the verification phase is capped at a preset threshold to avoid the problem of the first controller 251's verification phase progress rapidly reaching 100% and subsequently experiencing prolonged lag. After the first controller 251 completes its upgrade, the remaining progress is gradually and evenly replenished, with smooth progress changes and no abrupt changes, ensuring that users will not mistakenly believe that the upgrade has stalled or that the device has malfunctioned. Simultaneously, after the global progress reaches its endpoint, the actual upgrade status of the second controller 252 is continuously polled and monitored to prevent the risk of device malfunction caused by users prematurely restarting the device.

[0105] Figure 11 This is a schematic diagram of the progress fusion process for a second calculation method provided in some embodiments of this application. For example... Figure 11 As shown, in some embodiments, when the target calculation method is the second calculation method, that is, when the first controller 251 enters the verification stage, the second upgrade progress of the second controller 252 is less than a preset threshold. The first controller 251, based on the second calculation method, merges the first upgrade progress and the second upgrade progress to generate a global upgrade progress, specifically configured to execute the following steps: S1101. Normalize the second upgrade progress and use it as the global upgrade progress.

[0106] When the upgrade progress of the second controller 252 is less than a preset threshold, it indicates that the upgrade speed of the second controller 252 is lagging behind that of the first controller 251. In this case, if the global progress bar continues to be driven by the verification progress of the first controller 251, the global progress will be artificially inflated, failing to reflect the true bottleneck of the overall system upgrade. Therefore, the first controller 251 normalizes the second upgrade progress of the second controller 252 and uses the normalized progress as the global upgrade progress.

[0107] In some embodiments, when the first controller 251 normalizes the second upgrade progress, it records the second upgrade progress of the second controller 252 when entering the verification phase as a baseline value. Then, the second upgrade progress of the second controller 252 is reacquired at preset time intervals, and normalization calculation is performed based on the reacquired second upgrade progress and the baseline value to obtain the global upgrade progress.

[0108] In some embodiments, the normalized calculation formula can be: Global upgrade progress = (Base value + Reacquired second upgrade progress - Base value) multiplied by a mapping coefficient. The mapping coefficient is used to map the progress increment of the second controller 252 during the verification phase of the first controller 251 to the corresponding interval of the global progress bar. For example, if the base value is 50% and the preset threshold is 80%, then the mapping interval is 50% to 100%, and the mapping coefficient is (100% - 80%) divided by (the progress of the second controller 252 expected when the verification phase of the first controller 251 is completed - 50%).

[0109] In other embodiments, the normalization calculation can also employ a linear mapping method. For example, the baseline value is mapped to the display value corresponding to a preset threshold, the target value (100%) is mapped to the target value, and linear interpolation is performed between the baseline value and the target value to obtain the normalized global upgrade progress.

[0110] By normalizing the upgrade progress of the second controller 252 and using it as the global upgrade progress, the true bottleneck of the whole machine upgrade can be accurately reflected, avoiding the problem of the first controller 251's verification progress continuously increasing, causing the global progress to be artificially high and misleading users to judge the remaining upgrade time.

[0111] S1102. When the first upgrade task is completed, reacquire the second upgrade progress.

[0112] Similar to the first calculation method, the first upgrade task is completed after the first controller 251 completes the flashing and verification phases. At this time, the first controller 251 re-acquires the second upgrade progress of the second controller 252 to determine whether the second controller 252 has completed the upgrade.

[0113] S1103. If the second upgrade progress obtained again does not reach the target value, control the global upgrade progress to use the normalized second upgrade progress as the global upgrade progress for display until the second upgrade progress reaches the target value.

[0114] If the reacquired second upgrade progress still fails to reach the target value, it indicates that the second controller 252 has not yet completed the upgrade. In this case, the first controller 251 continues to display the normalized second upgrade progress as the global upgrade progress. That is, the global upgrade progress updates in accordance with the real-time progress changes of the second controller 252 until the progress of the second controller 252 reaches the target value.

[0115] After the first upgrade task of the first controller 251 is completed, since the upgrade speed of the second controller 252 is slower, the global progress bar is entirely driven by the normalized progress of the second controller 252. The first controller 251 continuously acquires the second upgrade progress of the second controller 252 at preset time intervals and updates the normalized global upgrade progress in real time, so that the progress bar continues to advance smoothly until the second controller 252 completes the upgrade.

[0116] S1104. If the second upgrade progress that has been reacquired has reached the target value, control the global upgrade progress to jump to the target value.

[0117] If the second upgrade progress has reached the target value, it means that the second controller 252 has completed the upgrade. The first controller 251 directly controls the global upgrade progress to jump to the target value (100%) to reflect the status of the entire machine upgrade in real time.

[0118] For example, assume a preset threshold of 80%. When the first controller 251 enters the verification phase, the progress of the second controller 252 is 50% (less than 80%), and the second calculation method is used. The first controller 251 records 50% as a baseline value and begins normalizing the progress of the second controller 252, using the normalized progress as the global upgrade progress. After the first controller 251 completes verification, it re-obtains the progress of the second controller 252, which is 65% (not reaching 100%), and continues to display the normalized progress of the second controller 252 as the global upgrade progress. As the progress of the second controller 252 gradually increases to 100%, the global upgrade progress also increases to 100%.

[0119] This embodiment of the disclosure is adapted to scenarios where the upgrade speed of the second controller 252 lags behind that of the first controller 251. Using the normalized slave chip progress as the global display benchmark, it can reflect the bottleneck of the entire system upgrade and avoid the problem of continuously rising master control verification progress causing an artificially inflated global progress and misleading users in judging the remaining upgrade time. Simultaneously, by dynamically normalizing the slave chip progress based on the start time of the verification phase, it can accurately match the time window of the master control verification phase, uniformly mapping the changes in the segmented progress of the slave chip to the global progress bar, eliminating numerical gaps and jumps caused by the incompatibility between the single-stage progress of the slave chip and the dual-stage progress architecture of the master control.

[0120] In some embodiments, the first upgrade state of the first controller 251 includes a flashing phase and a verification phase, and the progress calculation methods for the two phases are different.

[0121] During the flashing phase, the first upgrade progress is determined based on the proportion of the number of flashed storage blocks to the total number of storage blocks in the upgrade package. In some implementations, the firmware data in the upgrade package is divided into units of storage blocks. The first controller 251 counts the number of storage blocks that have been flashed in real time during the flashing process, and obtains the first upgrade progress of the flashing phase by calculating the proportion of the number of flashed storage blocks to the total number of storage blocks in the upgrade package. For example, if the total number of storage blocks in the upgrade package is 10,000, and 8,000 have been flashed, then the first upgrade progress of the flashing phase is 80%.

[0122] During the verification phase, the first upgrade progress is determined based on the ratio of the number of verified storage blocks to the total number of storage blocks in the upgrade package. In some implementations, the first controller 251 performs integrity verification on each of the written storage blocks during the verification process, counts the number of verified storage blocks in real time, and calculates the ratio of the number of verified storage blocks to the total number of storage blocks in the upgrade package to obtain the first upgrade progress of the verification phase. For example, if the total number of storage blocks in the upgrade package is 10,000, and 6,000 have been verified, then the first upgrade progress of the verification phase is 60%.

[0123] In some implementations, the size of the storage block can be configured as 4KB, 8KB, or 16KB, depending on the characteristics of the file system and storage medium. The first controller 251 obtains the total number of storage blocks in the upgrade package by reading the metadata information of the partition table, and maintains a counter of completed storage blocks during the flashing and verification process.

[0124] This embodiment is compatible with the Virtual A / B upgrade framework. It accurately calculates the native progress of the first controller 251's write and verification stages based on the storage block statistics method, without modifying the original single-chip upgrade underlying logic, thus achieving seamless compatibility with the native upgrade framework.

[0125] In addition to displaying the progress, the first controller 251 also monitors the success or failure status of the dual-chip upgrades, and the overall upgrade result is determined by the combined upgrade status of both chips. In some embodiments, the first controller 251 further controls the display 260 to show an upgrade failure message in the user interface in response to a second upgrade status of failure. In response to a second upgrade status of success and a first upgrade status of completion, the display 260 controls the display 260 to show an upgrade completion message in the user interface.

[0126] In some embodiments, during the parallel upgrade process, the first controller 251 continuously monitors the second upgrade status of the second controller 252. If the second upgrade status reported by the second controller 252 is a failure, it indicates that an anomaly has occurred during the upgrade process of the second controller 252 (such as firmware verification failure, flashing error, communication interruption, etc.). The first controller 251 immediately controls the display 260 to display an upgrade failure message in the user interface to remind the user that an upgrade anomaly has occurred. The upgrade failure message may include a description of the failure reason, suggested actions (such as retrying the upgrade or contacting after-sales service), and other information.

[0127] If the second upgrade status reported by the second controller 252 is successful, and the first upgrade status of the first controller 251 itself is also complete, it indicates that both chips have completed the upgrade. The first controller 251 then controls the display 260 to show an upgrade completion prompt in the user interface. The upgrade completion prompt may include upgrade success information, a restart guide button, etc., guiding the user to restart the device to complete the system update.

[0128] It should be noted that the upgrade completion message will only be displayed when both the first controller 251 and the second controller 252 have been successfully upgraded. If only the first controller 251 has been upgraded while the second controller 252 is still upgrading or has failed, the upgrade completion message will not be displayed to prevent users from restarting the device prematurely before the chip upgrade is complete, which could lead to device malfunction or firmware corruption.

[0129] For example, when the upgrade of the second controller 252 fails, an upgrade failure prompt box pops up in the user interface of the display 260, such as... Figure 12 As shown, an upgrade failure message will be displayed; when both chips are upgraded successfully, as indicated... Figure 13 As shown, the user interface of monitor 260 displays an upgrade completion message and provides users with options to restart immediately or restart later.

[0130] This embodiment of the disclosure provides unified monitoring of the success or failure status of dual-chip upgrades, with the overall upgrade result determined jointly by the status of both chips. It promptly alerts the user when a chip upgrade encounters an anomaly, and only displays an upgrade completion notification after both chips have completed the upgrade. This avoids device malfunctions caused by prompting a restart upon completion of only one chip upgrade, thereby improving the security of the upgrade process.

[0131] Figure 14 This is an interactive schematic diagram illustrating the display of an upgrade progress bar provided in some embodiments of this application. For example... Figure 14 As shown, in some embodiments, the display device 200 initiates a parallel OTA upgrade, and the display 260 displays a unified global upgrade progress on its user interface. The first controller 251 polls to obtain its own and the second controller 252's real-time upgrade progress. After entering the verification phase, it matches the corresponding fusion algorithm to calculate the global progress and refreshes the progress bar value on the interface in real time.

[0132] If the upgrade of the second controller 252 fails, a pop-up window indicating an upgrade failure will appear on the display 260. If both the first controller 251 and the second controller 252 have completed their upgrades, the display 260 will show an upgrade completion message and display a restart button. If only the first controller 251 has completed its upgrade while the second controller 252 is still upgrading, the progress bar will smoothly follow the fusion calculation results without prematurely displaying a completion message.

[0133] Figure 15 This is a layered block diagram of a dual-controller parallel upgrade architecture provided in some embodiments of this application. For example... Figure 15 As shown, in some embodiments, the backend server sends the whole-machine upgrade installation package to the upgrade management service of the application layer of the first controller 251. The upgrade management service schedules the system recovery module, power management module and upper-layer upgrade logic engine to work together. The upper-layer upgrade logic engine generates the upgrade progress and upgrade status of the first controller 251 and sends instructions to the lower-layer upgrade engine. The lower-layer upgrade engine, on the one hand, connects to the bootloader and hardware partition verification control driver of the driver layer to complete the firmware flashing of the local machine. On the other hand, it sends an upgrade interaction request to the communication SDK of the second controller 252 through the communication SDK. After receiving the upgrade instruction, the upgrade engine client of the application layer of the second controller 252 schedules the framework layer module to run. The upgrade execution engine executes the second upgrade task. The status synchronization service collects the upgrade progress and upgrade status of the second controller in real time and sends it back to the first controller 251 through the communication SDK. The lower-layer partition control library and recovery boot component respectively manage the partition management driver, miscellaneous partition and bootloader of the driver layer, and complete the partition flashing, upgrade mark storage and boot switching operations of the second controller 252. After acquiring the dual-end upgrade data, when its own upgrade process enters the verification stage, the first controller 251 combines the progress reported by the second controller 252 with the preset threshold to select the global progress calculation method, merges the two progress data to obtain the global upgrade progress, and displays it on the display 260 interface.

[0134] Based on the aforementioned display device 200, some embodiments of this application also provide a dual-chip architecture upgrade progress bar display method, which can be applied to the display device 200. For example... Figure 5 As shown, the method includes the following steps: S501. Obtain the first upgrade status and first upgrade progress of the first controller, and obtain the second upgrade status and second upgrade progress of the second controller.

[0135] S502. In response to the first upgrade state entering the verification phase, determine the target calculation method for the global upgrade progress based on the numerical relationship between the second upgrade progress and the preset threshold.

[0136] S503. Based on the target calculation method, the first upgrade progress and the second upgrade progress are merged to generate the global upgrade progress.

[0137] S504: Control the display to update the global upgrade progress in the user interface.

[0138] The upgrade progress bar display method based on the dual-chip architecture described above can overcome the limitation of driving the global progress bar solely based on the progress of a single chip. By synchronously acquiring the upgrade status and progress of each of the two chips, the global progress calculation method is dynamically determined based on the numerical relationship between the second upgrade progress and a preset threshold when the first upgrade task enters the verification stage. This achieves accurate fusion of the global progress bar in the scenario of parallel upgrade of heterogeneous dual chips, and solves the problems of progress stuttering, jumps, and regressions caused by the global display driven by the progress of a single chip. This allows users to perceive the overall upgrade process of the dual chips in a realistic and smooth manner through a unified progress bar, thereby improving the predictability of the upgrade process and the user experience.

[0139] It should be noted that the upgrade progress bar display method of the dual-chip architecture described in this application embodiment can adopt the same principle and implementation method as the above-mentioned display device 200 embodiment, and will not be described again in this application.

[0140] Similar parts between the embodiments provided in this application can be referred to mutually. The specific implementation methods provided above are only a few examples under the overall concept of this application and do not constitute a limitation on the scope of protection of this application. For those skilled in the art, any other implementation methods extended from the solution of this application without creative effort shall fall within the scope of protection of this application.

Claims

1. A display device, characterized in that, include: The monitor is configured to display the user interface; The first controller is configured to run the first operating system and execute the first upgrade task using the first upgrade architecture; The second controller is configured to run a second operating system and execute a second upgrade task using a second upgrade architecture, wherein the second upgrade task is executed in parallel with the first upgrade task; The first controller is also configured to: Obtain the first upgrade status and first upgrade progress of the first controller, and obtain the second upgrade status and second upgrade progress of the second controller; In response to the first upgrade state entering the verification phase, the target calculation method for the global upgrade progress is determined based on the numerical relationship between the second upgrade progress and the preset threshold. Based on the target calculation method, the first upgrade progress and the second upgrade progress are merged to generate the global upgrade progress; Control the display to update the global upgrade progress in the user interface.

2. The display device according to claim 1, characterized in that, The second controller is also configured to: The second upgrade status and the second upgrade progress are reported to the first controller; The first controller obtains the second upgrade status and the second upgrade progress of the second controller, specifically configured as follows: A polling request is sent to the second controller at a preset period; Receive the second upgrade status and the second upgrade progress returned by the second controller in response to the polling request.

3. The display device according to claim 1, characterized in that, The first controller, in response to the first upgrade state, enters the verification phase and determines the target calculation method for the global upgrade progress based on the numerical relationship between the second upgrade progress and a preset threshold. Specifically, this method is configured as follows: Obtain the current value of the second upgrade progress when entering the verification phase; Compare the current value of the second upgrade progress with the preset threshold; If the current value of the second upgrade progress is greater than or equal to the preset threshold, the target calculation method is determined to be the first calculation method; If the current value of the second upgrade progress is less than the preset threshold, the target calculation method is determined to be the second calculation method, and the first calculation method is different from the second calculation method.

4. The display device according to claim 3, characterized in that, When the target calculation method is the first calculation method, the first controller, based on the target calculation method, merges the first upgrade progress and the second upgrade progress to generate the global upgrade progress, specifically configured as follows: During the verification phase, the global upgrade progress corresponding to the first upgrade progress is limited to not exceeding the display value corresponding to the preset threshold; Upon completion of the first upgrade task, the second upgrade progress is retrieved again; If the second upgrade progress obtained again does not reach the target value, the global upgrade progress is controlled to increase from the display value corresponding to the preset threshold to the target value at a preset rate. The target value represents the progress reaching the end point. If the second upgrade progress that has been reacquired has reached the target value, control the global upgrade progress to jump to the target value.

5. The display device according to claim 4, characterized in that, After the first controller controls the global upgrade progress to increase from the displayed value corresponding to the preset threshold to the target value at a preset rate, it is further configured to: Get the second upgrade progress again; If the second upgrade progress obtained again still does not reach the target value, the global upgrade progress is maintained at the target value; In addition, the second upgrade progress is obtained at preset time intervals until the second upgrade progress reaches the target value.

6. The display device according to claim 4, characterized in that, When the target calculation method is the second calculation method, the first controller, based on the target calculation method, merges the first upgrade progress and the second upgrade progress to generate the global upgrade progress, specifically configured as follows: The second upgrade progress is normalized and used as the global upgrade progress; Upon completion of the first upgrade task, the second upgrade progress is retrieved again; If the second upgrade progress obtained again does not reach the target value, the global upgrade progress is controlled to be displayed as the normalized second upgrade progress until the second upgrade progress reaches the target value. If the second upgrade progress that has been reacquired has reached the target value, control the global upgrade progress to jump to the target value.

7. The display device according to claim 6, characterized in that, The first controller normalizes the second upgrade progress, specifically configured as follows: Record the progress of the second upgrade as a baseline value; The second upgrade progress will be retrieved again at preset time intervals; The global upgrade progress is obtained by normalizing the second upgrade progress obtained from the re-acquired second upgrade progress and the baseline value.

8. The display device according to claim 1, characterized in that, The first upgrade state includes a flashing phase and a verification phase; the first controller obtains the first upgrade state and the first upgrade progress, specifically configured as follows: During the flashing phase, the first upgrade progress is determined based on the proportion of the number of flashed storage blocks to the total number of storage blocks in the upgrade package. During the verification phase, the first upgrade progress is determined based on the ratio of the number of verified storage blocks to the total number of storage blocks in the upgrade package.

9. The display device according to claim 1, characterized in that, The first controller is also configured to: In response to the second upgrade status being failed, the display is controlled to show an upgrade failure message in the user interface; In response to the second upgrade status being successful and the first upgrade status being completed, the display is controlled to show an upgrade completion prompt in the user interface.

10. A method for displaying an upgrade progress bar using a dual-chip architecture, characterized in that, include: Obtain the first upgrade status and first upgrade progress of the first controller, and obtain the second upgrade status and second upgrade progress of the second controller; In response to the first upgrade state entering the verification phase, the target calculation method for the global upgrade progress is determined based on the numerical relationship between the second upgrade progress and the preset threshold. Based on the target calculation method, the first upgrade progress and the second upgrade progress are merged to generate the global upgrade progress; Control the display to update the global upgrade progress in the user interface.

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