Micro LED packaging structure and preparation method thereof

CN123035801APending Publication Date: 2026-11-03HUAIAN AUCKSUN OPTOELECTRONICS TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202611189592.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-08-06
Publication Date
2026-11-03

AI Technical Summary

Technical Problem

Existing Micro-LED technology suffers from high power consumption, poor heat dissipation, limited flexibility, and insufficient purity of excitation light source, which restricts its application in full-color displays and wearable devices.

Method used

It adopts an RGBW four-color design, combined with an RCLED resonant cavity structure, a quantum dot color conversion layer and polyimide encapsulation, and is connected to an anisotropic conductive film through a flexible substrate to realize independent white photonic pixels and flexible display.

Benefits of technology

Significantly reduces light mixing power consumption, improves quantum dot conversion efficiency and color purity, enhances heat dissipation performance, and expands the application of Micro-LED in wearable devices and flexible displays.

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Abstract

The application relates to the technical field of LED chip photoelectric manufacturing, and discloses a Micro LED packaging structure and a preparation method thereof. The packaging structure comprises a flexible substrate, an anisotropic conductive film, a Micro-RCLED chip, a quantum dot color conversion layer and a polyimide packaging layer. The Micro-RCLED chip is formed into an optical resonant cavity through a high-reflection DBR and a low-reflection DBR. The quantum dot color conversion layer comprises red, green and white three-color quantum dot pixels and a blue pixel area, and four-color pixel units are formed through a photoetching process. The chip is transferred to the flexible substrate through the anisotropic conductive film, and the polyimide flexible packaging is bendable. The application reduces light mixing power consumption through RGBW four-color design, improves quantum dot conversion efficiency and color purity through RCLED, realizes flexible display through PI packaging, and is significantly improved in power consumption, brightness, heat dissipation, color gamut and bendability.
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Description

Technical Field

[0001] This invention relates to the field of LED chip optoelectronic manufacturing technology, and in particular to a Micro LED packaging structure and its preparation method. Background Technology

[0002] Micro-LED display technology, by miniaturizing traditional LEDs to below 50μm and arranging them in a matrix, has advantages such as high brightness, high contrast, low power consumption, and long lifespan, and has broad application prospects in fields such as flexible transparent displays and wearable devices.

[0003] Currently, the mainstream solutions for achieving full-color Micro-LED displays fall into two categories: one is to transfer red, green, and blue chips onto a driving substrate using mass transfer technology; the other is to use monochromatic blue or ultraviolet Micro-LEDs in conjunction with a quantum dot color conversion layer to achieve full-color display. Among these, the quantum dot color conversion solution is considered the preferred path for achieving full-color Micro-LED displays due to its advantages of narrow emission spectrum, wide absorption spectrum, and high fluorescence intensity.

[0004] However, existing technologies still have the following shortcomings: First, there are issues with power consumption and brightness. Traditional MIP three-color packaged products mix white light by simultaneously lighting up the RGB three-color chips, resulting in excessive power consumption when displaying white images or requiring high brightness output, which seriously affects the lifespan of the device. If independent white light sub-pixels could be introduced, the power consumption of light mixing could be significantly reduced, but there is currently a lack of mature four-color (RGBW) Micro-LED packaging solutions.

[0005] Second, there is the issue of heat dissipation. Traditional LEDs, due to their sapphire substrate covering the surface, suffer from low heat transfer efficiency and significant brightness decay. While existing technologies include laser-based substrate removal, these are largely limited to the fabrication of chips at specific wavelengths.

[0006] Third, flexibility is limited. Traditional LED packaging substrates are made of glass (TFT) or PCB, which cannot be bent flexibly, limiting the application of Micro-LEDs in wearable devices and flexible displays. Although there are reports of using flexible polyimide substrates for micro-LED devices, a complete solution integrating them with four-color pixel design, quantum dot color conversion, and RCLED technology has not yet been disclosed.

[0007] Fourth, the purity of the excitation source is insufficient. When ordinary Micro-LEDs are used to excite quantum dots, the broad excitation spectrum causes the quantum dots to reabsorb backwards, resulting in color shift. This necessitates the addition of pixel-level light-shielding walls, increasing the complexity and thickness of the manufacturing process. Existing research has attempted to improve the beam quality of red Micro-LEDs through DBR resonant cavity structures, but these primarily target the red chip itself rather than its excitation source. Summary of the Invention

[0008] Purpose of the invention: To address the problems existing in the prior art, this invention provides a Micro LED packaging structure and its fabrication method. It reduces light mixing power consumption through RGBW four-color design, improves quantum dot conversion efficiency and color purity through RCLED, and achieves flexible display through polyimide encapsulation. It has significant improvements in power consumption, brightness, heat dissipation, color gamut and bendability.

[0009] Technical solution: On one hand, the present invention provides a Micro LED packaging structure, comprising: Flexible substrate; An anisotropic conductive film is disposed on the flexible substrate; Multiple Micro-RCLED chips are disposed above the anisotropic conductive film. The electrodes of the Micro-LED chips are electrically connected to the driving circuit of the flexible substrate through the anisotropic conductive film. A black matrix is ​​disposed between each Micro-LED chip. The Micro-RCLED chip is a resonant cavity LED structure. Taking the chip itself as a reference, from the flexible substrate side upward, the Micro-RCLED chip includes, from bottom to top, the following: P electrode and N electrode, first distributed Bragg mirror, N-type semiconductor layer, active region, P-type semiconductor layer, and second distributed Bragg mirror. A quantum dot color conversion layer is disposed above the second distributed Bragg reflector; A second substrate is disposed above the quantum dot color conversion layer, and the side of the second substrate facing the second distributed Bragg mirror has a patterned structure; A polyimide encapsulation layer is disposed above the Micro-RCLED chip, and the polyimide encapsulation layer covers the flexible substrate and encapsulates the Micro-RCLED chip.

[0010] Furthermore, the quantum dot color conversion layer includes red, green, and white quantum dot pixels and a blue pixel area, which are patterned into four-color pixel units through photolithography.

[0011] Furthermore, the first distributed Bragg reflector has a 10-50 layer dielectric film structure with a thickness of 0.8-3.0 μm and a reflectivity >99.0%; the second distributed Bragg reflector has a 2-20 layer dielectric film structure with a thickness of 0.2-1.5 μm, a reflectivity of 40%-60%, and a total optical thickness of 13-22λ. The first distributed Bragg mirror and the second distributed Bragg mirror constitute an optical resonant cavity.

[0012] Furthermore, a portion of the N-type semiconductor layer is etched to form a MESA structure, and the first distributed Bragg reflector covers the top of the MESA structure, the sidewalls of the MESA structure, and the surface of the etched P-type semiconductor layer.

[0013] Furthermore, the first distributed Bragg reflector has a first opening exposing the surface of the N-type semiconductor layer and a second opening exposing the surface of the P-type semiconductor layer; the N-electrode is disposed in the first opening and in contact with the N-type semiconductor layer, and the P-electrode is disposed in the second opening and in contact with the P-type semiconductor layer.

[0014] Furthermore, the materials of the P electrode and the N electrode are selected from one or more stacks of gold, aluminum, copper, nickel, platinum, chromium and titanium.

[0015] Furthermore, in the Micro-RCLED chip, the total epitaxial thickness is 4.0-7.0 μm; and the polyimide encapsulation layer thickness is 5-50 μm.

[0016] Furthermore, the flexible substrate is a BT substrate, on which a driving circuit and metal contacts are integrated; the anisotropic conductive film includes an insulating adhesive and conductive particles uniformly dispersed therein, the conductive particles being polymer microspheres with a metal layer on their surface and a particle size of 3-5 μm; the anisotropic conductive film is conductive in the vertical direction and insulating in the horizontal direction, thereby realizing the electrical connection between the P electrode and the N electrode and the driving circuit respectively.

[0017] On the other hand, the present invention provides a method for fabricating a Micro-LED packaging structure as described in any of the above claims, comprising the following steps: S1: Provide a first substrate, and sequentially grow an N-type semiconductor layer, an active region, and a P-type semiconductor layer on the first substrate to form an epitaxial structure; S2: A second distributed Bragg mirror is formed on the surface of the P-type semiconductor layer; S3: Provide a second substrate, spin-coat a quantum dot color conversion bonding material on its patterned surface, and form red quantum dot patterns, green quantum dot patterns and white quantum dot patterns on the second substrate through photolithography and etching processes, respectively. No quantum dots are set in the blue area to form a quantum dot color conversion layer. S4: The side of the second substrate with the quantum dot color conversion layer is bonded to the side of the first substrate with the second distributed Bragg mirror. Pressure is applied and ultraviolet light is irradiated to solidify the quantum dot color conversion layer, thereby achieving bonding between the second substrate and the second distributed Bragg mirror. S5: Remove the first substrate and clean the exposed N-type semiconductor layer surface; S6: Mesa etching is performed on a portion of the N-type semiconductor layer, the active region, and the P-type semiconductor layer on the N-type semiconductor layer side to form a MESA structure and expose the surface of the P-type semiconductor layer; a first distributed Bragg reflector is deposited covering the surface of the P-type semiconductor layer, the sidewalls of the MESA structure, and the top of the MESA structure; holes are made in the first distributed Bragg reflector to form a first opening exposing the N-type semiconductor layer and a second opening exposing the P-type semiconductor layer; an N-electrode and a P-electrode are formed in the first opening and the second opening, respectively; S7: The chip is transferred to a flexible substrate with an anisotropic conductive film by a stamp transfer process. Heating and pressurizing cause the electrodes of the chip to form an electrical connection with the driving circuit and metal contacts of the flexible substrate through the anisotropic conductive film. S8: A black matrix is ​​formed between the chips, and a polyimide encapsulation layer is formed above the chips, the polyimide encapsulation layer covering the flexible substrate and encapsulating each chip.

[0018] Furthermore, in the stamp transfer process, the pressure when picking up the chip is 100-2000g and the time is 1-5min; the bonding pressure when transferring to the flexible substrate is 1000-5000g, the temperature is 120-180℃, and the time is 1-10min.

[0019] Beneficial effects: Compared with the prior art, the specific beneficial effects of this invention are as follows: 1. This invention introduces a four-color (RGBW) pixel design in a MIP package, using an independent white sub-pixel to replace the RGB three-color mixing for displaying white images. This significantly reduces power consumption when displaying white images or high-brightness scenes, while simultaneously improving device brightness and contrast. Compared to the traditional three-color scheme, power consumption can be reduced by 20% to 30% under the same brightness conditions.

[0020] 2. This invention removes the sapphire growth substrate using laser lift-off technology, and the chip is directly connected to the flexible BT substrate through an anisotropic conductive film (ACF). This shortens the heat conduction path, significantly improves heat dissipation efficiency, effectively slows down brightness decay, and extends device lifespan.

[0021] 3. This invention uses a polyimide (PI) encapsulation layer to replace the traditional glass or PCB substrate, combined with a substrate-free chip structure, to achieve the flexible characteristics of the display module, thus expanding the application prospects of Micro-LED in wearable devices, flexible displays and other fields.

[0022] 4. This invention employs an RCLED resonant cavity structure, where a high-reflectivity distributed Bragg mirror and a low-reflectivity distributed Bragg mirror form an optical resonant cavity. This narrows the blue light spectrum half-width to within 10nm, improving color purity and conversion efficiency. The matching degree with the optimal absorption peak of quantum dots is >95%, and the conversion efficiency is 6%~10% higher than that of ordinary Micro-LEDs. Simultaneously, the resonant cavity locks the light emission direction in the positive direction, reducing lateral crosstalk, which is particularly advantageous for micro-pitch displays with a pixel pitch below P0.4.

[0023] 5. This invention completes the array pattern preparation of four-color pixels through photolithography in the COW segment, eliminating the need for the rearrangement process of massive transfer of four-color chips, significantly simplifying the process flow and reducing manufacturing costs. Attached Figure Description

[0024] Figure 1 A longitudinal cross-sectional view of the four-color Micro-LED packaging structure provided by the present invention; Figure 2 This is a side perspective view of the four-color Micro-LED packaging structure provided by the present invention; Figure 3 A cross-sectional view of the Micro-RCLED chip in the four-color Micro-LED packaging structure provided by the present invention; Figure 4 This is a flowchart illustrating the fabrication process of the Micro-RCLED chip in the four-color Micro-LED packaging structure provided by the present invention. Figure 5 A flowchart illustrating the mass transfer process of the four-color Micro-LED packaging structure provided by this invention; Figure 6 A schematic diagram of the quantum dot color conversion layer in the four-color Micro-LED packaging structure provided by the present invention; Illustrations: 10. Flexible substrate; 11. Driving circuit, metal contact; 20. Anisotropic conductive film; 30. Micro-RCLED chip; 31. P electrode; 32. N electrode; 33. First distributed Bragg reflector; 34. N-type semiconductor layer; 35. Active region; 36. P-type semiconductor layer; 37. Second distributed Bragg reflector; 38. Quantum dot color conversion layer; 39. Second substrate; 310. Patterned structure; 40. First substrate; 50. Black matrix; 60. Polyimide encapsulation layer. Detailed Implementation

[0025] The present invention will now be described in detail with reference to the embodiments.

[0026] Example 1:

[0027] This embodiment provides a Micro-LED packaging structure and its fabrication method, aiming to solve the technical problems of high power consumption of RGB mixed white light, poor substrate heat dissipation, and inflexible substrate in existing MIP three-color packaging. This invention achieves a high-brightness, low-power, and flexible four-color (red, green, blue, white) Micro-LED display module by employing a substrate-free resonant cavity light-emitting diode (RCLED) combined with quantum dot color conversion technology and utilizing mass transfer of anisotropic conductive film (ACF) to a flexible BT substrate. The Micro-LED packaging structure provided in this embodiment is as follows:

[0028] Please see Figures 1-2 This is a longitudinal cross-sectional view and a side oblique view of the four-color Micro-LED packaging structure provided in the embodiments of the present invention.

[0029] The Micro-LED packaging structure mainly includes: a flexible substrate 10, an anisotropic conductive film 20, a Micro-RCLED chip 30, and a polyimide encapsulation layer.

[0030] Specifically, the structure and function of each component are as follows: 1. Flexible substrate The flexible substrate 10 serves as the carrier substrate for the display module, and its surface integrates driving circuits and metal contacts 11. The flexible substrate 10 is made of bismaleimide-triazine resin (BT) material, which has good heat resistance and dimensional stability, and also has bendability, providing a foundation for subsequent flexible display applications.

[0031] 2. Anisotropic conductive film An anisotropic conductive film 20 is disposed between the flexible substrate 10 and the Micro-RCLED chip 30. The anisotropic conductive film 20 is mainly composed of an insulating adhesive (thermosetting epoxy resin) and conductive particles uniformly dispersed therein. Specifically, the conductive particles can be polymer microspheres with a Ni / Au metal layer coated on the surface, with a particle size of 3-5 μm, to ensure uniform contact and conductivity. The anisotropic conductive film 20 becomes conductive after being heated and pressed in the Z-axis (vertical) direction, and remains insulating in the XY (horizontal) direction, thereby realizing the electrical interconnection between the chip and the substrate driving circuit, while providing mechanical fixation and environmental protection.

[0032] 3. Micro-RCLED chip Several Micro-RCLED chips 30 are disposed on the flexible substrate 10 via an anisotropic conductive film 20. For example... Figure 3 As shown, the Micro-RCLED chip 30 is a blue resonant cavity light-emitting diode, which, from bottom to top (with the chip itself as a reference, from the BT substrate side upwards), includes: 3.1 P electrode and N electrode P-electrode 31 and N-electrode 32 are disposed at the bottom of the Micro-RCLED chip 30 (i.e., the side facing the BT substrate), and are electrically connected to the driving circuit and metal contact 11 on the flexible substrate 10 respectively through the anisotropic conductive film 20. P-electrode 31 is disposed on the surface of the P-type semiconductor layer 38 exposed in the MESA region for injecting holes into the device. N-electrode 32 is disposed at the first opening on the first distributed Bragg reflector 33 and is electrically connected to the N-type semiconductor layer 34 for injecting electrons into the device. Preferably, the metal electrode material is selected from one or more stacks of Au, Al, Cu, Ni, Pt, Cr, and Ti.

[0033] 3.2 First Distributed Bragg Mirror The first distributed Bragg reflector 33 is disposed on the P electrode 31 and the N electrode 32. The first distributed Bragg reflector 33 covers the top of the etched MESA structure, the sidewalls of the MESA structure, and the surface of the exposed P-type semiconductor layer 36. The first distributed Bragg reflector 33 has a first opening exposing the N-type semiconductor layer 34 and a second opening exposing the P-type semiconductor layer 36. The N electrode 32 is disposed in the first opening and the P electrode 31 is disposed in the second opening. The first distributed Bragg reflector 33 is a high-reflectivity DBR, specifically composed of 15 alternating dielectric layers with a thickness of 1.0 μm and a reflectivity >99.5%. Optionally, the first distributed Bragg reflector 33 is a TiO2 / SiO2 stack.

[0034] 3.3 N-type semiconductor layer (N-GaN) An N-type semiconductor layer 34 is disposed on top of the first distributed Bragg mirror 33, and the material is N-type doped GaN. Furthermore, N-type conductivity is achieved by doping the GaN with donor impurities such as Si, which is used to inject electrons into the active region.

[0035] 3.4 Active MQW The active region 35 is disposed on the N-type semiconductor layer 34 and is the core region for electron-hole recombination light emission. Its structure is preferably an InGaN / GaN multiple quantum well (MQW) structure. The MQW structure includes 3-8 cycles of InGaN quantum well layers and GaN quantum barrier layers. By adjusting the In composition (e.g., 15%-25%), emission in the blue light band (450nm-470nm) is achieved. In this embodiment, the active region 35 is located at the antinode of the optical field of the resonant cavity formed between the first distributed Bragg mirror 33 and the second distributed Bragg mirror 37 in the thickness direction to maximize stimulated emission efficiency.

[0036] A portion of the N-type semiconductor layer 34 and the active region 35 are etched to form a MESA structure, with the bottom of the MESA region exposing the surface of the P-type semiconductor layer 36 for setting the P electrode 31.

[0037] 3.5 P-type semiconductor layer (P-GaN) A P-type semiconductor layer 36 is disposed above the active region 35, and the material is P-type doped GaN or AlGaN. Further, P-type conductivity is achieved by doping GaN with acceptor impurities such as Mg, which is used to inject holes into the active region 35. Optionally, an electron blocking layer (not shown) is also disposed between the P-type semiconductor layer 36 and the active region 35. The electron blocking layer is made of P-type AlGaN and has a thickness of 10-30 nm to prevent electrons from overflowing into the P-region.

[0038] 3.6 Second Distributed Bragg Mirror The second distributed Bragg reflector 37 is disposed on the P-type semiconductor layer 36. In this embodiment, the second distributed Bragg reflector 37 is a low-reflection DBR, composed of 8 alternating dielectric layers with a thickness of 0.5 μm, a central reflection wavelength of 460 nm, a reflectivity of 40%-60%, a half-width at half-maximum (WHM) of 25-30 nm, and a total optical thickness controlled at 2λ to ensure that the standing wave peak in the cavity overlaps with the emission peak of the multiple quantum wells. Optionally, the second distributed Bragg reflector 37 is a TiO2 / SiO2 stack. The first distributed Bragg reflector 33 and the second distributed Bragg reflector 37 are respectively disposed on both sides of the N-type semiconductor layer 34 and the P-type semiconductor layer 36. The high-reflection DBR and the low-reflection DBR together constitute the optical resonant cavity, and the light emission direction is locked in a narrow-spectrum, narrow-angle relative arrangement. The blue light bandwidth can be compressed to within 10 nm, resulting in a "purer" excitation peak for red and green quantum dots, reducing back reabsorption of quantum dots, and improving color purity.

[0039] Preferably, in the Micro-RCLED chip 30, the total epitaxial thickness is 4.0-7.0μm: light is emitted from the quantum well and reflected back and forth between the upper and lower DBR layers. By designing the thickness of GaN and the thickness of the upper and lower DBR layers, the light of the target wavelength band can be mutually enhanced during the back and forth reflection, while the light of the non-target wavelength band will cancel each other out during the back and forth reflection, thereby achieving the purpose of filtering.

[0040] 3.7 Quantum Dot Color Conversion Layer The quantum dot color conversion layer 38 is disposed on the light-emitting side of the Micro-RCLED chip 30, located above the second distributed Bragg mirror 37. It comprises a patterned thin film containing red quantum dots (R-QD), green quantum dots (G-QD), and white quantum dots (W-QD), corresponding to the red, green, and white sub-pixels in the four-color pixel, respectively. The blue sub-pixel is directly provided by the blue RCLED without quantum dot conversion. The quantum dot color conversion layer 38 is prepared by mixing quantum dots and high-transmittance UV-curable adhesive in a ratio of 1:2 to 1:5 and then patterning them using photolithography and etching processes.

[0041] 3.8 Second Substrate The second substrate 39 is disposed above the quantum dot color conversion layer 38, and the side of the second substrate 39 facing the second distributed Bragg mirror 37 has a patterned structure 310. PSS treatment of the substrate can improve the light extraction efficiency of QD and enhance the adhesion, making it less likely to peel off or fall off.

[0042] 4. Black Matrix A black matrix 50 is positioned between each Micro-RCLED chip 30, separating them. The black matrix 50 uses black photoresist material to prevent light crosstalk between chips and improve display contrast.

[0043] 5. Polyimide encapsulation layer A polyimide (PI) encapsulation layer 60 covers the flexible substrate 10 and encapsulates the Micro-RCLED chip 30, with a thickness of 5-50 μm. After curing, the PI encapsulation layer forms a flexible sealing protective layer, and after polishing, the chip's light-emitting surface is exposed, improving light transmittance, ultimately forming a flexible four-color Micro-LED display module.

[0044] This embodiment also provides a method for fabricating the above-mentioned four-color Micro-LED packaging structure, including the following steps: Step S1: COW (Chip on Wafer) Fabrication – Arrayed RCLED Fabrication S1-1: A first substrate 40 is provided, wherein an N-type semiconductor layer 34, an active region 35 and a P-type semiconductor layer 36 are disposed sequentially from bottom to top on the first substrate 40.

[0045] S1-2: Eight layers of DBR are deposited on the P-type semiconductor layer 36. The center reflection wavelength of the DBR is 460nm, the reflectivity is 40%-60%, the half width at half maximum of reflection is 25-30nm, and the total optical thickness is controlled at 2λ to form the second distributed Bragg mirror 37.

[0046] S1-3: Quantum dots and high-transmittance UV-curable adhesive are ultrasonically mixed at a ratio of 1:2 to 1:5, and then vacuum degassed for 10 minutes to obtain a UV-QD mixed adhesive. A second substrate 39 is provided. The second substrate 39 is first patterned with sapphire (PSS), and then the UV-QD mixed adhesive is spin-coated onto its surface. Photolithography, development, and removal of residual photoresist are then performed, followed by baking at 105°C for 2 minutes. Inductively coupled plasma (ICP) etching is used to completely etch away the UV-QD mixed adhesive film in the non-patterned areas around the chip, retaining only the quantum dot pattern in the photoresist-covered area. The photoresist is then removed. Finally, oxygen plasma treatment is performed to remove trace organic residues on the surface of the UV-QD film and reduce surface roughness.

[0047] Repeat steps S1-3 above to sequentially prepare red, green, and white quantum dot patterns. Each cycle uses the corresponding color of quantum dot material (red, green, or white quantum dots), and different colored patterns are patterned by changing the photolithographic mask. The blue pixel area does not require quantum dots and is left as a blank area without them, allowing the original blue light emitted by the blue light chip to be emitted directly, thus forming the blue sub-pixel.

[0048] UV-QD and low-reflection DBR are bonded together. UV-QD is cured by applying a pressure of 500~5000kg and irradiating with a UV lamp. Quantum dot color conversion bonding material is spin-coated on its patterned surface. Red quantum dot pattern, green quantum dot pattern and white quantum dot pattern are formed on the second substrate 39 by photolithography and etching processes, respectively. No quantum dots are set in the blue area to form a quantum dot color conversion layer 38. S1-4: The side of the second substrate 39 with the quantum dot color conversion layer 38 is bonded to the side of the first substrate 40 with the second distributed Bragg mirror 37. A pressure of 500~5000kg is applied while UV lamp irradiation is used to cure UV-QD to complete the bonding. S1-5: Using laser lift-off (LLO) technology, the first substrate 40 is irradiated with a laser with a wavelength of 248nm, causing GaN to decompose into Ga metal and N2 gas, thus removing the first substrate 40. Subsequently, residual Ga metal is removed by wet etching (5%-20% HCl solution, 40-50℃), and then dry etching (ICP) is used to remove residual adhesive and impurities, cleaning the exposed N-type semiconductor layer 34 surface.

[0049] S1-6: Micro- and nano-fabricate and etch portions of the exposed N-type semiconductor layer 34 and the active region 35 to form a MESA structure; deposit 15 layers of high-reflectivity DBR (1.0 μm thick, full-band reflectivity >99.5%) on the top of the MESA structure, the sidewalls of the MESA structure, and the surface of the exposed P-type semiconductor layer 36, i.e., the first distributed Bragg reflector 33; create openings in the first distributed Bragg reflector 33 through micro- and nano-fabrication to form a first opening exposing the N-type semiconductor layer 34 and a second opening exposing the P-type semiconductor layer 36; deposit metal electrodes in the first and second openings respectively to form an N electrode 32 and a P electrode 31 (the metal electrode material is selected from one or more of Au, Al, Cu, Ni, Pt, Cr, and Ti).

[0050] Step S2: Mass transfer of the stamp to the BT substrate S2-1: A flexible substrate 10 is provided, on which a driving circuit and metal contacts 11 are integrated. The BT substrate is ultrasonically cleaned for 5 minutes each with ethanol and acetone.

[0051] S2-2: Warm the anisotropic conductive film 20 to room temperature for 1 hour, remove the protective film on one side of the anisotropic conductive film 20, apply pressure of 1000g at room temperature for 5 minutes, attach the anisotropic conductive film 20 to the flexible substrate 10, and then remove the protective film on the other side of the anisotropic conductive film 20 for later use.

[0052] S2-3: Use nanoimprint technology to create a silicone stamp transfer head that matches the chip size.

[0053] S2-4: Align the Stamp transfer stamp head with the chip on the COW wafer obtained in step S1, apply 100-2000g pressure, hold for 1-5 minutes, use the adhesiveness of the Stamp material to pick up the chip, remove the temporary substrate of the COW wafer, and leave the chip suspended.

[0054] S2-5: Align the stamp head with the chip with the BT substrate to which the anisotropic conductive film 20 was bonded in step S2-2, apply a bonding pressure of 1000-5000g, control the temperature at 120-180℃, and hold for 1-10 minutes. Under heating and pressurization conditions, the epoxy resin in the anisotropic conductive film 20 softens and flows, and the conductive particles located between the chip PAD and the metal contacts of the BT substrate are squeezed and deformed, causing the surface insulating layer to crack and forming a stable electrical connection in the Z-axis direction, while maintaining insulation in the XY direction.

[0055] S2-6: Release the stamp transfer head. Since the adhesive force of the cured anisotropic conductive film 20 is greater than that of PDMS, the stamp transfer head can be easily removed. At this point, the P electrode 31 and N electrode 32 of the chip have formed a stable electrical connection with the driving circuit and metal contact 11 of the BT substrate through the anisotropic conductive film 20. Finally, wipe away any remaining anisotropic conductive film material with acetone.

[0056] Step S3: Packaging and Flexibility Processing S3-1: In the gap area between the four-color chips after transfer, a black matrix photoresist is prepared by photolithography to prevent light source crosstalk between chips.

[0057] S3-2: A polyimide (PI) solution is uniformly coated onto the surface of a BT substrate using a spin coating process, with a thickness controlled at 5-50 μm. Under nitrogen protection, the solvent is removed by baking at 80-100℃ to form a semi-cured film.

[0058] S3-3: In a vacuum environment (<10) -3 The PI film is subjected to high-temperature imidization treatment at (Pa) to eliminate air bubbles inside the coating and avoid defects. The PI film is then patterned using photolithography for subsequent cutting.

[0059] S3-4: The PI film is thoroughly cured by UV irradiation, and then the chip's light-emitting surface is polished to improve light transmittance, ultimately forming a flexible four-color Micro-LED display module.

[0060] The above embodiments are only for illustrating the technical concept and features of the present invention, and are intended to enable those skilled in the art to understand the content of the present invention and implement it accordingly. They should not be construed as limiting the scope of protection of the present invention. All equivalent transformations or modifications made in accordance with the spirit and essence of the present invention should be covered within the scope of protection of the present invention.

Claims

1. A Micro LED packaging structure, characterized in that, include: Flexible substrate (10); An anisotropic conductive film (20) is disposed on the flexible substrate (10); Multiple Micro-RCLED chips (30) are disposed above the anisotropic conductive film (20), and the electrodes of the Micro-LED chips are electrically connected to the driving circuit of the flexible substrate (10) through the anisotropic conductive film (20); a black matrix (50) is disposed between each Micro-LED chip. The Micro-RCLED chip (30) has a resonant cavity LED structure; With the chip itself as a reference, from the flexible substrate (10) side upward, the Micro-RCLED chip (30) includes, from bottom to top: a P electrode (31) and an N electrode (32), a first distributed Bragg mirror (33), an N-type semiconductor layer (34), an active region (35), a P-type semiconductor layer (36), and a second distributed Bragg mirror (37); a quantum dot color conversion layer (38) is disposed above the second distributed Bragg mirror (37); a second substrate (39) is disposed above the quantum dot color conversion layer (38), and the second substrate (39) has a patterned structure (310) on the side facing the second distributed Bragg mirror (37). A polyimide encapsulation layer (60) is disposed above the Micro-RCLED chip (30), and the polyimide encapsulation layer (60) covers the flexible substrate (10) and encapsulates the Micro-RCLED chip (30).

2. The Micro-LED packaging structure according to claim 1, characterized in that: The quantum dot color conversion layer (38) includes red, green and white quantum dot pixels and a blue pixel area, which are patterned into four-color pixel units through photolithography.

3. The Micro-LED packaging structure according to claim 1, characterized in that: The first distributed Bragg reflector has a 10-50 layer dielectric film structure with a thickness of 0.8-3.0 μm and a reflectivity >99.0%; the second distributed Bragg reflector has a 2-20 layer dielectric film structure with a thickness of 0.2-1.5 μm and a reflectivity of 40%-60%, with a total optical thickness of 13-22λ. The first distributed Bragg mirror (33) and the second distributed Bragg mirror (37) constitute an asymmetric optical resonant cavity.

4. The Micro-LED packaging structure according to claim 1, characterized in that: A portion of the N-type semiconductor layer (34) is etched to form a MESA structure, and the first distributed Bragg mirror (33) covers the top of the MESA structure, the sidewalls of the MESA structure, and the surface of the etched P-type semiconductor layer (36).

5. The Micro-LED packaging structure according to claim 4, characterized in that: The first distributed Bragg reflector (33) has a first opening exposing the surface of the N-type semiconductor layer (34) and a second opening exposing the surface of the P-type semiconductor layer (36); the N electrode (32) is disposed in the first opening and in contact with the N-type semiconductor layer (34), and the P electrode (31) is disposed in the second opening and in contact with the P-type semiconductor layer (36).

6. The Micro-LED packaging structure according to claim 1, characterized in that: The materials of the P electrode (31) and N electrode (32) are selected from one or more stacks of gold, aluminum, copper, nickel, platinum, chromium and titanium.

7. The Micro-LED packaging structure according to claim 1, characterized in that: The total epitaxial thickness of the Micro-RCLED chip (30) is 4.0-7.0 μm; the thickness of the polyimide encapsulation layer (60) is 5-50 μm.

8. The Micro-LED packaging structure according to claim 1, characterized in that: The flexible substrate (10) is a BT substrate, on which a driving circuit and metal contacts (11) are integrated; the anisotropic conductive film (20) includes an insulating adhesive and conductive particles uniformly dispersed therein, wherein the conductive particles are polymer microspheres with a metal layer on the surface and a particle size of 3-5 μm; the anisotropic conductive film (20) is conductive in the vertical direction and insulating in the horizontal direction, thereby realizing the electrical connection between the P electrode (31) and the N electrode (32) and the driving circuit respectively.

9. A method for fabricating a Micro-LED packaging structure as described in any one of claims 1-8, characterized in that, Includes the following steps: S1: Provide a first substrate (40), and grow an N-type semiconductor layer (34), an active region (35) and a P-type semiconductor layer (36) sequentially on the first substrate (40) to form an epitaxial structure; S2: A second distributed Bragg mirror (37) is formed on the surface of the P-type semiconductor layer (36); S3: Provide a second substrate (39), spin-coat a quantum dot color conversion bonding material on its patterned surface, and form red quantum dot patterns, green quantum dot patterns and white quantum dot patterns on the second substrate through photolithography and etching processes, respectively. No quantum dots are set in the blue area to form a quantum dot color conversion layer (38). S4: The side of the second substrate (39) with the quantum dot color conversion layer (38) is bonded to the side of the first substrate (40) with the second distributed Bragg mirror (37), pressure is applied and ultraviolet light is irradiated to solidify the quantum dot color conversion layer (38) and achieve bonding between the second substrate (39) and the second distributed Bragg mirror (37); S5: Remove the first substrate (40) and clean the exposed surface of the N-type semiconductor layer (34); S6: Mesa etching is performed on a portion of the N-type semiconductor layer (34), the active region (35), and the P-type semiconductor layer (36) on the side of the N-type semiconductor layer (34) to form a MESA structure and the exposed surface of the P-type semiconductor layer (36); a first distributed Bragg reflector (33) is deposited covering the surface of the P-type semiconductor layer (36), the sidewalls of the MESA structure, and the top of the MESA structure; a hole is opened in the first distributed Bragg reflector (33) to form a first opening exposing the N-type semiconductor layer (34) and a second opening exposing the P-type semiconductor layer (36); an N electrode (32) and a P electrode (31) are formed in the first opening and the second opening, respectively. S7: The chip is transferred to a flexible substrate (10) with an anisotropic conductive film (20) by a stamp transfer process. Heating and pressurizing cause the electrodes of the chip to form an electrical connection with the driving circuit and metal contacts (11) of the flexible substrate (10) through the anisotropic conductive film (20). S8: A black matrix (40) is formed between each chip, and a polyimide encapsulation layer (60) is formed above the chips, the polyimide encapsulation layer (60) covering the flexible substrate (10) and encapsulating each chip.

10. The preparation method according to claim 9, characterized in that: In the stamp transfer process, the pressure when picking up the chip is 100-2000g and the time is 1-5min; the bonding pressure when transferring to the flexible substrate is 1000-5000g, the temperature is 120-180℃, and the time is 1-10min.