EEG electrode shedding detection device

Abstract

The utility model relates to an EEG electrode shedding detection device. The EEG electrode shedding detection device is characterized in that a reference electrode is connected with a pre-amplifier; the movable electrode is connected with the pre-amplifier through the analog switch switching circuit; the bias electrode is connected with the right leg driving circuit through the analog switch switching circuit; the pre-amplifier is connected with the first threshold comparator; the right leg driving circuit is connected with the second threshold comparator; the first threshold comparator is respectively connected with each combined logic gate circuit in the plurality of combined logic gate circuits, and the second threshold comparator is respectively connected with each combined logic gate circuit in the plurality of combined logic gate circuits; and the movable electrode falling detection combinational logic gate circuit and the reference electrode falling detection combinational logic gate circuit in the plurality of combinational logic gate circuits are connected with the analog change-over switch circuit. On the basis, differentiated detection of the falling of the EEG electrode is realized.

Description

Technical Field

[0001] The invention relates to the field of computer technology, in particular to a detection device for EEG electrode detachment. Background Art

[0002] The electroencephalogram (EEG) signal is a weak signal with a frequency of 0.5 to 100 Hz and an amplitude of 0.1 uV to 100 uV. The contact impedance between the skin and the wet electrode is several k to tens of k ohms. In addition, the half-cell effect between the electrode and the skin interface will cause the generation of polarization voltage. Although the electrode made of silver / silver chloride (Ag / AgCl) can reduce the polarization voltage as much as possible, it is still several orders of magnitude higher than the EEG signal. At the same time, the common mode signal of the human body is also several orders of magnitude higher than the EEG signal itself. Therefore, the EEG signal acquisition circuit needs to achieve the following at the same time: bandwidth covering the EEG signal band, low noise, high input impedance, high common mode rejection ratio, and high polarization voltage tolerance. These parameters are contradictory to each other and need to be balanced.

[0003] The prior art lacks a simple and effective EEG signal acquisition circuit, which makes it difficult to ensure the quality of the EEG signal while meeting the above conditions and to perform differentiated detection of electrode detachment in real time. Summary of the invention

[0004] The present invention provides an EEG electrode detachment detection device, which is used to solve the problem that the prior art lacks a simple and effective EEG signal acquisition circuit, and it is difficult to ensure the quality of the EEG signal while meeting the above conditions, and at the same time, can instantly perform differentiated detection of electrode detachment. The device can ensure the quality of the EEG signal while meeting the conditions of bandwidth covering the EEG signal frequency band, low noise, high input impedance, high common mode rejection ratio, and high polarization voltage tolerance, and can instantly perform differentiated detection of electrode detachment.

[0005] A detection device for EEG electrode detachment, comprising: a bias electrode, an active electrode, a test electrode, a preamplifier, an analog switch switching circuit, a right leg drive circuit, a first threshold comparator, a second threshold comparator and a plurality of combinational logic gate circuits; wherein the reference electrode is connected to the preamplifier; the active electrode is connected to the preamplifier through the analog switch switching circuit; the bias electrode is connected to the right leg drive circuit through the analog switch switching circuit; the preamplifier is connected to the first threshold comparator; the right leg drive circuit is connected to the second threshold comparator; the first threshold comparator is respectively connected to each combinational logic gate circuit in the plurality of combinational logic gate circuits, and the second threshold comparator is respectively connected to each combinational logic gate circuit in the plurality of combinational logic gate circuits; the active electrode detachment detection combinational logic gate circuit and the reference electrode detachment detection combinational logic gate circuit in the plurality of combinational logic gate circuits are both connected to the analog switch switching circuit.

[0006] In one embodiment, the multiple combinational logic gate circuits include: a sensor detachment detection combinational logic gate circuit, an electrode non-detachment detection combinational logic gate circuit, a bias electrode detachment detection combinational logic gate circuit, an active electrode detachment detection combinational logic gate circuit and a reference electrode detachment detection combinational logic gate circuit.

[0007] In one embodiment, the sensor detachment detection combinational logic gate circuit includes: a first AND gate circuit; one input end of the first AND gate circuit is connected to the output end of the first threshold comparator, and the other input end of the first AND gate circuit is connected to the output end of the second threshold comparator.

[0008] In one embodiment, the electrode non-detachment detection combinational logic gate circuit includes: a NOR gate circuit; one input end of the NOR gate circuit is connected to the output end of the first threshold comparator, and the other input end of the NOR gate circuit is connected to the output end of the second threshold comparator.

[0009] In one embodiment, the bias electrode detachment detection combinational logic gate circuit includes: a first NOT gate circuit and a second AND gate circuit; the output end of the first threshold comparator is connected to an input end of the second AND gate circuit through the first NOT gate circuit, and the output end of the second threshold comparator is connected to the other input end of the second AND gate circuit.

[0010] In one embodiment, the reference electrode detachment detection combinational logic gate circuit includes: a second NOT gate circuit and a third AND gate circuit; the output end of the second threshold comparator is connected to an input end of the third AND gate circuit through the second NOT gate circuit; the output end of the first threshold comparator is connected to another input end of the third AND gate circuit; the output end of the third AND gate circuit is connected to the analog switch switching circuit; the reference electrode detachment detection combinational logic gate circuit also includes: a third NOT gate circuit and a fourth AND gate circuit; the output end of the second threshold comparator is connected to an input end of the fourth AND gate circuit through the third NOT gate circuit; the output end of the first threshold comparator is connected to another input end of the fourth AND gate circuit.

[0011] In one embodiment, the active electrode detachment detection combinational logic gate circuit includes: a second NOT gate circuit and a third AND gate circuit; the output end of the second threshold comparator is connected to an input end of the third AND gate circuit through the second NOT gate circuit; the output end of the first threshold comparator is connected to another input end of the third AND gate circuit; the output end of the third AND gate circuit is connected to the analog switch switching circuit; the active electrode detachment detection combinational logic gate circuit also includes: a fourth NOT gate circuit and a fifth AND gate circuit; the output end of the first threshold comparator is connected to an input end of the fifth AND gate circuit through the fourth NOT gate circuit; the output end of the second threshold comparator is connected to another output end of the fifth AND gate circuit.

[0012] In one embodiment, the analog switch switching circuit includes two single-pole double-throw switches: a first single-pole double-throw switch and a second single-pole double-throw switch; wherein the moving end of the first single-pole double-throw switch is respectively connected to the third AND gate circuit and the active electrode, and the two fixed ends of the first single-pole double-throw switch are respectively connected to the active electrode and the bias electrode; the moving end of the second single-pole double-throw switch is respectively connected to the third AND gate circuit and the bias electrode, and the two fixed ends of the second single-pole double-throw switch are respectively connected to the active electrode and the bias electrode.

[0013] In one embodiment, the preamplifier includes a common-phase parallel stage amplifier; the device also includes: a gain resistor-capacitor network; the reference electrode is connected to a positive input terminal of the common-phase parallel stage amplifier, and the active electrode is connected to another positive input terminal of the common-phase parallel stage amplifier through the analog switch switching circuit; the bias electrode is connected to the output terminal of the right leg drive circuit through the analog switch switching circuit; the inverting input terminal of the common-phase parallel stage amplifier is connected to the input terminal of the right leg drive circuit through the gain resistor-capacitor network; the output terminal of the preamplifier is connected to the input terminal of the first threshold comparator; the output terminal of the right leg drive circuit is connected to the input terminal of the analog switch switching circuit and the second threshold comparator.

[0014] In one embodiment, the gain resistor-capacitor network includes a first gain capacitor, a second gain capacitor and a gain capacitor access switch; the gain capacitor access switch is respectively connected to the active electrode detachment detection combinational logic gate circuit and the reference electrode detachment detection combinational logic gate circuit, and the first gain capacitor is connected to both sides of the second gain capacitor through the gain capacitor access switch.

[0015] In one embodiment, the gain capacitor access switch is a double-pole double-throw switch; the first gain capacitor is connected in parallel on both sides of the poles of the double-pole double-throw switch, the poles of the double-pole double-throw switch are connected to the active electrode detachment detection combinational logic gate circuit and the reference electrode detachment detection combinational logic gate circuit, two contacts on one side of the double-pole double-throw switch are short-circuited, and two contacts on the other side of the double-pole double-throw switch are connected in parallel to both sides of the second gain capacitor.

[0016] In one embodiment, the device further includes: an AC constant current source and a signal acquisition and processing module; wherein the AC constant current source is connected to any one of the bias electrode, the active electrode or the reference electrode, and the signal acquisition and processing module is connected to the output end of the preamplifier; the signal acquisition and processing module includes: a conditioning circuit, an ADC circuit and a digital signal processing module; wherein the conditioning circuit is connected to the preamplifier and the ADC circuit, and the ADC circuit is connected to the digital signal processing module.

[0017] In one embodiment, the gain resistor-capacitor network further includes a first gain resistor, a second gain resistor, a third gain resistor and a fourth gain resistor, wherein the first gain resistor and the second gain resistor are connected in series between an inverting input terminal of the in-phase parallel amplifier and the input terminal of the right leg drive circuit; the third gain resistor and the fourth gain resistor are connected in series between the other inverting input terminal of the in-phase parallel amplifier and the input terminal of the right leg drive circuit; and the second gain capacitor is connected in parallel across the second gain resistor and the third gain resistor.

[0018] The above-mentioned EEG electrode detachment detection device, through the design of the circuit connection structure, can ensure the quality of the collected EEG signal under the conditions of satisfying the above-mentioned bandwidth covering the EEG signal frequency band, low noise, high input impedance, high common mode rejection ratio, and high polarization voltage tolerance. At the same time, based on the saturation of the preamplifier and the right leg drive output, the electrode detachment can be accurately located, and through the design of the analog switch switching circuit and the first threshold comparator and the second threshold comparator, the electrode detachment can be instantly and differentially detected. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 One of the schematic diagrams of a detection device for EEG electrode detachment provided in one embodiment;

[0020] Figure 2 The second schematic diagram of the EEG electrode detachment detection device provided in one embodiment;

[0021] Figure 3 A schematic diagram of a sensor fall-off detection combinational logic gate circuit provided in one embodiment;

[0022] Figure 4 A schematic diagram of a combinational logic gate circuit for detecting electrode non-detachment provided in one embodiment;

[0023] Figure 5 A schematic diagram of a bias electrode detachment detection combinational logic gate circuit provided in one embodiment;

[0024] Figure 6 A schematic diagram of a reference electrode detachment detection combinational logic gate circuit provided in one embodiment;

[0025] Figure 7 A schematic diagram of a combinational logic gate circuit for detecting the detachment of an active electrode provided in one embodiment;

[0026] Figure 8 This is a third schematic diagram of a device for detecting EEG electrode detachment provided in an embodiment. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0028] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the present invention should be understood by people with ordinary skills in the field to which the present invention belongs. The "first", "second" and similar words used in the present invention do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0029] To facilitate understanding, technical terms of the present invention are first explained.

[0030] Differential voltage is the difference between two signals relative to a common reference point. In differential signals, the two signals have the same frequency and phase, but different amplitudes. Differential voltage is often used to transmit and process signals, such as in differential amplifiers.

[0031] Common-mode voltage refers to the average value of two signals relative to a common reference point. In common-mode signals, the signals have the same amplitude, frequency, and phase, usually due to interference or noise. It is usually necessary to consider the suppression and management of differential-mode and common-mode voltages to ensure accurate transmission and processing of signals.

[0032] In order to facilitate understanding, the inventive concept of the present invention is first described.

[0033] In the process of collecting EEG signals, if the contact impedance between the electrode and the skin is too high, the signal quality will be reduced. Therefore, it is necessary to monitor the impedance of each electrode in real time to ensure the quality of the EEG signal. In addition, there is a risk that the sensor electrode will be separated from the skin during wearing, and an alarm needs to be given immediately to prevent long-term miscollection and missed collection. In addition, every time the sensor is worn, it is always hoped that the acquisition circuit can respond quickly, quickly display the EEG waveform, and give the result of whether the contact impedance is appropriate, that is, to prompt whether the sensor is worn correctly as required, so as to save the precious time of medical staff.

[0034] The existing EEG acquisition circuit generally uses a three-op-amp instrumentation amplifier as a preamplifier because its in-phase parallel stage circuit can provide a very high input impedance to offset the attenuation of the EEG signal by the contact impedance between the skin and the electrode. The in-phase parallel stage achieves the amplification of the differential mode signal by adjusting the gain resistor, and for the common mode signal, its amplification factor is always 1, and the common mode rejection ratio (CMRR) of the integrated operational amplifier itself is very high. Therefore, ignoring its influence, the in-phase parallel stage can achieve the improvement of CMRR, and its improvement value is 20lg(A)dB, where A is the amplification factor of the in-phase parallel stage for the differential mode signal, and from the Friis formula, it is known that increasing the gain A of the in-phase parallel stage can obtain the best equivalent noise coefficient at the input end of the multi-stage amplifier. However, the commonly used EEG in-phase parallel stage amplifier cannot design the amplification factor A to be very large, because the existence of polarization voltage will cause the output to reach the power rail once the amplification factor A is too large. The improved in-phase parallel amplifier replaces the gain resistor with a gain resistor-capacitor network to achieve a small gain for DC signals and a high gain for AC signals, which can achieve both a low-frequency bandwidth of 0.5 Hz and a high polarization voltage tolerance. However, to achieve a low-frequency bandwidth of 0.5 Hz, the value of the gain capacitor will be designed to be larger, reaching more than tens of microfarads. When the electrode falls off, the common-mode voltage at the input of the preamplifier is converted into a differential-mode voltage, causing the gain capacitor to be slowly charged until it reaches a voltage close to the rail voltage. This results in a large gain capacitor and too slow discharge after the electrode is correctly put on again, that is, the response delay of the acquisition circuit is long, which can be as long as more than ten seconds, greatly affecting the availability of the acquisition circuit.

[0035] Based on this, the EEG electrode detachment detection device of the present invention, through the design of the circuit connection structure, can ensure the quality of the collected EEG signal under the conditions of satisfying the above-mentioned bandwidth covering the EEG signal frequency band, low noise, high input impedance, high common mode rejection ratio, and high polarization voltage tolerance. At the same time, based on the saturation of the preamplifier and the right leg drive output, the electrode detachment can be accurately located, and through the design of the analog switch switching circuit and the first threshold comparator and the second threshold comparator, the electrode detachment can be instantly and differentiatedly detected.

[0036] The following describes the EEG electrode detachment detection device of the present invention in conjunction with the accompanying drawings.

[0037] Figure 1 and Figure 2 Schematic diagram of the EEG electrode detachment detection device provided by the present invention. Figure 1 As shown, the device includes: a bias electrode, an active electrode, a reference electrode, a preamplifier, an analog switch switching circuit, a right leg driving circuit, a first threshold comparator, a second threshold comparator and a plurality of combinational logic gate circuits.

[0038] Among them, the reference electrode is connected to the preamplifier; the active electrode is connected to the preamplifier through the analog switch switching circuit; the bias electrode is connected to the right leg drive circuit through the analog switch switching circuit; the preamplifier is connected to the first threshold comparator; the right leg drive circuit is connected to the second threshold comparator; the first threshold comparator is respectively connected to each combinational logic gate circuit in the multiple combinational logic gate circuits, and the second threshold comparator is respectively connected to each combinational logic gate circuit in the multiple combinational logic gate circuits; the active electrode detachment detection combinational logic gate circuit and the reference electrode detachment detection combinational logic gate circuit in the multiple combinational logic gate circuits are both connected to the analog switching switch circuit.

[0039] The EEG electrode detachment detection device provided by the present invention can ensure the quality of the collected EEG signal under the conditions of satisfying the above-mentioned bandwidth covering the EEG signal frequency band, low noise, high input impedance, high common mode rejection ratio, and high polarization voltage tolerance through the design based on the above-mentioned circuit. At the same time, based on the saturation of the preamplifier and the right leg drive output, the electrode detachment can be accurately located, and the instant differentiated detection of electrode detachment can be realized through the design of the analog switch switching circuit and the first threshold comparator and the second threshold comparator.

[0040] In one embodiment, the preamplifier includes a common-phase parallel amplifier; the device also includes: a gain resistor-capacitor network; the gain resistor-capacitor network is used to adjust the low-frequency bandwidth and passband gain of the preamplifier, and is used to increase the signal acquisition speed after the electrode is re-worn; the reference electrode is connected to a positive input terminal of the common-phase parallel amplifier, and the active electrode is connected to another positive input terminal of the common-phase parallel amplifier through the analog switch switching circuit; the bias electrode is connected to the output terminal of the right leg drive circuit through the analog switch switching circuit; the inverting input terminal of the common-phase parallel amplifier is connected to the input terminal of the right leg drive circuit through the gain resistor-capacitor network; the output terminal of the preamplifier is connected to the input terminal of the first threshold comparator; the output terminal of the right leg drive circuit is connected to the input terminal of the analog switch switching circuit and the second threshold comparator; the right leg drive circuit is used to obtain the common-mode voltage of the two positive input terminals of the common-phase parallel amplifier; the right leg drive circuit is also used to reversely amplify the common-mode voltage and feed it back to the human body.

[0041] Among them, the same phase parallel amplifier can be specifically referred to Figure 2 U1A and U1D in Figure 2 U1A and U1D in the circuit form a parallel amplifier in phase, achieving extremely high input impedance and improving common mode rejection ratio. Figure 2Rrld, Crld and U1C in Figure 2 Rrld, Crld and U1C in the right leg drive circuit form the common mode voltage value obtained at the middle point of the gain resistor-capacitor network, amplify it by -A times and then feed it back to the human body, greatly reducing the common mode signal amplitude of the human body and achieving high polarization voltage tolerance. The gain resistor-capacitor network mentioned above can be found in Figure 2 Rg1, Rg1', Rg2, Rg2' and Cg1 and the switchable Cg2 can adjust the low-frequency bandwidth and passband gain of the preamplifier, and can achieve a quick response after the electrode is put on again by adjusting whether Cg2 is connected to the circuit.

[0042] In one embodiment, the multiple combinational logic gate circuits include: a sensor detachment detection combinational logic gate circuit, an electrode non-detachment detection combinational logic gate circuit, a bias electrode detachment detection combinational logic gate circuit, an active electrode detachment detection combinational logic gate circuit and a reference electrode detachment detection combinational logic gate circuit.

[0043] In one embodiment, the sensor detachment detection combination logic gate circuit includes: a first AND gate circuit; one input end of the first AND gate circuit is connected to the output end of the first threshold comparator, and the other input end of the first AND gate circuit is connected to the output end of the second threshold comparator. Specifically, the connection relationship of the sensor detachment detection combination logic gate circuit is as follows: Figure 3 shown.

[0044] For ease of understanding, the principle of detecting EEG electrode detachment based on the above-mentioned device is explained below.

[0045] Combination Figure 1 and Figure 2 , in the default state, the moving end 12 in the first single-pole double-throw switch SPDT1 is connected to the fixed end 14, and the moving end 9 in the second single-pole double-throw switch SPDT2 is connected to the fixed end 11. In the above default state, when the reference electrode or the active electrode falls off, the common-mode signal at the input end of the preamplifier becomes a differential-mode signal. Due to the high gain of the preamplifier and the rail-to-rail output of the preamplifier, this will cause the output voltage of the preamplifier to saturate, that is, the output is close to the positive rail or the negative rail, and is converted to a high level through the threshold comparator. When the bias electrode of the EEG falls off, the common-mode voltage obtained at the input end of the right leg drive circuit will deviate from the reference ground of the preamplifier, so that the output end of the high-gain inverting amplifier of the right leg drive circuit is saturated, that is, the output is close to the positive rail or the negative rail, and is converted to a high level through the threshold comparator.

[0046] Therefore, when the outputs of the first threshold comparator and the second threshold comparator are both high, the high output of the first AND gate circuit indicates that the bias electrode has fallen off, and at least one of the reference electrode and the active electrode has fallen off, so it can be directly determined that the sensor has fallen off.

[0047] In one embodiment, the electrode not falling off detection combination logic gate circuit includes: a NOR gate circuit; one input end of the NOR gate circuit is connected to the output end of the first threshold comparator, and the other input end of the NOR gate circuit is connected to the output end of the second threshold comparator. Specifically, the connection relationship corresponding to the electrode not falling off detection combination logic gate circuit is as follows: Figure 4 shown.

[0048] Combined with the above electrode detachment detection principle, in the above default state, when the outputs of the first threshold comparator and the second threshold comparator are both low level, the NOR gate circuit output is high level to directly determine that the electrode has not detached.

[0049] In one embodiment, the bias electrode detachment detection combination logic gate circuit includes: a first NOT gate circuit and a second AND gate circuit; the output end of the first threshold comparator is connected to an input end of the second AND gate circuit through the first NOT gate circuit, and the output end of the second threshold comparator is connected to another input end of the second AND gate circuit. Specifically, the connection relationship corresponding to the bias electrode detachment detection combination logic gate circuit is as follows: Figure 5 shown.

[0050] Combined with the above electrode detachment detection principle, in the above default state, when the output of the first threshold comparator is low and the output of the second threshold comparator is high, the output of the second AND gate circuit is high to determine that the bias electrode has detached.

[0051] In one of the embodiments, the reference electrode detachment detection combinational logic gate circuit includes: a second NOT gate circuit and a third AND gate circuit; the output end of the second threshold comparator is connected to an input end of the third AND gate circuit through the second NOT gate circuit; the output end of the first threshold comparator is connected to another input end of the third AND gate circuit; the output end of the third AND gate circuit is connected to the analog switch switching circuit; the reference electrode detachment detection combinational logic gate circuit also includes: a third NOT gate circuit and a fourth AND gate circuit; the output end of the second threshold comparator is connected to an input end of the fourth AND gate circuit through the third NOT gate circuit; the output end of the first threshold comparator is connected to another input end of the fourth AND gate circuit. Specifically, the connection relationship corresponding to the reference electrode detachment detection combinational logic gate circuit is as follows: Figure 6 shown.

[0052] Combined with the above-mentioned electrode detachment detection principle, in the above-mentioned default state, when the output of the first threshold comparator is at a high level and the output of the second threshold comparator is at a low level, the output of the third AND gate circuit is at a high level, and it can be determined that the active electrode or the reference electrode has detached. Therefore, when the output of the third AND gate circuit is at a high level, it can be further based on the high level to the analog switch switching circuit, thereby changing the connection position of the active electrode and the bias electrode, even if the active electrode is connected to the right leg drive circuit, the bias electrode is connected to the preamplifier, and when the output of the fourth AND gate circuit is at a high level, it can be determined that the reference electrode has detached.

[0053] In one of the embodiments, the active electrode detachment detection combinational logic gate circuit includes: a second NOT gate circuit and a third AND gate circuit; the output end of the second threshold comparator is connected to an input end of the third AND gate circuit through the second NOT gate circuit; the output end of the first threshold comparator is connected to another input end of the third AND gate circuit; the output end of the third AND gate circuit is connected to the analog switch switching circuit; the active electrode detachment detection combinational logic gate circuit also includes: a fourth NOT gate circuit and a fifth AND gate circuit; the output end of the first threshold comparator is connected to an input end of the fifth AND gate circuit through the fourth NOT gate circuit; the output end of the second threshold comparator is connected to another output end of the fifth AND gate circuit. Specifically, the connection relationship corresponding to the active electrode detachment detection combinational logic gate circuit is as follows: Figure 7 shown.

[0054] Combined with the above-mentioned electrode detachment detection principle, in the above-mentioned default state, when the output of the first threshold comparator is at a high level and the output of the second threshold comparator is at a low level, the output of the third AND gate circuit is at a high level, and it can be determined that the active electrode or the reference electrode has detached. Therefore, the analog switch switching circuit can be further stimulated based on the high level to change the connection position of the active electrode and the bias electrode, so that even if the active electrode is connected to the right leg drive circuit and the bias electrode is connected to the preamplifier, and when the output of the fifth AND gate circuit is at a high level, it can be determined that the active electrode has detached.

[0055] In addition, the above analog switch switching circuit can be specifically referred to Figure 2 SPDT1 and SPDT2 in combination. Figure 2The analog switch switching circuit shown and its connection relationship in the circuit, the analog switch switching circuit includes two single-pole double-throw switches: a first single-pole double-throw switch SPDT1 and a second single-pole double-throw switch SPDT2; wherein the moving end of the first single-pole double-throw switch is respectively connected to the third AND gate circuit and the active electrode, and the two fixed ends of the first single-pole double-throw switch are respectively connected to the active electrode and the bias electrode; the moving end of the second single-pole double-throw switch is respectively connected to the third AND gate circuit and the bias electrode, and the two fixed ends of the second single-pole double-throw switch are respectively connected to the active electrode and the bias electrode.

[0056] It can be understood that, when the electrodes are not detached, the moving end 12 in the first single-pole double-throw switch SPDT1 is connected to the fixed end 14, and the moving end 9 in the second single-pole double-throw switch SPDT2 is connected to the fixed end 11. When the output of the third AND gate circuit is high, it indicates that one of the active electrode or the reference electrode may be detached, and the second single-pole double-throw switch can be stimulated based on the high level, so that the moving end 12 in the first single-pole double-throw switch SPDT1 is connected to the fixed end 13, and the moving end 9 in the second single-pole double-throw switch SPDT2 is connected to the fixed end 10.

[0057] In one embodiment, the preamplifier further includes a subtractor; the input end of the subtractor is connected to the output end of the in-phase shunt amplifier, and the subtractor, as the output end of the preamplifier, is connected to the input end of the first threshold comparator.

[0058] Specifically, the subtractor can refer to Figure 2 R3, R4, R5, R6 and U1B in the Figure 2 R3, R4, R5, R6 and U1B in the circuit form a subtractor to realize the conversion of differential signal to single-ended signal and further amplify the EEG signal.

[0059] It is understood that in one embodiment, the device may also include Figure 2 The differential mode capacitors C2 and C4 shown in FIG. 1 are used to filter out the high frequency differential mode signal between the active electrode and the reference electrode, as well as Figure 2 The R1, C1; R2, C5 shown in the figure respectively realize low-pass filtering at the input end of the in-phase parallel amplifier, and at the same time RC is coupled into the input end of the in-phase parallel amplifier.

[0060] In one embodiment, the gain resistor-capacitor network includes a first gain capacitor, a second gain capacitor and a gain capacitor access switch.

[0061] The gain capacitor access switch is respectively connected to the active electrode detachment detection combination logic gate circuit and the reference electrode detachment detection combination logic gate circuit, and the first gain capacitor is connected to both sides of the second gain capacitor through the gain capacitor access switch.

[0062] Specifically, the first gain capacitor can be as follows Figure 2 In Cg2, the first gain capacitor can be as Figure 2 In Cg1, the capacitance value of the first gain capacitor may be, for example, 47 μF, and the capacitance value of the second gain capacitor may be, for example, 1 μF. The gain capacitor access switch may be a double-pole double-throw switch, such as Figure 2 DPDT in combination with Figure 2 It can be seen that the first gain capacitor is connected in parallel on both sides of the poles 2 and 5 of the double-pole double-throw switch, the poles of the double-pole double-throw switch are respectively connected to the active electrode detachment detection combinational logic gate circuit 1 and the reference electrode detachment detection combinational logic gate circuit 2, the two contacts 1 and 4 on one side of the double-pole double-throw switch are short-circuited, and the two contacts 3 and 6 on the other side of the double-pole double-throw switch are connected in parallel to both sides of the second gain capacitor.

[0063] Specifically, the poles of the double-pole double-throw switch are respectively connected to the output ends of the third AND gate circuits in the active electrode detachment detection combination logic gate circuit and the reference electrode detachment detection combination logic gate circuit.

[0064] It can be understood that when the electrode is not detached, the pole of the double-pole double-throw switch is connected to the two contacts 3 and 6. When the output of the active electrode detachment detection combinational logic gate circuit or the reference electrode detachment detection combinational logic gate circuit is high, the double-pole double-throw switch is stimulated to connect the pole of the double-pole double-throw switch to the two contacts 1 and 4.

[0065] It can also be understood that by dividing the gain capacitor in the gain resistor-capacitor network of the in-phase parallel amplifier into two. The small capacitor (the second gain capacitor) is permanently connected to the gain resistor-capacitor network to achieve high polarization voltage tolerance, and because of the small capacitance and fast discharge time, the rapid response of the EEG acquisition circuit is achieved after the electrode is correctly worn; the other large capacitor (the first gain capacitor) is switched to the gain resistor-capacitor network through a double-pole double-throw analog switch to achieve the low-frequency bandwidth of the EEG signal after the electrode is correctly worn. The level output by the active electrode shedding detection combination logic gate circuit or the reference electrode shedding detection combination logic gate circuit controls whether the large capacitor is connected or not, that is, when the electrode falls off, the large capacitor is disconnected from the gain resistor-capacitor network and short-circuited at both ends for discharge; after the electrode falls off, it is connected to the gain resistor-capacitor network. In other words, through the design of the first gain large capacitor, the second gain capacitor and the gain capacitor access switch, it is convenient for the rapid response after the electrode is correctly worn.

[0066] In one embodiment, the gain resistor-capacitor network further includes a first gain resistor, a second gain resistor, a third gain resistor and a fourth gain resistor, wherein the first gain resistor and the second gain resistor are connected in series between an inverting input terminal of the in-phase parallel amplifier and the input terminal of the right leg drive circuit; the third gain resistor and the fourth gain resistor are connected in series between the other inverting input terminal of the in-phase parallel amplifier and the input terminal of the right leg drive circuit; and the second gain capacitor is connected in parallel across the second gain resistor and the third gain resistor.

[0067] The first gain resistor can be specifically referred to Figure 2 The specific reference of Rg1, the first gain resistor, is Figure 2 The third gain resistor can be found in Rg1' Figure 2 The specific details of Rg2 and the fourth gain resistor can be found in Figure 2 Rg2' in.

[0068] In one embodiment, if Figure 8 Said device further comprises: an AC constant current source and a signal acquisition and processing module;

[0069] The AC constant current source is connected to any one of the bias electrode, the active electrode or the reference electrode, and the signal acquisition and processing module is connected to the output end of the preamplifier. The signal acquisition and processing module includes: a conditioning circuit, an ADC circuit and a digital signal processing module.

[0070] The conditioning circuit is connected to the preamplifier and the ADC circuit, and the ADC circuit is connected to the digital signal processing module; the conditioning circuit adjusts the output voltage of the preamplifier to within the ADC reference voltage range to maximize the dynamic range of the ADC circuit; the ADC circuit is used to collect output data from the preamplifier; the digital signal processing module circuit is used to calculate the contact impedance of each electrode based on the collected output data. It can be understood that the calculation process of the contact impedance involved in the signal acquisition and processing module is a prior art.

[0071] Understandably, Figure 8 The case where the AC constant current source is connected to the reference electrode for impedance measurement is only given as an example. In actual situations, the AC constant current source can be connected to the bias electrode or the active electrode through the analog switch switching circuit to measure the contact impedance of the bias electrode or the active electrode respectively.

[0072] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A device for detecting EEG electrode detachment, characterized in that: include: A bias electrode, an active electrode, a reference electrode, a preamplifier, an analog switch switching circuit, a right leg driving circuit, a first threshold comparator, a second threshold comparator and a plurality of combinational logic gate circuits; Wherein, the reference electrode is connected to the preamplifier; the active electrode is connected to the preamplifier through the analog switch switching circuit; the bias electrode is connected to the right leg driving circuit through the analog switch switching circuit; The preamplifier is connected to the first threshold comparator; The right leg driving circuit is connected to the second threshold comparator; The first threshold comparator is connected to each of the multiple combinational logic gate circuits respectively, and the second threshold comparator is connected to each of the multiple combinational logic gate circuits respectively; the active electrode detachment detection combinational logic gate circuit and the reference electrode detachment detection combinational logic gate circuit in the multiple combinational logic gate circuits are both connected to the analog switching switch circuit.

2. The EEG electrode detachment detection device according to claim 1, characterized in that: The multiple combinational logic gate circuits include: a sensor detachment detection combinational logic gate circuit, an electrode non-detachment detection combinational logic gate circuit, a bias electrode detachment detection combinational logic gate circuit, an active electrode detachment detection combinational logic gate circuit and a reference electrode detachment detection combinational logic gate circuit.

3. The EEG electrode detachment detection device according to claim 2, characterized in that: The sensor detachment detection combinational logic gate circuit includes: a first AND gate circuit; one input end of the first AND gate circuit is connected to the output end of the first threshold comparator, and the other input end of the first AND gate circuit is connected to the output end of the second threshold comparator.

4. The EEG electrode detachment detection device according to claim 2, characterized in that: The electrode non-detachment detection combinational logic gate circuit includes: a NOR gate circuit; one input end of the NOR gate circuit is connected to the output end of the first threshold comparator, and the other input end of the NOR gate circuit is connected to the output end of the second threshold comparator.

5. The EEG electrode detachment detection device according to claim 2, characterized in that: The bias electrode detachment detection combinational logic gate circuit includes: a first NOT gate circuit and a second AND gate circuit; the output end of the first threshold comparator is connected to an input end of the second AND gate circuit through the first NOT gate circuit, and the output end of the second threshold comparator is connected to the other input end of the second AND gate circuit.

6. The EEG electrode detachment detection device according to claim 2, characterized in that: The reference electrode detachment detection combination logic gate circuit comprises: a second NOT gate circuit and a third AND gate circuit; the output end of the second threshold comparator is connected to an input end of the third AND gate circuit through the second NOT gate circuit; the output end of the first threshold comparator is connected to the other input end of the third AND gate circuit; the output end of the third AND gate circuit is connected to the analog switch switching circuit; The reference electrode detachment detection combinational logic gate circuit also includes: a third NOT gate circuit and a fourth AND gate circuit; the output end of the second threshold comparator is connected to an input end of the fourth AND gate circuit through the third NOT gate circuit; the output end of the first threshold comparator is connected to the other input end of the fourth AND gate circuit.

7. The EEG electrode detachment detection device according to claim 2, characterized in that: The active electrode detachment detection combinational logic gate circuit comprises: a second NOT gate circuit and a third AND gate circuit; the output end of the second threshold comparator is connected to an input end of the third AND gate circuit through the second NOT gate circuit; the output end of the first threshold comparator is connected to the other input end of the third AND gate circuit; the output end of the third AND gate circuit is connected to the analog switch switching circuit; The active electrode detachment detection combinational logic gate circuit also includes: a fourth NOT gate circuit and a fifth AND gate circuit; the output end of the first threshold comparator is connected to an input end of the fifth AND gate circuit through the fourth NOT gate circuit; the output end of the second threshold comparator is connected to the other output end of the fifth AND gate circuit.

8. The EEG electrode detachment detection device according to claim 6 or 7, characterized in that: The analog switch switching circuit includes two single-pole double-throw switches: a first single-pole double-throw switch and a second single-pole double-throw switch; wherein the moving end of the first single-pole double-throw switch is respectively connected to the third AND gate circuit and the active electrode, and the two fixed ends of the first single-pole double-throw switch are respectively connected to the active electrode and the bias electrode; the moving end of the second single-pole double-throw switch is respectively connected to the third AND gate circuit and the bias electrode, and the two fixed ends of the second single-pole double-throw switch are respectively connected to the active electrode and the bias electrode.

9. The EEG electrode detachment detection device according to claim 1, characterized in that: The preamplifier includes a common-phase parallel amplifier; the device also includes: a gain resistor-capacitor network; The reference electrode is connected to a non-inverting input terminal of the in-phase parallel amplifier, and the active electrode is connected to another non-inverting input terminal of the in-phase parallel amplifier through the analog switch switching circuit; the bias electrode is connected to the output terminal of the right leg driving circuit through the analog switch switching circuit; The inverting input terminal of the in-phase shunt amplifier is connected to the input terminal of the right leg driving circuit through the gain resistor-capacitor network; the output terminal of the preamplifier is connected to the input terminal of the first threshold comparator; The output end of the right leg driving circuit is connected to the analog switch switching circuit and the input end of the second threshold comparator.

10. The EEG electrode detachment detection device according to claim 9, characterized in that: The gain resistor-capacitor network includes a first gain capacitor, a second gain capacitor and a gain capacitor access switch; The gain capacitor access switch is connected to the active electrode detachment detection combination logic gate circuit and the reference electrode detachment detection combination logic gate circuit respectively, and the first gain capacitor is connected to both sides of the second gain capacitor through the gain capacitor access switch.

11. The EEG electrode detachment detection device according to claim 10, characterized in that: The gain capacitor access switch is a double-pole double-throw switch; the first gain capacitor is connected in parallel to both sides of the poles of the double-pole double-throw switch, the poles of the double-pole double-throw switch are connected to the active electrode detachment detection combinational logic gate circuit and the reference electrode detachment detection combinational logic gate circuit, two contacts on one side of the double-pole double-throw switch are short-circuited, and two contacts on the other side of the double-pole double-throw switch are connected in parallel to both sides of the second gain capacitor.

12. The EEG electrode detachment detection device according to claim 1, characterized in that: The device also includes: an AC constant current source and a signal acquisition and processing module; Wherein, the AC constant current source is connected to any one of the bias electrode, the active electrode or the reference electrode, and the signal acquisition and processing module is connected to the output end of the preamplifier; The signal acquisition and processing module includes: a conditioning circuit, an ADC circuit and a digital signal processing module; wherein the conditioning circuit is connected to the preamplifier and the ADC circuit, and the ADC circuit is connected to the digital signal processing module.

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