NVMe hard disk operation terminal

Abstract

The utility model discloses an NVMe hard disk operation terminal which comprises a bottom plate, a top plate, a side plate, a fan, a module assembly, a supporting column, a large-current load switch, a state acquisition and power supply control switch, a clock multiplexing chip, a PCI-E to USB chip, a PCI-E Switch chip, a voltage adjusting unit and a PCI interface. The utility model relates to the technical field of electronic engineering. According to the NVMe hard disk operation terminal, the bottom plate is designed, and the bottom plate, the top plate, the side plates and other components are combined to form a complete operation terminal, so that a user can operate and manage the NVMe hard disk conveniently. A user can use the terminal to carry out direct connection and hot plug operation of the NVMe hard disk, and the operation condition can be visually known through the equipped indicating lamp.

Description

Technical Field

[0001] The utility model relates to the technical field of electronic engineering, and in particular to an NVMe hard disk operation terminal. Background Art

[0002] With the development of network technology and the advent of the big data era, we are faced with the need to store and manage an increasing amount of data and information. How to properly preserve this data is particularly important.

[0003] NVMe hard drives are fast, consume less energy, have large capacity, and have high throughput, making them an ideal choice for modern computers and storage systems. However, during the use of hard drives, factors such as component failure, power problems, and overheating may cause NVMe hard drives to become damaged and malfunction, making the data in the hard drive inaccessible.

[0004] NVMe hard drives are used as storage for computer devices and servers. Once they are damaged and part or all of the data cannot be accessed and read, serious consequences will occur. Data recovery is the process of retrieving data through certain technologies and corresponding equipment to regenerate information.

[0005] When performing data recovery and firmware repair, it is often necessary to turn the hard disk on and off multiple times and perform a series of complex operations, including power control and file reading. However, the existing hard disk operation terminal has the problem of poor flexibility, and it is difficult to complete these operations while the hard disk remains powered on, which cannot meet the needs of debuggers during data recovery and repair. By optimizing the design of the hard disk operation terminal, we can better deal with NVMe hard disk damage and failures, and provide more reliable and efficient data recovery and firmware repair services. Utility Model Content

[0006] In view of the shortcomings of the prior art, the utility model provides an NVMe hard disk operation terminal, which solves the problem that the existing hard disk operation terminal has poor flexibility, it is difficult to complete these operations while the hard disk remains powered on, and cannot meet the needs of debugging personnel during data recovery and repair.

[0007] To achieve the above purpose, the utility model is implemented through the following technical solutions: an NVMe hard disk operation terminal, including a bottom plate, a top plate, a side plate, a fan, a module assembly, a support column, a high-current load switch, a state acquisition and power control switch, a clock multiplexing chip, a PCI-E to USB chip, a PCI-E Switch chip, a voltage regulation unit and a PCI interface;

[0008] The bottom plate and the top plate are fixed to the side plates in sequence, and the bottom plate and the top plate are supported and connected by the support columns;

[0009] One side of the side panel is provided with four docking ports, and the port ends of the two power control switches and the port ends of the two SFF8088 interfaces are sequentially embedded in the four docking ports; a mounting groove is provided on the top panel, and the fan is mounted in the mounting groove;

[0010] The module assembly includes a copper plate, a power input module, a power output module, an SFF8088 interface, an indicator light, and a fan control module, and each component in the module assembly is fixed in sequence on one side of the base plate;

[0011] And the high current load switch, the state acquisition and power control switch, the clock multiplexing chip, the PCI-E to USB chip, the PCI-E Switch chip, the voltage regulating unit and the PCI interface are sequentially arranged on the bottom board;

[0012] The PCI interface is connected to the PCI-E Switch chip and the clock multiplexing chip, and is connected to the SFF8088 end interface;

[0013] The PCI interface is connected to a voltage regulating unit, and the voltage regulating unit supplies power to the PCI-ESwitch chip and regulates the voltage. The PCI-E Switch chip is connected to a power output module via a PCI-E to USB chip, a state acquisition and power control unit, and a high-current load switch.

[0014] The power input module inputs electricity to control the fan control module and sends electricity to the power output module via a high-current load switch.

[0015] Preferably, the bottom plate and the top plate are both provided with a plurality of fixing holes, the bottom plate and the top plate are fixed to the side plates in parallel in sequence by screws, the support column is screwed into the inside of the support column through the fixing holes on the bottom plate and the top plate by screws, the bottom plate and the top plate are connected, and a limiting support function is provided;

[0016] The fan is connected to the top plate by fixing bolts, and the copper plate is connected to the bottom plate by screws. The fan and the copper plate are located in corresponding positions and between the bottom plate and the top plate.

[0017] Preferably, the indicator light is fixedly mounted on the bottom plate and is used to indicate the working status of the synchronous activities of the power output module and the SFF8088 interface respectively, and the light-emitting end of the indicator light is embedded in the side panel.

[0018] Preferably, the PCI interface is respectively connected to a voltage regulating unit, a clock multiplexing chip and a PCI-E Switch chip, and the clock multiplexing chip and the PCI-E Switch chip are respectively connected to the two SFF8088 interfaces, and the voltage regulating unit supplies power to the PCI-ESwitch chip and regulates the voltage, and the PCI-E Switch chip is connected to a power output module via a PCI-E to USB chip, a status acquisition and power control unit, and a high-current load switch.

[0019] Preferably, the high-current load switch is connected in series between the power input module and the power output module, and the state acquisition and power control unit is connected to the high-current load switch.

[0020] Preferably, the fan control module receives power from the power input module to control the fan, and cooperates with the copper plate to dissipate heat for the NVMe protocol hard disk recovery tool.

[0021] Preferably, the clock multiplexing chip is a PI6C20400BLE chip.

[0022] Preferably, the PCI-E to USB chip is a VL805-Q6 chip.

[0023] Preferably, the PCI-E Switch chip is a PEX8725 chip.

[0024] Preferably, the length, width and height of the supporting connection structure composed of the bottom plate, top plate, side plate and support column are 155.00 mm×102.50 mm×22.50 mm respectively.

[0025] Beneficial Effects

[0026] The utility model provides an NVMe hard disk operation terminal. Compared with the prior art, it has the following beneficial effects:

[0027] (1) The NVMe hard disk operation terminal is designed with a bottom plate, and a combination of bottom plate, top plate, side plate and other components to form a complete operation terminal, which is convenient for users to operate and manage NVMe hard disks. Users can use the terminal to directly connect and hot-swap NVMe hard disks, and intuitively understand the operation status through the equipped indicator lights.

[0028] (2) The NVMe hard disk operation terminal of the present invention can control the power supply and shutdown of the hard disk, provide stable voltage and current for the hard disk device, and can adjust the voltage to adapt to different application requirements, reduce the external power supply control steps, simplify the device power supply management process, and cooperate with the writing and reading of NVMe hard disk files.

[0029] (3) The NVMe hard disk operation terminal effectively dissipates heat from the NVMe hard disk through the cooperation between the fan and the copper plate, thereby maintaining the stability and performance of the hard disk and preventing overheating from affecting the reading efficiency and causing damage to the hard disk. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is a front view of the utility model;

[0031] Figure 2 It is a top view of the utility model;

[0032] Figure 3 A three-dimensional view of one side of the utility model;

[0033] Figure 4 A three-dimensional stereoscopic view of the other side of the utility model;

[0034] Figure 5 This is a principle block diagram of the utility model.

[0035] In the figure: 1. bottom plate; 2. top plate; 3. side plate; 4. fan; 5. copper plate; 6. power input module; 7. power output module; 8. SFF8088 interface; 9. indicator light; 10. fan control module; 11. support column; 12. high current load switch; 13. status acquisition and power control switch; 14. clock multiplexing chip; 15. PCI-E to USB chip; 16. PCI-ESwitch chip; 17. voltage regulation unit; 18. PCI interface. DETAILED DESCRIPTION

[0036] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0037] The utility model provides the following technical solutions:

[0038] Figure 1-5 An embodiment is shown: an NVMe hard disk operation terminal, including a bottom plate 1, a top plate 2, a side plate 3, a fan 4, a module assembly, a support column 11, a high-current load switch 12, a state acquisition and power control switch 13, a clock multiplexing chip 14, a PCI-E to USB chip 15, a PCI-E Switch chip 16, a voltage adjustment unit 17 and a PCI interface 18;

[0039] The bottom plate 1 and the top plate 2 are fixed on the side plates 3 in sequence, and the bottom plate 1 and the top plate 2 are supported and connected by support columns 11;

[0040] One side of the side panel 3 is provided with four docking ports, and the port ends of two power control switches and the port ends of two SFF8088 interfaces 8 are sequentially embedded in the four docking ports; a mounting groove is provided on the top panel 2, and the fan 4 is installed in the mounting groove;

[0041] The module assembly includes a copper plate 5, a power input module 6, a power output module 7, an SFF8088 interface 8, an indicator light 9, and a fan control module 10, and each component in the module assembly is fixed on one side of the base plate 1 in sequence;

[0042] And the high current load switch 12, the state acquisition and power control switch 13, the clock multiplexing chip 14, the PCI-E to USB chip 15, the PCI-E Switch chip 16, the voltage regulating unit 17 and the PCI interface 18 are sequentially arranged on the bottom plate 1;

[0043] The PCI interface 18 is connected to the PCI-E Switch chip 16 and the clock multiplexing chip 14, and is connected to the SFF8088 end interface;

[0044] The PCI interface 18 is connected to the voltage regulating unit 17, and the voltage regulating unit 17 supplies power to the PCI-ESwitch chip 16 and regulates the voltage. The PCI-E Switch chip 16 is connected to the power output module 7 via the PCI-E to USB chip 15, the state acquisition and power control unit, and the high current load switch 12;

[0045] The power input module 6 inputs electricity to the fan control module 10 and sends electricity to the power output module 7 via the high current load switch 12;

[0046] Implementation method 2: This implementation method further defines an NVMe hard disk operation terminal of implementation method 1. A plurality of fixing holes are provided on the bottom plate 1 and the top plate 2. The bottom plate 1 and the top plate 2 are fixed to the side plate 3 in parallel in sequence by screws. The support column 11 is screwed into the inside of the support column 11 through the fixing holes on the bottom plate 1 and the top plate 2 by screws, connecting the bottom plate 1 and the top plate 2, and providing a limiting support function.

[0047] The fan 4 is connected to the top plate 2 by fixing bolts, and the copper plate 5 is connected to the bottom plate 1 by screws. The fan 4 and the copper plate 5 are located in corresponding positions and between the bottom plate 1 and the top plate 2 .

[0048] Implementation method three: This implementation method is a further limitation of an NVMe hard disk operation terminal of implementation method one, and the light-emitting end of the indicator light 9 fixed on the base plate 1 is embedded in the side plate 3.

[0049] The indicator lights 9 added in the present invention are used to indicate the working status of the synchronous activities of the two power output modules 7 and the two SFF8088 interfaces 8, respectively, so as to facilitate the user to understand the working status of the device.

[0050] Implementation mode 4. This implementation mode is a further limitation of an NVMe hard disk operation terminal of implementation mode 1. The PCI interface 18 is connected to the voltage regulating unit 17, the clock multiplexing chip 14 and the PCI-E Switch chip 16. The clock multiplexing chip 14 and the PCI-E Switch chip 16 are connected to the SFF8088 interface 8. The voltage regulating unit 17 supplies power to the PCI-E Switch chip 16 and adjusts the voltage. The PCI-E Switch chip 16 is connected to the power output module 7 via the PCI-E to USB chip 15, the state acquisition and power control unit 13, and the high current load switch 12.

[0051] In this embodiment, the PCI interface 18 is connected to an external computer, and the SFF8088 interface 8 and the power output module 7 are jointly connected to an external NVMe hard disk. Through the connection with the chip, the terminal can realize the transmission and processing of data in the NVMe hard disk and communication with other devices, so that the NVMe hard disk operation terminal can exchange and control data with the computer host or other storage devices.

[0052] Implementation method five. This implementation method is a further limitation of an NVMe hard disk operation terminal of implementation method one. The high current load switch is connected in series between the power input module 6 and the power output module 7, and the status acquisition and power control unit 13 is connected to the high current load switch 12.

[0053] In this embodiment, the high current load switch 12 is controlled to be turned on or off under the control of the state acquisition and power control unit 13, so as to control the power output module 7 to supply power to the hard disk to be repaired, or to stop supplying power, and to control the power consumption of the device according to the actual power consumption demand of the device. The state acquisition and power control unit 13 can be implemented by a circuit with software embedded inside, and the software can be implemented by using existing technology, that is, those skilled in the art can implement it according to the control logic and the programming technology they should master.

[0054] Implementation method six: This implementation method further limits the NVMe hard disk operation terminal of implementation method one. The fan control module 10 receives power from the power input module 6, controls the fan 4 through a wire connection, and cooperates with the copper plate 5 to dissipate heat for the hard disk operation terminal.

[0055] NVMe hard drives generate heat during the reading and writing process, which brings negative effects. This embodiment controls the fan 4 through the fan control module 10, and cooperates with the grooves on the copper plate 5 to increase the heat exchange surface area, enhance the turbulence effect, evenly and strongly dissipate heat, improve the heat dissipation performance of the equipment, reduce the hard drive temperature, maintain the hard drive in a stable temperature range, and make the hard drive working connection more stable.

[0056] Implementation method seven: This implementation method further limits the NVMe hard disk operation terminal of implementation method one, and the clock multiplexing chip 14 is a PI6C20400BLE chip.

[0057] In this embodiment, the clock multiplexing chip model PI6C20400BLE is used for clock synchronization, frequency conversion and timing control. The computer and hard disk are connected to the utility model. The chip multiplexes it to different parts of the utility model system as needed, provides the required clock signal, and synchronously reads the NVMe hard disk file.

[0058] Implementation method eight: This implementation method further limits the NVMe hard disk operation terminal of implementation method one, and the PCI-E to USB chip 15 is a VL805-Q6 chip.

[0059] In this embodiment, the PCI-E to USB chip model VL805-Q6 is used to convert the PCI Express (PCI-E) interface to a USB interface, so that the NVMe hard drive operation terminal is connected to the host through the PCI-E interface while supporting the use of the USB interface to communicate and interact with other devices.

[0060] Implementation method 9. This implementation method further limits the NVMe hard disk operation terminal of implementation method 1, and the PCI-E Switch chip 16 is a PEX8725 chip.

[0061] In this embodiment, the PCI-E Switch chip model PEX8725 is used to provide expansion and switching functions of PCI Express (PCI-E) signals, expand the number of PCI-E interfaces, enable the NVMe hard disk operation terminal to be connected to multiple PCI-E devices, and realize the routing and control of data flow through switching.

[0062] Implementation method ten. This implementation method is a further limitation of an NVMe hard disk operation terminal of implementation method one. The supporting connection structure composed of the base plate 1, the top plate 2, the side plate 3, and the column 11 has a size of 155.00 mm (length) × 102.50 mm (width) × 22.50 mm (height).

[0063] In this embodiment, the supporting connection structure has a size of 155.00 mm (length) × 102.50 mm (width) × 22.50 mm (height), which is relatively small, can fully utilize space resources, is flexible to install, and is light and portable.

[0064] The above are only preferred implementations of the present invention and are not intended to limit the present invention. For example, the present invention may be a reasonable combination of the technical features described in the above implementations.

[0065] Meanwhile, the contents not described in detail in this specification belong to the prior art known to those skilled in the art, and the model parameters of the undisclosed electrical appliances are not specifically limited, and conventional equipment can be used.

[0066] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.

[0067] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. An NVMe hard disk operation terminal, characterized in that: It includes a bottom plate (1), a top plate (2), a side plate (3), a fan (4), a module assembly, a support column (11), a high-current load switch (12), a state acquisition and power control switch (13), a clock multiplexing chip (14), a PCI-E to USB chip (15), a PCI-ESwitch chip (16), a voltage regulation unit (17) and a PCI interface (18); The bottom plate (1) and the top plate (2) are fixed on the side plates (3) in sequence, and the bottom plate (1) and the top plate (2) are supported and connected via the support columns (11); The module assembly comprises a copper plate (5), a power input module (6), a power output module (7), an SFF8088 interface (8), an indicator light (9), and a fan control module (10), and the various components in the module assembly are fixed in sequence on one side of the base plate (1); One side of the side panel (3) is provided with four docking ports, and the port ends of the two power control switches (13) and the port ends of the two SFF8088 interfaces (8) are sequentially embedded in the four docking ports; a mounting groove is provided on the top panel (2), and the fan (4) is mounted in the mounting groove; The high-current load switch (12), the state acquisition and power control switch (13), the clock multiplexing chip (14), the PCI-E to USB chip (15), the PCI-E Switch chip (16), the voltage adjustment unit (17) and the PCI interface (18) are sequentially arranged on the bottom plate (1); The PCI interface (18) is connected to the PCI-E Switch chip (16) and the clock multiplexing chip (14), and is connected to the SFF8088 end interface; The PCI interface (18) is connected to a voltage regulating unit (17), and the voltage regulating unit (17) supplies power to the PCI-ESwitch chip (16) and regulates the voltage. The PCI-E Switch chip (16) is connected to a power output module (7) via a PCI-E to USB chip (15), a state acquisition and power control unit, and a high current load switch (12); The power input module (6) inputs electricity to control the fan control module (10) and sends electricity to the power output module (7) via a high-current load switch (12).

2. The NVMe hard disk operation terminal according to claim 1, characterized in that: The bottom plate (1) and the top plate (2) are both provided with a plurality of fixing holes. The bottom plate (1) and the top plate (2) are fixed to the side plate (3) in parallel in sequence by screws. The support column (11) is screwed into the inside of the support column (11) through the fixing holes on the bottom plate (1) and the top plate (2), thereby connecting the bottom plate (1) and the top plate (2) and providing a limiting support function. The fan (4) is connected to the top plate (2) via fixing bolts, and the copper plate (5) is connected to the bottom plate (1) via screws. The fan (4) and the copper plate (5) are located in corresponding positions and are located between the bottom plate (1) and the top plate (2).

3. The NVMe hard disk operation terminal according to claim 1, characterized in that: The indicator light (9) is fixedly mounted on the base plate (1) and is used to indicate the working status of the synchronous activities of the power output module (7) and the SFF8088 interface (8), respectively, and the light-emitting end of the indicator light (9) is embedded in the side plate (3).

4. The NVMe hard disk operation terminal according to claim 1, characterized in that: The PCI interface (18) is respectively connected to a voltage regulating unit (17), a clock multiplexing chip (14) and a PCI-E Switch chip (16), and the clock multiplexing chip (14) and the PCI-E Switch chip (16) are respectively connected to the two SFF8088 interfaces (8), and the voltage regulating unit (17) supplies power to the PCI-E Switch chip (16) and regulates the voltage, and the PCI-E Switch chip (16) is connected to a power output module (7) via a PCI-E to USB chip (15), a state acquisition and power control unit, and a high current load switch (12).

5. The NVMe hard disk operation terminal according to claim 1, characterized in that: The high-current load switch (12) is connected in series between the power input module (6) and the power output module (7), and the state acquisition and power control unit is connected to the high-current load switch (12).

6. The NVMe hard disk operation terminal according to claim 1, characterized in that: The fan control module (10) receives power from the power input module (6) to control the fan (4), and cooperates with the copper plate (5) to dissipate heat for the NVMe protocol hard disk recovery tool.

7. The NVMe hard disk operation terminal according to claim 1, characterized in that: The clock multiplexing chip (14) is a PI6C20400BLE chip.

8. The NVMe hard disk operation terminal according to claim 1, characterized in that: The PCI-E to USB chip is a VL805-Q6 chip.

9. The NVMe hard disk operation terminal according to claim 1, characterized in that: The PCI-E Switch chip (16) is a PEX8725 chip.

10. The NVMe hard disk operation terminal according to claim 1, characterized in that: The length, width and height of the supporting connection structure composed of the bottom plate (1), the top plate (2), the side plate (3) and the supporting column (11) are 155.00 mm×102.50 mm×22.50 mm respectively.

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