Circuit for collecting four paths of capacitance signals
By designing a four-channel capacitor signal acquisition circuit, using LC resonance technology and IIC bus serial port connection, the problem that the capacitance value measurement method in the existing technology cannot take into account both accuracy and timeliness, and high-precision, low power consumption, and anti-interference capacitance signal acquisition and data transmission.
Patent Information
- Application Number
- CN202421200493.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-29
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2034-05-29
AI Technical Summary
The existing capacitance capacitance measurement methods cannot take into account both measurement accuracy and detection timeliness while reducing the use of components.
A four-channel capacitor signal acquisition circuit is designed, including power supply circuit, detection circuit and main control circuit. The transmission of capacitance detection value and real-time data transmission are realized through the IIC bus and serial port connection. The LC resonance technology is used to perform the high capacitance value. Accuracy measurement reduces the number of components and improves detection efficiency.
It realizes capacitance signal acquisition and data transmission with high precision, low power consumption, strong anti-interference ability while reducing the use of components, and can detect the value of four channels of capacitance at the same time, improving the timeliness and accuracy of measurements.
Smart Images

Figure CN222259469U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the technical field of integrated circuits and communications, and in particular relates to a four-channel capacitance signal acquisition circuit. Background Art
[0002] At present, there are two main methods for measuring the capacitance value of capacitors. One is the RC charge and discharge time measurement method, which detects the charge and discharge time of a capacitor. When a capacitor is connected to the power supply, it will charge the capacitor. When a fully charged capacitor is connected in parallel with a resistor, it will discharge through the resistor R, and its voltage will change with time. By measuring the time constant of the capacitor charging or discharging, the capacitance value of the capacitor can be calculated; the other is the LC oscillation circuit method, which measures the capacitance value of the capacitor through the LC oscillation circuit. The LC oscillation circuit is composed of an inductor and a capacitor, and its oscillation frequency is related to the inductance value and the capacitance value. The capacitor to be measured is connected in parallel with an inductor with a known inductance value to form an LC oscillation circuit, and the natural frequency of the LC oscillation circuit is measured. Then, the capacitance value is calculated based on the known inductance value and the measured frequency. Among them, the detection circuit of the RC charge and discharge time measurement method is simple, and the components used are relatively few, but the measurement process is extremely time-consuming, and it is necessary to wait for all the electricity in the capacitor to be discharged, and the measurement accuracy cannot be guaranteed; the detection circuit of the LC oscillation circuit method is complex, and the components used are relatively large. Although the measurement accuracy is guaranteed, it is necessary to design and debug the detection circuit, which is time-consuming and laborious.
[0003] In summary, the above-mentioned capacitance measurement methods cannot reduce the use of components while taking into account the accuracy of capacitance measurement and detection timeliness. Utility Model Content
[0004] In order to solve the shortcomings and deficiencies of the prior art, a four-channel capacitor signal acquisition circuit is provided, thereby solving the problem that the existing capacitor value measurement method cannot reduce the use of components while taking into account the accuracy of capacitor value measurement and detection timeliness.
[0005] A four-channel capacitance signal acquisition circuit provided to achieve the purpose of the utility model includes a power supply circuit, a detection circuit, a main control circuit and a host computer, wherein the power supply circuit is electrically connected to the detection circuit, the main control circuit and the host computer respectively to achieve continuous supply of power, the detection circuit is electrically connected to the IIC bus in the main control circuit to transmit the capacitance detection value to the main control circuit, and the host computer is electrically connected to the serial port in the main control circuit to send the calculated and analyzed capacitance value to the host computer.
[0006] As a further improvement of the above scheme, the power supply circuit includes a linear voltage regulator chip U7, a Type-C interface USB1, resistors R15-R17, a capacitor C15 and a light-emitting diode LED1. Pins A1B12 and B1A12 of the Type-C interface USB1 are connected to one end of the resistors R15-R16 and then grounded, pins A4B9 and B4A9 are connected to the VCC power supply, pin A5 is connected to the other end of the resistor R15, and pin B5 is connected to the other end of the resistor R16; pin 1 of the linear voltage regulator chip U7 is grounded, pin 3 is connected to the VCC power supply, pin 4 is connected to the VCC3.3V power supply and one end of the capacitor C15, and the other end of the capacitor C15 is grounded; one end of the resistor R17 is connected to the VCC3.3V power supply, and the other end is connected to the positive electrode of the light-emitting diode LED1, and the negative electrode of the light-emitting diode LED1 is grounded.
[0007] As a further improvement of the above scheme, the main control circuit includes a chip U3, a crystal oscillator X1, resistors R13-R14, capacitors C1, C4-C6, C8, C13-C14, pins 5, 21, and 22 of the chip U3 are all connected to the VCC3.3V power supply, pin 10 is connected to one end of the capacitor C6 and then grounded, pin 11 is connected to the VCC3.3V power supply and the other end of the capacitor C6, pin 12 is connected to one end of the crystal oscillator X1 and one end of the capacitor C5, pin 13 is connected to the other end of the crystal oscillator X1 and one end of the capacitor C8, pin 14 is connected to RST, pins 19-20 are all grounded, pin 27 is connected to one end of the capacitor C13 and then grounded, pin 28 is connected to the VCC3.3V power supply and the other end of the capacitor C13, and pin 37 is connected to the resistor R 14, pin 49 is connected to one end of capacitor C14 and then grounded, pin 50 is connected to the other end of capacitor C14, pins 68-69 are connected to TXD1 and RXD1 respectively, pin 72 is connected to SWDIO, pin 74 is connected to one end of capacitor C4 and then grounded, pin 75 is connected to VCC3.3V power supply and the other end of capacitor C4, pins 76, 82-83 are connected to SWCLK, SCL, and SDA respectively, pin 84 is connected to one end of resistor R13, pin 99 is connected to one end of capacitor C1 and then grounded, pin 100 is connected to VCC3.3V power supply and the other end of capacitor C1; the other end of capacitor C5 is connected to the other end of capacitor C8 and then grounded, and the other ends of resistors R13-R14 are all grounded.
[0008] As a further improvement of the above scheme, the detection circuit includes chips U1-U2, U4-U6, a crystal oscillator X2, resistors R1-R12, capacitors C2-C3, C7, C9-C12 and inductors L1-L4, the pin 1 of the chip U1 is connected to one end of the resistor R1, one end of the inductor L1 and one end of the capacitor C2, and the pin 2 is connected to one end of the resistor R2, the other end of the inductor L1 and the other end of the capacitor C2; the pin 1 of the chip U2 is connected to one end of the resistor R3, one end of the inductor L2 and one end of the capacitor C3, and the pin 2 is connected to one end of the resistor R4, the other end of the inductor L2 and the other end of the capacitor C3; the pin 1 of the chip U5 is connected to one end of the resistor R6, one end of the inductor L3 and one end of the capacitor C7, and the pin 2 is connected to one end of the resistor R8, the other end of the inductor L3 and the other end of the capacitor C7; the pin 1 of the chip U6 is connected to one end of the resistor R10, one end of the inductor L4, and one end of the capacitor C7. The first end of the chip U4 is connected to SCL and one end of the resistor R5, the second end of the chip U4 is connected to SDA and one end of the resistor R7, the third end of the chip U4 is connected to SCL and one end of the resistor R5, the fourth end of the chip U4 is connected to SDA and one end of the resistor R7, the fourth end of the chip U4 is connected to SDA and one end of the resistor R7, the fifth end of the chip U4 is connected to SCL and one end of the resistor R5, the fifth ...DA and one end of the resistor R7, the fifth end of the chip U4 is connected to SDA and one end of the resistor R7, the fifth end of the
[0009] The beneficial effects of the utility model are:
[0010] Compared with the prior art, the utility model provides a four-channel capacitance signal acquisition circuit, which requires a small number of components, but combines the functions of measuring capacitance signals and data transmission, can complete capacitance signal acquisition and real-time transmission of capacitance signal data, and has the characteristics of high acquisition accuracy; at the same time, the detection circuit has the characteristics of high precision, low power consumption, strong anti-interference ability, etc., and can detect four capacitance values at the same time.
[0011] In summary, the utility model provides a four-channel capacitance signal acquisition circuit that solves the problem of reducing the use of components while taking into account the accuracy of capacitance measurement and detection timeliness. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] Figure 1 It is the overall block diagram of the utility model;
[0013] Figure 2 It is a connection diagram of the power supply circuit in the utility model;
[0014] Figure 3 It is the connection diagram of the main control circuit in the utility model;
[0015] Figure 4 It is a connection diagram of the measuring circuit in the utility model;
[0016] Figure 5 This is a waveform diagram of the utility model when measuring the capacitance value. DETAILED DESCRIPTION
[0017] The following is a further detailed description of the specific implementation of the utility model in conjunction with the accompanying drawings:
[0018] according to Figure 1 As shown, the utility model provides a circuit for collecting four-channel capacitance signals, including a power supply circuit, a detection circuit, a main control circuit and a host computer, wherein the power supply circuit is electrically connected to the detection circuit, the main control circuit and the host computer respectively to realize continuous supply of power, the detection circuit is electrically connected to the IIC bus in the main control circuit to realize transmission of the capacitance detection value to the main control circuit, and the host computer is electrically connected to the serial port in the main control circuit to realize sending the capacitance value after calculation and analysis to the host computer.
[0019] Among them, according to Figure 2As shown, the power supply circuit includes a linear voltage regulator chip U7, a Type-C interface USB1, resistors R15-R17, a capacitor C15 and a light-emitting diode LED1. Pins A1B12 and B1A12 of the Type-C interface USB1 are connected to one end of the resistors R15-R16 and then grounded, pins A4B9 and B4A9 are connected to the VCC power supply, pin A5 is connected to the other end of the resistor R15, and pin B5 is connected to the other end of the resistor R16; pin 1 of the linear voltage regulator chip U7 is grounded, pin 3 is connected to the VCC power supply, pin 4 is connected to the VCC3.3V power supply and one end of the capacitor C15, and the other end of the capacitor C15 is grounded; one end of the resistor R17 is connected to the VCC3.3V power supply, and the other end is connected to the positive electrode of the light-emitting diode LED1, and the negative electrode of the light-emitting diode LED1 is grounded. Among them, resistors R15-R16 are pull-down resistors, which are used in the Type-C interface USB1 to implement device identification and power negotiation in the USB PD protocol, thereby achieving higher power charging and communication capabilities; the linear voltage regulator chip U7 is used to achieve voltage reduction, and the 5V voltage provided by the USB Type-C interface USB1 is output stably to 3.3V. When the load changes, the linear voltage regulator chip U7 detects the change in output voltage through the feedback loop and adjusts the control signal accordingly to keep the output voltage in a stable state; resistor R17 is a current limiting resistor to prevent the light-emitting diode LED1 from being burned out due to excessive current.
[0020] according to Figure 3As shown, the main control circuit includes a chip U3, a crystal oscillator X1, resistors R13-R14, capacitors C1, C4-C6, C8, C13-C14, pins 5, 21, and 22 of the chip U3 are all connected to the VCC3.3V power supply, pin 10 is connected to one end of the capacitor C6 and then grounded, pin 11 is connected to the VCC3.3V power supply and the other end of the capacitor C6, pin 12 is connected to one end of the crystal oscillator X1 and one end of the capacitor C5, pin 13 is connected to the other end of the crystal oscillator X1 and one end of the capacitor C8, pin 14 is connected to RST, pins 19-20 are all grounded, pin 27 is connected to one end of the capacitor C13 and then grounded, pin 28 is connected to the VCC3.3V power supply and the other end of the capacitor C13, and pin 37 is connected to one end of the resistor R14 The device is connected to the circuit of FIG. 1 , wherein pin 49 is connected to one end of capacitor C14 and then grounded, pin 50 is connected to the other end of capacitor C14, pins 68-69 are respectively connected to TXD1 and RXD1, pin 72 is connected to SWDIO, pin 74 is connected to one end of capacitor C4 and then grounded, pin 75 is connected to VCC3.3V power supply and the other end of capacitor C4, pins 76, 82-83 are respectively connected to SWCLK, SCL, and SDA, pin 84 is connected to one end of resistor R13, pin 99 is connected to one end of capacitor C1 and then grounded, pin 100 is connected to VCC3.3V power supply and the other end of capacitor C1; the other end of capacitor C5 is connected to the other end of capacitor C8 and then grounded, and the other ends of resistors R13-R14 are all grounded. Among them: capacitor C5 and capacitor C8 are connected to crystal oscillator X1 to reduce noise and interference in input and output signals through the filtering effect of capacitors, making the operating frequency of crystal oscillator X1 more stable. At the same time, the capacitor can also stabilize the voltage of crystal oscillator X1 circuit to prevent voltage fluctuations from affecting the operation of crystal oscillator X1; resistors R13-R14 are pull-down resistors, which pull the voltage of pin 37 and pin 84 ports down to 0, so that chip U3 selects the main Flash as the boot space.
[0021] according to Figure 4As shown, the detection circuit includes chips U1-U2, U4-U6, crystal oscillator X2, resistors R1-R12, capacitors C2-C3, C7, C9-C12 and inductors L1-L4, the pin 1 of the chip U1 is connected to one end of the resistor R1, one end of the inductor L1 and one end of the capacitor C2, the pin 2 is connected to one end of the resistor R2, the other end of the inductor L1 and the other end of the capacitor C2; the pin 1 of the chip U2 is connected to one end of the resistor R3, one end of the inductor L2 and one end of the capacitor C3, the pin 2 is connected to one end of the resistor R4, the other end of the inductor L2 and the other end of the capacitor C3; the pin 1 of the chip U5 is connected to one end of the resistor R6, one end of the inductor L3 and one end of the capacitor C7, the pin 2 is connected to one end of the resistor R8, the other end of the inductor L3 and the other end of the capacitor C7; the pin 1 of the chip U6 is connected to one end of the resistor R10, one end of the inductor L4 and the capacitor C 9, pin 2 is connected to one end of resistor R11, the other end of inductor L4 and the other end of capacitor C9; pin 1 of the chip U4 is connected to SCL and one end of resistor R5, pin 2 is connected to SDA and one end of resistor R7, pin 3 is connected to pin 3 of crystal oscillator X2, pin 4 is connected to one end of resistor R9, pin 6 is connected to one end of resistor R12, pin 7 is connected to one end of capacitor C10-C12 and VCC3.3V power supply, pins 8 and 17 are connected to the other end of resistor R9 and then grounded, pins 9-16 are respectively connected to the other ends of resistors R11, R10, R8, R6, R4-R1; the other ends of the resistors R5 and R7 are both connected to the VCC3.3V power supply, pin 2 of the crystal oscillator X2 is grounded, pin 4 is connected to the VCC3.3V power supply, and the other end of the resistor R12 is connected to the other end of capacitors C10-C12 and then grounded. Among them: capacitors C2-C3, C7, C9, inductors L1-L4 are connected in parallel with the four capacitors to be tested. The known capacitors and inductors form an LC network with the capacitors to be tested. The change in capacitance value is calculated based on the change in the resonant frequency of the LC network; capacitors C10-C12 are filter capacitors for the power supply of the detection circuit chip; resistors R5 and R7 are pull-up resistors. The IIC bus is an open-drain structure, which means that the signal on the bus is pulled up to a logic high level by an external pull-up resistor, and the peripheral is responsible for pulling the signal down to a logic low level. Therefore, the pull-up resistor ensures the stability and reliability of the bus signal at a logic high level. When multiple devices try to pull the bus down at the same time, a bus conflict may occur. The pull-up resistor ensures that only one device on the bus is in a pull-down state, and other devices are kept at a logic high level through the pull-up resistor; crystal oscillator X2 is an external crystal oscillator, which generates a stable clock signal through crystal oscillation, which is used to synchronize the operation of various modules inside the chip. The frequency of this clock signal is usually precisely controllable and can meet various timing requirements inside the chip.
[0022] according to Figure 5As shown, the utility model provides a four-channel capacitor signal acquisition circuit, which can well see the changes in capacitor capacitance under different conditions when measuring the capacitor capacitance, realize fast and high-precision acquisition of capacitor capacitance information, and display the capacitor capacitance waveform through a host computer.
[0023] In addition, the acquisition circuit uses LC resonance when detecting the capacitance value. When the values of inductance and capacitance make the circuit resonate at a specific frequency, the impedance of the circuit will reach a minimum value, and the phase difference between voltage and current will be zero. At this time, the circuit will exhibit the maximum amplitude.
[0024] The above embodiments are not limited to the technical solutions of the embodiments themselves, and the embodiments can be combined with each other to form new embodiments. The above embodiments are only used to illustrate the technical solutions of the utility model and are not intended to limit them. Any modification or equivalent replacement that does not deviate from the spirit and scope of the utility model shall be included in the scope of the technical solution of the utility model.
Claims
1. A four-channel capacitor signal acquisition circuit, characterized in that: The invention comprises a power supply circuit, a detection circuit, a main control circuit and a host computer. The power supply circuit is electrically connected to the detection circuit, the main control circuit and the host computer respectively to realize continuous supply of electric power. The detection circuit is electrically connected to an IIC bus in the main control circuit to realize transmission of the capacitance detection value to the main control circuit. The host computer is electrically connected to a serial port in the main control circuit to realize sending the capacitance value after calculation and analysis to the host computer.
2. The four-channel capacitor signal acquisition circuit according to claim 1, characterized in that: The power supply circuit includes a linear voltage regulator chip U7, a Type-C interface USB1, resistors R15-R17, a capacitor C15 and a light-emitting diode LED1. Pins A1B12 and B1A12 of the Type-C interface USB1 are connected to one end of the resistors R15-R16 and then grounded, pins A4B9 and B4A9 are connected to the VCC power supply, pin A5 is connected to the other end of the resistor R15, and pin B5 is connected to the other end of the resistor R16; pin 1 of the linear voltage regulator chip U7 is grounded, pin 3 is connected to the VCC power supply, pin 4 is connected to the VCC3.3V power supply and one end of the capacitor C15, and the other end of the capacitor C15 is grounded; one end of the resistor R17 is connected to the VCC3.3V power supply, and the other end is connected to the positive electrode of the light-emitting diode LED1, and the negative electrode of the light-emitting diode LED1 is grounded.
3. The four-channel capacitor signal acquisition circuit according to claim 2, characterized in that: The main control circuit includes a chip U3, a crystal oscillator X1, resistors R13-R14, capacitors C1, C4-C6, C8, and C13-C14. Pins 5, 21, and 22 of the chip U3 are all connected to the VCC3.3V power supply, pin 10 is connected to one end of the capacitor C6 and then grounded, pin 11 is connected to the VCC3.3V power supply and the other end of the capacitor C6, pin 12 is connected to one end of the crystal oscillator X1 and one end of the capacitor C5, pin 13 is connected to the other end of the crystal oscillator X1 and one end of the capacitor C8, pin 14 is connected to RST, pins 19-20 are all grounded, pin 27 is connected to one end of the capacitor C13 and then grounded, pin 28 is connected to the VCC3.3V power supply and the other end of the capacitor C13, and pin 37 is connected to one end of the resistor R14. The device is connected to the power supply of the capacitor C10, the power supply of the capacitor C10 is connected to the power supply of the capacitor C10, the power supply of the capacitor C10 is connected to the power supply of the capacitor C10, the power supply of the capacitor C10 is connected to the power supply of the capacitor C10, the power supply of the capacitor C10 is connected to the power supply of the capacitor C10, and the other end of the resistors R13-R14 are connected to the power supply of the resistor R10.
4. The four-channel capacitor signal acquisition circuit according to claim 3, characterized in that: The detection circuit includes chips U1-U2, U4-U6, crystal oscillator X2, resistors R1-R12, capacitors C2-C3, C7, C9-C12 and inductors L1-L4. Pin 1 of the chip U1 is connected to one end of the resistor R1, one end of the inductor L1 and one end of the capacitor C2, and pin 2 is connected to one end of the resistor R2, the other end of the inductor L1 and the other end of the capacitor C2; pin 1 of the chip U2 is connected to one end of the resistor R3, one end of the inductor L2 and one end of the capacitor C3, pin 2 is connected to one end of the resistor R4, the other end of the inductor L2 and the other end of the capacitor C3; pin 1 of the chip U5 is connected to one end of the resistor R6, one end of the inductor L3 and one end of the capacitor C7, pin 2 is connected to one end of the resistor R8, the other end of the inductor L3 and the other end of the capacitor C7; pin 1 of the chip U6 is connected to one end of the resistor R10, one end of the inductor L4 and the capacitor C9 one end of the chip U4 is connected, pin 2 is connected to one end of the resistor R11, the other end of the inductor L4 and the other end of the capacitor C9; pin 1 of the chip U4 is connected to SCL and one end of the resistor R5, pin 2 is connected to SDA and one end of the resistor R7, pin 3 is connected to pin 3 of the crystal oscillator X2, pin 4 is connected to one end of the resistor R9, pin 6 is connected to one end of the resistor R12, pin 7 is connected to one end of the capacitor C10-C12 and VCC3.3V power supply, pins 8 and 17 are connected to the other end of the resistor R9 and then grounded, and pins 9-16 are respectively connected to the other ends of the resistors R11, R10, R8, R6, and R4-R1; the other ends of the resistors R5 and R7 are both connected to the VCC3.3V power supply, pin 2 of the crystal oscillator X2 is grounded, pin 4 is connected to the VCC3.3V power supply, and the other end of the resistor R12 is connected to the other end of the capacitors C10-C12 and then grounded.
5. The four-channel capacitor signal acquisition circuit according to claim 4, characterized in that: The chip U4 in the detection circuit adopts the FDC2214 high-precision capacitance measurement chip.
