Power supply control system of laser radar
The main power module and conversion module supply power to the lidar wake-up module and system power supply module, solving the problem of large space and high cost of independent power supply, realizing the low-power operation of the lidar and the integration of the power supply control system.
Patent Information
- Application Number
- CN202323630425.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-28
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2033-12-28
AI Technical Summary
The existing lidar sleep wake-up circuit adopts independent power supply, resulting in large space occupancy, high cost and high power consumption, making it difficult to achieve low power consumption operation.
The main power module and the conversion module are used to supply power to the first wake-up module, the second wake-up module and the system power supply module respectively. The power distribution is controlled through the power switch module, so that multiple modules share the total power and reduce the use of independent power.
It reduces cost and power consumption, realizes low-power operation of lidar, and facilitates the integration of power supply control systems.
Smart Images

Figure CN222262495U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of laser radar, and in particular to a power supply control system of a laser radar. Background Art
[0002] LiDAR, also known as optical radar (LIght Detection And Ranging), is the abbreviation of laser detection and ranging system. It measures the propagation distance between the sensor transmitter and the target object, analyzes the reflected energy size, amplitude, frequency and phase of the reflected spectrum on the surface of the target object, and outputs point cloud, thereby presenting accurate three-dimensional structural information of the target object. LiDAR usually includes PHY (Physical Layer) chip circuit and CAN (Controller Area Network) chip circuit. The PHY chip circuit is mainly responsible for transmitting point cloud data, and the CAN chip circuit is mainly responsible for transmitting the status chip of the LiDAR. When the LiDAR is in working mode, the power consumption is relatively large. If the LiDAR is still in working mode when it is not needed, it will consume a lot of electricity. Therefore, it is required that the LiDAR is in sleep mode when it is not needed.
[0003] The existing laser radar sleep wake-up circuit usually adopts an independent power supply method, that is, multiple different power modules are used to power different wake-up modules and systems respectively. Multiple power supplies take up a lot of space and are costly. Utility Model Content
[0004] The utility model provides a power supply control system of a laser radar, which supplies power to a first wake-up module, a second wake-up module and a system power supply module respectively through a main power supply module and a conversion module, without setting up multiple independent power supplies, thereby reducing costs, reducing power consumption, and realizing low-power operation of the laser radar.
[0005] In a first aspect, an embodiment of the utility model provides a power supply control system of a laser radar, the power supply control system comprising a main power supply module, a conversion module, a first wake-up module, a second wake-up module, a power switch module and a system power supply module;
[0006] The output end of the main power supply module is electrically connected to the input end of the conversion module, the first output end of the conversion module is electrically connected to the power supply end of the first wake-up module and the input end of the power switch module respectively, and the second output end of the conversion module is electrically connected to the power supply end of the second wake-up module;
[0007] The output end of the first awakening module is electrically connected to the first control end of the power switch module, and the output end of the second awakening module is electrically connected to the second control end of the power switch module;
[0008] The output end of the power switch module is electrically connected to the power supply end of the system power supply module, and the power switch module is used to be turned on when at least one of the first wake-up module or the second wake-up module outputs a first level signal to provide power to the system power supply module, wherein the first level signal is greater than a preset level signal.
[0009] Optionally, the conversion module includes a first conversion circuit and a second conversion circuit;
[0010] The input end of the first conversion circuit is electrically connected to the output end of the main power module, and the output end of the first conversion circuit is electrically connected to the power supply end of the first wake-up module and the input end of the power switch module respectively, and the first conversion circuit is used to convert the total power output by the main power module into a first power supply to provide the first power supply for the first wake-up module and the system power supply module;
[0011] The input end of the second conversion circuit is electrically connected to the output end of the first conversion circuit, and the output end of the second conversion circuit is electrically connected to the power supply end of the second wake-up module. The second conversion circuit is used to convert the first power supply output by the first conversion circuit into a second power supply to provide a second power supply for the second wake-up module.
[0012] Optionally, the first conversion circuit includes a conversion chip, an input filter unit and an output filter unit;
[0013] The multiple input pins of the conversion chip are electrically connected to the output end of the main power module through the input filter unit;
[0014] The plurality of output pins of the conversion chip are electrically connected to the output end of the first conversion circuit through the output filter unit.
[0015] Optionally, the second conversion circuit includes a voltage stabilizing diode and a first resistor;
[0016] The first end of the first resistor is electrically connected to the output end of the first conversion circuit;
[0017] The first end of the voltage stabilizing diode is electrically connected to the second end of the first resistor and the power supply end of the second wake-up module respectively;
[0018] The second end of the voltage stabilizing diode is electrically connected to the ground end.
[0019] Optionally, the resistance value of the first resistor satisfies:
[0020]
[0021] Among them, R is the resistance value of the first resistor, U1 is the voltage value of the first power supply, U2 is the stable voltage of the Zener diode, and I is the current value flowing through the first resistor.
[0022] Optionally, the power switch module includes a first switch unit, a second switch unit and an OR gate logic unit;
[0023] The first input end of the OR gate logic unit is electrically connected to the output end of the first wake-up module, and the second input end of the OR gate logic unit is electrically connected to the output end of the second wake-up module. The OR gate logic unit is used to output a first level signal when at least one of the first wake-up module and the second wake-up module outputs a first level signal, and to output a second level signal when both the first wake-up module and the second wake-up module output a second level signal, and the second level signal is less than a preset level signal;
[0024] The control end of the first switch unit is electrically connected to the output end of the OR gate logic unit, the input end of the first switch unit is electrically connected to the ground end, the output end of the first switch unit is electrically connected to the control end of the second switch unit, and the first switch unit is used to be turned on when the output end of the OR gate logic unit outputs the first level signal, and turned off when the output end of the OR gate logic unit outputs the second level signal;
[0025] The control end of the second switch unit is electrically connected to the output end of the first switch unit, the input end of the second switch unit is electrically connected to the first output end of the conversion module, the output end of the second switch unit is electrically connected to the power supply end of the system power supply module, and the second switch unit is used to be turned off when the first switch unit is turned on, and to be turned on when the first switch unit is turned off.
[0026] Optionally, the first switch unit includes a first transistor, and the second switch unit includes a second transistor;
[0027] The OR gate logic unit includes a first anti-reverse diode and a second anti-reverse diode;
[0028] The first end of the first anti-reverse diode is electrically connected to the output end of the first wake-up module, and the first end of the second anti-reverse diode is electrically connected to the output end of the second wake-up module.
[0029] The second end of the first anti-reverse diode and the second end of the second anti-reverse diode are both electrically connected to the gate of the first transistor, the source of the first transistor is electrically connected to the ground terminal, the drain of the first transistor is electrically connected to the gate of the second transistor, the source of the second transistor is electrically connected to the first output terminal of the conversion module, and the drain of the second transistor is electrically connected to the system power supply module.
[0030] Optionally, the first transistor includes an N-type metal oxide semiconductor transistor, and the second transistor includes a P-type metal oxide semiconductor transistor.
[0031] Optionally, the first conversion circuit further includes an output voltage adjustment unit;
[0032] The output voltage regulating unit is arranged between the output end of the first conversion circuit and the feedback pin of the conversion chip.
[0033] Optionally, the first conversion circuit further includes an enabling current limiting unit;
[0034] The enabling current limiting unit is arranged between a plurality of input pins of the conversion chip and an enabling pin of the conversion chip.
[0035] In summary, in the utility model, the output end of the total power supply module is electrically connected to the input end of the conversion module, the first output end of the conversion module is electrically connected to the power supply end of the first wake-up module and the input end of the power switch module, respectively, and the second output end of the conversion module is electrically connected to the power supply end of the second wake-up module. The output end of the first wake-up module is electrically connected to the first control end of the power switch module, and the output end of the second wake-up module is electrically connected to the second control end of the power switch module. The output end of the power switch module is electrically connected to the power supply end of the system power supply module, and the power switch module is used to be turned on when at least one of the first wake-up module or the second wake-up module outputs a first level signal, so as to provide power to the system power supply module. In this way, the first wake-up module, the second wake-up module and the system power supply module are all powered by the total power supply module, and there is no need to set up multiple independent power supplies, thereby reducing costs and power consumption, which is conducive to the integration of the power supply control system and realizes low-power operation of the laser radar. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] Figure 1 This is a structural block diagram of a power supply control system of a laser radar provided in an embodiment of the utility model;
[0037] Figure 2 This is an overall circuit structure diagram of a power supply control system of a laser radar provided by an embodiment of the utility model;
[0038] Figure 3It is a partial circuit diagram of a power switch module provided in an embodiment of the utility model. DETAILED DESCRIPTION
[0039] In order to make the purpose, technical solution and advantages of the utility model clearer, the technical solution of the utility model will be fully described below in combination with the drawings in the embodiments of the utility model through specific implementation methods. Obviously, the described embodiments are part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work fall within the protection scope of the utility model.
[0040] It should be noted that the terms "first", "second", etc. in the specification and claims of the utility model and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the utility model described here can be implemented in an order other than those illustrated or described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
[0041] Figure 1 This is a structural block diagram of a power supply control system of a laser radar provided by an embodiment of the utility model, such as Figure 1 As shown, the power supply control system includes a main power module 10, a conversion module 20, a first wake-up module 30, a second wake-up module 40, a power switch module 50 and a system power supply module 60. The output end of the main power module 10 is electrically connected to the input end of the conversion module 20, the first output end of the conversion module 20 is electrically connected to the power supply end of the first wake-up module 30 and the input end of the power switch module 50 respectively, and the second output end of the conversion module 20 is electrically connected to the power supply end of the second wake-up module 40. The output end of the first wake-up module 30 is electrically connected to the first control end of the power switch module 50, and the output end of the second wake-up module 40 is electrically connected to the second control end of the power switch module 50. The output end of the power switch module 50 is electrically connected to the power supply end of the system power supply module 60, and the power switch module 50 is used to be turned on when at least one of the first wake-up module 30 or the second wake-up module 40 outputs a first level signal to provide power to the system power supply module 60, wherein the first level signal is greater than the preset level signal.
[0042] Specifically, Figure 1The output end of the total power module 10 is electrically connected to the output end of the conversion module 20, and the total power provided by the total power module 10 is converted into a first power supply and a second power supply respectively through the conversion module 20. The voltage value of the first power supply is different from the voltage value of the second power supply. Exemplarily, the voltage value of the first power supply can be 5V, the voltage value of the second power supply can be 3.3V, the first wake-up module 30 can be a CAN sleep wake-up module, and the second wake-up module 40 can be a PHY sleep wake-up module, wherein the working voltage of the first wake-up module 30 is the same as the working voltage of the system power supply module 60, both of which are 5V, and then the first output end of the conversion module 20 is electrically connected to the power supply end of the first wake-up module 30 and the input end of the power switch module 50, and the output end of the power switch module 50 is electrically connected to the power supply end of the system power supply module 60, so that the total power module 10 supplies power to the first wake-up module 30 and the system power supply module 60 respectively through the first output end of the conversion module 20.
[0043] The working voltage of the second wake-up module 40 is different from the working voltage of the first wake-up module 30. For example, the working voltage of the second wake-up module 40 is 3.3V. Then, the second output end of the conversion module 20 is electrically connected to the power supply end of the second wake-up module 40. The converted second power supply is output to the second wake-up module 40 through the second output end of the conversion module 20 to power the second wake-up module 40. In this way, the main power supply module supplies power to the first wake-up module 30 and the system power supply module 60 through the first output end of the conversion module 20, and supplies power to the second wake-up module 40 through the second output end of the conversion module 20. That is, one power supply can be used to power multiple modules in the power supply control system. Compared with the solution in the prior art that requires independent power supplies to power each module separately, it can save costs, reduce power consumption, and the power supply occupies less space, which is conducive to the overall integration and miniaturization of the power supply control system.
[0044] In addition, the first wake-up module 30 outputs a first level signal when it is in the wake-up state under the first power supply, and outputs a second level signal when it is in the sleep state under the first power supply, wherein the first level signal is greater than the preset level signal, and the second level signal is less than the preset level signal, that is, the first level signal is a high level signal, and the second level signal is a low level signal. Similarly, the second wake-up module 40 outputs a first level signal when it is in the wake-up state under the second power supply, and outputs a second level signal when it is in the sleep state under the second power supply. The output end of the first wake-up module 30 is electrically connected to the first control end of the power switch module 50, and the output end of the second wake-up module 40 is electrically connected to the second control end of the power switch module 50. Then the power switch module 50 is turned on when at least one of the first wake-up module 30 or the second wake-up module 40 outputs the first level signal. In other words, the power switch module 50 is turned on when at least one of the first wake-up module 30 or the second wake-up module 40 is in the wake-up state, so that the main power module 10 supplies power to the system power supply module 60 through the conversion module 20. When the first wake-up module 30 and the second wake-up module both output the second level signal (that is, both are in the sleep state), the power switch module 50 is cut off, and the voltage at the power supply end of the system power supply module 60 is 0V, thereby realizing low-power operation of the laser radar.
[0045] In summary, in the utility model, the output end of the total power supply module is electrically connected to the input end of the conversion module, the first output end of the conversion module is electrically connected to the power supply end of the first wake-up module and the input end of the power switch module, respectively, and the second output end of the conversion module is electrically connected to the power supply end of the second wake-up module. The output end of the first wake-up module is electrically connected to the first control end of the power switch module, and the output end of the second wake-up module is electrically connected to the second control end of the power switch module. The output end of the power switch module is electrically connected to the power supply end of the system power supply module, and the power switch module is used to be turned on when at least one of the first wake-up module or the second wake-up module outputs a first level signal, so as to provide power to the system power supply module. In this way, the first wake-up module, the second wake-up module and the system power supply module are all powered by the total power supply module, and there is no need to set up multiple independent power supplies, thereby reducing costs and power consumption, which is conducive to the integration of the power supply control system and realizes low-power operation of the laser radar.
[0046] Optionally, based on the above embodiment, continue to refer to Figure 1, the conversion module 20 includes a first conversion circuit 210 and a second conversion circuit 220. The input end of the first conversion circuit 210 is electrically connected to the output end of the main power module 10, and the output end of the first conversion circuit 210 is electrically connected to the power supply end of the first wake-up module 30 and the input end of the power switch module 50 respectively. The first conversion circuit 210 is used to convert the total power output by the main power module 10 into a first power supply to provide the first power supply to the first wake-up module 30 and the system power supply module 60. The input end of the second conversion circuit 220 is electrically connected to the output end of the first conversion circuit 210, and the output end of the second conversion circuit 220 is electrically connected to the power supply end of the second wake-up module 40. The second conversion circuit 220 is used to convert the first power output by the first conversion circuit 210 into a second power supply to provide the second power supply to the second wake-up module 40.
[0047] Exemplarily, the working voltage of the first wake-up module 30 is the same as the working voltage of the system power supply module 60, but different from the working voltage of the second wake-up module 40, and thus it is necessary to convert the total power provided by the total power supply module 10 multiple times. Specifically, the conversion module 20 includes a first conversion circuit 210 and a second conversion circuit 220. The first conversion circuit 210 is used to convert the total power provided by the total power supply module 10 into a first power supply. The output end of the first conversion circuit 210 is electrically connected to the first output end of the conversion module 20, and then the first wake-up module 30 and the system power supply module 60 are powered by the first conversion circuit 210. The second conversion circuit 220 is used to convert the first power output by the first conversion circuit 210 into a second power supply. The output end of the second conversion circuit 220 is electrically connected to the second output end of the conversion module 20, and then the second wake-up module 30 is powered by the second conversion circuit 220. In this way, the first wake-up module 30 and the system power supply module 60 with the same working voltage are powered by the same conversion circuit, which can simplify the circuit and make the power supply control method simple.
[0048] It should be noted that the embodiment of the utility model is described by taking the working voltage of the first wake-up module 30 as the same as the working voltage of the system power supply module 60, but different from the working voltage of the second wake-up module 40 as an example, but it is not limited to this. In other embodiments, there may be a situation where the working voltage of the first wake-up module 30, the working voltage of the second wake-up module 40 and the working voltage of the system power supply module 60 are all different. At this time, the conversion module may also include a first conversion circuit, a second conversion circuit and a third conversion circuit, the input end of the first conversion circuit is electrically connected to the output end of the main power supply module, the output end of the first conversion circuit is electrically connected to the input end of the second conversion circuit, the input end of the third conversion circuit and the power supply end of the system power supply module, the output end of the second conversion circuit is electrically connected to the power supply end of the second wake-up module, and the output end of the third conversion circuit is electrically connected to the power supply end of the first wake-up module, thereby respectively supplying power to the first wake-up module, the second wake-up module and the system power supply module.
[0049] Optional, Figure 2 This is an overall circuit diagram of a power supply control system provided by an embodiment of the utility model, such as Figure 2 As shown, the first conversion circuit 210 includes a conversion chip U1, an input filter unit (not shown in the figure) and an output filter unit (not shown in the figure). Multiple input pins VIN of the conversion chip U1 are electrically connected to the output end of the main power module 10 through the input filter unit. Multiple output pins SW of the conversion chip U1 are electrically connected to the output end of the first conversion circuit 210 through the output filter unit.
[0050] Specifically, Figure 2 As shown, the conversion chip U1 may be a DCDC conversion chip for converting one type of direct current into another type of direct current. Multiple input pins VIN of the conversion chip U1 are electrically connected to the output end of the main power module 10, and multiple output pins SW of the conversion chip U1 are electrically connected to the output end of the first conversion circuit 210, and then the total power output by the main power module 10 is converted into the first power through the conversion chip U1, and the first power is output to the output end of the first conversion circuit 210. In addition, an input filter unit is also arranged between the output end of the main power module 10 and the multiple input pins VIN of the conversion chip U1, and the input filter unit includes a first capacitor C1 and a second capacitor C2. The first capacitor C1 and the second capacitor C2 are arranged in parallel between the multiple input pins VIN of the conversion chip U1 and the multiple ground pins GND1 of the conversion chip U1, and the first plates of the first capacitor C1 and the second capacitor C2 are also electrically connected to the output end of the main power module 10, and the second plates of the first capacitor C1 and the second capacitor C2 are also electrically connected to the ground terminal GND, and then the total power output by the main power module 10 is filtered by the input filter unit, so that the power output to the conversion pin U1 is a smooth direct current.
[0051] An output filter power supply is also provided between the output pins SW of the conversion chip U1 and the output end of the first conversion circuit 210. The output filter unit includes an inductor L1, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6 and a seventh capacitor C7. Among them, the first end of the inductor L1 is electrically connected to the multiple output pins SW of the conversion chip U1, the second end of the inductor L1 is electrically connected to the output end of the first conversion circuit 210, the first plates of the third capacitor C3, the fourth capacitor C4, the fifth capacitor C5, the sixth capacitor C6 and the seventh capacitor C7 are all provided between the second end of the inductor L1 and the output end of the first conversion circuit 210, and the second plates of the third capacitor C3, the fourth capacitor C4, the fifth capacitor C5, the sixth capacitor C6 and the seventh capacitor C7 are all electrically connected to the ground terminal GND, and then the first power supply output by the conversion chip U1 is filtered and stored through the inductor L1, the third capacitor C3, the fourth capacitor C4, the fifth capacitor C5, the sixth capacitor C6 and the seventh capacitor C7. In this way, the total power input to the conversion chip U1 and the first power output from the conversion chip U1 are filtered by the input filter unit and the output filter unit respectively, so as to improve the reliability of the first power output from the conversion chip U1.
[0052] Optional, continue to see Figure 1 and Figure 2 The second conversion circuit 220 includes a voltage stabilizing diode D1 and a first resistor R1. The first end of the first resistor R1 is electrically connected to the output end of the first conversion circuit 210. The first end of the voltage stabilizing diode D1 is electrically connected to the second end of the first resistor R1 and the power supply end AVDD of the second wake-up module 40, respectively, and the second end of the voltage stabilizing diode D1 is electrically connected to the ground end GND.
[0053] Specifically, the first power supply output by the first conversion circuit 210 is converted into the second power supply through the first resistor R1 and the voltage zener diode D1, and the first end of the voltage zener diode D1 and the second end of the first resistor R1 are electrically connected to the power supply terminal AVDD of the second wake-up module 40, and then the second power supply is output to the power supply terminal AVDD of the second wake-up module 40 to power the second wake-up module 40. Since the power consumption and cost of the voltage zener diode D1 are relatively low, the cost and power consumption can be further reduced by powering the second wake-up module 40 through the voltage zener diode D1.
[0054] Exemplarily, the working voltage of the second wake-up module 40 is 3.3V, and the second power source converted by the second conversion circuit 220 is 3.3V, and then a voltage regulator diode with a stable voltage of 3.3V needs to be selected to power the second wake-up module 40. It is understandable that in order to ensure low power consumption operation on the basis of normal operation of the second wake-up module 40, it is also necessary to select a suitable resistance value of the first resistor R1 for current limiting. Specifically, the resistance value of the first resistor R1 satisfies: Wherein, R is the resistance value of the first resistor R1, U1 is the voltage value of the first power supply, U2 is the stable voltage of the voltage-stabilizing diode D1, and I is the current value flowing through the first resistor R1. For example, assuming that the voltage value of the first power supply is 5V, the stable voltage of the voltage-stabilizing diode D1 is 3.3V, if the power consumption of the second wake-up module 40 is to be 40μA, to ensure the low power consumption operation of the second wake-up module 40, it is necessary to select the first resistor R1 with a resistance value of 42.5KΩ.
[0055] It should be noted that the model of the voltage stabilizing diode D1 may be AD-BZT52C3V3S, but the embodiment of the utility model is not limited thereto, and those skilled in the art may set it as required.
[0056] Optional, Figure 3 This is a partial circuit diagram of a power switch module provided by an embodiment of the utility model. Figure 1-Figure 3 The power switch module 50 includes a first switch unit 510, a second switch unit 520 and an OR gate logic unit 530. The first input end of the OR gate logic unit 530 is electrically connected to the output end CAN-OUT of the first wake-up module 30, and the second input end of the OR gate logic unit 530 is electrically connected to the output end PHY-OUT of the second wake-up module 40. The OR gate logic unit 530 is used to output a first level signal when at least one of the first wake-up module 30 and the second wake-up module 40 outputs a first level signal, and to output a second level signal when both the first wake-up module 30 and the second wake-up module 40 output a second level signal, and the second level signal is less than a preset level signal. The control end of the first switch unit 510 is electrically connected to the output end of the OR gate logic unit 530, the input end of the first switch unit 510 is electrically connected to the ground end GND, the output end of the first switch unit 510 is electrically connected to the control end of the second switch unit 520, and the first switch unit 510 is used to be turned on when the output end of the OR gate logic unit 530 outputs the first level signal, and to be turned off when the output end of the OR gate logic unit 530 outputs the second level signal. The control end of the second switch unit 520 is electrically connected to the output end of the first switch unit 510, the input end of the second switch unit 520 is electrically connected to the first output end of the conversion module 20, the output end of the second switch unit 520 is electrically connected to the power supply end SYS of the system power supply module 60, and the second switch unit 520 is used to be turned off when the first switch unit 510 is turned on, and to be turned on when the first switch unit 510 is turned off.
[0057] Specifically, the first wake-up module 30 outputs a first level signal when it is in the wake-up state under the first power supply, and outputs a second level signal when it is in the sleep state under the first power supply, wherein the first level signal is a high level signal and the second level signal is a low level signal. Similarly, the second wake-up module 40 outputs a first level signal when it is in the wake-up state under the second power supply, and outputs a second level signal when it is in the sleep state under the second power supply. The first input terminal and the second input terminal of the OR gate logic unit 530 are electrically connected to the output terminal CAN-OUT of the first wake-up module 30 and the output terminal PHUY-OUT of the second wake-up module 40, respectively. The conduction conditions of the first switch unit 510 and the second switch unit 520 are different, and then the first switch unit 510, the second switch unit 520 and the OR gate logic unit 530 jointly control the conduction and cutoff of the power switch module 50.
[0058] Exemplarily, when at least one of the first wake-up module 30 and the second wake-up module 40 is in the wake-up state, the OR gate logic unit 530 outputs a high-level signal. Under the high-level signal, the first switch unit 510 is turned on, the input end of the first switch unit 510 is electrically connected to the ground end GND, and the output end of the first switch unit 510 is electrically connected to the control end of the second switch unit 520, that is, the control end of the second switch unit 520 is a low-level signal. Under the low-level signal, the second switch unit 520 is turned on. At this time, the first power supply output by the first conversion circuit 210 can be output to the power supply end of the system power supply module 60 through the second switch unit 520 to power the system power supply module 60. When the first wake-up module 30 and the second wake-up module 40 are both in the sleep state, the OR gate logic unit 530 outputs a low-level signal. Under the low-level signal, the first switch unit 510 is cut off, and the output end of the first switch unit 510 is a high-level signal, that is, the control end of the second switch unit 520 is a high-level signal. Under the high-level signal, the second switch unit 520 is cut off. At this time, the output end of the first conversion circuit 210 is disconnected from the power supply end of the system power supply module 60, thereby realizing low-power operation of the lidar.
[0059] Optionally, based on the above embodiment, continue to refer to Figure 1-Figure 3, the first switch unit 510 includes a first transistor Q1, and the second switch unit 520 includes a second transistor Q2. The OR gate logic unit 530 includes a first anti-reverse diode D2 and a second anti-reverse diode D3. The first end of the first anti-reverse diode D2 is electrically connected to the output end CAN-OUT of the first wake-up module 30, and the first end of the second anti-reverse diode D3 is electrically connected to the output end PHY-OUT of the second wake-up module 40. The second end of the first anti-reverse diode D2 and the second end of the second anti-reverse diode D3 are both electrically connected to the gate of the first transistor Q1, the source of the first transistor Q1 is electrically connected to the ground end GND, the drain of the first transistor Q1 is electrically connected to the gate of the second transistor Q2, the source of the second transistor Q2 is electrically connected to the first output end of the conversion module 20, and the drain of the second transistor Q2 is electrically connected to the system power supply module 60.
[0060] Specifically, the first end of the anti-reverse diode is the positive end, and the second end of the anti-reverse diode is the negative end. The anti-reverse diode has a unidirectional conduction characteristic. Then, when at least one of the first wake-up module 30 or the second wake-up module 40 outputs a high-level signal, the first anti-reverse diode D2 and / or the negative end of the second anti-reverse diode is a high-level signal, that is, the gate of the first transistor Q1 is a high-level signal. Under the high-level signal, the first transistor Q1 is turned on, the source of the first transistor Q1 is electrically connected to the ground terminal GND, and the output end of the first transistor Q1 is electrically connected to the control end of the second transistor Q2, that is, the low-level signal of the source of the first transistor Q1 is transmitted to the gate of the second transistor Q2, and the second transistor Q2 is turned on under the low-level signal. At this time, the first power supply output by the first conversion circuit 210 can be output to the power supply end of the system power supply module 60 through the second transistor Q2 to power the system power supply module 60. When the first wake-up module 30 and the second wake-up module 40 are both in the sleep state, the cathode ends of the first anti-reverse diode D2 and the second anti-reverse diode are low-level signals. Under the low-level signal, the first transistor Q1 is cut off, and the output end of the first transistor Q1 is a high-level signal, that is, the control end of the second transistor Q2 is a high-level signal. Under the high-level signal, the second transistor Q2 is cut off. At this time, the output end of the first conversion circuit 210 is disconnected from the power supply end of the system power supply module 60, thereby realizing low-power operation of the laser radar.
[0061] It should be noted that, on the basis of the above embodiment, the power switch module 50 also includes a plurality of resistors to ensure the normal operation of the first transistor Q1 and the second transistor Q2. For example, the plurality of resistors include a second resistor R2, a third resistor R3, a fourth resistor R4 and a fifth resistor R5. Among them, the first end of the second resistor R2 is electrically connected to the second end of the first anti-reverse diode D2, the second end of the second resistor R2 is electrically connected to the gate of the first transistor Q1, the first end of the third resistor R3 is electrically connected to the second end of the second resistor R2, and the second end of the third resistor R3 is electrically connected to the ground terminal GND, thereby protecting the first transistor Q1 through the second resistor R2 and the third resistor R3 to prevent accidental large current from damaging the first transistor Q1. In addition, the first end of the fourth resistor R4 is electrically connected to the source of the second transistor Q2, the second end of the fourth resistor R4 is electrically connected to the gate of the second transistor Q2, and the fifth resistor R4 is connected between the drain of the first transistor Q1 and the gate of the second transistor Q2, thereby protecting the second transistor Q2 through the fourth resistor R4 and the fifth resistor R5, thereby ensuring the reliability of the power switch module 50.
[0062] Optionally, the first transistor Q1 includes an N-type metal oxide semiconductor transistor, and the second transistor Q2 includes a P-type metal oxide semiconductor transistor. Specifically, the N-type metal oxide semiconductor transistor is turned on when the voltage between the source and the gate is greater than or equal to the threshold voltage, which can be understood as the gate of the N-type metal oxide semiconductor transistor is turned on under a high-level signal, and the N-type metal oxide semiconductor transistor has the characteristics of high input impedance and low driving power. The P-type metal oxide semiconductor transistor is turned on when the voltage between the gate and the source is less than a certain value, which can be understood as the P-type metal oxide semiconductor transistor is turned on at a low level, and the P-type metal oxide semiconductor transistor has the characteristics of low power consumption and fast switching speed. Further, by setting the first transistor Q1 to include an N-type metal oxide semiconductor transistor and the second transistor Q2 to include a P-type metal oxide semiconductor transistor, the power consumption of the power switch module 50 can be reduced on the basis of ensuring the normal operation of the power switch module 50.
[0063] Optionally, based on the above embodiment, continue to refer to Figure 2 The first conversion circuit 210 further includes an output voltage regulating unit (not shown in the figure). The output voltage regulating unit is arranged between the output end of the first conversion circuit 210 and the feedback pin FB of the conversion chip Y1.
[0064] Specifically, Figure 2As shown, the output voltage adjustment unit includes a sixth resistor R6 and a seventh resistor R7, the first end of the sixth resistor R6 is electrically connected to the output end of the first conversion circuit 210, the second end of the sixth resistor R6 and the first end of the seventh resistor R7 are both electrically connected to the feedback pin FB of the conversion chip Y1, and the second end of the seventh resistor R7 is electrically connected to the ground terminal GND. Then, when the first power output by the first conversion circuit 210 changes, the output voltage of the first conversion circuit 210 can be adjusted by adjusting the resistance values of the sixth resistor R6 and the seventh resistor R7 to achieve precise control.
[0065] Optional, continue to see Figure 2 The first conversion circuit 210 further includes an enable current limiting unit (not shown in the figure). The enable current limiting unit is arranged between a plurality of input pins VIN of the conversion chip U1 and an enable pin EN of the conversion chip U1.
[0066] Specifically, the enabling current limiting unit includes an eighth resistor R8, a first end of the eighth resistor R8 is electrically connected to a plurality of input pins VIN of the conversion chip U1, and a second end of the eighth resistor R8 is electrically connected to an enable end EN of the conversion chip U1, thereby ensuring through the eighth resistor R8 that when the total power module 10 outputs the total power supply, the conversion chip U1 is in a working state. In addition, the turn-on voltage and turn-off voltage of the conversion chip U1 can be adjusted by adjusting the resistance value of the eighth resistor R8, thereby reducing the power consumption of enabling the conversion chip U1.
[0067] It should be noted that the first conversion circuit 210 also includes a ninth resistor R9, which is a mode setting resistor. The first end of the ninth resistor R9 is electrically connected to the mode setting pin MODE of the conversion chip U1, and the second end of the ninth resistor R9 is electrically connected to the ground terminal GND, and then the working mode of the conversion chip U1 is set by the ninth resistor R9, so that the static power consumption of the conversion chip U1 is minimized. In addition, the first conversion circuit 210 also includes a tenth resistor R10, an eleventh resistor R11 and an eighth capacitor C8. Among them, the tenth resistor R10 is a switching frequency setting resistor, the first end of the tenth resistor R10 is electrically connected to the working frequency setting pin RT of the conversion chip U1, the second end of the tenth resistor R10 is electrically connected to the ground terminal GND, and then the switching frequency of the conversion chip U1 is set by the tenth resistor R10. The eleventh resistor R11 is an output state indication resistor, the first end of the eleventh resistor R11 is electrically connected to the state indication pin PG of the conversion chip U1, and the second end of the eleventh resistor R11 is electrically connected to the output end of the first conversion circuit 210. The eighth capacitor C8 is a soft start setting capacitor, the first plate of the eighth capacitor C8 is electrically connected to the soft start pin TR / SS of the conversion chip U1, and the second plate of the eighth capacitor C8 is electrically connected to the ground terminal GND, and then the eighth capacitor C8 can be used to set the power-on time of the conversion chip U1 outputting the first power supply. In addition to the above, the first conversion circuit 210 also includes other electrical components to ensure the normal operation of the conversion chip U1, which will not be described one by one in the embodiment of the utility model.
[0068] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, combinations and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention is described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims
1. A power supply control system for a laser radar, characterized in that: The power supply control system includes a main power supply module, a conversion module, a first wake-up module, a second wake-up module, a power switch module and a system power supply module; The output end of the main power supply module is electrically connected to the input end of the conversion module, the first output end of the conversion module is electrically connected to the power supply end of the first wake-up module and the input end of the power switch module respectively, and the second output end of the conversion module is electrically connected to the power supply end of the second wake-up module; The output end of the first awakening module is electrically connected to the first control end of the power switch module, and the output end of the second awakening module is electrically connected to the second control end of the power switch module; The output end of the power switch module is electrically connected to the power supply end of the system power supply module, and the power switch module is used to be turned on when at least one of the first wake-up module or the second wake-up module outputs a first level signal to provide power to the system power supply module, wherein the first level signal is greater than a preset level signal.
2. The power supply control system according to claim 1, characterized in that: The conversion module includes a first conversion circuit and a second conversion circuit; The input end of the first conversion circuit is electrically connected to the output end of the main power module, and the output end of the first conversion circuit is electrically connected to the power supply end of the first wake-up module and the input end of the power switch module respectively, and the first conversion circuit is used to convert the total power output by the main power module into a first power supply to provide the first power supply for the first wake-up module and the system power supply module; The input end of the second conversion circuit is electrically connected to the output end of the first conversion circuit, and the output end of the second conversion circuit is electrically connected to the power supply end of the second wake-up module. The second conversion circuit is used to convert the first power supply output by the first conversion circuit into a second power supply to provide a second power supply for the second wake-up module.
3. The power supply control system according to claim 2, characterized in that: The first conversion circuit includes a conversion chip, an input filter unit and an output filter unit; A plurality of input pins of the conversion chip are electrically connected to the output end of the main power module through the input filter unit; The plurality of output pins of the conversion chip are electrically connected to the output end of the first conversion circuit through the output filter unit.
4. The power supply control system according to claim 2, characterized in that: The second conversion circuit includes a voltage stabilizing diode and a first resistor; The first end of the first resistor is electrically connected to the output end of the first conversion circuit; The first end of the voltage stabilizing diode is electrically connected to the second end of the first resistor and the power supply end of the second wake-up module respectively; The second end of the voltage stabilizing diode is electrically connected to the ground end.
5. The power supply control system according to claim 4, characterized in that: The resistance value of the first resistor satisfies: Among them, R is the resistance value of the first resistor, U1 is the voltage value of the first power supply, U2 is the stable voltage of the Zener diode, and I is the current value flowing through the first resistor.
6. The power supply control system according to claim 1, characterized in that: The power switch module includes a first switch unit, a second switch unit and an OR gate logic unit; The first input end of the OR gate logic unit is electrically connected to the output end of the first wake-up module, and the second input end of the OR gate logic unit is electrically connected to the output end of the second wake-up module. The OR gate logic unit is used to output a first level signal when at least one of the first wake-up module and the second wake-up module outputs a first level signal, and to output a second level signal when both the first wake-up module and the second wake-up module output a second level signal, and the second level signal is less than a preset level signal; The control end of the first switch unit is electrically connected to the output end of the OR gate logic unit, the input end of the first switch unit is electrically connected to the ground end, the output end of the first switch unit is electrically connected to the control end of the second switch unit, and the first switch unit is used to be turned on when the output end of the OR gate logic unit outputs the first level signal, and turned off when the output end of the OR gate logic unit outputs the second level signal; The control end of the second switch unit is electrically connected to the output end of the first switch unit, the input end of the second switch unit is electrically connected to the first output end of the conversion module, the output end of the second switch unit is electrically connected to the power supply end of the system power supply module, and the second switch unit is used to be turned off when the first switch unit is turned on, and to be turned on when the first switch unit is turned off.
7. The power supply control system according to claim 6, characterized in that: The first switch unit includes a first transistor, and the second switch unit includes a second transistor; The OR gate logic unit includes a first anti-reverse diode and a second anti-reverse diode; The first end of the first anti-reverse diode is electrically connected to the output end of the first wake-up module, and the first end of the second anti-reverse diode is electrically connected to the output end of the second wake-up module. The second end of the first anti-reverse diode and the second end of the second anti-reverse diode are both electrically connected to the gate of the first transistor, the source of the first transistor is electrically connected to the ground terminal, the drain of the first transistor is electrically connected to the gate of the second transistor, the source of the second transistor is electrically connected to the first output terminal of the conversion module, and the drain of the second transistor is electrically connected to the system power supply module.
8. The power supply control system according to claim 7, characterized in that: The first transistor includes an N-type metal oxide semiconductor transistor, and the second transistor includes a P-type metal oxide semiconductor transistor.
9. The power supply control system according to claim 3, characterized in that: The first conversion circuit also includes an output voltage adjustment unit; The output voltage regulating unit is arranged between the output end of the first conversion circuit and the feedback pin of the conversion chip.
10. The power supply control system according to claim 3, characterized in that: The first conversion circuit further includes an enabling current limiting unit; The enabling current limiting unit is arranged between a plurality of input pins of the conversion chip and an enabling pin of the conversion chip.