Communication voltage adaptive adjusting circuit and distance measuring chip

Abstract

The utility model provides a communication voltage self-adaptive adjusting circuit and a distance measuring chip, and the communication voltage self-adaptive adjusting circuit comprises a voltage detection module, a digital module, a register, an interface power supply output module, and an I2C interface module. The voltage detection module is used for detecting the SCL / SDA voltage of the I2C communication bus and outputting a voltage detection result to the digital module; the digital module configures a register according to the voltage detection result; the interface power supply output module is used for changing the output power supply voltage according to the configuration result of the register, so that the power supply voltage value is consistent with the SCL / SDA voltage value of the I2C communication bus; and the I2C interface module is used for converting the voltage of the I2C communication bus into the voltage required in the chip system according to the power supply voltage value. The internal register of the chip is configured according to the detection result of the external communication voltage, so that the size of the communication voltage of the chip is adaptively adjusted, the consistency of the communication voltage is realized, and the cost of the chip can be reduced while different application requirements are met.

Description

Technical Field

[0001] The utility model relates to the technical field of light detection, in particular to a communication voltage self-adapting regulating circuit and a distance measuring chip. Background Art

[0002] With the increasing maturity of DTOF (Direct Time-of-flight) technology and the promotion of its application market, its application in the consumer market is becoming more and more extensive, such as sweeping robots, mobile phones, VR / AR, etc.

[0003] The diverse application requirements bring different communication voltage requirements. In some system applications, the communication voltage is the chip power supply voltage (generally 3.0V), some are 1.8V, and some are 1.2V. Under this requirement, it is usually necessary to launch three chips with basically the same main functions but different communication voltages to meet market demand. This method brings great labor and maintenance costs to enterprises, which in turn increases the cost of chips. Utility Model Content

[0004] In view of the above-mentioned deficiencies in the prior art, the purpose of the present invention is to provide a communication voltage adaptive regulation circuit and a ranging chip, aiming to achieve adaptive communication voltage regulation, meet different application requirements while reducing the cost of the chip.

[0005] In order to achieve the above purpose, the utility model adopts the following technical solutions:

[0006] The first aspect of the utility model provides a communication voltage adaptive regulation circuit, which includes:

[0007] Voltage detection module, digital module, register, interface power output module, I2C interface module;

[0008] The voltage detection module is used to detect the SCL / SDA voltage of the I2C communication bus and output the voltage detection result to the digital module;

[0009] The digital module configures a register according to the voltage detection result;

[0010] The interface power output module changes the output power voltage according to the configuration result of the register so that the power voltage value is consistent with the SCL / SDA voltage value of the I2C communication bus;

[0011] The I2C interface module is used to convert the voltage of the I2C communication bus into the voltage required in the chip system according to the power supply voltage value.

[0012] In one embodiment, the voltage detection module includes: a voltage division sampling unit, a first comparison unit and a second comparison unit, the I2C communication bus is connected to the input end of the voltage division sampling unit, and the output end of the voltage division sampling unit is connected to the input end of the first comparison unit and the second comparison unit;

[0013] The voltage division sampling unit divides the SCL voltage of the I2C communication bus and outputs the sampled voltage to the first comparison unit and the second comparison unit;

[0014] The first comparison unit compares the sampled voltage with a first reference voltage and outputs a first comparison signal to a digital module;

[0015] The second comparison unit compares the sampled voltage with a second reference voltage and outputs a second comparison signal to the digital module.

[0016] In one embodiment, the voltage-dividing sampling unit includes: an operational amplifier, a first resistor and a second resistor; the in-phase input terminal of the operational amplifier is connected to the SCL line of the I2C communication bus, and the output terminal of the operational amplifier is connected to the inverting input terminal of the operational amplifier and one end of the first resistor; the other end of the first resistor serves as the output terminal of the voltage-dividing sampling unit, is connected to the first comparison unit and the second comparison unit, and is also grounded through the second resistor.

[0017] In one embodiment, the first comparison unit includes: a first comparator, a first NOT gate and a second NOT gate; the output end of the voltage-dividing sampling unit is connected to the non-inverting input end of the first comparator, the inverting input end of the first comparator is connected to a first reference voltage, the output end of the first comparator is connected to the input end of the first NOT gate; the output end of the first NOT gate is connected to the input end of the second NOT gate, and the output end of the second NOT gate serves as the output end of the first comparison unit;

[0018] The second comparison unit includes: a second comparator, a third NOT gate and a fourth NOT gate; the output end of the voltage division sampling unit is connected to the non-inverting input end of the second comparator, the inverting input end of the second comparator is connected to a second reference voltage, and the output end of the second comparator is connected to the input end of the third NOT gate; the output end of the third NOT gate is connected to the input end of the fourth NOT gate, and the output end of the fourth NOT gate serves as the output end of the second comparison unit.

[0019] In one embodiment, the voltage sources of the first comparator, the second comparator, and all the NOT gates are consistent with the voltage source of the digital module; and the first resistor and the second resistor are the same.

[0020] In one embodiment, the voltage detection module includes: a third comparison unit and a fourth comparison unit, and the I2C communication bus is connected to input ends of the third comparison unit and the fourth comparison unit;

[0021] The third comparison unit compares the SCL voltage of the I2C communication bus with a third reference voltage, and outputs a third comparison signal to the digital module;

[0022] The fourth comparison unit compares the SCL voltage of the I2C communication bus with a fourth reference voltage, and outputs a fourth comparison signal to the digital module.

[0023] In one embodiment, the voltage source of the third comparison unit and the fourth comparison unit is greater than the voltage source of the digital module;

[0024] The voltage detection module further includes: a first level conversion circuit and a second level conversion circuit;

[0025] The output of the third comparison unit is connected to the input of the first level conversion circuit, and is used to convert the high output voltage into a low voltage consistent with the voltage source of the digital module;

[0026] The output of the fourth comparison unit is connected to the input of the second level conversion circuit, and is used to convert the high output voltage into a low voltage consistent with the voltage source of the digital module.

[0027] In one embodiment, when the first comparison signal and the second comparison signal are both 00, the digital module configures the register to 00, and the interface power output module outputs the first voltage according to the configuration of the register;

[0028] When the first comparison signal is 0 and the second comparison signal is 1, the digital module configures the register to 01, and the interface power output module outputs a second voltage according to the configuration of the register;

[0029] When the first comparison signal is 1 and the second comparison signal is 0, the digital module prompts that an error occurs;

[0030] When the first comparison signal and the second comparison signal are both 11, the digital module configures the register to 11, and the interface power output module outputs a third voltage according to the configuration of the register.

[0031] In one embodiment, the first reference voltage is greater than the second reference voltage; and the third reference voltage is greater than the fourth reference voltage.

[0032] A second aspect of the utility model provides a distance measurement chip, which includes the communication voltage adaptive adjustment circuit as described above.

[0033] The beneficial effects of the utility model are: providing a communication voltage adaptive adjustment circuit and a ranging chip, configuring the internal register of the chip through the detection result of the external communication voltage, thereby adaptively adjusting the communication voltage of the chip to achieve consistency of the communication voltage, which can meet different application requirements while reducing the cost of the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The present invention will be further described below with reference to the accompanying drawings and embodiments, in which:

[0035] Figure 1 A structural block diagram of a communication voltage adaptive regulation circuit provided by the utility model;

[0036] Figure 2 A circuit schematic diagram of a communication voltage adaptive regulation circuit in an embodiment provided by the utility model;

[0037] Figure 3 A circuit schematic diagram of a communication voltage adaptive regulation circuit in another embodiment provided by the utility model.

[0038] Description of Reference Numerals

[0039] Voltage detection module 10, digital module 20, register 30, interface power output module 40, I2C interface module 50, voltage division sampling unit 101, first comparison unit 102, second comparison unit 103, third comparison unit 104, fourth comparison unit 105, first level conversion circuit 106, second level conversion circuit 107, operational amplifier AMP, first resistor R1, second resistor R2, first comparator CMP1, first NOT gate INV1, second NOT gate INV2, second comparator CMP2, third NOT gate INV3, fourth NOT gate INV4. DETAILED DESCRIPTION

[0040] In order to make the technical problems, technical solutions and beneficial effects to be solved by the embodiments of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0041] It should be noted that when a component is referred to as being "fixed to" or "disposed on" another component, it can be directly on the other component or indirectly on the other component. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element. In addition, connection can be used for fixing or for circuit connection.

[0042] It should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the embodiments of the utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the utility model.

[0043] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present utility model, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.

[0044] See also Figure 1 The communication voltage adaptive regulation circuit provided by the utility model includes a voltage detection module 10, a digital module 20, a register 30, an interface power output module 40 and an I2C interface module 50. The input end of the voltage detection module 10 is connected to the I2C communication bus, and the output end of the voltage detection module 10 is connected to the digital module 20, the register 30, the interface power output module 40 and the I2C interface module 50 in sequence. The I2C interface module 50 is also connected to the I2C communication bus and the chip system to realize the communication between the internal system of the chip and the outside of the chip.

[0045] Among them, the voltage detection module 10 is used to detect the SCL / SDA voltage of the I2C communication bus and output the voltage detection result to the digital module 20; the digital module 20 is used to configure the register 30 according to the voltage detection result; the interface power output module 40 is used to change the output power supply voltage according to the configuration result of the register 30, so that its power supply voltage value is consistent with the SCL / SDA voltage value of the I2C communication bus; the I2C interface module 50 is used to convert the voltage of the I2C communication bus into the voltage required in the chip system according to the power supply voltage value.

[0046] In this embodiment, in order to adapt to the chip communication voltage of different voltage ranges, the voltage detection module 10 is first used to detect the SCL / SDA voltage of the I2C communication bus to identify the voltage range to which the communication voltage of the chip external communication system belongs, and the voltage detection result is transmitted to the digital module 20 in the form of a digital signal for logic processing, so as to configure the register 30 inside the chip; based on the configuration result of the register 30, the power supply voltage of the interface power output module 40 is adaptively adjusted, so that the power supply voltage value output to the I2C interface module 50, that is, the output value of VCCIO is consistent with the SCL / SDA voltage value of the I2C communication bus, thereby avoiding the problem of abnormal I2C interface conversion caused by the inconsistency of these two voltage values. After the output value of VCCIO is adaptively adjusted, the normal operation of the I2C interface module 50 can be ensured, the voltage of the I2C communication bus is converted into the voltage required in the chip system, and the communication voltage of the chip itself is quickly kept consistent with the communication voltage of the external system, so that the internal system of the chip and the external communication system can communicate reliably, while improving the communication reliability, the cost of the chip is also reduced, and the applicability and competitiveness of the chip are greatly improved.

[0047] Specifically, based on the requirements of the I2C communication protocol, the SDA and SCL of the I2C communication bus are both high levels during the initial waiting period, providing a reliable basis for voltage detection. Therefore, the communication voltage adaptive adjustment circuit provided in this embodiment can use the time of the initial waiting stage of the I2C communication protocol to complete the detection of the external communication voltage of the system and the adjustment of the internal communication voltage of the chip. That is to say, at the initial stage of chip power-on and the I2C is in standby mode, it can realize autonomous adjustment of its own communication voltage to keep it consistent with the communication voltage domain of the external communication system without occupying the normal communication time of the chip. While adaptively adjusting the communication voltage, it also ensures that the chip working efficiency is not affected.

[0048] In one embodiment, please refer to Figure 2 The voltage detection module 10 includes: a voltage division sampling unit 101, a first comparison unit 102 and a second comparison unit 103, the I2C communication bus is connected to the input end of the voltage division sampling unit 101, and the output end of the voltage division sampling unit 101 is connected to the input end of the first comparison unit 102 and the second comparison unit 103.

[0049] Among them, the voltage division sampling unit 101 divides the SCL voltage of the I2C communication bus and outputs the sampling voltage to the first comparison unit 102 and the second comparison unit 103; the first comparison unit 102 compares the sampling voltage with the first reference voltage and outputs a first comparison signal to the digital module 20; the second comparison unit 103 compares the sampling voltage with the second reference voltage and outputs a second comparison signal to the digital module 20.

[0050] In this embodiment, the SCL voltage of the I2C communication bus is sampled by the voltage-dividing sampling unit 101 to obtain the corresponding sampling voltage, so that the external communication unit is connected to the inside of the chip, and the sampling voltage is further compared by the first comparison unit 102 and the second comparison unit 103. Since the chip communication voltage on the market can be mainly divided into three voltage ranges:

[0051] 1. Lowest gear: 1.2V, the range can be summarized as 1.08V~1.32V (1.2V±10%);

[0052] 2. Intermediate level: 1.8V, the range is generally 1.62V-1.98V (1.8V±10%);

[0053] 3. High level gear: 3.0V, its range can be summarized as 2.6V~3.6V.

[0054] Therefore, after sampling the external communication voltage, the first reference voltage and the second reference voltage can be set appropriately based on the above three voltage ranges to compare the sampled voltages respectively, and obtain the first comparison signal VIOJUDG <1> and the second comparison signal VIOJUDG <0> The comparison result is output to the digital module 20 in the form of a digital signal (VIOJUDG<1:0>). The voltage range of the current sampling voltage can be determined by the combination of the two comparison signals. The corresponding register 30 configuration logic is preset in the digital module 20, so that the register 30 can be accurately configured based on the voltage detection result to achieve the adjustment of the internal communication voltage of the chip.

[0055] Optionally, the voltage-dividing sampling unit 101 includes: an operational amplifier AMP, a first resistor R1 and a second resistor R2; the in-phase input terminal of the operational amplifier AMP is connected to the SCL line of the I2C communication bus, and the output terminal of the operational amplifier AMP is connected to the inverting input terminal of the operational amplifier AMP and one end of the first resistor R1; the other end of the first resistor R1 serves as the output terminal of the voltage-dividing sampling unit 101, is connected to the first comparison unit 102 and the second comparison unit 103, and is also grounded through the second resistor R2.

[0056] In this embodiment, the output of the operational amplifier AMP is directly connected to the inverting input terminal of the operational amplifier AMP as a buffer circuit (buffer circuit), so that the SCL voltage of the external I2C communication bus is connected to the inside of the chip through the buffer circuit, and the SCL voltage is divided by the first resistor R1 and the second resistor R2 to obtain a sampling voltage for voltage comparison. Due to the high input impedance and low output impedance of the operational amplifier AMP, it can play the role of impedance conversion when used as a buffer to prevent the signal from being lost due to factors such as resistance and capacitance during transmission, and maintain the stability of the signal. Preferably, the first resistor R1 and the second resistor R2 are the same, that is, the resistance values ​​of the two are exactly the same, so that the sampling voltage at point A is always maintained at half of the SCL voltage, and the voltage range of the SCL voltage is accurately detected and identified in conjunction with the correspondingly set first reference voltage and second reference voltage.

[0057] Optionally, the first comparison unit 102 includes: a first comparator CMP1, a first NOT gate INV1 and a second NOT gate INV2; the output end of the voltage division sampling unit 101 is connected to the non-inverting input end of the first comparator CMP1, the inverting input end of the first comparator CMP1 is connected to a first reference voltage, and the output end of the first comparator CMP1 is connected to the input end of the first NOT gate INV1; the output end of the first NOT gate INV1 is connected to the input end of the second NOT gate INV2, and the output end of the second NOT gate INV2 serves as the output end of the first comparison unit 102.

[0058] The second comparison unit 103 includes: a second comparator CMP2, a third NOT gate INV3 and a fourth NOT gate INV4; the output end of the voltage division sampling unit 101 is connected to the non-inverting input end of the second comparator CMP2, the inverting input end of the second comparator CMP2 is connected to the second reference voltage, and the output end of the second comparator CMP2 is connected to the input end of the third NOT gate INV3; the output end of the third NOT gate INV3 is connected to the input end of the fourth NOT gate INV4, and the output end of the fourth NOT gate INV4 serves as the output end of the second comparison unit 103.

[0059] In this embodiment, the sampled voltage obtained at point A is compared with the first reference voltage and the second reference voltage respectively through two comparators, wherein the first reference voltage is greater than the second reference voltage. Since the sampled voltage at point A is always maintained at half of the SCL voltage, that is, In accordance with the three main voltage ranges of the current communication voltage, in this embodiment, the first reference voltage is preferably set to 1.2V, the second reference voltage is preferably set to 0.75V, and the voltage sources of the first comparator CMP1, the second comparator CMP2, and all the NOT gates are consistent with the voltage source of the digital module 20. AThe two voltage values ​​of 0.75V and 1.2V are compared respectively, and two NOT gates are connected in series at the output ends of the two comparators to improve the driving capability. The comparison results are output to the digital module 20 in the form of digital signals (VIOJUDG<1:0>). The digital module 20 performs logical judgment on the comparison results and accurately configures the register 30 to achieve the adjustment of the internal communication voltage of the chip.

[0060] Specifically, when the first comparison signal and the second comparison signal are both 00, the digital module 20 configures the register 30 to 00, and the interface power output module 40 outputs the first voltage according to the configuration of the register 30;

[0061] When the first comparison signal is 0 and the second comparison signal is 1, the digital module 20 configures the register 30 to 01, and the interface power output module 40 outputs the second voltage according to the configuration of the register 30;

[0062] When the first comparison signal is 1 and the second comparison signal is 0, the digital module 20 prompts that an error occurs;

[0063] When the first comparison signal and the second comparison signal are both 11, the digital module 20 configures the register 30 to 11, and the interface power output module 40 outputs the third voltage according to the configuration of the register 30.

[0064] In this embodiment, the configuration logic of the register 30 is pre-set in the digital module 20, and different configurations of the register 30 correspond to the power supply voltage value of the interface power output module 40, so that the power supply voltage value output by the module 40 can be consistent with the SCL voltage of the I2C communication bus, thereby adjusting the communication voltage of the chip and ultimately achieving consistency of the communication voltage.

[0065] When VIOJUDG<1:0> is 00, it indicates that the voltage range of SCL is V SCL <1.5V, at this time, it is judged that the external communication voltage is in the 1.2V domain, and its range can be 1.08V~1.32V (1.2V±10%), and the internal communication voltage needs to be adjusted to 1.2V. The digital module 20 configures the register 30 to 00, and the interface power output module 40 outputs the first voltage 1.2V when reading that the register 30 is configured to 00;

[0066] When VIOJUDG<1:0> is 01, it indicates that the voltage range of SCL is 1.5V <V SCL<2.4V, at this time, it is determined that the external communication voltage is in the 1.8V domain, and its range can be 1.62V-1.98V (1.8V±10%), and the internal communication voltage needs to be adjusted to 1.8V. The digital module 20 configures the register 30 to 01, and the interface power output module 40 outputs the second voltage 1.8V when reading that the register 30 is configured to 01;

[0067] When VIOJUDG<1:0> is 10, it indicates that the voltage of SCL is less than 1.5V and greater than 2.4V, which is obviously unreasonable and will not occur basically. If it occurs, the voltage of SCL may fluctuate or there may be high and low level switching. At this time, the digital module 20 needs to prompt an error to prompt relevant personnel to check the test conditions.

[0068] When VIOJUDG<1:0> is 11, it indicates that the voltage range of SCL is V SCL >2.4V, at this time it is judged that the external communication voltage is in the 2.4V domain, and its range can be 2.6V~3.6V. The internal communication voltage needs to be adjusted to 2.4V. The digital module 20 configures the register 30 to 11. When the interface power output module 40 reads that the register 30 is configured to 11, it outputs the third voltage 2.4V.

[0069] Therefore, after detecting the external communication voltage and adaptively adjusting the internal voltage, this embodiment can quickly achieve consistency between the communication voltage of the chip itself and the communication voltage of the external system, thereby greatly improving the applicability and competitiveness of the chip while improving communication reliability.

[0070] In one embodiment, please refer to Figure 3 The voltage detection module 10 includes: a third comparison unit 104 and a fourth comparison unit 105 , and the I2C communication bus is connected to the input ends of the third comparison unit 104 and the fourth comparison unit 105 .

[0071] Among them, the third comparison unit 104 compares the SCL voltage of the I2C communication bus with the third reference voltage, and outputs a third comparison signal to the digital module 20; the fourth comparison unit 105 compares the SCL voltage of the I2C communication bus with the fourth reference voltage, and outputs a fourth comparison signal to the digital module 20.

[0072] In this embodiment, the SCL line of the I2C communication bus is directly connected to two comparison units without voltage division. The third comparison unit 104 and the comparator in the fourth comparator are directly used to set the appropriate third reference voltage and fourth reference voltage to perform voltage comparison on the SCL voltage respectively, so as to obtain the third comparison signal and the fourth comparison signal. The voltage range of the current SCL voltage can also be determined by the combination of the two comparison signals, and then the register 30 is accurately configured after the comparison result is logically judged by the digital module 20, so as to realize the adaptive adjustment of the communication voltage inside the chip.

[0073] Specifically, the third reference voltage is greater than the fourth reference voltage. Similar to the previous embodiment, in conjunction with the three main voltage ranges of the current communication voltage and without the need for voltage division comparison, the third reference voltage in this embodiment is preferably set to 2.4V, and the fourth reference voltage is preferably set to 1.5V. After comparing the SCL voltage with the third reference voltage and the fourth reference voltage respectively, the voltage domain of the external communication voltage can be identified.

[0074] Furthermore, the voltage sources of the third comparison unit 104 and the fourth comparison unit 105 are greater than the voltage source of the digital module 20; the voltage detection module 10 also includes a first level conversion circuit 106 and a second level conversion circuit 107; the output of the third comparison unit 104 is connected to the input of the first level conversion circuit 106, and the output of the fourth comparison unit 105 is connected to the input of the second level conversion circuit 107.

[0075] In this embodiment, the high output voltage of the third comparison unit 104 is converted into a low voltage consistent with the voltage source of the digital module 20 by the first level conversion circuit 106, and the high output voltage of the fourth comparison unit 105 is converted into a low voltage consistent with the voltage source of the digital module 20 by the second level conversion circuit 107. When the voltage sources of the two comparison units in the voltage detection module 10 are inconsistent with the voltage source of the digital module 20, the high output voltage is converted into a low voltage consistent with the voltage source of the digital module 20 by the corresponding level conversion circuit, thereby ensuring the consistency of the voltage source of each unit and stably and reliably realizing the process of autonomously adjusting the internal communication voltage of the chip.

[0076] The utility model also provides a ranging chip, which includes a communication voltage adaptive adjustment circuit. The communication voltage adaptive adjustment circuit in the ranging chip detects the external communication voltage by using the time of the initial waiting phase of the I2C communication protocol, determines which range of the communication voltage it belongs to, and then adaptively adjusts the internal communication voltage by configuring the register inside the ranging chip, adjusts the communication voltage of the ranging chip to be consistent with the external communication voltage, and realizes the communication voltage adaptive function. Since the working process of the communication voltage adaptive adjustment circuit has been described in detail above, it will not be repeated here.

[0077] In summary, the utility model provides a communication voltage adaptive adjustment circuit and a ranging chip, wherein the communication voltage adaptive adjustment circuit includes: a voltage detection module, a digital module, a register, an interface power output module, and an I2C interface module; the voltage detection module is used to detect the SCL / SDA voltage of the I2C communication bus and output the voltage detection result to the digital module; the digital module configures the register according to the voltage detection result; the interface power output module changes the output power voltage according to the configuration result of the register so that its power voltage value is consistent with the SCL / SDA voltage value of the I2C communication bus; the I2C interface module is used to convert the voltage of the I2C communication bus into the required voltage in the chip system according to the power voltage value. The internal register of the chip is configured by the detection result of the external communication voltage, so as to adaptively adjust the communication voltage of the chip and achieve the consistency of the communication voltage, which can reduce the cost of the chip while meeting different application requirements.

[0078] The above contents are further detailed descriptions of the present invention in combination with specific preferred implementations, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For technicians in the technical field to which the present invention belongs, several equivalent substitutions or obvious variations can be made without departing from the concept of the present invention, and the performance or use is the same, which should be regarded as belonging to the protection scope of the present invention.

Claims

1. A communication voltage adaptive regulation circuit, characterized in that: include: Voltage detection module, digital module, register, interface power output module, I2C interface module; The voltage detection module is used to detect the SCL / SDA voltage of the I2C communication bus and output the voltage detection result to the digital module; The digital module configures a register according to the voltage detection result; The interface power output module changes the output power voltage according to the configuration result of the register so that the power voltage value is consistent with the SCL / SDA voltage value of the I2C communication bus; The I2C interface module is used to convert the voltage of the I2C communication bus into the voltage required in the chip system according to the power supply voltage value.

2. The communication voltage adaptive regulation circuit according to claim 1, characterized in that: The voltage detection module comprises: a voltage division sampling unit, a first comparison unit and a second comparison unit, the I2C communication bus is connected to the input end of the voltage division sampling unit, and the output end of the voltage division sampling unit is connected to the input end of the first comparison unit and the second comparison unit; The voltage division sampling unit divides the SCL voltage of the I2C communication bus and outputs the sampled voltage to the first comparison unit and the second comparison unit; The first comparison unit compares the sampled voltage with a first reference voltage and outputs a first comparison signal to a digital module; The second comparison unit compares the sampled voltage with a second reference voltage and outputs a second comparison signal to the digital module.

3. The communication voltage adaptive regulation circuit according to claim 2, characterized in that: The voltage-dividing sampling unit includes: an operational amplifier, a first resistor and a second resistor; the in-phase input terminal of the operational amplifier is connected to the SCL line of the I2C communication bus, and the output terminal of the operational amplifier is connected to the inverting input terminal of the operational amplifier and one end of the first resistor; the other end of the first resistor serves as the output terminal of the voltage-dividing sampling unit, is connected to the first comparison unit and the second comparison unit, and is also grounded through the second resistor.

4. The communication voltage adaptive regulation circuit according to claim 3, characterized in that: The first comparison unit includes: a first comparator, a first NOT gate and a second NOT gate; the output end of the voltage-dividing sampling unit is connected to the non-inverting input end of the first comparator, the inverting input end of the first comparator is connected to a first reference voltage, the output end of the first comparator is connected to the input end of the first NOT gate; the output end of the first NOT gate is connected to the input end of the second NOT gate, and the output end of the second NOT gate serves as the output end of the first comparison unit; The second comparison unit includes: a second comparator, a third NOT gate and a fourth NOT gate; the output end of the voltage division sampling unit is connected to the non-inverting input end of the second comparator, the inverting input end of the second comparator is connected to a second reference voltage, and the output end of the second comparator is connected to the input end of the third NOT gate; the output end of the third NOT gate is connected to the input end of the fourth NOT gate, and the output end of the fourth NOT gate serves as the output end of the second comparison unit.

5. The communication voltage adaptive regulation circuit according to claim 4, characterized in that: The voltage sources of the first comparator, the second comparator and all the NOT gates are consistent with the voltage source of the digital module; the first resistor and the second resistor are the same.

6. The communication voltage adaptive regulation circuit according to claim 1, characterized in that: The voltage detection module comprises: a third comparison unit and a fourth comparison unit, and the I2C communication bus is connected to input ends of the third comparison unit and the fourth comparison unit; The third comparison unit compares the SCL voltage of the I2C communication bus with a third reference voltage, and outputs a third comparison signal to the digital module; The fourth comparison unit compares the SCL voltage of the I2C communication bus with a fourth reference voltage, and outputs a fourth comparison signal to the digital module.

7. The communication voltage adaptive regulation circuit according to claim 6, characterized in that: The voltage sources of the third comparison unit and the fourth comparison unit are greater than the voltage source of the digital module; The voltage detection module further includes: a first level conversion circuit and a second level conversion circuit; The output of the third comparison unit is connected to the input of the first level conversion circuit, and is used to convert the high output voltage into a low voltage consistent with the voltage source of the digital module; The output of the fourth comparison unit is connected to the input of the second level conversion circuit, and is used to convert the high output voltage into a low voltage consistent with the voltage source of the digital module.

8. The communication voltage adaptive regulation circuit according to claim 2, characterized in that: When the first comparison signal and the second comparison signal are both 00, the digital module configures the register to 00, and the interface power output module outputs the first voltage according to the configuration of the register; When the first comparison signal is 0 and the second comparison signal is 1, the digital module configures the register to 01, and the interface power output module outputs a second voltage according to the configuration of the register; When the first comparison signal is 1 and the second comparison signal is 0, the digital module prompts that an error occurs; When the first comparison signal and the second comparison signal are both 11, the digital module configures the register to 11, and the interface power output module outputs a third voltage according to the configuration of the register.

9. The communication voltage adaptive regulation circuit according to claim 2, characterized in that: The first reference voltage is greater than the second reference voltage.

10. A distance measurement chip, characterized in that: It comprises the communication voltage adaptive regulation circuit as described in any one of claims 1-9.

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