Microcontroller

Abstract

The utility model discloses a microcontroller comprising a digital filter which comprises an input channel module, a channel control module and a filtering processing module which are in communication connection in sequence. The input channel module is used for receiving a digital signal output by the Sigma-Delta modulator; the channel control module conducts a path between any output end in the input channel module and any input end in the filtering processing module; the filtering processing module receives the digital signal through the conducted input end and carries out filtering processing on the digital signal to obtain a target digital signal. The input channel and the filter are modularly designed, so that the input end of the filtering processing module and the output end of the input channel module can be flexibly configured, the hardware utilization rate of the digital filter is improved, and the digital filter in the microcontroller can process complex tasks; and the processing capability of the microcontroller is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of integrated circuits, in particular to a microcontroller. Background Art

[0002] The sigma-delta modulation filter, also known as the Sigema-Delta (Σ-Δ) modulation filter, is an electronic device that uses oversampling technology, noise shaping technology and digital filtering technology to achieve high-precision analog-to-digital conversion processing. It is widely used in the fields of motor control and audio analysis.

[0003] In practical applications, Sigema-Delta modulation filters are usually deployed on microcontroller units (MCUs). Sigema-Delta modulation filters consist of a modulation part and a filtering part, wherein the modulation part is usually set outside the MCU chip to convert the collected analog signal into bit stream data; the filtering part is usually integrated inside the MCU chip to filter the bit stream data to obtain a digital signal.

[0004] However, the filtering part in the Sigema-Delta modulation filter only performs simple routine processing on the received bit stream data, that is, uniformly processes the bit stream data transmitted by multiple input channels in real time, and does not perform selective processing based on actual needs, which results in a waste of hardware resources and utilization. Utility Model Content

[0005] The utility model provides a microcontroller, which is used for improving the hardware utilization rate of a digital filter in the microcontroller, thereby improving the processing capability of the microcontroller.

[0006] The utility model embodiment provides a microcontroller, including a digital filter, wherein the digital filter and a Sigema-Delta modulator form a Sigema-Delta modulation filter, and the digital filter includes an input channel module, a channel control module and a filter processing module, wherein:

[0007] The input channel module, the channel control module and the filter processing module are sequentially connected in communication;

[0008] The input channel module is used to receive the digital signal output by the Sigema-Delta modulator;

[0009] The channel control module is used to conduct the path between the first output end of the input channel module and the first input end of the filtering processing module, wherein the first output end is any output end of multiple output ends of the input channel module, and the first input end is any input end of multiple input ends of the filtering processing module;

[0010] The filtering processing module is used to receive the digital signal through the first input end, and perform filtering processing on the digital signal to obtain a target digital signal.

[0011] In the microcontroller provided by the embodiment of the utility model, the input channel and the filter are modularly designed, so that the number of channels in the input channel module and the number of filters in the filter processing module can be flexibly set, and the input end of the filter processing module and the output end of the input channel module can be flexibly configured. The above settings improve the hardware utilization of the digital filter, so that the digital filter in the microcontroller can handle complex tasks, thereby improving the processing capacity of the microcontroller.

[0012] In an optional embodiment, the input channel module includes multiple first transmission channels for serially transmitting the digital signals, and the output ends of the multiple first transmission channels serve as multiple output ends of the input channel module.

[0013] In an optional embodiment, the input channel module further includes a plurality of second transmission channels for transmitting the digital signals in parallel, and the output ends of the plurality of second transmission channels serve as a plurality of output ends of the input channel module.

[0014] In the above embodiment, a first transmission channel for multiple serial transmissions can be set in the input channel module, and a second transmission channel for multiple parallel transmissions can also be set, wherein the number of channels and the channel types can be flexibly set, which is conducive to the iterative upgrade of microprocessor products.

[0015] In an optional embodiment, the filtering processing module includes a multi-channel filter, wherein:

[0016] The input end of the multi-channel filter serves as multiple input ends of the filtering processing module;

[0017] For any filter in the multi-path filter, the filter is used to filter the received digital signal to obtain the target digital signal when receiving a trigger signal.

[0018] In the above embodiment, a multi-channel filter is set in the filter processing module, and the input end of any filter can receive the digital signal transmitted by each transmission channel in the input channel module, and the filter will filter the received digital signal only when it receives the trigger signal. Since the filter selectively processes the received digital signal instead of processing the digital signal as soon as it is received, the filter realizes asymmetric signal reception and filtering processing operations, thereby achieving the purpose of saving hardware resources and utilization.

[0019] In an optional embodiment, the trigger signal includes a first trigger sub-signal;

[0020] a first filter, configured to filter the digital signal transmitted by the first path upon receiving the first trigger sub-signal;

[0021] Among them, the first filter is any one of the multiple filters, the first path is a path from the output end of the third transmission channel to the input end of the filter, and the third transmission channel is any one of the multiple first transmission channels and / or the multiple second transmission channels.

[0022] In an optional embodiment, the trigger signal further includes a second trigger sub-signal;

[0023] The first filter is used to stop processing the digital signal transmitted by the first path and filter the digital signal transmitted by the second path when receiving the second trigger sub-signal;

[0024] The second path is a path from the output end of the fourth transmission channel to the input end of the filter, and the fourth transmission channel is any one or any multiple transmission channels among the multiple first transmission channels and / or the multiple second transmission channels except the third transmission channel.

[0025] In the above embodiment, when the first filter receives the first trigger sub-signal, it performs conventional filtering processing on the digital signal transmitted by the first channel, and when the second trigger sub-signal is received, it stops processing the digital signal transmitted by the first channel and preferentially performs filtering processing on the digital signal transmitted by the second channel. That is, the first filter can not only perform conventional filtering tasks, but also perform burst tasks, and its hardware utilization rate is higher and its processing capacity is stronger.

[0026] In an optional embodiment, the second paths include multiple ones. When the first filter receives the second trigger sub-signal, the first filter performs filtering processing on the digital signals transmitted by the multiple second paths in sequence according to a preset order.

[0027] In an optional embodiment, the second paths include a plurality of paths, and when the first filter receives the second trigger sub-signal, the first filter performs filtering processing on the digital signal transmitted by a second path among the plurality of second paths.

[0028] In the above embodiment, when multiple second paths are provided, when the first filter receives the second trigger sub-signal, it can filter and process the digital signals transmitted by the multiple second paths in sequence according to a preset order, or it can filter and process only the digital signal transmitted by one of the second paths, and the processing method is flexible.

[0029] In an optional embodiment, the microcontroller further includes a beamforming module and an extreme value detection module, wherein:

[0030] The beamforming module is connected in series between the input channel module and the channel control module;

[0031] The input end of the extreme value detection module is communicatively connected to the output end of the filtering processing module.

[0032] In the above embodiment, a beamforming module and an extreme value detection module are further provided in the microcontroller to enrich the functions of the microcontroller.

[0033] In an optional embodiment, the microcontroller further includes a short circuit detection module, an analog watchdog filter module and an analog watchdog module, wherein:

[0034] The input end of the short circuit detection module and the input end of the analog watchdog filter module are both communicatively connected to the output end of the beamforming module;

[0035] The first input end of the analog watchdog module is communicatively connected to the output end of the analog watchdog filter module; the second input end of the analog watchdog module is communicatively connected to the output end of the filter processing module.

[0036] In the above embodiment, a short circuit detection module, an analog watchdog filter module and an analog watchdog module are further provided in the microcontroller to enrich the functions of the microcontroller. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0038] Figure 1A schematic diagram of an application scenario of a microcontroller provided by an embodiment of the utility model;

[0039] Figure 2 A schematic diagram of the module structure of a microcontroller provided in an embodiment of the utility model;

[0040] Figure 3 A schematic diagram of the internal structure of an input channel module provided by an embodiment of the utility model;

[0041] Figure 4 A schematic diagram of the internal structure of another input channel module provided by an embodiment of the utility model;

[0042] Figure 5 A schematic diagram of the internal structure of another input channel module provided by an embodiment of the utility model;

[0043] Figure 6 A schematic diagram of the internal structure of a filtering processing module provided by an embodiment of the utility model;

[0044] Figure 7 A schematic diagram of the internal structure of a filter provided by an embodiment of the utility model;

[0045] Figure 8 A schematic diagram of a digital filter operation process provided by an embodiment of the utility model;

[0046] Fig. 9 A schematic diagram of the internal structure of a microcontroller provided in an embodiment of the utility model;

[0047] Fig.10 A schematic diagram of the internal structure of another microcontroller provided in an embodiment of the utility model. DETAILED DESCRIPTION

[0048] In order to make the purpose, technical solution and advantages of the utility model clearer, the utility model will be further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0049] Furthermore, in the description of the embodiments of the present invention, unless otherwise specified, “ / ” means or, for example, A / B can mean A or B; the “and / or” in the text is merely a description of the association relationship of associated objects, indicating that three relationships may exist, for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, in the description of the embodiments of the present invention, “plurality” refers to two or more than two.

[0050] In the following, the terms "first" and "second" are used for descriptive purposes only and shall not be understood to imply or suggest relative importance or implicitly indicate the number of technical features indicated. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present utility model, unless otherwise specified, "multiple" means two or more.

[0051] Sigema-Delta modulation filter is an electronic device used to achieve high-precision analog-to-digital conversion processing. Compared with traditional analog-to-digital converters (ADC), such as successive approximation register ADC (SAR ADC), Sigema-Delta modulation filter is more flexible in adjusting conversion accuracy and conversion time, and can accurately control the sampling point to avoid ripple problems. Therefore, it is widely used in the fields of motor control and audio analysis.

[0052] In practical applications, the modulation part of the Sigema-Delta modulation filter is usually set outside the MCU chip to convert the collected analog signal into bit stream data; the filtering part of the Sigema-Delta modulation filter is usually integrated inside the MCU chip to filter the bit stream data to obtain a digital signal.

[0053] However, the filtering part of the Sigema-Delta modulation filter only performs simple routine processing on the received bit stream data, that is, real-time and unified processing of the bit stream data transmitted by multiple input channels, and does not selectively process according to actual needs, which will cause a waste of hardware resources and utilization. In addition, in the Sigema-Delta modulation filter of the related art, more emphasis is placed on the circuit implementation of the filtering algorithm of the filtering part, and there is no feasible way to improve the hardware utilization.

[0054] Based on this, an embodiment of the utility model provides a microcontroller to improve the hardware utilization of the digital filter in the microcontroller, thereby reducing the power consumption of the microprocessor and improving the processing capability of the microcontroller.

[0055] The purpose, features and advantages of the present invention will be further described in conjunction with the embodiments and with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0056] The following is an introduction to the application scenarios of the microcontroller provided by the utility model in conjunction with the accompanying drawings:

[0057] Figure 1 The following is a schematic diagram showing a structural application scenario of a microcontroller provided by an embodiment of the present utility model. Figure 1 As shown, the microcontroller 100 is electrically connected to the Sigema-Delta modulator 200, and a digital filter 11 is integrated in the microcontroller 100. In a specific implementation, the digital filter 11 and the Sigema-Delta modulator 200 form a Sigema-Delta modulation filter 300 for realizing high-precision analog-to-digital conversion processing.

[0058] Of course, the device provided in the embodiment of the utility model is not limited to Figure 1 The application scenarios shown can also be used in other possible application scenarios, and the embodiments of the present utility model are not limited thereto. Figure 1 The functions that can be realized by each part of the application scenario shown will be described in subsequent embodiments, and will not be described in detail here.

[0059] After introducing the application scenarios of the embodiments of the utility model, the preferred implementation modes of the utility model are further described in detail below in conjunction with the accompanying drawings. It should be understood that the preferred embodiments described herein are only used to illustrate and explain the utility model, and are not used to limit the utility model, and in the absence of conflict, the embodiments of the utility model and the features in the embodiments can be combined with each other.

[0060] The microcontroller provided by the utility model is specifically introduced below in conjunction with the accompanying drawings:

[0061] Figure 2 A schematic diagram of the module structure of a microcontroller is shown.

[0062] like Figure 2 As shown, the microcontroller 100 includes a digital filter 11 , wherein the digital filter 11 and the Sigma-Delta modulator 200 form a Sigma-Delta modulation filter 300 .

[0063] In one or more embodiments, the function of the Sigema-Delta modulation filter 300 is realized by the cooperation between the digital filter 11 integrated in the microcontroller 100 and the Sigema-Delta modulator 200 provided outside the microcontroller 100 .

[0064] like Figure 2As shown, in the microcontroller 100, the digital filter 11 includes an input channel module 111, a channel control module 112 and a filter processing module 113, and the input channel module 111, the channel control module 112 and the filter processing module 113 are sequentially connected in communication, wherein:

[0065] An input channel module 111, for receiving a digital signal output by the Sigema-Delta modulator 200;

[0066] The channel control module 112 is used to conduct the path between the first output end of the input channel module 111 and the first input end of the filter processing module 113, wherein the first output end is any output end of the multiple output ends of the input channel module 111, and the first input end is any input end of the multiple input ends of the filter processing module 113;

[0067] The filtering processing module 113 is used to receive the digital signal through the first input terminal and perform filtering processing on the digital signal to obtain a target digital signal.

[0068] In a specific implementation, the digital signal output by the Sigma-Delta modulator 200 may be a single-bit stream digital signal or a multi-bit stream digital signal, and the embodiment of the utility model does not impose any limitation on this.

[0069] In the microcontroller provided by the embodiment of the utility model, the input channel and the filter are modularly designed, so that the number of channels in the input channel module and the number of filters in the filter processing module can be flexibly set, and the input end of the filter processing module and the output end of the input channel module can be flexibly configured. The above settings improve the hardware utilization of the digital filter, so that the digital filter in the microcontroller can handle complex tasks, thereby improving the processing capacity of the microcontroller.

[0070] Figure 3 to Figure 5 FIG. 1 shows a schematic structural diagram of an input channel module in the microcontroller 100 .

[0071] In one or more embodiments, Figure 3 As shown, the input channel module 111 may include multiple first transmission channels for serially transmitting digital signals, namely Figure 3 As shown in the figure, the output ends of the multiple first transmission channels (Channel 10 ˜Channel 1i) serve as multiple output ends of the input channel module 111.

[0072] In a specific implementation, the first transmission channel (Channel 10 to Channel 1i) can be controlled by a serial transceiver to perform a serial transmission operation on a digital signal.

[0073] In one or more embodiments, Figure 4 As shown, the input channel module 111 may include multiple second transmission channels for parallel transmission of digital signals, namely Figure 4 As shown in the figure, the output ends of the multiple second transmission channels (Channel 20 to Channel 2j) serve as multiple output ends of the input channel module 111.

[0074] In a specific implementation, the second transmission channels (Channel 20 to Channel 2j) can be controlled by a parallel transceiver (Parallel Transeiver) to perform parallel transmission operations on digital signals.

[0075] In one or more embodiments, Figure 5 As shown, the input channel module 111 may include multiple first transmission channels (Channel 10 to Channel 1i) and multiple second transmission channels (Channel 20 to Channel 2j), and the output ends of the multiple first transmission channels (Channel 10 to Channel 1i) and the output ends of the multiple second transmission channels (Channel 20 to Channel 2j) together serve as multiple output ends of the input channel module 111.

[0076] In the specific implementation, Figure 5 As shown, in the input channel module 111, the first transmission channel (Channel 10 to Channel 1i) can be set as a submodule, namely, a serial transmission submodule 1111, and the second transmission channel (Channel 20 to Channel 2j) can be set as a submodule, namely, a parallel transmission submodule 1112. Through modular design, the flexibility of actual deployment is guaranteed.

[0077] It should be noted that in the embodiment of the utility model, the number and deployment method of the first transmission channels, as well as the number and deployment method of the second transmission channels, can be flexibly set according to actual applications, and the embodiment of the utility model does not impose any restrictions.

[0078] In the above embodiment, the input channel module can be provided with multiple first transmission channels for serial transmission, multiple second transmission channels for parallel transmission, or multiple first transmission channels and multiple second transmission channels at the same time. The number of channels and channel types can be flexibly set, which is conducive to the iterative upgrade of microprocessor products.

[0079] In one or more embodiments, Figure 3 to Figure 5 As shown, the channel control module 112 is connected between the input channel module 111 and the filter processing module 113. In a specific implementation, the channel control module 112 can be configured through a software program so that any output end of the input channel module 111 and any input end of the filter processing module 113 can transmit digital signals through the channel control module 112.

[0080] Figure 6 FIG. 1 is a schematic diagram showing the structure of a filtering processing module in the microcontroller 100 .

[0081] In one or more embodiments, Figure 6 As shown, the filter processing module 113 includes a multi-channel filter ( F10 ˜ F1k ), and the input ends of the multi-channel filter ( F10 ˜ F1k ) serve as multiple input ends of the filter processing module 113 .

[0082] Wherein, for any filter in the multi-channel filters (F10-F1k), the filter is used to filter the received digital signal to obtain the target digital signal when receiving the trigger signal.

[0083] In one or more embodiments, the filter may be a Sinc filter.

[0084] Taking the filtering processing module 113 including 4 filters (F10 to F13) as an example, the filtering processing module 113 is described in detail:

[0085] In the specific implementation, Figure 7 As shown, the filtering processing module 113 includes filters (F10-F13), wherein, taking the filter F10 as an example, the filter F10 includes a filtering processing unit F_P_0 and a data processing unit D_P_0, wherein:

[0086] The filter processing unit F_P_0 includes a signal receiving subunit 710, a Sinc filter (English: Sinc Filter) 711 and an integrator (English: Intergrator) 712. The signal receiving subunit 710 is used to receive a trigger signal to control the operation of the filter processing unit F_P_0; the Sinc filter 711 and the integrator 712 are used to filter the digital signal received at the current moment based on a preset oversampling rate after receiving the trigger signal, and send the processed digital signal to the subsequent data processing unit D_P_0.

[0087] The data processing unit D_P_0 includes a conversion time measurement subunit 713, a data calibration subunit 714 and a bit conversion subunit 715. The conversion time measurement subunit 713 is used to measure the conversion time of the digital signal; the data calibration subunit 714 is used to calibrate the received digital signal to ensure the accuracy of the digital signal; the bit conversion subunit 715 is used to perform bit conversion on the received digital signal, such as converting a 4-bit digital signal into an 8-bit digital signal to adapt it to the input requirements of subsequent functional modules.

[0088] Similarly, the structures of other filters can be set with reference to the structure of the filter F10. In addition, the structure of the above filter is only a feasible example, and filters with other structures can also be used, and the embodiment of the utility model does not impose any limitation on this.

[0089] In the above embodiment, a multi-channel filter is set in the filter processing module, and the input end of any filter can receive the digital signal transmitted by each transmission channel in the input channel module, and the filter will filter the received digital signal only when it receives the trigger signal. Since the filter selectively processes the received digital signal instead of processing the digital signal as soon as it is received, the filter realizes asymmetric signal reception and filtering processing operations, thereby achieving the purpose of saving hardware resources and utilization.

[0090] Taking any filter in the filter processing module 113 as an example, the working principle of the filter in the filter processing module 113 is described in detail below:

[0091] In order to improve the hardware resource utilization of the filter and enable it to undertake more complex processing tasks, two trigger signals are configured for the filter, as follows:

[0092] In one or more embodiments, the trigger signal includes a first trigger sub-signal and a second trigger sub-signal, wherein the first trigger sub-signal is used to instruct the filter to perform conventional filtering processing, and the second trigger sub-signal is used to instruct the filter to perform burst filtering processing.

[0093] In one or more embodiments, any transmission channel in the input channel module 111 can be set as the third transmission channel, wherein the filter performs conventional filtering processing on the digital signal output by the third transmission channel. A first path is configured for the filter through a software program, and the first path is the path from the output end of the third transmission channel to the input end of the filter; when the filter receives the first trigger sub-signal, the digital signal transmitted by the first path is filtered.

[0094] In a specific implementation, when the filter receives the first trigger sub-signal, it continuously filters the digital signal transmitted by the first channel. Subsequently, the control of the first trigger sub-signal is no longer needed. The filter processes the digital signal transmitted by the first channel in real time until it receives an indication signal for instructing to stop filtering.

[0095] In one or more embodiments, any one or more transmission channels in the input channel module 111 except the third transmission channel can be set as the fourth transmission channel, wherein the priority of the fourth transmission channel is higher than the third transmission channel, and the filter performs burst filtering on the digital signal output by the fourth transmission channel.

[0096] In addition, at least one second path can be configured for the filter through a software program, and the second path is the path from the output end of the fourth transmission channel to the input end of the filter; when the filter receives the second trigger sub-signal, it stops processing the digital signal transmitted by the first path, and filters the digital signal transmitted by the second path.

[0097] In a specific implementation, when the filter receives the second trigger sub-signal, it will immediately stop processing the digital signal transmitted by the first channel, interrupt the regular filtering process, and give priority to filtering the digital signal transmitted by the second channel. After completing the processing of the digital signal transmitted by the second channel, it will continue to process the digital signal transmitted by the first channel.

[0098] Through the above method, the injection function is configured for the transmission channel, so that the filter can receive the digital signal input by any transmission channel at any time. In this way, the filter can not only perform conventional filtering tasks, but also perform burst tasks, realizing time division multiplexing of the filter, with higher hardware utilization and stronger processing capability.

[0099] When multiple fourth transmission channels are set, multiple second paths are configured for the filter accordingly. At this time, the filter can perform the burst filtering task in the following manner:

[0100] In one or more embodiments, when the filter receives the second trigger sub-signal, the filter will filter the digital signals transmitted by the plurality of second paths in sequence according to a preset order.

[0101] In a specific implementation, a scanning function can be configured for the filter through a software program. When the filter is configured to scan, the filter receives a second trigger sub-signal once and can filter multiple digital signals transmitted by the second channels in sequence according to a preset order, thereby improving data processing efficiency.

[0102] In one or more embodiments, when the filter receives the second trigger sub-signal, the filter performs filtering processing on a digital signal transmitted by a second path among the plurality of second paths.

[0103] In a specific implementation, when the filter is configured not to scan, the filter receives the second trigger sub-signal once and only filters the digital signal transmitted by one of the multiple second paths; when the filter receives the second trigger sub-signal again, it filters the digital signal transmitted by the next second path until all the digital signals transmitted by the second paths are processed, thereby achieving flexible control of data processing.

[0104] In the above embodiment, when multiple second paths are provided, when the filter receives the second trigger sub-signal, the digital signals transmitted by the multiple second paths can be filtered in sequence according to a preset order, or only the digital signal transmitted by one of the second paths can be filtered, and the processing method is flexible.

[0105] Based on the description in the above embodiment, taking any filter in the filter processing module 113 as an example, the overall working process of the digital filter 11 is introduced. Figure 8 As shown, the following steps are included:

[0106] Step S801, according to actual business requirements, one transmission channel in the input channel module 111 is set as the third transmission channel, and multiple transmission channels in the remaining transmission channels are set as the fourth transmission channel;

[0107] Step S802, configuring a first path and multiple second paths for the filter, and configuring the second paths to have a higher priority than the first paths;

[0108] Step S803, the input channel module 111 receives the digital signal from the Sigema-Delta modulator 200;

[0109] Step S804, the channel control module 112 controls the first channel to be turned on;

[0110] Step S805, the filter receives the first trigger sub-signal and continuously filters the received digital signal transmitted by the first channel;

[0111] Step S806, the filter receives a second trigger sub-signal;

[0112] Step S807, the filter identifies whether it is in scanning mode, if so, execute step S808, otherwise, execute step S809;

[0113] Step S808, the channel control module 112 controls the plurality of second channels to be turned on in sequence, the filter suspends processing of the digital signal transmitted by the first channel, and processes the digital signals transmitted by the plurality of second channels in sequence;

[0114] Step S809, the channel control module 112 controls a second channel to be turned on, the filter stops processing the digital signal transmitted by the first channel, and processes a digital signal transmitted by the second channel;

[0115] Step S810, the filter identifies whether the digital signal transmitted by the second path has been processed, if so, execute step S811, otherwise, execute step S809;

[0116] Step S811: The filter continues to process the digital signal transmitted by the first path until receiving instruction information instructing to stop processing.

[0117] In the above embodiment, the input channel and the filter are modularly designed to be independent of each other, thereby ensuring flexibility in actual deployment. In addition to the above-mentioned digital filter 11, other functional modules can be integrated in the microcontroller 100 to make the functions of the microcontroller 100 more comprehensive.

[0118] In one or more embodiments, Fig. 9 As shown, the microcontroller 100 may further include a beamforming (English: pulse skipper) module 12, which is connected in series between the input channel module 111 and the channel control module 112. The beamforming module 12 is used to perform beamforming related operations.

[0119] In one or more embodiments, Fig. 9 As shown, the microcontroller 100 may further include a short circuit detection module 13, the input end of the short circuit detection module 13 is communicatively connected with the output end of the beamforming module 12. The short circuit detection module 13 is used to perform related operations of short circuit current detection.

[0120] In a specific implementation, the short-circuit detection module 13 may include a multi-channel short-circuit detection unit, which is used to perform short-circuit current detection on the multi-channel digital signals output by the beamforming module 12 to ensure the safety and reliability of the microcontroller 100. Among them, any feasible circuit implementation method can be used in the short-circuit detection module 13, and the embodiment of the utility model does not impose any limitation on this.

[0121] In one or more embodiments, Fig. 9 As shown, the microcontroller 100 may further include an analog watchdog filter module 14 and an analog watchdog module 15, wherein:

[0122] The input end of the analog watchdog filter module 14 is communicatively connected to the output end of the beamforming module 12 , the output end of the analog watchdog filter module 14 is communicatively connected to the first input end of the analog watchdog module 15 , and the second input end of the analog watchdog module 15 is communicatively connected to the output end of the filter processing module 113 .

[0123] In a specific implementation, the analog watchdog filter module 14 may include a multi-channel filter processing unit for filtering the multi-channel digital signals output by the beamforming module 12. The analog watchdog module 15 may include a multi-channel signal monitoring unit for monitoring the digital signals output by the analog watchdog filter module 14 and the target digital signals output by the filter processing module 113 to ensure the stability and reliability of the microcontroller 100.

[0124] In one or more embodiments, Fig. 9 As shown, the microcontroller 100 may further include an extreme value detection module 16, the input end of the extreme value detection module 16 is communicatively connected to the output end of the filtering processing module 113. The extreme value detection module 16 is used to perform related operations of extreme value detection of digital signals, wherein the extreme value may be a maximum value or a minimum value.

[0125] In a specific implementation, the extreme value detection module 16 may include multiple extreme value detection units for performing extreme value detection on the target digital signal output by the filtering processing module 113 to ensure the safety and reliability of the microcontroller 100 .

[0126] In one or more embodiments, Fig. 9 As shown, the microcontroller 100 further includes a control module 17 for overall control and coordination of various functions of the microcontroller 100 .

[0127] In the above embodiment, one or more of a beamforming module, a short circuit detection module, an analog watchdog filter module, an analog watchdog module and an extreme value detection module may also be provided in the microcontroller. The configuration methods of each module in the microcontroller are rich, and each module can flexibly select the transmission channel of the digital signal to realize flexible configuration of the input source, thereby enriching the functions of the microcontroller.

[0128] In one or more embodiments, Fig.10 As shown, the microcontroller 100 can communicate with other external devices through an Advance Peripheral Bus (APB BUS) and transmit the target digital signal output by the filtering processing module 113 to the external device through the APB BUS for subsequent processing.

[0129] In addition, in the embodiments of the present invention, other essential components of the microcontroller should be understood by those skilled in the art and will not be described in detail herein, nor should they be used as limitations to the present invention.

[0130] Although the preferred embodiments of the present invention have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present invention.

[0131] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A microcontroller, characterized in that: It includes a digital filter, the digital filter and the delta-sigma Sigema-Delta modulator form a Sigema-Delta modulation filter, and the digital filter includes an input channel module, a channel control module and a filter processing module, wherein: The input channel module, the channel control module and the filter processing module are sequentially connected in communication; The input channel module is used to receive the digital signal output by the Sigema-Delta modulator; The channel control module is used to conduct the path between the first output end of the input channel module and the first input end of the filtering processing module, wherein the first output end is any output end of multiple output ends of the input channel module, and the first input end is any input end of multiple input ends of the filtering processing module; The filtering processing module is used to receive the digital signal through the first input end, and perform filtering processing on the digital signal to obtain a target digital signal.

2. The microcontroller according to claim 1, characterized in that The input channel module comprises a plurality of first transmission channels for serially transmitting the digital signals, and the output ends of the plurality of first transmission channels serve as a plurality of output ends of the input channel module.

3. The microcontroller according to claim 2, characterized in that The input channel module further comprises a plurality of second transmission channels for transmitting the digital signals in parallel, and the output ends of the plurality of second transmission channels serve as a plurality of output ends of the input channel module.

4. The microcontroller according to claim 3, characterized in that The filtering processing module includes a multi-channel filter, wherein: The input end of the multi-channel filter serves as multiple input ends of the filtering processing module; For any filter in the multi-path filter, the filter is used to filter the received digital signal to obtain the target digital signal when receiving a trigger signal.

5. The microcontroller according to claim 4, characterized in that The trigger signal includes a first trigger sub-signal; A first filter, configured to filter the digital signal transmitted by the first path when receiving the first trigger sub-signal; Among them, the first filter is any one of the multiple filters, the first path is a path from the output end of the third transmission channel to the input end of the filter, and the third transmission channel is any one of the multiple first transmission channels and / or the multiple second transmission channels.

6. The microcontroller according to claim 5, characterized in that The trigger signal also includes a second trigger sub-signal; The first filter is used to stop processing the digital signal transmitted by the first path and filter the digital signal transmitted by the second path when receiving the second trigger sub-signal; The second path is a path from the output end of the fourth transmission channel to the input end of the filter, and the fourth transmission channel is any one or any multiple transmission channels among the multiple first transmission channels and / or the multiple second transmission channels except the third transmission channel.

7. The microcontroller according to claim 6, characterized in that The second paths include a plurality of paths. When the first filter receives the second trigger sub-signal, the first filter performs filtering processing on the digital signals transmitted by the plurality of second paths in sequence according to a preset order.

8. The microcontroller according to claim 6, characterized in that The second paths include a plurality of paths. When the first filter receives the second trigger sub-signal, the first filter performs filtering processing on the digital signal transmitted by one of the plurality of second paths.

9. The microcontroller according to any one of claims 1 to 8, characterized in that: It also includes a beamforming module and an extreme value detection module, wherein: The beamforming module is connected in series between the input channel module and the channel control module; The input end of the extreme value detection module is communicatively connected to the output end of the filtering processing module.

10. The microcontroller according to claim 9, characterized in that It also includes a short circuit detection module, an analog watchdog filter module and an analog watchdog module, wherein: The input end of the short circuit detection module and the input end of the analog watchdog filter module are both communicatively connected to the output end of the beamforming module; The first input end of the analog watchdog module is communicatively connected to the output end of the analog watchdog filter module; the second input end of the analog watchdog module is communicatively connected to the output end of the filter processing module.

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