Chip type temperature compensation attenuator with low standing-wave ratio

Abstract

The utility model discloses a low standing-wave ratio chip type temperature compensation attenuator. Comprising a ceramic substrate, two first electrodes arranged on one side of the ceramic substrate in a spaced mode, a second electrode arranged on the other side of the ceramic substrate and opposite to the two first electrodes, two film-shaped resistors arranged between the two first electrodes in a spaced mode, and two conductive electrodes connected between the film-shaped resistors and the second electrode respectively. The connecting electrode is arranged between the two film-shaped resistors, the back electrode is arranged on the bottom surface of the ceramic substrate and is respectively connected with the first electrode and the second electrode, and the ink encapsulation layer is arranged on the top surfaces of the two film-shaped resistors and the two conductive electrodes; according to the temperature compensation attenuator, by optimizing the number and configuration of the resistors, impedance matching of the temperature compensation attenuator is improved, return loss is reduced, self-excitation is avoided, a better temperature compensation effect is achieved, and the manufacturing cost is reduced on the premise that the reliability of the temperature compensation attenuator is improved.

Description

Technical Field

[0001] The utility model belongs to the field of temperature compensation attenuator preparation, and in particular relates to a low standing wave ratio chip type temperature compensation attenuator. Background Art

[0002] As a new type of microwave electronic component, the temperature compensation attenuator can directly sense the temperature change of the power amplifier and easily compensate the temperature characteristics of the power amplifier in real time. It is used between multi-stage power amplifiers to isolate the two adjacent power stages. It has been widely used in 5G communication base stations, microwave power amplifiers, low noise amplifiers, T / R components, active modules and other products. The structure of the temperature compensation attenuator is generally composed of thermistors to form a variety of port networks such as T-type, π-type, cross-type, and II-type.

[0003] At present, temperature-compensated attenuators mainly use metal thick film back electrodes, and there is a common problem of too high standing wave ratio in specific frequency bands. The standing wave ratio is a parameter that represents the size of the standing wave component on the transmission line. Too high a standing wave ratio will lead to power drop, and in severe cases it will cause product failure. Further improvement is needed. Utility Model Content

[0004] The utility model aims to overcome the shortcomings of the prior art and provide a low standing wave ratio chip type temperature compensation attenuator.

[0005] The utility model adopts the following technical solutions:

[0006] A low standing wave ratio chip-type temperature compensation attenuator comprises a ceramic substrate, two first electrodes spaced apart on one side of the ceramic substrate, a second electrode disposed on the other side of the ceramic substrate and opposite to the two first electrodes, two film resistors spaced apart between the two first electrodes, two conductive electrodes respectively connected between the film resistors and the second electrodes, a connecting electrode disposed between the two film resistors, a back electrode disposed on the bottom surface of the ceramic substrate and connected to the first electrode and the second electrode respectively, and an ink encapsulation layer disposed on the top surfaces of the two film resistors and the two conductive electrodes.

[0007] Furthermore, the first electrode includes a first surface electrode disposed on the top surface of the ceramic substrate and a first side electrode disposed on the side surface of the ceramic substrate and connecting the first surface electrode and the back electrode, and the first surface electrode is connected to the opposite film resistor.

[0008] Furthermore, a connection portion connected to the film resistor is formed on the opposite surface of the first surface electrode and the film resistor.

[0009] Furthermore, the width of the film resistor is smaller than the width of the first surface electrode, and the length of the first surface electrode is smaller than half the length of the ceramic substrate.

[0010] Furthermore, the width of the connecting electrode is smaller than the width of the film resistor.

[0011] Furthermore, the conductive electrode is arranged between the film resistor and the second electrode in a zigzag manner.

[0012] Furthermore, the conductive electrode includes a first vertical segment connected to the film-like resistor, a first horizontal segment vertically connected to the first vertical segment and extending outward, a second vertical segment vertically connected to the first horizontal segment, a second horizontal segment vertically connected to the second vertical segment and extending inward, and a third vertical segment connected between the second horizontal segment and the second electrode.

[0013] Furthermore, the second electrode includes a second surface electrode disposed on the top surface of the ceramic substrate opposite to the two first surface electrodes and a second side electrode connected between the second surface electrode and the back electrode.

[0014] Furthermore, the length of the second surface electrode is equal to the length of the ceramic substrate.

[0015] Furthermore, the ceramic substrate is a beryllium oxide ceramic substrate.

[0016] From the above description of the utility model, it can be seen that compared with the prior art, the beneficial effects of the utility model are: the temperature-compensated attenuator prepared in the present application has a length of 2.00mm±0.12mm, a width of 1.25mm±0.12mm, and a thickness of 0.28mm±0.07mm; the nominal attenuation accuracy is 1~5dB; the attenuation accuracy is ±0.5dB; the attenuation temperature coefficient is -0.003~-0.007dB / dB / ℃; the allowable deviation of the attenuation temperature coefficient is ±0.001dB / dB / ℃; under the conditions of ambient temperature of 25℃ and frequency of 1GHz, the standing wave ratio is ≤1.30 and the rated power is 0.5W; wherein, by optimizing the number and configuration of resistors to improve the impedance matching of the temperature-compensated attenuator and reduce the return loss, thereby avoiding self-excitation, so as to achieve better temperature compensation effect, and reduce the manufacturing cost while improving the reliability of the temperature-compensated attenuator. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a schematic diagram of the front structure of the temperature compensation attenuator;

[0018] Figure 2 It is a schematic diagram of the back structure of the temperature compensation attenuator;

[0019] Figure 3 A schematic diagram of the structure of the temperature compensation attenuator omitting the ink encapsulation layer;

[0020] Figure 4 The standing wave ratio of the utility model changes with temperature;

[0021] In the figure, 1-ceramic substrate, 2-first electrode, 3-second electrode, 4-film resistor, 5-conductive electrode, 6-connecting electrode, 7-ink encapsulation layer, 8-back electrode, 21-first surface electrode, 22-first side electrode, 23-connecting part, 31-second surface electrode, 32-second side electrode, 51-first vertical segment, 52-first horizontal segment, 53-second vertical segment, 54-second horizontal segment, 55-third vertical segment. DETAILED DESCRIPTION

[0022] The present invention is further described below through specific implementation methods.

[0023] Reference Figures 1 to 4 As shown, a low standing wave ratio chip temperature compensation attenuator includes a ceramic substrate 1, a back electrode, two first electrodes 2, a second electrode 3, two film resistors 4, two conductive electrodes 5, a connecting electrode 6 and an ink encapsulation layer 7.

[0024] The ceramic substrate 1 is a beryllium oxide ceramic substrate.

[0025] The back electrode 8 is disposed on the back side of the ceramic substrate 1 . Specifically, the back electrode 8 has an area that is the same as the bottom area of ​​the ceramic substrate 1 and completely covers the back side of the ceramic substrate 1 .

[0026] Two first electrodes 2 are arranged at intervals on one side of the ceramic substrate 1. The first electrode 2 includes a first surface electrode 21 arranged on the top surface of the ceramic substrate 1 and a first side electrode 22 arranged on the side of the ceramic substrate 1 to connect the first surface electrode 21 and the back electrode. Furthermore, the length of the first surface electrode 21 is less than half the length of the ceramic substrate 1.

[0027] The second electrode 3 is arranged on the other side of the ceramic substrate 1 opposite to the two first electrodes 2, including a second surface electrode 31 arranged on the top surface of the ceramic substrate 1 opposite to the two first surface electrodes 21 and a second side electrode 32 arranged on the side of the ceramic substrate 1 and connected between the second surface electrode 31 and the back electrode. Specifically, the length of the second surface electrode 31 is equal to the length of the ceramic substrate 1.

[0028] Two film resistors 4 are arranged at intervals on the top surface of the ceramic substrate 1 and between the two first electrodes 2. The film resistors 4 are made of positive temperature coefficient thermistor slurry, wherein the positive temperature coefficient thermistor slurry adopts R-300-A series slurry whose resistance increases with increasing temperature; specifically, a connecting portion 23 connected to the film resistor 4 is formed on the opposite surface of the first surface electrode 21 and the film resistor 4; further, the width of the film resistor 4 is smaller than the width of the first surface electrode 21.

[0029] The two conductive electrodes 5 are respectively connected between the film resistor 4 and the relative second electrode 3. The conductive electrode 5 includes a first vertical segment 51 connected to the film resistor 4, a first horizontal segment 52 vertically connected to the first vertical segment 51 and extending outward, a second vertical segment 53 vertically connected to the first horizontal segment 52, a second horizontal segment 54 vertically connected to the second vertical segment 53 and extending inward, and a third vertical segment 55 connected between the second horizontal segment 54 and the second electrode 3. By limiting the structure of the conductive electrode 5 to increase the path length of the current, the resistance value can be increased while reducing the number of resistors and without changing the resistor material; at the same time, the structure can also reduce the standing wave ratio of the prepared temperature compensation attenuator to meet the required requirements.

[0030] The connecting electrode 6 is disposed between the two film resistors 4 . Specifically, the width of the connecting electrode 6 is smaller than the width of the film resistor 4 .

[0031] The ink encapsulation layer 7 is arranged on the top surfaces of the two film resistors 4 and the two conductive electrodes 5 to protect the conductive electrodes 5 and the film resistors 4. Specifically, the ink encapsulation layer 7 is arranged in a T-shape on the surface of the ceramic substrate 1; further, the thickness of the ink encapsulation layer 7 is not less than 30um.

[0032] The temperature-compensated attenuator prepared in the present application has a length of 2.00mm±0.12mm, a width of 1.25mm±0.12mm, and a thickness of 0.28mm±0.07mm; the nominal attenuation accuracy is 1~5dB; the attenuation accuracy is ±0.5dB; the attenuation temperature coefficient is -0.003~-0.007dB / dB / ℃; the allowable deviation of the attenuation temperature coefficient is ±0.001dB / dB / ℃; under the conditions of ambient temperature of 25℃ and frequency of 1GHz, the standing wave ratio is ≤1.30 and the rated power is 0.5W; wherein, by optimizing the number and configuration of resistors to improve the impedance matching of the temperature-compensated attenuator and reduce the return loss, thereby avoiding self-excitation, so as to achieve better temperature compensation effect, and reduce the manufacturing cost while improving the reliability of the temperature-compensated attenuator.

[0033] The above description is only a preferred embodiment of the present invention, and therefore cannot be used to limit the scope of implementation of the present invention. That is, equivalent changes and modifications made according to the scope of application of the present invention and the contents of the specification should still fall within the scope covered by the present invention.

Claims

1. A low standing wave ratio chip temperature compensation attenuator, characterized in that: The invention comprises a ceramic substrate, two first electrodes spaced apart on one side of the ceramic substrate, a second electrode disposed on the other side of the ceramic substrate opposite to the two first electrodes, two film resistors spaced apart between the two first electrodes, two conductive electrodes respectively connected between the film resistors and the second electrodes, a connecting electrode disposed between the two film resistors, a back electrode disposed on the bottom surface of the ceramic substrate and connected to the first electrode and the second electrode respectively, and an ink encapsulation layer disposed on the top surfaces of the two film resistors and the two conductive electrodes.

2. The low standing wave ratio chip temperature compensation attenuator according to claim 1, characterized in that: The first electrode includes a first surface electrode disposed on the top surface of the ceramic substrate and a first side electrode disposed on the side surface of the ceramic substrate and connecting the first surface electrode and the back electrode. The first surface electrode is connected to an opposite film resistor.

3. The low standing wave ratio chip temperature compensation attenuator according to claim 2, characterized in that: A connection portion connected to the film resistor is formed on the surface of the first surface electrode facing the film resistor.

4. The low standing wave ratio chip temperature compensation attenuator according to claim 2, characterized in that: The width of the film resistor is smaller than the width of the first surface electrode, and the length of the first surface electrode is smaller than half the length of the ceramic substrate.

5. The low standing wave ratio chip temperature compensation attenuator according to claim 4, characterized in that: The width of the connecting electrode is smaller than the width of the film resistor.

6. The low standing wave ratio chip temperature compensation attenuator according to claim 1, characterized in that: The conductive electrode is arranged between the film resistor and the second electrode in a zigzag manner.

7. The low standing wave ratio chip-type temperature compensation attenuator according to claim 6, characterized in that: The conductive electrode includes a first vertical segment connected to the film-like resistor, a first horizontal segment vertically connected to the first vertical segment and extending outward, a second vertical segment vertically connected to the first horizontal segment, a second horizontal segment vertically connected to the second vertical segment and extending inward, and a third vertical segment connected between the second horizontal segment and the second electrode.

8. The low standing wave ratio chip temperature compensation attenuator according to claim 1, characterized in that: The second electrode includes a second surface electrode disposed on the top surface of the ceramic substrate and opposite to the two first surface electrodes, and a second side electrode connected between the second surface electrode and the back electrode.

9. The low standing wave ratio chip temperature compensation attenuator according to claim 8, characterized in that: The length of the second surface electrode is equal to the length of the ceramic substrate.

10. The low standing wave ratio chip temperature compensation attenuator according to claim 1, characterized in that: The ceramic substrate is a beryllium oxide ceramic substrate.

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