DDR5 memory module test circuit and device

Abstract

The utility model discloses a DDR5 memory module test circuit and device. The circuit comprises a socket module, a main control module, a power supply module and a switch module, the socket module is provided with different types of DDR5 sockets, and the different types of DDR5 sockets are used for plugging different types of DDR5 memory modules; the power module is connected to the socket module and used for supplying power to the socket module; the main control module is connected to the socket module and is used for receiving an instruction of an upper computer and outputting different driving control signals; and the switch module is connected to the main control module and the socket module, and is used for selecting to turn on power supplies of different types of DDR5 sockets according to different driving control signals, so that the main control module tests the DDR5 memory module on the electrified DDR5 socket according to an instruction. The DDR5 memory module testing circuit provided by the utility model can support testing of different types of DDR5 memory modules, the testing device does not need to be replaced when the different types of DDR5 memory modules are tested, the testing is more convenient, and the testing efficiency is higher.

Description

Technical Field

[0001] The utility model relates to the technical field of DDR5 testing, and in particular to a DDR5 memory module testing circuit and device. Background Art

[0002] With the development of computer technology, the requirements for memory capacity and various aspects are getting higher and higher. DDR5 is the fifth generation of double data rate synchronous dynamic random access memory, also known as DDR5 SDRAM, which is a high-bandwidth computer memory specification. Compared with DDR4, DDR5 standard has stronger performance and lower power consumption. It is currently widely used in computer equipment. There are many types of DDR5 memory modules, such as the common SODIMM, UDIMM, RDIMM, etc., and the pins of different types of DDR5 memory modules are different. Therefore, when testing DDR5 memory modules, each type of DDR5 memory module needs to be manually replaced with a device with a corresponding type of test socket, which is very troublesome. If different types of DDR5 memory modules need to be tested in batches, the test efficiency becomes very low. Utility Model Content

[0003] The embodiments of the utility model provide a DDR5 memory module testing circuit and device, which solve the problem in the prior art that different types of DDR5 memory modules need to be tested with different testing devices.

[0004] In a first aspect, an embodiment of the utility model provides a DDR5 memory module test circuit, which includes:

[0005] A power module, connected to the socket module, for supplying power to the socket module;

[0006] A main control module, connected to the socket module, for receiving instructions from the host computer and outputting different drive control signals;

[0007] The switch module is connected to the main control module and the socket module, and is used to select and turn on the power of the different types of DDR5 sockets according to the different driving control signals, so that the main control module tests the DDR5 memory module on the powered-on DDR5 socket according to the instructions.

[0008] In the DDR5 memory module test circuit provided in an embodiment of the utility model, the switch module includes a driving unit and a switching device, the driving unit is connected to the main control module and the switching device, and the switching device is connected to the socket module, wherein the driving unit is used to receive the driving control signal to drive the switching device to output a switching signal to turn on the power supply of the different types of DDR5 sockets.

[0009] In the DDR5 memory module test circuit provided in an embodiment of the utility model, the driving unit includes a driving chip, the switching device includes a plurality of relays, the input end of the driving chip is connected to the output end of the main control module, the output end of the driving chip is connected to the negative contact of the coil of each of the relays, the positive contact of the coil of each of the relays is connected to the first power supply, the common end contact of each of the relays is respectively connected to the power control end of the different types of DDR5 sockets, and the normally open contact of each of the relays is connected to the second power supply.

[0010] In the DDR5 memory module test circuit provided in the embodiment of the utility model, the driver chip is a ULN2003A chip.

[0011] In the DDR5 memory module test circuit provided in an embodiment of the present invention, the different types of DDR5 sockets include SODIMM sockets, UDIMM sockets, and RDIMM sockets.

[0012] In the second aspect, an embodiment of the utility model provides a DDR5 memory module testing device, which includes a chassis and a DDR5 memory module testing circuit, and the DDR5 memory module testing circuit is arranged in the chassis; wherein, the DDR5 memory module testing circuit is any one of the DDR5 memory module testing circuits provided in the embodiment of the utility model.

[0013] In the DDR5 memory module testing device provided by an embodiment of the utility model, the DDR5 socket is arranged on the upward side of the chassis, and the DDR5 memory module testing device also includes an auxiliary plug-in mechanism, which is arranged on the chassis and adjacent to the DDR5 socket, wherein the auxiliary plug-in mechanism is used to press the DDR5 memory module toward the DDR5 socket in a vertical direction so that the DDR5 memory module is embedded in the DDR5 socket.

[0014] In the DDR5 memory module testing device provided in an embodiment of the utility model, the auxiliary plug-in mechanism includes a first pressing module and a second pressing module, and the first pressing module and the second pressing module are respectively arranged adjacent to two opposite sides in the long side direction of the DDR5 socket, wherein the first pressing module and the second pressing module are used to press the two edges of the upward side of the DDR5 memory module so that the DDR5 memory module is embedded in the DDR5 socket.

[0015] In the DDR5 memory module testing device provided by an embodiment of the utility model, a first connecting part and a second connecting part are spaced apart on an upward side of the chassis, the DDR5 socket is arranged between the first connecting part and the second connecting part, the first pressing module and the second pressing module both include pressing arms and rollers, the two pressing arms are rotatably installed on the first connecting part and the second connecting part respectively, the two rollers are rotatably installed on the opposite sides of the two pressing arms respectively, wherein the two pressing arms are used to rotate towards each other to drive the two rollers to press against the top of the DDR5 memory module so that the DDR5 memory module is embedded in the DDR5 socket.

[0016] In the DDR5 memory module testing device provided in an embodiment of the utility model, the DDR5 memory module testing device also includes a scanning device, which is arranged on the chassis and adjacent to the DDR5 socket, and an identification mark is provided on the DDR5 memory module, wherein the scanning device is used to scan the identification mark.

[0017] The embodiment of the utility model provides a DDR5 memory module test circuit and device, the circuit includes a socket module, a main control module, a power module and a switch module; the socket module is provided with different types of DDR5 sockets, and the different types of DDR5 sockets are used to plug different types of DDR5 memory modules; the main control module is connected to the socket module, and is used to receive instructions from a host computer and output different drive control signals; the power module is connected to the socket module, and is used to power the socket module; the switch module is connected to the main control module and the socket module, and is used to select to turn on the power of the different types of DDR5 sockets according to the different drive control signals, so that the main control module tests the DDR5 memory module on the powered-on DDR5 socket according to the instructions. The DDR5 memory module test circuit provided by the present application can support different types of DDR5 memory module tests, and there is no need to replace the test device to test different types of DDR5 memory modules, so that the test is more convenient and the test efficiency is higher. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the utility model, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0019] Figure 1 A structural block diagram of a DDR5 memory module test circuit provided by an embodiment of the utility model;

[0020] Figure 2 A structural block diagram of a DDR5 memory module test circuit provided by an embodiment of the utility model;

[0021] Figure 3 A circuit diagram of a main control module provided by an embodiment of the utility model;

[0022] Figure 4 A partial circuit diagram of a switch module provided in an embodiment of the utility model;

[0023] Figure 5 A partial circuit diagram of a switch module provided in an embodiment of the utility model;

[0024] Figure 6 A partial circuit diagram of a switch module provided in an embodiment of the utility model;

[0025] Figure 7 A partial circuit diagram of a switch module provided in an embodiment of the utility model;

[0026] Figure 8 A partial circuit diagram of a switch module provided in an embodiment of the utility model;

[0027] Fig. 9 A partial circuit diagram of a power module provided in an embodiment of the utility model;

[0028] Fig.10 A partial circuit diagram of a socket module provided in an embodiment of the utility model;

[0029] Fig.11 A partial circuit diagram of a socket module provided in an embodiment of the utility model;

[0030] Fig.12 A partial circuit diagram of a socket module provided in an embodiment of the utility model;

[0031] Fig.13 A three-dimensional structural diagram of a DDR5 memory module testing device provided by an embodiment of the utility model;

[0032] Fig.14 A top view of a DDR5 memory module testing device provided by an embodiment of the utility model;

[0033] Fig.15 A side view of a DDR5 memory module testing device provided by an embodiment of the utility model;

[0034] Fig.16 Another side view of the DDR5 memory module testing device provided by an embodiment of the utility model;

[0035] Fig.17A schematic diagram of a flow chart of a DDR5 memory module testing method provided by an embodiment of the present utility model;

[0036] Fig.18 A schematic diagram of a sub-process of a DDR5 memory module testing method provided by an embodiment of the utility model;

[0037] Fig.19 A schematic diagram of a sub-process of a DDR5 memory module testing method provided by an embodiment of the utility model;

[0038] Fig. 20 A schematic diagram of a sub-process of a DDR5 memory module testing method provided by an embodiment of the utility model;

[0039] Fig.21 A schematic diagram of a sub-process of a DDR5 memory module testing method provided by an embodiment of the utility model;

[0040] The reference numerals in the figures are:

[0041] 10. Socket module; 101. DDR5 socket; 20. Main control module; 30. Power module; 40. Switch module; 41. Drive unit; 42. Switch device; 50. Chassis; 501. First connecting part; 502. Second connecting part; 60. Auxiliary plug-in mechanism; 61. First pressing module; 62. Second pressing module; 601. Pressing arm; 602. Roller; 70. Scanning device. DETAILED DESCRIPTION

[0042] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0043] The directional terms mentioned in the present invention, such as "upper", "lower", "front", "back", "left", "right", "inner", "outer", "side", etc., are only for reference to the directions of the attached drawings. Therefore, the directional terms used are used to illustrate and understand the present invention, but not to limit the present invention. In addition, in the drawings, structures with similar or identical structures are represented by the same reference numerals.

[0044] See also Figure 1 and Fig.12 , please refer to Figure 1, an embodiment of the utility model shows a DDR5 memory module test circuit. In this embodiment, the DDR5 memory module test circuit includes a socket module 10, a main control module 20, a power module 30 and a switch module 40; the socket module 10 is provided with different types of DDR5 sockets 101, and the different types of DDR5 sockets 101 are used to plug different types of DDR5 memory modules; the main control module 20 is connected to the socket module 10, and is used to receive instructions from a host computer and output different drive control signals; the power module 30 is connected to the socket module 10, and is used to supply power to the socket module 10; the switch module 40 is connected to the main control module 20 and the socket module 10, and is used to select to turn on the power of the different types of DDR5 sockets 101 according to the different drive control signals, so that the main control module 20 tests the DDR5 memory module on the powered-on DDR5 socket 101 according to the instructions.

[0045] In a specific implementation, there are multiple different types of DDR5 sockets 101 on the socket module 10, such as the common SODIMM socket, UDIMM socket, RDIMM socket, etc. Each DDR5 socket 101 can be individually plugged into a type of DDR5 memory module, for example, the SODIMM socket is used to plug in the SODIMM memory module, and the UDIMM socket is used to plug in the UDIMM memory module. The specific number of each type of DDR5 socket 101 is not limited, and can be added according to actual test requirements. Each type of DDR5 socket 101 on the socket module 10 is designed to have an independent power control terminal. By inputting a control signal to the power control terminal of the DDR5 socket 101, the power of the DDR5 socket 101 can be turned on, and the power-on is completed, and the PIN foot gold finger on the DDR5 socket 101 will be electrically conductive.

[0046] In this embodiment, the main control module 20 is the core module of the entire circuit. The main control module 20 can use a programmable control device such as a single-chip microcomputer, FPGA, ARM chip, etc. The main control module 20 is connected to the switch module 40, and the switch module 40 is connected to the DDR5 socket 101. The power module 30 supplies power to the socket module 10, that is, provides working voltage for different types of DDR5 sockets 101. The main control module 20 is connected to the host computer through the corresponding interface to receive the instructions issued by the host computer. The instructions issued by the host computer include test instructions and power control instructions of the corresponding type of DDR5 socket 101. The power control instructions are used to control the main control module to drive the switch module to turn on the power of the DDR5 socket, and the test instructions are mainly used to control the main control module 20 to perform various tests on the DDR5 memory module. For example, the test instructions may specifically include temperature test instructions for the DDR5 memory module, open and short circuit test instructions for the DDR5 memory module, etc. The host computer is specifically a computer or other equipment. After receiving the power control instruction in the instruction sent by the host computer, the main control module 20 will output a drive control signal to control the switch module 40 to select to turn on the power of a type of DDR5 socket 101 on the socket module 10. A drive control signal contains control information for turning on the power connection of the corresponding type of DDR5 socket 101. Different drive control signals can control the switch module 40 to select to turn on the power of different types of DDR5 sockets 101. When the switch module 40 receives the driving control signal output by the main control module 20, it will selectively turn on the power connection of the corresponding type of DDR5 socket 101 according to different driving control signals, thereby realizing the selection of different types of DDR5 sockets 101 for testing through the host computer, and each time the power of one type of DDR5 socket 101 is selected to be turned on. After the power of the corresponding type of DDR5 socket 101 is turned on, the main control module 20 establishes a connection with the corresponding type of DDR5 socket 101, and the DDR5 memory module plugged into the DDR5 socket 101 can establish a data interaction connection with the main control module 20. The main control module 20 can perform various project tests on the DDR5 memory module plugged into the corresponding DDR5 socket 101 according to the test instructions issued by the host computer.

[0047] In this embodiment, different types of DDR5 sockets are set on the socket module to plug in different types of DDR5 memory modules, and a main control module is used to output different drive control signals to control the switch module to select to turn on the power of different types of DDR5 sockets, so that the main control module can test the DDR5 memory module on the DDR5 socket according to the test instructions of the host computer. There is no need to replace the test device to test different types of DDR5 memory modules, so the test is more convenient and the test efficiency is higher.

[0048] In one embodiment, referring to Figure 2, the switch module 40 includes a driving unit 41 and a switch device 42, the driving unit 41 is connected to the main control module 20 and the switch device 42, the switch device 42 is connected to the socket module 10, wherein the driving unit 41 is used to receive the driving control signal to drive the switch device 42 to output a switch signal to turn on the power of the different types of DDR5 sockets 101. In a specific implementation, the driving unit 41 is mainly a chip or circuit used to drive the operation of a motor or a relay, and the switch device 42 may specifically include a device or transistor with a switch or on-off control function, such as a relay, an optical coupler, a MOS tube, etc. The driving unit 41 can control the on-off property of the switch device 42 according to the driving control signal output by the main control module 20, so that it can generate a switch signal, and the switch signal can specifically be a level signal. The driving unit 41 controls the switch device 42 to output a switch signal according to the driving control signal, and changes the input of the power control terminal of the DDR5 socket 101 through the switch signal, thereby realizing the switch control of the power of the DDR5 socket 101.

[0049] Further, refer to Figures 3 to 12 , the driving unit 41 includes a driving chip U12, the switching device 42 includes a plurality of relays, the input end of the driving chip U12 is connected to the output end of the main control module 20, the output end of the driving chip U12 is connected to the negative contact of the coil of each relay, the positive contact of the coil of each relay is connected to the first power supply, the common contact of each relay is respectively connected to the power control end of the different types of DDR5 sockets 101, and the normally open contact of each relay is connected to the second power supply. In a specific implementation, a plurality of relays are used to control different types of DDR5 sockets 101, and the type of relay is an 8-pin intermediate relay, and each intermediate relay is used to control the power control end of a type of DDR5 socket 101, such as Figure 6 , Figure 7 , Figure 8 Intermediate relays KS2, KR2, and KU2 are used to control Fig.10 , Fig.11 , Fig.12 The SODIMM sockets J6.1-J6.2, RDIMM sockets J1.1-J1.3, and UDIMM sockets J5.1-J5.3 are shown. The main control module 20 uses the ARM chip U1, and the output end of the main control module 20 is the GPIO of the ARM chip U1. The input ends IN1-IN7 of the driver chip U12 are connected to the GPIO of the ARM chip U1 to receive different drive control signals output by it. The signal between the main control module 20 and the driver chip U12 is connected through the 40PIN needle holder P3 and the 40PIN needle holder PI1. The output ends OUT5, OUT6, and OUT7 of the driver chip U12 are respectively connected to the following: Figure 6 , Figure 7 , Figure 8 The coil negative contacts of the intermediate relays KR2, KU2, and KS2 are connected to the signals through two 20-pin pin sockets PL1. The coil positive contacts 1 of each intermediate relay are connected to the first power supply SYS_5V. The normally open contacts of each intermediate relay are connected to the second power supply, such as Figure 5 As shown, the second power supply SYS3V3 is connected to Figure 6 , Figure 7 , Figure 8 The normally open contacts 4 of the intermediate relays KS2, KR2, and KU2 are shown, and DDR_P_GOOD is a power signal. The common contact of each intermediate relay is connected to the power control terminal PWR_GOOD pin of different types of DDR5 sockets 101, such as Figure 6 , Figure 7 , Figure 8 The common terminal contacts 3 of the intermediate relays KS2, KR2, and KU2 are connected to the following Fig.10 , Fig.11 , Fig.12 The power supply of each type of DDR5 socket 101 is provided by the power module 30, such as Fig. 9As shown, the power module 30 can be connected to an external 24V power supply through the 3PIN pin CN1. The power module 30 can stabilize the 24V power provided by the external power supply to the corresponding working voltage of 12V and 5V, etc., and input it to the power input pin VIN_BULK of different types of DDR5 sockets 101. PWR_GOOD is a power control terminal for each type of DDR5 socket 101. When there is no signal or the PWR_GOOD pin is at a low level, the circuit inside the DDR5 socket 101 will not be turned on, which is equivalent to the entire DDR5 socket being in a closed state. By inputting a high level signal to the PWR_GOOD pin of the DDR5 socket 101, the internal circuit of the DDR5 socket 101 can be turned on, and the DDR5 socket can be powered on normally. By inputting a high level to the PWR_GOOD pin of different types of DDR5 sockets 101, the internal circuit of different types of DDR5 sockets 101 can be turned on, and different types of DDR5 sockets 101 can be controlled to power on. In the specific implementation, taking the control of the SODIMM socket as an example, the host computer is connected to the ARM chip U1 through the corresponding interface, and controls the ARM chip U1 to output the driving control signal PB0 to control the driving chip U12 to output the driving signal SODIMM_ON to the negative contact 8 of the coil of the intermediate relay KS2 by issuing instructions, thereby driving the intermediate relay KS2 to work. The contact 3 of the intermediate relay KS2 is attracted with the normally open contact 4, thereby inputting the power signal PWE_GD_SODIMM of the second power supply connected to the normally open contact 4 of the intermediate relay KS2 to the power control terminal pin PWR_GOOD of the SODIMM socket J6.1, so that the SODIMM socket is powered on, and the SODIMM memory module plugged into the SODIMM socket is connected by signal, and the ARM chip U1 can perform various tests on the SODIMM memory module plugged into the SODIMM socket according to the test instructions in the instructions issued by the host computer. The power-on process of the RDIMM socket and the UDIMM socket is the same as that of the SODIMM socket. According to different instructions from the host computer, the ARM chip U1 can output the drive control signal of the RDIMM socket or the UDIMM socket, so that the drive chip U12 drives the corresponding intermediate relay to work, thereby realizing the power-on control of the RDIMM socket or the UDIMM socket.

[0050] Preferably, the driver chip U12 is a ULN2003A chip. In specific implementation, the ULN2003A chip is a new type of seven-way high-voltage, high-current Darlington transistor driver IC, with a freewheeling diode inside the circuit, which can drive inductive loads such as relays. It has the advantages of high voltage, high current, high performance and strong carrying capacity. Using the ULN2003A chip to drive the relay can improve the driving ability and stability.

[0051] In one embodiment, the different types of DDR5 sockets 101 include SODIMM sockets, UDIMM sockets, and RDIMM sockets. In a specific implementation, the DDR5 sockets 101 are designed as three commonly used sockets, namely, SODIMM sockets, UDIMM sockets, and RDIMM sockets. When testing commonly used memory modules such as SODIMM memory modules, UDIMM memory modules, and RDIMM memory modules, there is no need to replace different test devices for testing, which makes testing more convenient.

[0052] The utility model also provides a DDR5 memory module testing device, such as Figures 13 to 16 As shown, the main body of the device is a chassis 50, and the DDR5 memory module test circuit is integrated inside the chassis 50. Different types of DDR5 sockets 101 are installed and fixed on the platform at the top of the chassis 50. This embodiment sets three types of sockets, SODIMM sockets, UDIMM sockets, and RDIMM sockets, which can be plugged into three types of DDR5 memory modules, SODIMM, UDIMM, and RDIMM. The device chassis 50 is provided with a corresponding interface connected to the host computer. In this embodiment, the host computer and the device are connected through an RS232 to USB interface, and the device is controlled by the host computer issuing instructions. The DDR5 memory module test circuit integrated inside the device can realize the switching of different types of DDR5 sockets 101, so that the device can test the DDR5 memory modules plugged into different types of DDR5 sockets 101. Among them, the DDR5 memory module test circuit in this embodiment can adopt any DDR5 memory module test circuit provided by the embodiment of the utility model. Since the previous specification has made a detailed introduction to the specific structure and working principle of the DDR5 memory module test circuit, for the sake of the simplicity of the specification, it will not be repeated here.

[0053] The DDR5 memory module testing device in this embodiment adopts the DDR5 memory module testing circuit provided by the embodiment of the utility model, and supports the testing of different types of DDR5 memory modules. When testing different types of DDR5 memory modules, there is no need to replace the testing device for testing, and the testing is more convenient and quick, which greatly improves the testing efficiency of the DDR5 memory module.

[0054] In one embodiment, referring to Figures 13 to 15, the DDR5 socket 101 is arranged on the upward side of the chassis 50, and the DDR5 memory module testing device also includes an auxiliary plug-in mechanism 60, which is arranged on the chassis 50 and adjacent to the DDR5 socket 101, wherein the auxiliary plug-in mechanism 60 is used to press the DDR5 memory module toward the DDR5 socket 101 in the vertical direction, so that the DDR5 memory module is embedded in the DDR5 socket 101. Specifically, the upward side of the chassis 50 is a platform, and different types of DDR5 sockets 101 are installed on the platform. The conventional method is to manually press hard when inserting the DDR5 memory module into the DDR5 socket 101. When pressing, the hand contacts the DDR5 memory module and applies force, which is not only time-consuming and labor-intensive, but also easily causes damage to the PIN pins of the DDR5 memory module. In this embodiment, an auxiliary plug-in mechanism 60 is set on the platform on the upward side of the chassis 50 to assist in the plugging and unplugging of the DDR5 memory module. The auxiliary plug-in mechanism 60 is adjacent to the DDR5 socket 101. The auxiliary plug-in mechanism 60 is specifically a lever-type mechanism. The auxiliary plug-in mechanism 60 is manually operated and the lever principle is used to drive the auxiliary plug-in mechanism 60 to press the DDR5 memory module in the vertical direction. The DDR5 memory module can be easily pressed toward the DDR5 socket 101 along the vertical direction, and the plugging of the DDR5 memory module becomes easier and more convenient.

[0055] Further, refer to Figures 13 to 15, the auxiliary plug-in mechanism 60 includes a first pressing module 61 and a second pressing module 62, the first pressing module 61 and the second pressing module 62 are respectively arranged adjacent to the two opposite sides in the long side direction of the DDR5 socket 101, wherein the first pressing module 61 and the second pressing module 62 are used to press the two edges of the upward side of the DDR5 memory module so that the DDR5 memory module is embedded in the DDR5 socket 101. In a specific implementation, the first pressing module 61 and the second pressing module 62 are arranged at intervals on the platform at the top of the chassis 50, and are respectively arranged close to the two opposite sides of the long side direction of the DDR5 socket 101, and the DDR5 socket 101 is located between the first pressing module 61 and the second pressing module 62. The first pressing module 61 and the second pressing module 62 can specifically adopt the same lever structure, and under manual operation, two different positions on the upward side of the DDR5 memory module can be pressed by the lever principle. After the DDR5 memory module is initially inserted into the DDR5 socket 101, use both hands to operate the first pressing module 61 and the second pressing module 62 at the same time, driving the first pressing module 61 and the second pressing module 62 to simultaneously press the two positions close to the edge on the upper side of the DDR5 memory module. After the DDR5 memory module is pressed by the two pressing modules, it is embedded in the DDR5 socket 101 to complete the insertion. The whole process is very labor-saving.

[0056] Furthermore, refer to Figures 13 to 15, a first connection part 501 and a second connection part 502 are arranged at intervals on the upward side of the chassis 50, the DDR5 socket 101 is arranged between the first connection part 501 and the second connection part 502, the first pressing module 61 and the second pressing module 62 both include a pressing arm 601 and a roller 602, the two pressing arms 601 are rotatably installed on the first connection part 501 and the second connection part 502, and the two rollers 602 are rotatably installed on the opposite sides of the two pressing arms 601, wherein the two pressing arms 601 are used to rotate toward each other to drive the two rollers 602 to press against the top of the DDR5 memory module, so that the DDR5 memory module is embedded in the DDR5 socket 101. In a specific implementation, the first connection part 501 and the second connection part 502 are two connection structures protruding from the platform at the top of the chassis 50. One end of the two pressing arms 601 is respectively hinged to the first connection part 501 and the second connection part 502, and can rotate around the first connection part 501 and the second connection part 502 at a certain angle. The other ends of the two pressing arms 601 must ensure that they cannot touch each other when rotating toward each other, and are designed to be suitable for human hand gripping. The two rollers 602 are respectively installed on the opposite sides of the two pressing arms 601 in a rolling manner, and ensure that the two rollers 602 can contact the upward side of the DDR5 memory module when the two pressing arms 601 rotate toward each other. The two rollers 602 can be designed with elastic or soft materials, or a layer of soft buffer can be designed on their surface to avoid damaging the surface of the DDR5 memory module. After the DDR5 memory module is initially inserted into the DDR5 socket 101, use both hands to press the two pressing arms 601 at the same time, drive the two pressing arms 601 to rotate toward each other, and make the two rollers 602 on the two pressing arms 601 press two positions on the upper side of the DDR5 memory module. As the two pressing arms 601 continue to rotate toward each other, the two rollers 602 roll along the upper side of the DDR5 memory module to avoid direct friction and damage to the surface of the DDR5 memory module. After the DDR5 memory module is pressed, it is embedded in the DDR5 socket 101 to complete the plug-in. The whole process is very easy and labor-saving.

[0057] In one embodiment, referring to Figures 13 to 16, the DDR5 memory module testing device also includes a scanning device 70, the scanning device 70 is arranged on the chassis 50 and adjacent to the DDR5 socket 101, and the DDR5 memory module is provided with a mark, wherein the scanning device 70 is used to scan the mark. In a specific implementation, the scanning device 70 is installed on the chassis 50 near the DDR5 socket 101, which is convenient for scanning the mark on the DDR5 memory module. The mark of the DDR5 memory module can specifically be a barcode, a QR code or the like. The mark on the DDR5 memory module will record the SPDSN information that needs to be burned into the EEPROM (read-only memory). The SPDSN consists of a date and a serial number. The date is used to identify the time period in which the memory module was manufactured, and the serial number can be used to record which root of the DDR5 memory module is in the time period, which is convenient for later tracking. The identification on the memory module can be scanned by the scanning device 70, and the relevant SPDSN information can be obtained and burned into the EEPROM of the DDR5 memory module. The information of the DDR5 memory module EEPROM can be obtained by the testing device, and compared and analyzed by the host computer or other computer equipment to achieve a one-to-one correspondence between the identification and the information burned into the DDR5 memory module, thereby improving the reliability of the test.

[0058] The utility model also provides a DDR5 memory module testing method, see Fig.17 , Fig.17 A flow chart of a DDR5 memory module testing method provided by an embodiment of the present utility model. As shown in the figure, the method includes the following steps S110-130.

[0059] S110, controlling the main control module to drive the switch module to select and turn on the power of one type of DDR5 socket on the socket module.

[0060] In the specific implementation, the host computer sends instructions to the main control module through the corresponding interface. The instructions include test instructions and power control instructions for the corresponding type of DDR5 sockets. The test instructions are mainly used to control the main control module to perform various tests on the DDR5 memory module, while the power control instructions are used to control the main control module to drive the switch module to turn on the power of the DDR5 socket. After receiving the instructions sent by the host computer, the main control module drives the switch module to turn on the power of the corresponding DDR5 socket on the socket module according to the power control instructions. The main control module specifically outputs a signal through GPIO to control the input end of the switch module, so that the switch module turns on the power of the corresponding type of DDR5 socket, so that the corresponding type of DDR5 socket is powered on. For example, the tester needs to test the SODIMM memory module, and the host computer sends an instruction to control the SODIMM memory module to test it. After receiving the instruction, the main control module outputs the driving signal of the SODIMM socket to the switch module. At this time, the switch module chooses to turn on the power of the SODIMM socket, so that the SODIMM socket is powered on. When the corresponding type of DDR5 socket is powered on, the main control module communicates with the corresponding type of DDR5 socket, and the main control module can establish a connection with the DDR5 memory module on the powered-on DDR5 socket, and then perform various tests on the DDR5 memory module.

[0061] S120. Control the main control module to perform a test on the DDR5 memory module on the DDR5 socket to obtain test data.

[0062] In a specific implementation, the host computer sends instructions to the main control module through the corresponding interface, and the instructions include test instructions and power control instructions of the corresponding type of DDR5 socket. The power control instructions are used to control the main control module to drive the switch module to turn on the power of the DDR5 socket. The test instructions are used to control the main control module to perform various tests on the DDR5 memory module. After the main control module receives the power control instruction of the corresponding type of DDR5 socket and drives the switch module to turn on the power of the corresponding type of DDR5 socket, the main control module performs various tests on the DDR5 memory module plugged into the powered-on DDR5 socket of the corresponding type according to the test instructions. The main control module performs various tests according to the test instructions and obtains test data of various test items. The test data is transmitted to the host computer. After obtaining the test data, the host computer judges the test results through the test data to determine whether the test items are passed.

[0063] In one embodiment, if Fig.18 As shown, the step S120 of controlling the main control module to perform a test on the DDR5 memory module on the DDR5 socket to obtain test data includes step S121.

[0064] S121. Control the main control module to obtain the temperature data output by the temperature sensor of the DDR5 memory module and / or control the main control module to obtain the voltage data of the PMIC register of the DDR5 memory module and / or control the main control module to input a preset current to the PIN pin of the DDR5 socket and obtain the voltage value of the PIN pin of the DDR5 socket.

[0065] In the specific implementation, a temperature sensor is integrated on the DDR5 memory module. The temperature sensor is used to detect the temperature of the DDR5 memory module. After the DDR5 memory module is powered on, the temperature sensor starts to detect the temperature of the DDR5 memory module and outputs the corresponding voltage. Each voltage corresponds to a temperature data, and different voltages correspond to different temperature data. When the temperature of the DDR5 memory module changes, the corresponding output voltage of the temperature sensor will also change, that is, the temperature data changes. The host computer controls the main control module to read the temperature data output by the temperature sensor on the DDR5 memory module through the test instructions issued. The main control module can specifically read the temperature data output by the temperature sensor through the IIC bus or the corresponding circuit. After the main control module reads the temperature data according to the test instructions, it sends it to the host computer. After the host computer obtains the temperature data, it can analyze and process the temperature of the DDR5 memory module to determine whether the temperature of the DDR5 memory module meets the standard.

[0066] In the specific implementation, there is a PMIC module on the DDR5 memory module. The PMIC module is the power management module of the DDR5 memory module. The DDR5 memory module is powered by the PMIC module. The device first supplies electricity to the PMIC module. After being processed by the PMIC module, the voltage required for the DDR5 memory module chip to work will be output. After the DDR5 memory module is powered on, the input and output voltage information of each PIN pin of the DDR5 memory module will be stored in the register of the PMIC module. The voltage data is the data of the voltage value of the PIN pin stored in the register of the PMIC module. The host computer controls the main control module to read the voltage data of each PIN pin in the register of the PMIC module on the DDR5 memory module through the test instructions issued. The main control module can specifically read the voltage data of each PIN pin in the register of the PMIC module through the IIC bus and send it to the host computer. After obtaining the voltage data, the host computer can analyze and process the input and output voltages of each PIN pin of the DDR5 memory module, and then obtain the input and output voltage conditions of each PIN pin of the DDR5 memory module, and judge whether the input and output voltages of each PIN pin of the DDR5 memory module are normal.

[0067] In the specific implementation, in order to detect whether the internal PIN pins of the DDR5 memory module have an open circuit or short circuit fault, the host computer controls the main control module through the test instructions issued to drive the corresponding current output circuit to input a preset current to each PIN pin of the DDR5 socket and obtain the voltage value of each PIN pin. The preset current is used to generate a voltage on the PIN pin of the DDR5 socket, and the host computer can set the preset current according to the test requirements. The main control module inputs a preset current to each PIN pin of the DDR5 socket according to the test instructions issued by the host computer, and each PIN pin of the DDR5 socket will generate a corresponding voltage. The main control module measures the voltage value of each PIN pin of the DDR5 socket through the voltage detection circuit and sends it to the host computer. After the host computer obtains the voltage value of the PIN pin of the DDR5 socket, it can analyze and process it, and then obtain the open and short circuit status of each PIN pin of the DDR5 memory module, and judge whether the electrical connection of each PIN pin of the DDR5 memory module is normal.

[0068] S130: Obtain test results according to the test data and display them.

[0069] In the specific implementation, the host computer issues test instructions to control the main control module to perform tests on the corresponding type of DDR5 sockets and obtains test data. The test instructions include test instructions for various test items of the DDR5 memory module, such as temperature test instructions, PMIC test instructions, open and short circuit test instructions, etc. Therefore, the test data includes the data obtained by the main control module performing various test items, such as temperature test data, PMIC test data, open and short circuit test data, etc. The host computer connects to the main control module through the corresponding data interface to receive various test data obtained by the main control module performing various test items. The host computer can obtain the test results of various test items by analyzing and processing the test data of various test items. For example, the main control module executes the test of Project A on the DDR5 memory module according to the test instruction of Project A sent by the host computer. The host computer obtains the test data of Project A, processes and analyzes the test data of Project A, and obtains the test result of Project A. If the test result of Project A is passed, the host computer display will display "Project A PASS". If the test project A fails, the host computer display will display "Project A FAIL". The tester can intuitively see the test results of various test items on the host computer display.

[0070] In one embodiment, if Fig.19 As shown, the test includes a temperature test, and the step S130 of obtaining and displaying the test result according to the test data includes steps S1301-S1304.

[0071] S1301, comparing the temperature data with a preset temperature data range;

[0072] S1302, determining whether the temperature data is within the preset temperature data range;

[0073] S1303, if the temperature data is within the preset temperature data range, determine that the temperature test is passed and display it;

[0074] S1304: If the temperature data is not within the preset temperature data range, determine that the temperature test has failed and display the result.

[0075] In the specific implementation, after the host computer controls the main control module to read the temperature data output by the temperature sensor on the DDR5 memory module by issuing the test instruction of the temperature test, the temperature data is compared with the preset temperature data range to obtain the temperature detection result of the DDR5 memory module, and the preset temperature data range is used as the comparison standard. When the temperature data output by the temperature sensor is within the preset temperature data range, it means that the temperature of the DDR5 memory module is in a normal state after power-on and meets the normal temperature standard. At this time, the host computer determines that the temperature test of the DDR5 memory module has passed, and the test result of the output temperature test passing is displayed on the display of the host computer. For example, when the temperature test passes, the display of the host computer displays "temperature test PASS". When the temperature data is not within the preset temperature data range, it means that the temperature of the DDR5 memory module is abnormal after power-on, and the temperature is too high or too low. The host computer determines that the temperature test has not passed, and the test result of the output temperature test has not passed is displayed on the display of the host computer. For example, when the temperature test has not passed, the display of the host computer displays "temperature test FAIL", and the tester can intuitively see the result of the temperature test on the display of the host computer.

[0076] In one embodiment, if Fig. 20 As shown, the test includes a PMIC test, and the step S130 of obtaining and displaying the test result according to the test data includes steps S1305-S1308.

[0077] S1305, comparing the voltage data with a preset voltage data threshold;

[0078] S1306, determining whether the voltage data is equal to the preset voltage data threshold;

[0079] S1307, if the voltage data is equal to the preset voltage data threshold, determine that the PMIC test has passed and display it;

[0080] S1308: If the voltage data is not equal to the preset voltage data threshold, determine that the PMIC test has failed and display the result.

[0081] In the specific implementation, the host computer controls the main control module to read the voltage data stored in the PMIC module register on the DDR5 memory module by issuing the test instruction of the PMIC test, and then judges whether the voltage output by the PMIC module of the DDR5 memory module meets the standard by comparing the voltage data with the preset voltage data threshold. The preset voltage data threshold is used as the comparison standard. When the voltage data is equal to the preset voltage data threshold, it indicates that the output of the PMIC module of the DDR5 memory module is in a normal state and meets the standard. The host computer judges that the PMIC test of the DDR5 memory module has passed, and the test result of the output PMIC test passing is displayed on the display of the host computer. For example, when the PMIC test passes, "PMIC test PASS" is displayed on the display of the host computer. When the voltage data is not equal to the preset voltage data threshold, it means that the PMIC module output is abnormal after the DDR5 memory module is powered on, the voltage is too high or too low, and does not meet the PMIC module output voltage standard. The host computer determines that the PMIC test has failed, and the test result of the output PMIC test failure is displayed on the monitor of the host computer. For example, when the PMIC test fails, "PMIC test FAIL" is displayed on the monitor of the host computer, and the tester can intuitively see the result of the PMIC test on the monitor of the host computer.

[0082] In one embodiment, if Fig.21 As shown, the test includes an open circuit test and a short circuit test, and the step S130 of obtaining and displaying the test result according to the test data includes steps S1309-S1314.

[0083] S1309, comparing the voltage value of the PIN pin of the DDR5 socket with the first preset voltage threshold and the second preset voltage threshold respectively;

[0084] S1310. Determine whether the voltage value of the PIN pin of the DDR5 socket is less than the first preset voltage threshold or whether it is greater than the second preset voltage threshold.

[0085] In the specific implementation, the upper computer controls the main control module by issuing a test instruction for the open and short circuit test to obtain the voltage value of the PIN pin of the DDR5 socket through the corresponding measurement circuit, and then compares the obtained voltage value with the first preset voltage threshold and the second preset voltage threshold respectively. The first preset voltage threshold is used as a judgment standard for the open circuit of the PIN pin, and the second preset voltage threshold is used as a judgment standard for the short circuit of the PIN pin. The open circuit and short circuit conditions of the PIN pin of the DDR5 memory module are judged by comparison.

[0086] S1311. If the voltage value of the PIN pin of the DDR5 socket is less than the first preset voltage threshold, determine that the open circuit test has passed and display the result;

[0087] S1312: If the voltage value of the PIN pin of the DDR5 socket is not less than the first preset voltage threshold, determine that the open circuit test has failed and display the result;

[0088] In a specific implementation, the host computer compares the voltage value of the PIN pin of the DDR5 socket obtained with the first preset voltage threshold to determine whether there is an open circuit fault in the PIN pin of the DDR5 memory module. The first preset voltage threshold is the voltage value of the PIN pin when it is in a normal non-open circuit state, and the first preset voltage threshold is used as the comparison standard. When the voltage value of the PIN pin of the DDR5 memory module is less than the first preset voltage threshold, it means that the voltage value of the PIN pin of the DDR5 memory module is normal after power-on, and there is no open circuit fault inside the PIN pin. The host computer determines that the open circuit test of the DDR5 memory module has passed, and the test result of the output open circuit test passing is displayed on the display of the host computer. For example, when the open circuit test passes, "Open circuit test PASS" is displayed on the display of the host computer. When the voltage value of the PIN pin of the DDR5 memory module is not less than the first preset voltage threshold, that is, the voltage value of the PIN pin is greater than or equal to the first preset voltage threshold, it means that the voltage value of the PIN pin is abnormal after the DDR5 memory module is powered on, and an open circuit fault occurs inside the PIN pin. At this time, the host computer determines that the open circuit test of the DDR5 memory module has failed, and the host computer outputs the test result of the open circuit test failure and displays it on the display of the host computer. For example, when the open circuit test fails, the display of the host computer displays "Open Circuit Test FAIL". Assuming that the first preset voltage threshold is set to 3V, and the voltage value of a certain PIN pin is measured to be 4V, which is greater than 3V, the host computer can determine that the PIN pin has an open circuit fault and the open circuit test has failed. If the voltage value of the PIN pin is 2.8V, which is less than 3V, the host computer can determine that the PIN pin is normal and the open circuit test has passed.

[0089] S1313, if the voltage value of the PIN pin of the DDR5 socket is greater than the second preset voltage threshold, determine that the short circuit test is passed and display it;

[0090] S1314. If the voltage value of the PIN pin of the DDR5 socket is not greater than the second preset voltage threshold, it is determined that the short circuit test has failed and the result is displayed.

[0091] In a specific implementation, the host computer compares the obtained voltage value of the PIN pin with the second preset voltage threshold to determine whether there is a short circuit fault in the PIN pin of the DDR5 memory module. The second preset voltage threshold is the voltage value of the PIN pin when it is in a normal non-short circuit state, and the second preset voltage threshold is used as the comparison standard. When the voltage value of the PIN pin of the DDR5 memory module is greater than the second preset voltage threshold, it means that the voltage value of the PIN pin is normal after the DDR5 memory module is powered on, and there is no short circuit fault inside the PIN pin. The host computer determines that the short circuit test of the DDR5 memory module has passed, and the test result of the output short circuit test passing is displayed on the display of the host computer. For example, when the short circuit test passes, "Short Circuit Test PASS" is displayed on the display of the host computer. When the voltage value of the PIN pin of the DDR5 memory module is not greater than the second preset voltage threshold, that is, the voltage value of the PIN pin is less than or equal to the second preset voltage threshold, it means that the voltage value of the PIN pin is abnormal after the DDR5 memory module is powered on, and a short circuit fault occurs inside the PIN pin. At this time, the host computer determines that the short-circuit test of the DDR5 memory module has failed, and the test result of the output short-circuit test failure is displayed on the display of the host computer. For example, when the short-circuit test fails, "open circuit test FAIL" is displayed on the display of the host computer.

[0092] The DDR5 memory module testing method provided in the present application controls the main control module to drive the switch module to select and turn on the power of one type of DDR5 socket on the socket module, and then controls the main control module to perform a test on the DDR5 memory module on the DDR5 socket to obtain test data, and finally obtains and displays the test results based on the test data, thereby realizing the testing of different types of DDR5 memory modules. There is no need to replace the test device to test different types of DDR5 memory modules, which effectively improves the efficiency of testing different types of DDR5 memory modules.

[0093] The above is only a specific implementation of the utility model, but the protection scope of the utility model is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed by the utility model, and these modifications or replacements should be included in the protection scope of the utility model. Therefore, the protection scope of the utility model should be based on the protection scope of the claims.

Claims

1. A DDR5 memory module test circuit, characterized in that: include: The socket module is provided with different types of DDR5 sockets, and the different types of DDR5 sockets are used to plug in different types of DDR5 memory modules; A power module, connected to the socket module, for supplying power to the socket module; A main control module, connected to the socket module, for receiving instructions from the host computer and outputting different drive control signals; The switch module is connected to the main control module and the socket module, and is used to select and turn on the power of the different types of DDR5 sockets according to the different driving control signals, so that the main control module tests the DDR5 memory module on the powered-on DDR5 socket according to the instructions.

2. The DDR5 memory module test circuit according to claim 1, characterized in that: The switch module includes a driving unit and a switching device, wherein the driving unit is connected to the main control module and the switching device, and the switching device is connected to the socket module, wherein the driving unit is used to receive the driving control signal to drive the switching device to output a switching signal to turn on the power of the different types of DDR5 sockets.

3. The DDR5 memory module test circuit according to claim 2, characterized in that: The driving unit includes a driving chip, and the switching device includes multiple relays. The input end of the driving chip is connected to the output end of the main control module, and the output end of the driving chip is connected to the negative contact of the coil of each relay. The positive contact of the coil of each relay is connected to the first power supply, and the common end contact of each relay is respectively connected to the power control end of the different types of DDR5 sockets, and the normally open contact of each relay is connected to the second power supply.

4. The DDR5 memory module test circuit according to claim 3, characterized in that: The driver chip is a ULN2003A chip.

5. The DDR5 memory module test circuit according to any one of claims 1 to 4, characterized in that: The different types of DDR5 sockets include SODIMM sockets, UDIMM sockets, and RDIMM sockets.

6. A DDR5 memory module testing device, characterized in that: include: Chassis; A DDR5 memory module test circuit is provided in the chassis; Among them, the DDR5 memory module test circuit is the DDR5 memory module test circuit described in any one of claims 1-5.

7. The DDR5 memory module testing device according to claim 6, characterized in that: The DDR5 socket is arranged on the upward side of the chassis, and the DDR5 memory module testing device also includes an auxiliary plug-in mechanism, which is arranged on the chassis and adjacent to the DDR5 socket, wherein the auxiliary plug-in mechanism is used to press the DDR5 memory module toward the DDR5 socket in a vertical direction so that the DDR5 memory module is embedded in the DDR5 socket.

8. The DDR5 memory module testing device according to claim 7, characterized in that: The auxiliary plug-in mechanism includes a first pressing module and a second pressing module, and the first pressing module and the second pressing module are respectively arranged adjacent to the two opposite sides in the long side direction of the DDR5 socket, wherein the first pressing module and the second pressing module are used to press the two edges of the upward side of the DDR5 memory module so that the DDR5 memory module is embedded in the DDR5 socket.

9. The DDR5 memory module testing device according to claim 8, characterized in that: A first connection part and a second connection part are arranged at intervals on an upward side of the chassis, the DDR5 socket is arranged between the first connection part and the second connection part, the first pressing module and the second pressing module both include a pressing arm and a roller, the two pressing arms are rotatably installed on the first connection part and the second connection part respectively, the two rollers are rotatably installed on the opposite sides of the two pressing arms respectively, wherein the two pressing arms are used to rotate towards each other to drive the two rollers to press toward the top of the DDR5 memory module, so that the DDR5 memory module is embedded in the DDR5 socket.

10. The DDR5 memory module testing device according to claim 6, characterized in that: The DDR5 memory module testing device also includes a scanning device, which is arranged on the chassis and adjacent to the DDR5 socket. The DDR5 memory module is provided with a logo, wherein the scanning device is used to scan the logo.

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