I-type three-level IGBT module dynamic characteristic test circuit

Abstract

The utility model provides a dynamic characteristic test circuit for an I-type three-level IGBT (Insulated Gate Bipolar Translator) module, which belongs to the field of dynamic parameter test of the IGBT module and comprises an IGBT module, a charge and discharge control unit, a capacitor C1, a switch K2, a switch K3, a switch K6, a switch K7, a switch K8, a switch K9 and an inductor L1, the anode of the diode DC2 is connected with the first end of the transistor Q4, the first end of the switch K2 is connected with the upper pole plate of the capacitor C1, the second end of the switch K2 is connected with the first end of the switch K3, the second end of the switch K3 is connected with the lower pole plate of the capacitor C1, the first end of the switch K8 is connected with the first end of the switch K6, the second end of the switch K8 is connected with the first end of the switch K9, and the second end of the switch K9 is connected with the second end of the switch K7. The second end of the switch K8 is connected with the anode of the diode DC1; a switch combination is arranged, and dynamic parameter testing of the I-type three-level module is completed by controlling the turn-on time sequence of the transistors Q1-Q4.

Description

Technical Field

[0001] The utility model relates to the technical field of dynamic parameter testing of IGBT modules, in particular to a dynamic characteristic testing circuit of an I-type three-level IGBT module. Background Art

[0002] With the development of power electronics technology and the improvement of semiconductor technology, IGBT (Insulated Gate Bipolar Transistor) module technology has developed rapidly and is widely used in power systems, high-voltage direct current transmission, locomotive traction and new energy fields. Among them, the I-type three-level IGBT module is mainly used in efficient inverter circuits in the field of energy storage. The static characteristics and dynamic characteristics of the I-type three-level IGBT module are studied. The static characteristics can often be obtained from the datasheet, while the dynamic characteristics need to be measured manually. The measurement of dynamic characteristics is based on double pulse testing, which reflects its dynamic characteristics by measuring the voltage Vce and current Ie waveforms in the dynamic process. According to the topological structure of the I-type three-level IGBT module, it has become extremely urgent to complete the dynamic parameter test of IGBT and freewheeling diode under the condition of compatible power supply architecture of the original test equipment. The existing main circuit often uses a three-level power supply architecture to complete the IGBT test. It is impossible to achieve three levels by relying on a set of capacitors. It is necessary to add a negative potential to the two-level power supply architecture of positive potential and zero potential, and the freewheeling diode connected in parallel to the outside of the inner IGBT is difficult to complete the turn-on test and reverse recovery test according to the requirements of the standard. Utility Model Content

[0003] The technical problem to be solved by the utility model is how to complete the dynamic parameter test of the I-type three-level module on the traditional two-level power supply architecture.

[0004] The utility model solves the above technical problems through the following technical solutions: an I-type three-level IGBT module dynamic characteristic test circuit, comprising an IGBT module, a charge and discharge control unit, a capacitor C1, a switch K2, a switch K3, a switch K6, a switch K7, a switch K8, a switch K9, an inductor L1, a current detection device CT1 and a current detection device CT2, the IGBT module comprises a transistor Q1, a transistor Q2, a transistor Q3, a transistor Q4, a diode D1, a diode D2, a diode D3, a diode D4, a diode DC1, and a diode DC2, a first end of the transistor Q1 is connected to a second end of the switch K6, a second end of the transistor Q1 is connected to a first end of the transistor Q2, a second end of the transistor Q2 is connected to a first end of the transistor Q3, a second end of the transistor Q3 is connected to a first end of the transistor Q4, a second end of the transistor Q4 is connected to a first end of the switch K7, each diode is connected in parallel to two ends of a corresponding transistor, a cathode of the diode is connected to the first end of the corresponding transistor, and an anode is connected to the second end of the transistor;

[0005] The positive electrode of the output end of the charge and discharge control unit is connected to the upper plate of the capacitor C1, the negative electrode of the output end is connected to the lower plate of the capacitor C1, the cathode of the diode DC1 is connected to the second end of the transistor Q1, the anode of the diode DC1 is connected to the cathode of the diode DC2, the anode of the diode DC2 is connected to the first end of the transistor Q4, the first end of the switch K2 is connected to the upper plate of the capacitor C1, the second end of the switch K2 is connected to the first end of the switch K3, the second end of the switch K3 is connected to the lower plate of the capacitor C1, the first end of the current detection device CT1 is connected to the first end of the switch K2, and the The second end is connected to the second end of the switch K3, the first end of the switch K6 is connected to the second end of the current detection device CT1, the second end of the switch K7 is connected to the first end of the current detection device CT2, the first end of the switch K8 is connected to the first end of the switch K6, the second end of the switch K8 is connected to the first end of the switch K9, the second end of the switch K9 is connected to the second end of the switch K7, the second end of the switch K8 is connected to the anode of the diode DC1, the first end of the inductor L1 is connected to the connection point between the second end of the transistor Q2 and the first end of the transistor Q3, and the second end of the inductor L1 is connected to the connection point between the switch K2 and the switch K3.

[0006] Preferably, the charge and discharge control unit includes a voltage source P1 and a switch K1, a first end of the switch K1 is connected to the positive electrode of the high voltage source P1, a second end is connected to the negative electrode of the high voltage source P1, an upper plate of the capacitor C1 is connected to the first end of the switch K1, and a lower plate of the capacitor C1 is connected to the second end of the switch K1.

[0007] Preferably, the charge and discharge control unit further includes a resistor R1 , a first end of the resistor R1 is connected to the positive electrode of the high voltage source P1 , and a second end of the resistor R1 is connected to the first end of the switch K1 .

[0008] Preferably, it further includes a switch K4 and a switch K5, the second end of the current detection device CT1 is connected to the first end of the switch K4, the second end of the switch K4 is connected to the first end of the switch K5, and the second end of the switch K5 is connected to the first end of the current detection device CT2.

[0009] Preferably, the cathode of diode D1 is connected to the first end of transistor Q1, the anode of diode D1 is connected to the second end of transistor Q1, the cathode of diode D2 is connected to the first end of transistor Q2, the anode of diode D2 is connected to the second end of transistor Q2, the cathode of diode D3 is connected to the first end of transistor Q3, the anode of diode D3 is connected to the second end of transistor Q3, the cathode of diode D4 is connected to the first end of transistor Q4, and the anode of diode D4 is connected to the second end of transistor Q4.

[0010] Preferably, it also includes a power supply U1 and a signal acquisition system U2. The power supply U1 provides control terminal signals for transistors Q1, Q2, Q3 and Q4. The signal acquisition system U2 is used to collect sampling point parameters.

[0011] Preferably, the power supply U1 is four independent gate power supplies, providing a maximum controllable voltage of ±20V.

[0012] The advantages provided by the utility model are: by taking the traditional half-bridge topology as the basis on the two-level power supply architecture, four groups of switches, namely switch K6, switch K7, switch K8 and switch K9, are arranged in the circuit, and by setting a reasonable switch combination, the opening timing of the internal transistors Q1-Q4 of the IGBT module under test is controlled, and the internal IGBT of the tested device is used as a companion test, so as to realize the dynamic parameter test of the I-type three-level module on the two-level power supply architecture. By controlling the on-off of switches K6-K9, a reasonable opening and closing timing is set for the transistors Q1-Q4 in the IGBT module, and the dynamic parameter test of the external parallel diode of the I-type three-level is completed, so as to realize the test of all transistors and diodes under the same test loop. There is no need to add a negative potential to the two-level power supply architecture of positive potential and zero potential, and the problem that the freewheeling diode connected in parallel to the outside of the inner IGBT is difficult to complete the opening test and reverse recovery test according to the requirements of the standard is solved. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 A circuit diagram of a dynamic characteristic test circuit for an I-type three-level IGBT module provided by the utility model;

[0014] Figure 2 A schematic diagram of a test circuit for an I-type three-level IGBT module dynamic characteristics test transistor Q1 and a diode DC1 provided by the utility model;

[0015] Figure 3This is the IGBT turn-on timing diagram when the transistor Q1 and the diode DC1 are tested in the I-type three-level IGBT module dynamic characteristic test circuit provided by the utility model;

[0016] Figure 4 This is the IGBT turn-on timing diagram when the transistor Q2 and the diode D3 and the diode D4 are tested in the I-type three-level IGBT module dynamic characteristic test circuit provided by the utility model;

[0017] Figure 5 A schematic diagram of a test transistor Q3 and a diode DC2 for a dynamic characteristic test circuit of an I-type three-level IGBT module provided by the utility model;

[0018] Figure 6 This is the IGBT turn-on timing diagram when the transistor Q4 and the diode DC2 are tested in the I-type three-level IGBT module dynamic characteristic test circuit provided by the utility model;

[0019] Figure 7 This is a timing diagram of IGBT turn-on when testing transistor Q3, diode D1 and diode D2 in the I-type three-level IGBT module dynamic characteristic test circuit provided by the utility model. DETAILED DESCRIPTION

[0020] In order to make the purpose, technical solution and advantages of the utility model more clear, the technical solution of the utility model is clearly and completely described below in combination with specific embodiments and with reference to the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the utility model, but not all of them. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0021] like Figure 1As shown, this embodiment provides an I-type three-level IGBT module dynamic characteristics test circuit, including an IGBT module, a charge and discharge control unit, a capacitor C1, a switch K2, a switch K3, a switch K4, a switch K5, a switch K6, a switch K7, a switch K8, a switch K9, an inductor L1, a current detection device CT1 and a current detection device CT2, the charge and discharge control unit provides a charging current or a discharge path for the capacitor C1, and includes a voltage source P1, a resistor R1 and a switch K1, a first end of the resistor R1 is connected to the positive electrode of the high voltage source P1 (as the positive electrode of the output end of the charge and discharge control unit), and a second end of the resistor R1 is connected to the positive electrode of the switch K1. The first end and the second end of the switch K1 are connected to the negative electrode of the high-voltage source P1 (as the negative electrode of the output end of the charge and discharge control unit), the upper plate of the capacitor C1 is connected to the first end of the resistor R1, and the lower plate of the capacitor C1 is connected to the second end of the switch K1. The voltage source P1 provides the bus voltage to charge the capacitor C1. The resistor R1 and the switch K1 form a discharge circuit. After the equipment is powered off, a discharge loop is provided for the bus capacitor C1. When the switch K1 is turned on, the capacitor C1 is discharged through the switch K1 and the resistor R1. The resistor R1 is used to control the discharge current of the capacitor C1 and safely discharge the voltage of the capacitor C1 after the test. The capacitor C1 is a capacitor group fixed by the laminated busbar.

[0022] The IGBT module includes a transistor Q1, a transistor Q2, a transistor Q3, a transistor Q4, a diode D1, a diode D2, a diode D3, a diode D4, a diode DC1, and a diode DC2. The first end of the transistor Q1 is connected to the second end of the switch K6, the second end of the transistor Q1 is connected to the first end of the transistor Q2, the control end receives a first control signal CTL1, the second end of the transistor Q2 is connected to the first end of the transistor Q3, the control end receives a second control signal CTL2, the second end of the transistor Q3 is connected to the first end of the transistor Q4, the control end receives a third control signal CTL3, the second end of the transistor Q4 is connected to the first end of the switch K7, the control end receives a fourth control signal CTL4, and the cathode of the diode D1 The first end of the transistor Q1 is connected, the anode of the diode D1 is connected to the second end of the transistor Q1, the cathode of the diode D2 is connected to the first end of the transistor Q2, the anode of the diode D2 is connected to the second end of the transistor Q2, the cathode of the diode D3 is connected to the first end of the transistor Q3, the anode of the diode D3 is connected to the second end of the transistor Q3, the cathode of the diode D4 is connected to the first end of the transistor Q4, the anode of the diode D4 is connected to the second end of the transistor Q4, the cathode of the diode DC1 is connected to the second end of the transistor Q1, the anode of the diode DC1 is connected to the cathode of the diode DC2, the anode of the diode DC2 is connected to the first end of the transistor Q4, the first end of the switch K2 is connected to the upper plate of the capacitor C1, and the second end of the switch K2 is connected to the switch A first end of switch K3 and a second end of switch K3 are connected to the lower plate of capacitor C1, a first end of current detection device CT1 is connected to a first end of switch K2, a second end of current detection device CT1 is connected to a first end of switch K4, a second end of switch K4 is connected to a first end of switch K5, a second end of switch K5 is connected to a first end of current detection device CT2, a second end of current detection device CT2 is connected to a second end of switch K3, a first end of switch K6 is connected to a second end of current detection device CT1, a second end of switch K7 is connected to a first end of current detection device CT2, a first end of switch K8 is connected to a first end of switch K6, a second end of switch K8 is connected to a first end of switch K9, and a second end of switch K9 is connected to a second end of switch K7 The first end of the inductor L1 is connected to the connection point between the second end of the transistor Q2 and the first end of the transistor Q3, the second end of the inductor L1 is connected to the connection point between the switch K2 and the switch K3, the switch K2 and the switch K3 control the switch of the upper tube or the lower tube of the IGBT module under test to cut into the circuit under test, the inductor L1 is a hollow inductor, which serves as the load in the test circuit, the current detection devices CT1 and CT2 are respectively placed at the positive and negative poles to detect the current of the device under test, the switch K4 and the switch K5 control the switch of the short-circuit test of the IGBT module under test, the switch K6, the switch K7, the switch K8 and the switch K9 control which tube in the IGBT module under test cuts into the relay of the circuit under test,Through different switch combinations, the test of transistors Q1-Q4, diodes D1-D4, diode DC1 and diode DC2 in the I-type three-level module can be completed on the traditional two-level power supply architecture.

[0023] It also includes a power supply U1 and a signal acquisition system U2. The power supply U1 provides control end signals for transistors Q1, Q2, Q3, and Q4. In this embodiment, the power supply U1 is four independent gate power supplies controlled by DSP, and can provide a maximum controllable voltage of ±20V for controlling the on and off of the IGBT. By changing the sampling point position of the signal acquisition system U2, the sampling point parameters can be extracted.

[0024] like Figure 2-4 As shown, the test principle of the utility model test circuit for transistor Q1 and diode DC1, diode D3, and diode D4 is introduced below. Figure 2 The solid line in the middle represents the conduction path of the test circuit of transistor Q1 or transistor Q2, and the dotted line represents the conduction path of the diode test circuit, wherein the DC1 freewheeling circuit represents the conduction path of the diode DC1 test circuit, and the D3&D4 freewheeling circuit represents the conduction path of the test circuit of diode D3 and diode D4. It should be noted that the test work of diode D3 and diode D4 can be completed when testing transistor Q1 or when testing transistor Q2. Figure 3 This is the IGBT turn-on timing diagram when testing transistor Q1 and diode DC1. Figure 4 This is the IGBT turn-on timing diagram when testing transistor Q2 and diodes D3 and D4.

[0025] See also Figure 2When testing transistor Q1 and diode DC1, switch K3, switch K6, and switch K9 are closed, and the other switches are disconnected. At this time, transistor Q2 is used as a test tube (constituting a conduction loop when testing transistor Q1). Power supply U1 always gives a +15V voltage to the gate of transistor Q2 to ensure that transistor Q2 is in a conducting state. Transistor Q3 and transistor Q4 do not participate in the test. Power supply U1 gives a -15V voltage to the gate of transistor Q3 and transistor Q4 to prevent misconduction. A pulse signal is given to the control end of transistor Q1 through power supply U1. When transistor Q1 is turned on, transistor Q2 is also turned on at this time. The current flows from the upper plate of capacitor C1 through current detection device CT1, switch K6, the first end of transistor Q1, the second end of transistor Q1, the first end of transistor Q2, the second end of transistor Q2, the first end of inductor L1, the second end of inductor L1, switch K3 and returns to the lower plate of capacitor C1. Continue to give a low level to the control end of transistor Q1, transistor Q1 is turned off, and the current in the test loop rises linearly, satisfying U=L×di / dt, where U represents the bus voltage, that is, the voltage across capacitor C1, and L is the load in the loop, that is, inductor L1. Due to the characteristic that the current of inductor L1 does not change suddenly, the freewheeling is turned on in the loop where transistor Q2 and diode DC1 are located, and the current flows from the first end of inductor L1 through the second end of inductor L1, switch K3, current detection device CT2, switch K9, diode DC1, the first end of transistor Q2, the second end of transistor Q2, and returns to the first end of inductor L1, forming Figure 2 The DC1 freewheeling circuit shown in the figure, by controlling the position of the signal sampling point and collecting the voltage and current waveforms by the current detection device CT2, realizes the extraction of the dynamic parameters of the diode DC1 on and off, and realizes the performance test of the diode DC1. When the second pulse of the transistor Q1 is turned on, the diode DC1 is cut off, and the conduction path is still the solid line part of the conduction path. Through the current detection device CT1, the current detection device CT2 and the signal acquisition system, the current waveform flowing through the transistor Q1 and the diode DC1 and the voltage waveform across the transistor Q1 during the entire test process are collected to extract the dynamic characteristic parameters of the transistor Q1 and the diode DC1.

[0026] Continue reading Figure 2 If the test of diode D3 and diode D4 is placed when testing transistor Q1, switch K9 is opened and switch K7 is closed. Similarly, due to the characteristic that the current of inductor L1 does not change suddenly, the freewheeling is turned on in the loop where diode D3 and diode D4 are located. At this time, the current flows from the first end of inductor L1 through the second end of inductor L1, switch K3, current detection device CT2, diode D4, diode D3 and back to the first end of inductor L1, forming Figure 2 The D3&D4 freewheeling loop shown in FIG. 1 , at this time, the diode D3 and the diode D4 are tested by controlling the position of the signal sampling point and the current detection device CT2.

[0027] Similarly, transistor Q1 can be controlled to be turned on in advance as a companion test tube, and a double pulse test can be performed on transistor Q2. Power supply U1 always provides a +15V voltage to the gate of transistor Q1 to ensure that transistor Q1 is in the on state. Transistor Q3 and transistor Q4 do not participate in the test. Power supply U1 provides a -15V voltage to the gate of transistor Q3 and transistor Q4 to prevent mis-conduction. A pulse signal is given to the control end of transistor Q2 through power supply U1, and the test of transistor Q2 is achieved by judging whether transistor Q2 is normally turned on. When transistor Q2 is turned on, transistor Q1 is also turned on at this time. The current flows from the upper plate of capacitor C1 through current detection device CT1, switch K6, the first end of transistor Q1, the second end of transistor Q1, the first end of transistor Q2, the second end of transistor Q2, the first end of inductor L1, the second end of inductor L1, and switch K3 back to the lower plate of capacitor C1.

[0028] When performing a double pulse test on transistor Q2, the test work on diodes D3 and D4 can be placed in the test of transistor Q2, which can reduce the amount of testing and does not need to repeat the same test item. Similarly, when switch K7 is closed, due to the characteristic that the current of inductor L1 does not change suddenly, the freewheeling current is turned on in the loop where diodes D3 and D4 are located. At this time, the current flows from the first end of inductor L1 through the second end of inductor L1, switch K3, current detection device CT2, diode D4, diode D3 and back to the first end of inductor L1, forming Figure 2 The D3&D4 freewheeling loop shown in FIG. 1 , at this time, the diode D3 and the diode D4 are tested by controlling the position of the signal sampling point and the current detection device CT2.

[0029] like Figure 5 As shown, the test principle of the test circuit of the utility model for transistor Q4 and diode DC2, diode D1, and diode D2 is introduced below. The solid line represents the conduction path of the test circuit of transistor Q4 or transistor Q3, and the dotted line represents the conduction path of the diode test circuit. The DC2 freewheeling circuit represents the conduction path of the test circuit of diode DC2, and the D1&D2 freewheeling circuit represents the conduction path of the test circuit of diode D1 and diode D2. It should be noted that the test work of diode D1 and diode D2 can be completed when testing transistor Q4 or when testing transistor Q3. Figure 6 This is the IGBT turn-on timing diagram when testing transistor Q4 and diode DC2. Figure 7 This is the IGBT turn-on timing diagram when testing transistor Q3 and diodes D1 and D2.

[0030] See also Figure 5When testing transistor Q4 and diode DC2, switch K2, switch K7, and switch K8 are closed, and the other switches are disconnected. At this time, transistor Q3 is used as a test tube (constituting a conduction loop when testing transistor Q4). Power supply U1 always gives a +15V voltage to the gate of transistor Q3 to ensure that transistor Q3 is in a conducting state. Transistor Q1 and transistor Q2 do not participate in the test. Power supply U1 gives a -15V voltage to the gates of transistor Q1 and transistor Q2 to prevent misconduction. A pulse signal is given to the control end of transistor Q4 through power supply U1. When transistor Q4 is turned on, transistor Q3 is also turned on at this time. The current flows from the upper plate of capacitor C1 through switch K2, the second end of inductor L1, the first end of inductor L1, the first end of transistor Q3, the second end of transistor Q3, the first end of transistor Q4, the second end of transistor Q4, switch K7, and current detection device CT2 back to the lower plate of capacitor C1. Continue to give a low level to the control end of transistor Q4, transistor Q4 is turned off, and due to the characteristic that the current of inductor L1 does not change suddenly, the freewheeling is turned on in the loop where transistor Q3 and diode DC2 are located, and the current flows from the second end of inductor L1 through the first end of inductor L1, the first end of transistor Q3, the second end of transistor Q3, diode DC2, switch K8, current detection device CT1, switch K2 and back to the second end of inductor L1, forming Figure 5 The DC2 freewheeling circuit shown in the figure controls the position of the sampling point and the current detection device CT1 to collect the voltage and current waveforms, thereby extracting the dynamic parameters of the diode DC2 on and off, and testing the diode DC2. When the second pulse of transistor Q4 is turned on, diode DC2 is cut off, and the conduction path is still the solid line part of the conduction path. Through the current detection device CT1, the current detection device CT2 and the signal acquisition system, the current waveform flowing through transistor Q4 and diode DC2 and the voltage waveform across transistor Q4 during the entire test process are collected to extract the dynamic characteristic parameters of transistor Q4 and diode DC2.

[0031] Continue reading Figure 5 , if the test of diode D1 and diode D2 is placed when testing transistor Q4, at this time, switch K8 is opened and switch K6 is closed. Similarly, due to the characteristic that the current of inductor L1 does not change suddenly, the freewheeling is turned on in the loop where diode D1 and diode D2 are located. At this time, the current flows from the second end of inductor L1 through the first end of inductor L1, diode D2, diode D1, switch K6, current detection device CT1, switch K2 and returns to the second end of inductor L1, forming Figure 5 The D1&D2 freewheeling loop shown in FIG. 1 , at this time, the diode D1 and the diode D2 are tested by controlling the position of the signal sampling point and the current detection device CT1.

[0032] Similarly, transistor Q4 can be controlled to be turned on in advance as a companion test tube, and a double pulse test can be performed on transistor Q3. Power supply U1 always gives a +15V voltage to the gate of transistor Q4 to ensure that transistor Q4 is in the on state. Transistor Q1 and transistor Q2 do not participate in the test. Power supply U1 gives a -15V voltage to the gates of transistor Q1 and transistor Q2 to prevent mis-conduction. A pulse signal is given to the control end of transistor Q3 through power supply U1, and the test of transistor Q3 is achieved by judging whether transistor Q3 is normally turned on. When transistor Q3 is turned on, transistor Q4 is also turned on at this time. The current flows from the upper plate of capacitor C1 through switch K2, the second end of inductor L1, the first end of inductor L1, the first end of transistor Q3, the second end of transistor Q3, the first end of transistor Q4, the second end of transistor Q4, switch K7, and current detection device CT2 back to the lower plate of capacitor C1.

[0033] When performing a double pulse test on transistor Q3, the test work on diodes D1 and D2 can be placed in the test of transistor Q3, which can reduce the amount of testing and does not need to repeat the same test item. Similarly, when switch K6 is closed, due to the characteristic that the current of inductor L1 does not change suddenly, the freewheeling current is turned on in the loop where diodes D1 and D2 are located. At this time, the current flows from the second end of inductor L1 through the first end of inductor L1, diode D2, diode D1, switch K6, current detection device CT1, switch K2 and back to the second end of inductor L1, forming Figure 5 The D1&D2 freewheeling loop shown in FIG. 1 , at this time, the diode D1 and the diode D2 are tested by controlling the position of the signal sampling point and the current detection device CT1.

[0034] The utility model is based on the traditional half-bridge topology on the two-level power supply architecture, and four groups of switches, namely switch K6, switch K7, switch K8 and switch K9, are arranged in the circuit. By setting a reasonable switch combination, by controlling the opening timing of the internal transistors Q1-Q4 of the IGBT module under test, and using the internal IGBT of the tested device as a companion test, the dynamic parameter test of the I-type three-level module is completed on the two-level power supply architecture. By controlling the on-off of switches K6-K9, a reasonable opening and closing timing is set for the transistors Q1-Q4 in the IGBT module, and the dynamic parameter test of the external parallel diode of the I-type three-level is completed, so that the test of all transistors and diodes is completed under the same test loop. There is no need to add a negative potential to the two-level power supply architecture of positive potential and zero potential, and the problem that the freewheeling diode connected in parallel to the outside of the inner IGBT is difficult to complete the opening test and reverse recovery test according to the requirements of the standard is solved.

[0035] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A I-type three-level IGBT module dynamic characteristics test circuit, characterized in that: It includes an IGBT module, a charge and discharge control unit, a capacitor C1, a switch K2, a switch K3, a switch K6, a switch K7, a switch K8, a switch K9, an inductor L1, a current detection device CT1 and a current detection device CT2. The IGBT module includes a transistor Q1, a transistor Q2, a transistor Q3, a transistor Q4, a diode D1, a diode D2, a diode D3, a diode D4, a diode DC1 and a diode DC2. The first end of the transistor Q1 is connected to the second end of the switch K6, the second end of the transistor Q1 is connected to the first end of the transistor Q2, the second end of the transistor Q2 is connected to the first end of the transistor Q3, the second end of the transistor Q3 is connected to the first end of the transistor Q4, the second end of the transistor Q4 is connected to the first end of the switch K7, and each diode is connected in parallel to the two ends of the corresponding transistor, the cathode of the diode is connected to the first end of the corresponding transistor, and the anode is connected to the second end of the transistor; The positive electrode of the output end of the charge and discharge control unit is connected to the upper plate of the capacitor C1, the negative electrode of the output end is connected to the lower plate of the capacitor C1, the cathode of the diode DC1 is connected to the second end of the transistor Q1, the anode of the diode DC1 is connected to the cathode of the diode DC2, the anode of the diode DC2 is connected to the first end of the transistor Q4, the first end of the switch K2 is connected to the upper plate of the capacitor C1, the second end of the switch K2 is connected to the first end of the switch K3, the second end of the switch K3 is connected to the lower plate of the capacitor C1, the first end of the current detection device CT1 is connected to the first end of the switch K2, and the The second end is connected to the second end of the switch K3, the first end of the switch K6 is connected to the second end of the current detection device CT1, the second end of the switch K7 is connected to the first end of the current detection device CT2, the first end of the switch K8 is connected to the first end of the switch K6, the second end of the switch K8 is connected to the first end of the switch K9, the second end of the switch K9 is connected to the second end of the switch K7, the second end of the switch K8 is connected to the anode of the diode DC1, the first end of the inductor L1 is connected to the connection point between the second end of the transistor Q2 and the first end of the transistor Q3, and the second end of the inductor L1 is connected to the connection point between the switch K2 and the switch K3.

2. The I-type three-level IGBT module dynamic characteristics test circuit according to claim 1, characterized in that: The charge and discharge control unit includes a voltage source P1 and a switch K1, a first end of the switch K1 is connected to the positive electrode of the high voltage source P1, a second end is connected to the negative electrode of the high voltage source P1, an upper plate of the capacitor C1 is connected to the first end of the switch K1, and a lower plate of the capacitor C1 is connected to the second end of the switch K1.

3. The I-type three-level IGBT module dynamic characteristics test circuit according to claim 2, characterized in that: The charge and discharge control unit further includes a resistor R1 , a first end of the resistor R1 is connected to the positive electrode of the high voltage source P1 , and a second end of the resistor R1 is connected to the first end of the switch K1 .

4. The I-type three-level IGBT module dynamic characteristics test circuit according to claim 1, characterized in that: It also includes a switch K4 and a switch K5, the second end of the current detection device CT1 is connected to the first end of the switch K4, the second end of the switch K4 is connected to the first end of the switch K5, and the second end of the switch K5 is connected to the first end of the current detection device CT2.

5. The I-type three-level IGBT module dynamic characteristics test circuit according to claim 1, characterized in that: A cathode of the diode D1 is connected to a first end of the transistor Q1, an anode of the diode D1 is connected to a second end of the transistor Q1, a cathode of the diode D2 is connected to a first end of the transistor Q2, an anode of the diode D2 is connected to a second end of the transistor Q2, a cathode of the diode D3 is connected to a first end of the transistor Q3, an anode of the diode D3 is connected to a second end of the transistor Q3, a cathode of the diode D4 is connected to a first end of the transistor Q4, and an anode of the diode D4 is connected to a second end of the transistor Q4.

6. The I-type three-level IGBT module dynamic characteristics test circuit according to claim 1, characterized in that: It also includes a power supply U1 and a signal acquisition system U2. The power supply U1 provides control end signals for transistors Q1, Q2, Q3 and Q4. The signal acquisition system U2 is used to collect sampling point parameters.

7. The I-type three-level IGBT module dynamic characteristics test circuit according to claim 6, characterized in that: The power supply U1 is four independent gate power supplies, providing a maximum controllable voltage of ±20V.

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