LED constant-current driving circuit of BUCK architecture based on LPF

Abstract

According to the LED constant-current driving circuit based on the BUCK architecture of the LPF, when the LED constant-current driving circuit just enters the OTR, the curve slope of the OTR time along with the temperature change is slow, the rising speed of the OTR time along with the temperature rise is slow, and the situation that an LED lamp flashes due to the fact that the switching frequency change is too large when the LED constant-current driving circuit enters the OTR is avoided. As the curve slope of the OTR time changing along with the temperature is gradually increased along with the temperature rise, the curve slope of the OTR time changing along with the temperature is steep after a period of time of OTR, so that the switching frequency and the power consumption are reduced, the current supplied to the LED module is greatly reduced, and the temperature of the driving chip is controlled to be a dynamic equilibrium temperature.

Description

Technical Field

[0001] The present application relates to the technical field of LED constant current driving, and in particular to an LED constant current driving circuit based on a BUCK architecture of an LPF. Background Art

[0002] LEDs currently widely use constant current drive mode, that is, to ensure that the output current is stable and unchanged. Therefore, within a specific range, changes in the load will directly cause corresponding changes in the output DC voltage, and its magnitude is proportional to the resistance of the load. The constant current circuit can effectively deal with the situation of load short circuit, but it is necessary to avoid the load being completely open. It is worth noting that the luminous flux of the LED will gradually weaken as the temperature rises. Therefore, the temperature control of the LED working environment is extremely critical. In practical applications, two aspects can be taken into consideration: one is to design an efficient heat dissipation system, and the other is to reduce the heat generation of the power supply as much as possible. The overall development trend of LED driver chips is moving towards higher constant current accuracy, excellent temperature control technology, and the improvement of conversion efficiency and power factor. The switch-type LED constant current driver not only meets the startup requirements of all DC LED lamps, but also stands out with its excellent constant current accuracy.

[0003] However, chip self-heating or excessively high ambient temperature may cause the chip to overheat. To ensure long-term use of the power supply, the chip is usually equipped with an OTR function, i.e., over-temperature automatic regulation. This function reduces heat generation by reducing the output current, thereby reducing the LED power and its own power consumption. The means to achieve this goal is to reduce the switching frequency. When the chip temperature exceeds the safe range, the inductor current will enter the discontinuous mode, resulting in a decrease in the average current. Specifically, if Figure 1 As shown, before entering OTR, the power MOS is turned on for TON and turned off for TOFF; after entering OTR, the power MOS is turned on for TON and turned off for TOFF+TFREE.

[0004] The existing OTR algorithm is that TFREE time increases linearly with temperature. If the slope of the TFREE time vs. temperature curve is slow, when the chip temperature is too high, the power consumption may not be reduced quickly. If the slope of the TFREE time vs. temperature curve is steep, although the chip temperature can be effectively reduced, it may cause a flashing light when the OTR is just entered. Utility Model Content

[0005] The purpose of the embodiments of the present application is to provide an LED constant current driving circuit based on a BUCK architecture of an LPF, so as to solve the problems existing in the existing OTR algorithm, such as the inability to quickly reduce power consumption and causing flashing lights when just entering OTR.

[0006] An embodiment of the present application provides an LED constant current driving circuit based on a BUCK architecture of an LPF, comprising: a BUCK circuit and a driving module;

[0007] The driver module is used to control the on / off of the MOS tube in the BUCK circuit;

[0008] The driving module includes an OTR module, which is used to control the shutdown time of the MOS tube in the BUCK circuit in each cycle to increase the OTR time when the temperature of the driving module reaches the OTR threshold;

[0009] Among them, the OTR time satisfies the following conditions: the slope of the curve of the OTR time changing with temperature gradually increases as the temperature increases.

[0010] In the above technical solution, when just entering OTR, the slope of the curve of OTR time changing with temperature is relatively slow, and as the temperature rises, the OTR time rises slowly, so as to avoid the LED light flashing caused by excessive change in switching frequency when entering OTR. Since the slope of the curve of OTR time changing with temperature gradually increases with the increase in temperature, after entering OTR for a period of time, the slope of the curve of OTR time changing with temperature is relatively steep, so as to reduce the switching frequency, reduce power consumption, and greatly reduce the current supplied to the LED module, so as to control the temperature of the driver chip at a dynamic equilibrium temperature.

[0011] In some optional embodiments, the OTR module includes: a current IOTR generating circuit and an OTR time generating circuit;

[0012] The current IOTR generating circuit is used for entering the OTR according to the voltage VBE with a negative temperature coefficient when the voltage VBE is less than the reference voltage VREF, and generating the current IOTR which increases linearly with the increase of temperature;

[0013] The OTR time generating circuit is used to determine the end time of the OTR time in each cycle according to the current IOTR.

[0014] In the above technical solution, the current IOTR generating circuit enters OTR according to the voltage VBE with a negative temperature coefficient when the voltage VBE is less than the reference voltage VREF, and generates a current IOTR that increases linearly with increasing temperature; the OTR time generating circuit determines the end time of the OTR time in each cycle according to the current IOTR, and enters the next cycle of switch control of the power MOS tube at the end of the OTR through chip logic control.

[0015] In some optional implementations, the current IOTR generating circuit includes: a first comparator, a transistor and a first current mirror circuit;

[0016] The base of the transistor is connected to the collector of the transistor, the emitter of the transistor is grounded, and the collector of the transistor is connected to the negative input terminal of the first comparator; the positive input terminal of the first comparator is connected to the reference voltage VREF; the output terminal of the first comparator is connected to one end of the first current mirror circuit, and the other end of the first current mirror circuit outputs the current IOTR.

[0017] In the above technical solution, the temperature characteristics of the transistor are used to generate a voltage VBE with a negative temperature coefficient, and the voltage VBE is compared with the reference voltage VREF by a first comparator. When the voltage VBE is less than the reference voltage VREF, it enters OTR, and a current mirror circuit is used to copy the current at the output end of the first comparator to obtain the current IOTR.

[0018] In some optional implementations, the OTR time generating circuit includes: a second current mirror circuit, a third current mirror circuit, a fourth current mirror circuit, a fifth current mirror circuit, a first current source, a second current source, a second comparator, a third capacitor, a fourth PMOS transistor and a first NMOS transistor;

[0019] A first end of the second current mirror circuit is used for inputting the current IOTR, a second end of the second current mirror circuit is connected to the source of the fourth PMOS tube, and a gate of the fourth PMOS tube is connected to the voltage ZCD_OK;

[0020] The first end of the third current mirror circuit is used to input the current IOTR, the second end of the third current mirror circuit is connected to the first end of the fourth current mirror circuit, the second end of the fourth current mirror circuit is connected to the output end of the second current source, and the input end of the second current source is connected to the power supply; the output end of the second current source is also connected to the first end of the fifth current mirror circuit, and the second end of the fifth current mirror circuit is connected to the source of the first NMOS tube; the source of the first NMOS tube is also connected to the input end of the first current source, and the output end of the first current source is grounded;

[0021] The drains of the fourth PMOS tube and the first NMOS tube are both connected to the first end of the third capacitor, the second end of the third capacitor is grounded, the first end of the third capacitor is also connected to the negative input end of the second comparator, and the positive input end of the second comparator is connected to the reference voltage VREF1; wherein the voltage ZCD_OK is at a low level during the off time and the on time, and the voltage ZCD_OK is at a high level during the OTR time.

[0022] In the above technical solution, when the temperature of the driving module is higher than the OTR threshold, the OTR is entered, and at this time, one cycle of the power MOS tube is divided into three stages: the on time TON, the off time TOFF and the OTR time TFREE. In the stages of the on time TON and the off time TOFF, ZCD_OK is at a low level, the fourth PMOS tube is turned on, the first NMOS tube is turned off, and the current IOTR charges the third capacitor through the second current mirror circuit and the fourth PMOS tube. At this time, the first terminal voltage Vc of the third capacitor is greater than the reference voltage VREF1, and the second comparator outputs a low level.

[0023] When the circuit is in the stage of OTR time TFREE, ZCD_OK is high level, the fourth PMOS tube is turned off, the first NMOS tube is turned on, and the third capacitor starts to discharge. After the current IOTR passes through the third current mirror circuit and the fourth current mirror circuit, the current flowing through the second end of the fourth current mirror circuit is the current IOTR. Under the action of the second current source IREF_H, the current flowing through the first end of the fifth current mirror circuit is IREF_H-IOTR. After the replication of the fifth current mirror circuit, the current flowing through the second end of the fifth current mirror circuit is IREF_H-IOTR. This current plus the current IREF_L of the first current source is the discharge current of the third capacitor, and the discharge current is IREF_H-IOTR+IREF_L. As the third capacitor discharges, the voltage Vc of the first end of the third capacitor decreases. When the voltage Vc decreases to the reference voltage VREF1, the second comparator outputs a high level. At this time, through the chip logic, the OTR time TFREE ends and re-enters the next cycle of TON and TOFF.

[0024] Among them, when the third capacitor is charged:

[0025] (TON+TOFF)×IOTR=ΔVc×C

[0026] When the third capacitor is discharged:

[0027] TFREE×(IREF_H-IOTR+IREF_L)=ΔVc×C

[0028] Combining the above two equations, we can get:

[0029] TFREE=(TON+TOFF)×IOTR / (IREF_H-IOTR+IREF_L)

[0030] The output current after entering the OTR is:

[0031] IOUT=I0×(TON+TOFF) / (TON+TOFF+TFREE)=I0×[1-

[0032] TFREE / (TON+TOFF+TFREE)]

[0033] From the above formula, it can be seen that if TFREE remains unchanged, IOUT will increase as TON increases, and IOUT will decrease as TON decreases. The size of TON is directly related to VIN, and TON decreases as the bus voltage VIN increases. If TFREE remains fixed at a temperature, the output current IOUT is affected by the bus voltage ripple, which will cause the LED light to flicker.

[0034] However, this embodiment utilizes the charging and discharging process of the third capacitor to achieve the change of TFREE time under different bus voltages VIN. That is, when the bus voltage is large, TFREE time is reduced; when the bus voltage is small, TFREE becomes large, so as to ensure the stability of the output current IOUT. The reason is:

[0035] Substituting the TFREE calculation formula into the IOUT formula, we can get:

[0036] IOUT=I0×[1-IOTR / (IREF_H+IREF_L)]

[0037] According to the above formula, after entering OTR, the output current IOUT has nothing to do with TON and TOFF, that is, IOUT has nothing to do with the input voltage and output voltage. Under the condition of constant temperature, the bus ripple has no effect on the output current, thus avoiding the occurrence of stroboscopic phenomenon after entering OTR.

[0038] In some optional implementations, the BUCK circuit includes: a diode, a second capacitor, a first MOS tube and an inductor;

[0039] The input end of the diode is connected to the second end of the inductor, the first end of the inductor is connected to the second end of the second capacitor, the first end of the second capacitor is connected to the output end of the diode, the first end of the second capacitor is also used to connect to the input end of the LED module, and the second end of the second capacitor is also used to connect to the output end of the LED module;

[0040] The second end of the inductor is connected to the drain of the first MOS tube, the source of the first MOS tube is grounded through the resistor RCS, and the gate of the first MOS tube is connected to the driving module.

[0041] In some optional implementations, it further includes a rectifier module and a first capacitor;

[0042] The rectifier module is used to rectify the AC power supply and then output it; the positive output end of the rectifier module is connected to the first end of the first capacitor, and the negative output end of the rectifier module is connected to the second end of the first capacitor; the positive output end of the rectifier module is used to connect to the input end of the LED module, and the negative output end of the rectifier module is grounded.

[0043] In some optional embodiments, the HV terminal of the driving module is connected to the positive output terminal of the rectifier module, the GND terminal of the driving module is grounded, the CS terminal of the driving module is connected to the first end of the resistor RCS, and the GATE terminal of the driving module is connected to the gate of the first MOS tube.

[0044] An LED driver chip provided in an embodiment of the present application includes: an LED constant current drive circuit as described in any one of the above items, a lead frame, and a plastic packaging material; the LED constant current drive circuit is arranged on the lead frame, and the plastic packaging material is used to seal the LED constant current drive circuit.

[0045] An embodiment of the present application provides a control device for an LED module, comprising an LED constant current drive circuit as described in any one of the above items, and a shell surrounding the LED constant current drive circuit.

[0046] An LED device provided in an embodiment of the present application includes an LED constant current drive circuit as described in any one of the above items, and an LED module; the LED constant current drive circuit is connected to the LED module. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments of the present application will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0048] Figure 1 This is a comparison diagram of duty cycle before and after entering OTR;

[0049] Figure 2 It is the waveform diagram of the output current changing with the bus voltage ripple;

[0050] Figure 3 A structural diagram of an LED constant current drive circuit based on a BUCK architecture of LPF provided in an embodiment of the present application;

[0051] Figure 4 An OTR current generating circuit diagram provided in an embodiment of the present application;

[0052] Figure 5 An OTR time generation circuit diagram provided in an embodiment of the present application;

[0053] Figure 6 A waveform diagram showing the change of TFREE with temperature provided in an embodiment of the present application;

[0054] Figure 7 A schematic diagram of the capacitor charging and discharging process provided in an embodiment of the present application. DETAILED DESCRIPTION

[0055] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0056] The current OTR algorithm is that TFREE time increases linearly with temperature. If the slope of the curve of TFREE time changing with temperature is steep, the switching frequency changes too much when just entering OTR, and the light flickers. If the slope of the curve of TFREE time changing with temperature is slow, when the chip temperature is too high, the power consumption cannot be reduced quickly, causing the chip to explode. In addition, after entering OTR, under the condition of constant temperature, due to the ripple of bus voltage, the TON time will change, resulting in changes in output current and flickering. The waveform of the output current changing with bus voltage is as follows: Figure 2 shown.

[0057] In order to solve the above technical problems, one or more embodiments of the present application provide an LED constant current driving circuit based on a BUCK architecture of an LPF, and the LED constant current driving circuit includes: a BUCK circuit and a driving module.

[0058] The driving module is used to control the on and off of the MOS tube in the BUCK circuit; the driving module includes an OTR module, and the OTR module is used to control the off time of the MOS tube in the BUCK circuit in each cycle to increase the OTR time when the temperature of the driving module reaches the OTR threshold; wherein the OTR time satisfies the following conditions: the slope of the curve of the OTR time changing with temperature gradually increases with the increase of temperature.

[0059] In the embodiment of the present application, when the OTR is just entered, the slope of the curve of the OTR time changing with temperature is relatively slow, and as the temperature rises, the OTR time rises more slowly, so as to avoid the LED light flashing caused by excessive change in switching frequency when entering the OTR. Since the slope of the curve of the OTR time changing with temperature gradually increases with the increase in temperature, after entering the OTR for a period of time, the slope of the curve of the OTR time changing with temperature is relatively steep, so as to reduce the switching frequency, reduce power consumption, and greatly reduce the current supplied to the LED module, thereby controlling the temperature of the driver chip at a dynamic equilibrium temperature.

[0060] For details, please refer to Figure 3 , Figure 3A structural diagram of an LED constant current drive circuit based on an LPF BUCK architecture provided in an embodiment of the present application.

[0061] The BUCK circuit includes: a diode D1, a second capacitor C2, a first MOS tube M1 and an inductor L1; the input end of the diode D1 is connected to the second end of the inductor L1, the first end of the inductor L1 is connected to the second end of the second capacitor C2, the first end of the second capacitor C2 is connected to the output end of the diode D1, the first end of the second capacitor C2 is also used to connect the input end of the LED module, and the second end of the second capacitor C2 is also used to connect the output end of the LED module; the second end of the inductor L1 is connected to the drain of the first MOS tube M1, the source of the first MOS tube M1 is grounded after passing through the resistor RCS, and the gate of the first MOS tube M1 is connected to the driving module.

[0062] In the case of not entering OTR, when the current of the inductor L1 drops to zero, the first MOS tube M1 is turned on. At this time, the current of the inductor L1 starts to rise from zero. The conduction time of the first MOS tube M1 is:

[0063] TON=L×IPEAK / (VIN-VLED)

[0064] Where L is the inductance of the inductor L1, IPEAK is the peak current flowing through the inductor L1; VIN is the DC input voltage after the input end is rectified by the rectifier bridge; VLED is the forward voltage drop on the load LED. When the current of the inductor L1 reaches the set threshold, the first MOS tube M1 is turned off, and the current of the inductor L1 is discharged to the load LED through the freewheeling diode D1 until the current of the inductor L1 drops to zero, and then the first MOS tube M1 is turned on again. The off time of the first MOS tube M1 is:

[0065] TOFF=L×IPEAK / VLED

[0066] So the operating frequency of the LED constant current drive circuit is:

[0067] f=1 / (TON+TOFF)=VLED×(1-VLED / VIN) / (L×IPEAK)

[0068] The LED constant current driving circuit of this embodiment also includes a rectifier module and a first capacitor C1; the rectifier module is used to rectify the AC power supply and then output it; the positive output end of the rectifier module is connected to the first end of the first capacitor C1, and the negative output end of the rectifier module is connected to the second end of the first capacitor C1; the positive output end of the rectifier module is used to connect the input end of the LED module, and the negative output end of the rectifier module is grounded.

[0069] The driving module of this embodiment adopts a driving chip, the HV end of the driving module is connected to the positive output end of the rectifier module, the GND end of the driving module is grounded, the CS end of the driving module is connected to the first end of the resistor RCS, and the GATE end of the driving module is connected to the gate of the first MOS tube M1.

[0070] When the temperature of the driver chip reaches the OTR threshold, it enters OTR. At this time, the current of the inductor L1 enters the discontinuous mode, reducing the switching frequency of the first MOS tube M1, thereby reducing the average current to achieve temperature regulation. The discontinuous time is TFREE.

[0071] The OTR module of this embodiment includes: a current IOTR generating circuit and an OTR time generating circuit.

[0072] Among them, the current IOTR generating circuit is used to enter the OTR according to the voltage VBE with a negative temperature coefficient when the voltage VBE is less than the reference voltage VREF, and generate a current IOTR that increases linearly with the increase of temperature; the OTR time generating circuit is used to determine the end time of the OTR time in each cycle according to the current IOTR.

[0073] In an embodiment of the present application, the current IOTR generating circuit enters OTR according to the voltage VBE with a negative temperature coefficient when the voltage VBE is less than the reference voltage VREF, and generates a current IOTR that increases linearly with increasing temperature; the OTR time generating circuit determines the end time of the OTR time in each cycle according to the current IOTR, and enters the next cycle of switch control of the power MOS tube at the end of the OTR through chip logic control.

[0074] Please refer to Figure 4 , Figure 4 This is a structural diagram of a current IOTR generating circuit provided in an embodiment of the present application. The current IOTR generating circuit includes: a first comparator D2, a transistor M2 and a first current mirror circuit.

[0075] Among them, the base of the transistor M2 is connected to the collector of the transistor M2, the emitter of the transistor M2 is grounded, and the collector of the transistor M2 is connected to the negative input terminal of the first comparator D2; the positive input terminal of the first comparator D2 is connected to the reference voltage VREF; the output terminal of the first comparator D2 is connected to one end of the first current mirror circuit, and the other end of the first current mirror circuit outputs the current IOTR.

[0076] The first current mirror circuit includes a third MOS tube M3 and a fourth MOS tube M4, wherein the drain of the third MOS tube M3 is connected to the output end of the first comparator D2, the drain of the third MOS tube M3 is connected to the gate of the third MOS tube M3, the gate of the third MOS tube M3 is connected to the gate of the fourth MOS tube M4, the source of the third MOS tube M3 is grounded, the drain of the fourth MOS tube M4 outputs the current IOTR, and the source of the fourth MOS tube M4 is grounded.

[0077] In the embodiment of the present application, the temperature characteristics of the transistor M2 are used to generate a voltage VBE with a negative temperature coefficient, and the voltage VBE is compared with the reference voltage VREF by the first comparator D2. When the voltage VBE is less than the reference voltage VREF, it enters OTR, and the current at the output end of the first comparator D2 is copied by a current mirror circuit to obtain the current IOTR.

[0078] Please refer to Figure 5 , Figure 5 The structure diagram of the OTR time generating circuit provided in the embodiment of the present application includes: a second current mirror circuit, a third current mirror circuit, a fourth current mirror circuit, a fifth current mirror circuit, a first current source IREF_L, a second current source IREF_H, a second comparator D3, a third capacitor C3, a fourth PMOS tube MP4 and a first NMOS tube MN1.

[0079] Wherein, the first end of the second current mirror circuit is used for inputting current IOTR, the second end of the second current mirror circuit is connected to the source of the fourth PMOS tube MP4, and the gate of the fourth PMOS tube MP4 is connected to the voltage ZCD_OK; the first end of the third current mirror circuit is used for inputting current IOTR, the second end of the third current mirror circuit is connected to the first end of the fourth current mirror circuit, the second end of the fourth current mirror circuit is connected to the output end of the second current source IREF_H, and the input end of the second current source IREF_H is connected to the power supply; the output end of the second current source IREF_H is also connected to the first end of the fifth current mirror circuit, and the second end of the fifth current mirror circuit is connected to the power supply. The source of the first NMOS tube MN1 is connected; the source of the first NMOS tube MN1 is also connected to the input end of the first current source IREF_L, and the output end of the first current source IREF_L is grounded; the drains of the fourth PMOS tube MP4 and the first NMOS tube MN1 are both connected to the first end of the third capacitor C3, the second end of the third capacitor C3 is grounded, the first end of the third capacitor C3 is also connected to the negative input end of the second comparator D3, and the positive input end of the second comparator D3 is connected to the reference voltage VREF1; wherein the voltage ZCD_OK is at a low level during the off time and the on time, and the voltage ZCD_OK is at a high level during the OTR time.

[0080] In this embodiment, the first PMOS tube MP1 and the third PMOS tube MP3 form a second current mirror circuit, the first PMOS tube MP1 and the second PMOS tube MP2 form a third current mirror circuit, the second NMOS tube MN2 and the third NMOS tube MN3 form a fourth current mirror circuit, and the fourth NMOS tube MN4 and the fifth NMOS tube MN5 form a fifth current mirror circuit. The drain of the first PMOS tube MP1 inputs the current IOTR, the drain of the first PMOS tube MP1 is connected to the gate of the first PMOS tube MP1, the source of the first PMOS tube MP1 is connected to the source of the second PMOS tube MP2 and the source of the third PMOS tube MP3, the source of the first PMOS tube MP1 is connected to the power supply, the gate of the first PMOS tube MP1 is connected to the gate of the second PMOS tube MP2 and the gate of the third PMOS tube MP3; the drain of the second PMOS tube MP2 is connected to the drain of the second NMOS tube MN2, the drain of the second NMOS tube MN2 is connected to the gate of the second NMOS tube MN2, the source of the second NMOS tube MN2 is connected to the source of the third NMOS tube MN3, and the second NMOS tube MN2 is connected to the gate of the second NMOS tube MN2. The gate of the third NMOS tube MN3 is connected to the gate of the third NMOS tube MN3, the drain of the third NMOS tube MN3 is connected to the node V1, the node V1 is connected to the output end of the second current source IREF_H, the node V1 is connected to the node V2, the node V2 is connected to the drain of the fourth NMOS tube MN4, the drain of the fourth NMOS tube MN4 is connected to the gate of the fourth NMOS tube MN4, the source of the fourth NMOS tube MN4 is connected to the source of the third NMOS tube MN3, the gate of the fourth NMOS tube MN4 is connected to the gate of the fifth NMOS tube MN5, the drain of the fifth NMOS tube MN5 is connected to the source of the first NMOS tube MN1, the source of the fifth NMOS tube MN5 is connected to the source of the fourth NMOS tube MN4, and the source of the fifth NMOS tube MN5 is grounded. The drain of the third PMOS tube MP3 is connected to the source of the fourth PMOS tube MP4.

[0081] In the embodiment of the present application, when the temperature of the driving module is higher than the OTR threshold, the OTR is entered, and at this time, one cycle of the power MOS tube is divided into three stages: the on time TON, the off time TOFF, and the OTR time TFREE. In the stages of the on time TON and the off time TOFF, ZCD_OK is at a low level, the fourth PMOS tube MP4 is turned on, the first NMOS tube MN1 is turned off, and the current IOTR charges the third capacitor C3 through the second current mirror circuit and the fourth PMOS tube MP4. At this time, the first terminal voltage Vc of the third capacitor C3 is greater than the reference voltage VREF1, and the second comparator D3 outputs a low level.

[0082] When the circuit is in the stage of OTR time TFREE, ZCD_OK is high level, the fourth PMOS tube MP4 is turned off, the first NMOS tube MN1 is turned on, and the third capacitor C3 starts to discharge. After the current IOTR passes through the third current mirror circuit and the fourth current mirror circuit, the current flowing through the second end of the fourth current mirror circuit is the current IOTR. Under the action of the second current source IREF_HIREF_H, the current flowing through the first end of the fifth current mirror circuit is IREF_H-IOTR. After the replication of the fifth current mirror circuit, the current flowing through the second end of the fifth current mirror circuit is IREF_H-IOTR. This current plus the current IREF_L of the first current source IREF_L is the discharge current of the third capacitor C3, and the discharge current is IREF_H-IOTR+IREF_L. As the third capacitor C3 is discharged, the voltage Vc of the first end of the third capacitor C3 decreases. When the voltage Vc decreases to the reference voltage VREF1, the second comparator D3 outputs a high level. At this time, through the chip logic, the OTR time TFREE ends and re-enters the next cycle of TON and TOFF.

[0083] like Figure 7 As shown, when the third capacitor C3 is charged:

[0084] (TON+TOFF)×IOTR=ΔVc×C

[0085] When the third capacitor C3 is discharged:

[0086] TFREE×(IREF_H-IOTR+IREF_L)=ΔVc×C

[0087] Combining the above two equations, we can get:

[0088] TFREE=(TON+TOFF)×IOTR / (IREF_H-IOTR+IREF_L)

[0089] Among them, the settings of IREF_H and IREF_L values ​​are:

[0090] In this embodiment, when the temperature rises to a certain level, IOTR increases to the same as IREFH_H, at which time IREF_H-IOTR=0, the current flowing through the fifth NMOS tube MN5 is 0, and the discharge current of the third capacitor C3 is only IREF_L. Therefore, IREF_L is used to determine the maximum TFREE time of the chip at high temperature. If there is no IREF_L current, the TFREE time cannot be controlled after IOTR approaches IREFH, and the OTR function has problems. The role of IREF_H is: on the one hand, it determines the temperature at which the chip reaches the maximum TFREE time, and on the other hand, it can also control the inflection point of the slope of the TFREE time curve with temperature change from slow to steep, that is, when IREFH is large, the temperature when the curve enters the large slope is high, and when IREFH is small, the temperature when the curve enters the large slope is low.

[0091] When the OTR is just entered, the TFREE time appears. If the TFREE changes greatly at the beginning, that is, as the temperature rises, the TFREE time changes quickly, that is, the slope is large, resulting in a significant change in the switching frequency, and the LED light will flash. However, if the TFREE slope is always small after entering the OTR, the chip will heat up seriously, the temperature cannot be well controlled, and the machine will explode in serious cases. The TFREE temperature change curve of this embodiment is as follows: Figure 6 As shown, from the TFREE formula, we can see that when just entering OTR, the slope of TFREE is relatively slow, and after entering deep OTR, the slope of TFREE is steeper, which reduces the switching frequency, reduces power consumption, and greatly reduces the current supplied to the LED by the chip, thereby controlling the temperature of the chip.

[0092] The output current after entering the OTR is:

[0093] IOUT=I0×(TON+TOFF) / (TON+TOFF+TFREE)=I0×[1-

[0094] TFREE / (TON+TOFF+TFREE)]

[0095] From the above formula, it can be seen that if TFREE remains unchanged, IOUT will increase as TON increases, and IOUT will decrease as TON decreases. The size of TON is directly related to VIN, and TON decreases as the bus voltage VIN increases. If TFREE remains fixed at a temperature, the output current IOUT is affected by the bus voltage ripple, which will cause the LED light to flicker.

[0096] However, this embodiment utilizes the charging and discharging process of the third capacitor C3 to achieve that the time of TFREE changes under different bus voltages VIN. That is, when the bus voltage is large, the TFREE time decreases; when the bus voltage is small, TFREE increases, so as to ensure the stability of the output current IOUT. The reason is:

[0097] Substituting the TFREE calculation formula into the IOUT formula, we can get:

[0098] IOUT=I0×[1-IOTR / (IREF_H+IREF_L)]

[0099] According to the above formula, after entering OTR, the output current IOUT has nothing to do with TON and TOFF, that is, IOUT has nothing to do with the input voltage and output voltage. Under the condition of constant temperature, the bus ripple has no effect on the output current, thus avoiding the occurrence of stroboscopic phenomenon after entering OTR.

[0100] In summary, this embodiment effectively samples the change of TON time through the charging and discharging of the capacitor, thereby accurately controlling the time of TFREE and solving the problem of flickering when entering OTR. In addition, by fitting the curve of TFREE changing with temperature into a curve that is first slow and then steep, it is ensured that there will be no flashing problem when just entering OTR, and that there will be no explosion problem when the temperature is high.

[0101] An LED driver chip provided in an embodiment of the present application includes: an LED constant current drive circuit as described in any one of the above items, a lead frame, and a plastic packaging material; the LED constant current drive circuit is arranged on the lead frame, and the plastic packaging material is used to seal the LED constant current drive circuit.

[0102] An embodiment of the present application provides a control device for an LED module, comprising an LED constant current drive circuit as described in any one of the above items, and a shell surrounding the LED constant current drive circuit.

[0103] An LED device provided in an embodiment of the present application includes an LED constant current drive circuit as described in any one of the above items, and an LED module; the LED constant current drive circuit is connected to the LED module.

[0104] In the embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some communication interfaces, and the indirect coupling or communication connection of the devices or units can be electrical, mechanical or other forms.

[0105] In addition, the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0106] Furthermore, the functional modules in the various embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

[0107] In this document, relational terms such as first and second, etc. are used merely to distinguish one entity or operation from another entity or operation, but do not necessarily require or imply any such actual relationship or order between these entities or operations.

[0108] The above description is only an embodiment of the present application and is not intended to limit the protection scope of the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A LED constant current driving circuit based on LPF BUCK architecture, characterized in that: include: BUCK circuit and driver module; The driving module is used to control the on and off of the MOS tube in the BUCK circuit; The driving module includes an OTR module, and the OTR module is used to control the shutdown time of the MOS tube in the BUCK circuit in each cycle to increase the OTR time when the temperature of the driving module reaches the OTR threshold; The OTR time satisfies the following condition: the slope of the curve of the OTR time changing with temperature gradually increases as the temperature increases.

2. The LED constant current driving circuit according to claim 1, characterized in that: The OTR module includes: a current IOTR generating circuit and an OTR time generating circuit; The current IOTR generating circuit is used to enter the OTR according to the voltage VBE with a negative temperature coefficient when the voltage VBE is less than the reference voltage VREF, and generate the current IOTR which increases linearly with the increase of temperature; The OTR time generating circuit is used to determine the end time of the OTR time in each cycle according to the current IOTR.

3. The LED constant current driving circuit according to claim 2, characterized in that: The current IOTR generating circuit comprises: a first comparator, a triode and a first current mirror circuit; The base of the transistor is connected to the collector of the transistor, the emitter of the transistor is grounded, and the collector of the transistor is connected to the negative input terminal of the first comparator; the positive input terminal of the first comparator is connected to the reference voltage VREF; the output terminal of the first comparator is connected to one end of the first current mirror circuit, and the other end of the first current mirror circuit outputs the current IOTR.

4. The LED constant current driving circuit according to claim 2, characterized in that: The OTR time generating circuit comprises: a second current mirror circuit, a third current mirror circuit, a fourth current mirror circuit, a fifth current mirror circuit, a first current source, a second current source, a second comparator, a third capacitor, a fourth PMOS tube and a first NMOS tube; The first end of the second current mirror circuit is used for inputting the current IOTR, the second end of the second current mirror circuit is connected to the source of the fourth PMOS tube, and the gate of the fourth PMOS tube is connected to the voltage ZCD_OK; The first end of the third current mirror circuit is used to input the current IOTR, the second end of the third current mirror circuit is connected to the first end of the fourth current mirror circuit, the second end of the fourth current mirror circuit is connected to the output end of the second current source, and the input end of the second current source is connected to the power supply; the output end of the second current source is also connected to the first end of the fifth current mirror circuit, and the second end of the fifth current mirror circuit is connected to the source of the first NMOS tube; the source of the first NMOS tube is also connected to the input end of the first current source, and the output end of the first current source is grounded; The drains of the fourth PMOS tube and the first NMOS tube are both connected to the first end of the third capacitor, the second end of the third capacitor is grounded, the first end of the third capacitor is also connected to the negative input end of the second comparator, and the positive input end of the second comparator is connected to the reference voltage VREF1; wherein the voltage ZCD_OK is at a low level during the off time and the on time, and the voltage ZCD_OK is at a high level during the OTR time.

5. The LED constant current driving circuit according to claim 1, characterized in that: The BUCK circuit includes: a diode, a second capacitor, a first MOS tube and an inductor; The input end of the diode is connected to the second end of the inductor, the first end of the inductor is connected to the second end of the second capacitor, the first end of the second capacitor is connected to the output end of the diode, the first end of the second capacitor is also used to connect to the input end of the LED module, and the second end of the second capacitor is also used to connect to the output end of the LED module; The second end of the inductor is connected to the drain of the first MOS transistor, the source of the first MOS transistor is grounded through a resistor RCS, and the gate of the first MOS transistor is connected to the driving module.

6. The LED constant current driving circuit according to claim 5, characterized in that: Also includes a rectifier module and a first capacitor; The rectifier module is used to rectify the AC power supply and then output it; the positive output end of the rectifier module is connected to the first end of the first capacitor, and the negative output end of the rectifier module is connected to the second end of the first capacitor; the positive output end of the rectifier module is used to connect to the input end of the LED module, and the negative output end of the rectifier module is grounded.

7. The LED constant current driving circuit according to claim 6, characterized in that: The HV end of the driving module is connected to the positive output end of the rectifier module, the GND end of the driving module is grounded, the CS end of the driving module is connected to the first end of the resistor RCS, and the GATE end of the driving module is connected to the gate of the first MOS tube.

8. An LED driver chip, characterized in that: include: The LED constant current drive circuit, lead frame, and plastic packaging material according to any one of claims 1 to 7; The LED constant current driving circuit is arranged on the lead frame, and the plastic packaging material is used to seal the LED constant current driving circuit.

9. A control device for an LED module, characterized in that: It comprises the LED constant current driving circuit as described in any one of claims 1 to 7, and a shell surrounding the LED constant current driving circuit.

10. An LED device, characterized in that: It comprises the LED constant current driving circuit as described in any one of claims 1 to 7, and an LED module; the LED constant current driving circuit is connected to the LED module.

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