Integrated circuit aging board of Darlington transistor array series

Abstract

The utility model relates to an integrated circuit burn-in board of a Darlington transistor array series. The integrated circuit burn-in board comprises a chip, a filter capacitor, a plurality of input resistors, a plurality of output resistors, a plurality of digital signal inputs, a grounding end and a direct-current stabilized power supply, the device is matched with an integrated circuit high-temperature dynamic aging system for use, is suitable for high-temperature dynamic aging tests of microelectronic circuits such as various digital, analog and digital-analog hybrid integrated circuits, SOC circuits, microprocessors, memories and the like, and provides a direct-current stabilized power supply, 64-path digital signals, 4-path analog signals and an environment required by the aging test for the aging test of semiconductor components.

Description

Technical Field

[0001] The utility model relates to an integrated circuit board aging technology, in particular to an integrated circuit aging board of a Darlington transistor array series. Background Art

[0002] When a batch of products is manufactured, the reliability of each component in the batch of products may be different due to inherent defects of the device itself or improper manufacturing process control. In order to ensure the quality of the products, the components will be subjected to aging tests before leaving the factory or before use to eliminate those barely qualified components.

[0003] The aging test can shorten the time of early failure of components and fully expose the failure mechanism of most components, so that the components enter the accidental failure period in advance, ensuring the reliability of the components when they are put into use.

[0004] However, when using the traditional burn-in test method to burn-in the Darlington transistor array series integrated circuit chips, due to the different number of device pins, multiple burn-in boards are required, resulting in a waste of resources and high costs, and it is not convenient to realize the burn-in test of a large number of Darlington transistor array series integrated circuit chips at one time.

[0005] Therefore, it is necessary to provide an integrated circuit burn-in board of a Darlington transistor array series to solve the above problems. Utility Model Content

[0006] The utility model aims to provide an integrated circuit burn-in board of a Darlington transistor array series.

[0007] The utility model achieves the above-mentioned purpose through the following technical solutions:

[0008] An integrated circuit burn-in board of a Darlington transistor array series comprises a chip (1), a filter capacitor (4), a first input resistor (5), a second input resistor (6), a third input resistor (7), a fourth input resistor (8), a fifth input resistor (9), a sixth input resistor (10), a seventh input resistor (11), an eighth input resistor (12), a ninth input resistor (13), a first output resistor (14), a second output resistor (15), a third output resistor (16), a fourth output resistor (17), a fifth output resistor (18), a sixth output resistor (19), a seventh output resistor (20), an eighth output resistor (21), a ninth output resistor (22), a first digital signal input (23), a second digital signal input (24), a third digital signal input (25), a fourth digital signal input (26), a fifth digital signal input (27), a sixth digital signal input (28), a seventh digital signal input (29), an eighth digital signal input (30), a ninth digital signal input (31), a ground terminal (3) and a DC regulated power supply (2);

[0009] Used in conjunction with the integrated circuit high temperature dynamic aging system, it is suitable for high temperature dynamic aging tests of digital, analog, mixed integrated circuits and SOC circuits, microprocessors, memory microelectronic circuits, and provides a DC regulated power supply, 64 digital signals, 4 analog signals and the environment required for the aging test for semiconductor components.

[0010] Furthermore, the chip (1) includes 20 pins extending from the left and right sides of the chip (1), with 10 pins on each side, and the 10 pins on the left side are, from top to bottom, a first pin, a second pin, a third pin, a fourth pin, a fifth pin, a sixth pin, a seventh pin, an eighth pin, a ninth pin, and a tenth pin;

[0011] The 10 pins on the right from bottom to top are the eleventh pin, the twelfth pin, the thirteenth pin, the fourteenth pin, the fifteenth pin, the sixteenth pin, the seventeenth pin, the eighteenth pin, the nineteenth pin, and the twentieth pin.

[0012] Furthermore, the first pin is connected to a first input resistor (5), and the other end of the first input resistor (5) is connected to a first digital signal input (23);

[0013] The second pin is connected to a second input resistor (6), and the other end of the second input resistor (6) is connected to a second digital signal input (24)

[0014] The third pin is connected to a third input resistor (7), and the other end of the third input resistor (7) is connected to a third digital signal input (25);

[0015] The fourth pin is connected to a fourth input resistor (8), and the other end of the fourth input resistor (8) is connected to a fourth digital signal input (26);

[0016] The fifth pin is connected to a fifth input resistor (9), and the other end of the fifth input resistor (9) is connected to a fifth digital signal input (27);

[0017] The sixth pin is connected to a sixth input resistor (10), and the other end of the sixth input resistor (10) is connected to a sixth digital signal input (28);

[0018] The seventh pin is connected to a seventh input resistor (11), and the other end of the seventh input resistor (11) is connected to a seventh digital signal input (29);

[0019] The eighth pin is connected to an eighth input resistor (12), and the other end of the eighth input resistor (12) is connected to an eighth digital signal input (30);

[0020] The ninth pin is connected to a ninth input resistor (13), and the other end of the ninth input resistor (13) is connected to a ninth digital signal input (31);

[0021] The tenth pin is grounded.

[0022] Furthermore, the eleventh pin is connected to the DC regulated power supply (2) and then to one end of the filter capacitor (4), and the other end of the filter capacitor (4) is grounded;

[0023] The twelfth pin is connected to a first output resistor (14), and the other end of the first output resistor (14) is connected to a DC regulated power supply (2);

[0024] The thirteenth pin is connected to the second output resistor (15), and the other end of the second output resistor (15) is connected to the DC regulated power supply (2);

[0025] The fourteenth pin is connected to a third output resistor (16), and the other end of the third output resistor (16) is connected to a DC regulated power supply (2);

[0026] The fifteenth pin is connected to a fourth output resistor (17), and the other end of the fourth output resistor (17) is connected to a DC regulated power supply (2);

[0027] The sixteenth pin is connected to a fifth output resistor (18), and the other end of the fifth output resistor (18) is connected to a DC regulated power supply (2);

[0028] The seventeenth pin is connected to a sixth output resistor (19), and the other end of the sixth output resistor (19) is connected to a DC regulated power supply (2);

[0029] The eighteenth pin is connected to the seventh output resistor (20), and the other end of the seventh output resistor (20) is connected to the DC regulated power supply (2);

[0030] The nineteenth pin is connected to the eighth output resistor (21), and the other end of the eighth output resistor (21) is connected to the DC regulated power supply (2);

[0031] The twentieth pin is connected to the ninth output resistor (22), and the other end of the ninth output resistor (22) is connected to the DC regulated power supply (2).

[0032] Furthermore, the DC regulated power supply and digital signal input are provided by the integrated circuit high temperature dynamic aging system.

[0033] Furthermore, by using a DIP20 plug-in packaging fixture and coordinating aging sockets of different packaged devices according to the aging test requirements, the device aging test can be completed. The aging board uses a plug-in packaging fixture and can select the aging socket for aging according to the device package, thereby improving the utilization rate of the aging board.

[0034] Furthermore, when conducting the aging test, after selecting a suitable aging seat according to the integrated circuit chip package of the Darlington transistor array series for installation, the device is placed in the fixture and the program control program of the corresponding model of the integrated circuit high temperature dynamic aging system is sent.

[0035] Compared with the prior art, the utility model overcomes the defects of the traditional burn-in test burn-in board, realizes the burn-in test of a large number of Darlington transistor array series integrated circuit chips with one burn-in board, saves hardware costs and makes full use of resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 It is a structural schematic diagram of the utility model.

[0037] Figure 2 It is a schematic diagram of an integrated circuit chip of the ULN2003 model Darlington transistor array series of Example 2.

[0038] Figure 3 It is a schematic diagram of the placement of integrated circuit chips of the ULN2003 model Darlington transistor array series of Example 2.

[0039] Figure 4 It is a schematic diagram of an integrated circuit chip of the ULN2803 model Darlington transistor array series of Example 3.

[0040] Figure 5 It is a schematic diagram of the placement of integrated circuit chips of the ULN2803 model Darlington transistor array series of Example 3. DETAILED DESCRIPTION

[0041] Embodiment 1:

[0042] See also Figure 1 This embodiment shows an integrated circuit burn-in board of a Darlington transistor array series, including

[0043] It includes a chip 1, a filter capacitor 4, a first input resistor 5, a second input resistor 6, a third input resistor 7, a fourth input resistor 8, a fifth input resistor 9, a sixth input resistor 10, a seventh input resistor 11, an eighth input resistor 12, a ninth input resistor 13, a first output resistor 14, a second output resistor 15, a third output resistor 16, a fourth output resistor 17, a fifth output resistor 18, a sixth output resistor 19, a seventh output resistor 20, an eighth output resistor 21, a ninth output resistor 22, a first digital signal input 23, a second digital signal input 24, a third digital signal input 25, a fourth digital signal input 26, a fifth digital signal input 27, a sixth digital signal input 28, a seventh digital signal input 29, an eighth digital signal input 30, a ninth digital signal input 31, a ground terminal 3 and a DC regulated power supply 2;

[0044] Used in conjunction with the integrated circuit high temperature dynamic aging system, it is suitable for high temperature dynamic aging tests of digital, analog, mixed integrated circuits and SOC circuits, microprocessors, memory microelectronic circuits, and provides a DC regulated power supply, 64 digital signals, 4 analog signals and the environment required for the aging test for semiconductor components.

[0045] The chip 1 includes 20 pins extending from the left and right sides of the chip 1, with 10 pins on each side, and the 10 pins on the left side are, from top to bottom, the first pin, the second pin, the third pin, the fourth pin, the fifth pin, the sixth pin, the seventh pin, the eighth pin, the ninth pin, and the tenth pin;

[0046] The 10 pins on the right from bottom to top are the eleventh pin, the twelfth pin, the thirteenth pin, the fourteenth pin, the fifteenth pin, the sixteenth pin, the seventeenth pin, the eighteenth pin, the nineteenth pin, and the twentieth pin.

[0047] in:

[0048] The first pin is connected to the first input resistor 5, and the other end of the first input resistor 5 is connected to the first digital signal input 23;

[0049] The second pin is connected to the second input resistor 6, and the other end of the second input resistor 6 is connected to the second digital signal input 24

[0050] The third pin is connected to the third input resistor 7, and the other end of the third input resistor 7 is connected to the third digital signal input 25;

[0051] The fourth pin is connected to the fourth input resistor 8, and the other end of the fourth input resistor 8 is connected to the fourth digital signal input 26;

[0052] The fifth pin is connected to the fifth input resistor 9, and the other end of the fifth input resistor 9 is connected to the fifth digital signal input 27;

[0053] The sixth pin is connected to the sixth input resistor 10, and the other end of the sixth input resistor 10 is connected to the sixth digital signal input 28;

[0054] The seventh pin is connected to the seventh input resistor 11, and the other end of the seventh input resistor 11 is connected to the seventh digital signal input 29;

[0055] The eighth pin is connected to the eighth input resistor 12, and the other end of the eighth input resistor 12 is connected to the eighth digital signal input 30;

[0056] The ninth pin is connected to the ninth input resistor 13, and the other end of the ninth input resistor 13 is connected to the ninth digital signal input 31;

[0057] The tenth pin is grounded.

[0058] The eleventh pin is connected to the DC regulated power supply 2 and then to one end of the filter capacitor 4, and the other end of the filter capacitor 4 is grounded;

[0059] The twelfth pin is connected to the first output resistor 14, and the other end of the first output resistor 14 is connected to the DC regulated power supply 2;

[0060] The thirteenth pin is connected to the second output resistor 15, and the other end of the second output resistor 15 is connected to the DC regulated power supply 2;

[0061] The fourteenth pin is connected to the third output resistor 16, and the other end of the third output resistor 16 is connected to the DC regulated power supply 2;

[0062] The fifteenth pin is connected to the fourth output resistor 17, and the other end of the fourth output resistor 17 is connected to the DC regulated power supply 2;

[0063] The sixteenth pin is connected to the fifth output resistor 18, and the other end of the fifth output resistor 18 is connected to the DC regulated power supply 2;

[0064] The seventeenth pin is connected to the sixth output resistor 19, and the other end of the sixth output resistor 19 is connected to the DC regulated power supply 2;

[0065] The eighteenth pin is connected to the seventh output resistor 20, and the other end of the seventh output resistor 20 is connected to the DC regulated power supply 2;

[0066] The nineteenth pin is connected to the eighth output resistor 21, and the other end of the eighth output resistor 21 is connected to the DC regulated power supply 2;

[0067] The twentieth pin is connected to the ninth output resistor 22 , and the other end of the ninth output resistor 22 is connected to the DC regulated power supply 2 .

[0068] The DC regulated power supply and digital signal input are provided by the integrated circuit high temperature dynamic aging system.

[0069] By using the DIP20 plug-in packaging fixture and coordinating the aging sockets of different packaged devices according to the aging test requirements, the device aging test can be completed. The aging board uses a plug-in packaging fixture and can select the aging socket for aging according to the device package, thereby improving the utilization rate of the aging board.

[0070] When conducting the aging test, select the appropriate aging seat according to the integrated circuit chip package of the Darlington transistor array series for installation, place the device in the fixture, and send the corresponding model of the integrated circuit high temperature dynamic aging system program control program.

[0071] Moreover, the input and output resistance values ​​of the aging board can be adjusted according to actual production needs.

[0072] Embodiment 2:

[0073] When using a Darlington transistor array series integrated circuit chip aging board for ULN2003 model chips for aging tests, the device is placed top to back, see Figure 2 , 3 Instructions:

[0074] The first pin of the chip corresponds to the third pin of the Darlington transistor array series integrated circuit chip aging board, the eighth pin of the chip corresponds to the tenth pin of the Darlington transistor array series integrated circuit chip aging board, the ninth pin of the chip corresponds to the eleventh pin of the Darlington transistor array series integrated circuit chip aging board, and the sixteenth pin of the chip corresponds to the eighteenth pin of the Darlington transistor array series integrated circuit chip aging board. After verifying the device pin definition and the device aging conditions, write the corresponding program control program, and according to the pin definition, the B pin of the corresponding chip 1, the third pin of the aging board, and the fourth pin The digital signal or square wave is input to the third digital signal input 25, the fourth digital signal input 26, the fifth digital signal input 27, the sixth digital signal input 28, the seventh digital signal input 29, the eighth digital signal input 30, and the ninth digital signal input 31 of the corresponding chip 1, and the corresponding voltage value is input to the DC regulated power supply 2 of the CON pin, i.e. the eleventh pin of the aging board, and the C pin, i.e. the twelfth pin, the thirteenth pin, the fourteenth pin, the fifteenth pin, the sixteenth pin, the seventeenth pin, and the eighteenth pin of the aging board.

[0075] Embodiment 3:

[0076] A Darlington transistor array series integrated circuit chip aging board is used for the ULN2803 model chip. When the aging test is carried out, the device is placed at the top and the back is placed. Figure 4 , 5Schematic diagram, the top and back placement is that the first pin of the chip corresponds to the second pin of the Darlington transistor array series integrated circuit chip aging board, the ninth pin of the chip corresponds to the tenth pin of the Darlington transistor array series integrated circuit chip aging board, the tenth pin of the chip corresponds to the eleventh pin of the Darlington transistor array series integrated circuit chip aging board, and the eighteenth pin of the chip corresponds to the nineteenth pin of the Darlington transistor array series integrated circuit chip aging board). After verifying the device pin definition and the device aging conditions, write the corresponding program control program, and according to the pin definition, the corresponding chip 1 B pin, that is, the second pin, the third pin, the fourth pin, the Digital signals or square waves are input to the second digital signal input 24, the third digital signal input 25, the fourth digital signal input 26, the fifth digital signal input 27, the sixth digital signal input 28, the seventh digital signal input 29, the eighth digital signal input 30 and the ninth digital signal input 31 of the fifth, sixth, seventh, eighth and ninth pins, and corresponding voltage values ​​are input to the DC regulated power supply 2 of the corresponding chip 1's CON pin, i.e. the eleventh pin of the aging board, and the C pin, i.e. the twelfth pin, thirteenth pin, fourteenth pin, fifteenth pin, sixteenth pin, seventeenth pin, eighteenth pin and nineteenth pin.

[0077] Compared with the prior art, the utility model overcomes the defects of the traditional burn-in test burn-in board, realizes the burn-in test of a large number of Darlington transistor array series integrated circuit chips with one burn-in board, saves hardware costs and makes full use of resources.

[0078] The above are only some embodiments of the present invention. For those skilled in the art, several modifications and improvements can be made without departing from the inventive concept of the present invention, which all belong to the protection scope of the present invention.

Claims

1. An integrated circuit burn-in board of a Darlington transistor array series, characterized in that: The invention comprises a chip (1), a filter capacitor (4), a first input resistor (5), a second input resistor (6), a third input resistor (7), a fourth input resistor (8), a fifth input resistor (9), a sixth input resistor (10), a seventh input resistor (11), an eighth input resistor (12), a ninth input resistor (13), a first output resistor (14), a second output resistor (15), a third output resistor (16), a fourth output resistor (17), a fifth output resistor (18), a sixth output resistor (19), a seventh output resistor (20), an eighth output resistor (21), a ninth output resistor (22), a first digital signal input (23), a second digital signal input (24), a third digital signal input (25), a fourth digital signal input (26), a fifth digital signal input (27), a sixth digital signal input (28), a seventh digital signal input (29), an eighth digital signal input (30), a ninth digital signal input (31), a ground terminal (3) and a DC regulated power supply (2); Used in conjunction with the integrated circuit high temperature dynamic aging system, it is suitable for high temperature dynamic aging tests of digital, analog, mixed integrated circuits and SOC circuits, microprocessors, memory microelectronic circuits, and provides a DC regulated power supply, 64 digital signals, 4 analog signals and the environment required for the aging test for semiconductor components.

2. The integrated circuit burn-in board of the Darlington transistor array series according to claim 1, characterized in that: The chip (1) includes 20 pins extending from the left and right sides of the chip (1), with 10 pins on each side, and the 10 pins on the left side are, from top to bottom, a first pin, a second pin, a third pin, a fourth pin, a fifth pin, a sixth pin, a seventh pin, an eighth pin, a ninth pin, and a tenth pin; The 10 pins on the right from bottom to top are the eleventh pin, the twelfth pin, the thirteenth pin, the fourteenth pin, the fifteenth pin, the sixteenth pin, the seventeenth pin, the eighteenth pin, the nineteenth pin, and the twentieth pin.

3. The integrated circuit burn-in board of the Darlington transistor array series according to claim 2, characterized in that: The first pin is connected to a first input resistor (5), and the other end of the first input resistor (5) is connected to a first digital signal input (23); the second pin is connected to a second input resistor (6), and the other end of the second input resistor (6) is connected to a second digital signal input (24); the third pin is connected to a third input resistor (7), and the other end of the third input resistor (7) is connected to a third digital signal input (25); the fourth pin is connected to a fourth input resistor (8), and the other end of the fourth input resistor (8) is connected to a fourth digital signal input (26); the fifth pin is connected to a fifth input resistor (9), and the other end of the fifth input resistor (9) is connected to A fifth digital signal input (27); a sixth pin connected to a sixth input resistor (10), the other end of the sixth input resistor (10) being connected to a sixth digital signal input (28); a seventh pin connected to a seventh input resistor (11), the other end of the seventh input resistor (11) being connected to a seventh digital signal input (29); an eighth pin connected to an eighth input resistor (12), the other end of the eighth input resistor (12) being connected to an eighth digital signal input (30); a ninth pin connected to a ninth input resistor (13), the other end of the ninth input resistor (13) being connected to a ninth digital signal input (31); and a tenth pin being grounded.

4. The integrated circuit burn-in board of the Darlington transistor array series according to claim 3, characterized in that: The eleventh pin is connected to a DC regulated power supply (2) and then to one end of a filter capacitor (4), and the other end of the filter capacitor (4) is grounded; the twelfth pin is connected to a first output resistor (14), and the other end of the first output resistor (14) is connected to the DC regulated power supply (2); the thirteenth pin is connected to a second output resistor (15), and the other end of the second output resistor (15) is connected to the DC regulated power supply (2); the fourteenth pin is connected to a third output resistor (16), and the other end of the third output resistor (16) is connected to the DC regulated power supply (2); the fifteenth pin is connected to a fourth output resistor (17), and the other end of the fourth output resistor (17) is connected to the DC regulated power supply (2) The sixteenth pin is connected to the fifth output resistor (18), and the other end of the fifth output resistor (18) is connected to the DC regulated power supply (2); the seventeenth pin is connected to the sixth output resistor (19), and the other end of the sixth output resistor (19) is connected to the DC regulated power supply (2); the eighteenth pin is connected to the seventh output resistor (20), and the other end of the seventh output resistor (20) is connected to the DC regulated power supply (2); the nineteenth pin is connected to the eighth output resistor (21), and the other end of the eighth output resistor (21) is connected to the DC regulated power supply (2); the twentieth pin is connected to the ninth output resistor (22), and the other end of the ninth output resistor (22) is connected to the DC regulated power supply (2).

5. The integrated circuit burn-in board of the Darlington transistor array series according to claim 4, characterized in that: The DC regulated power supply and digital signal input are provided by the integrated circuit high temperature dynamic aging system.

6. The integrated circuit burn-in board of the Darlington transistor array series according to claim 5, characterized in that: By using the DIP20 plug-in packaging fixture and coordinating the aging sockets of different packaged devices according to the aging test requirements, the device aging test can be completed. The aging board uses a plug-in packaging fixture and can select the aging socket for aging according to the device package, thereby improving the utilization rate of the aging board.

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