Coupler

By designing a coupler with a first microstrip line and slotted coupling structure with different line width ends, the problem of insufficient directionality of the existing coupler is solved, and the accuracy of antenna standing wave ratio detection and impedance matching effect are improved.

CN222440834UActive Publication Date: 2025-02-07SUZHOU LUXSHARE TECH CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202420551887.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-03-20
Publication Date
2025-02-07
Estimated Expiration
2034-03-20

AI Technical Summary

Technical Problem

When existing couplers detect the standing wave ratio of the antenna, their directionality is insufficient, resulting in limited detection accuracy.

Method used

A coupler including a coaxial line and a multilayer circuit board is designed, and the directionality of the coupler is improved by providing ends of different line widths on the first microstrip line and coupling with the inner conductor through slots.

Benefits of technology

The high directionality of the coupler is achieved, the accuracy of detecting the antenna standing-wave ratio is improved, and an impedance of closer to 50 ohms is obtained, achieving ideal impedance matching.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN222440834U_ABST
    Figure CN222440834U_ABST
Patent Text Reader

Abstract

The utility model discloses a coupler which comprises a coaxial line and a multilayer circuit board arranged on the coaxial line, and the coaxial line comprises an inner conductor and an outer conductor. The multilayer circuit board comprises a dielectric substrate, a first ground layer, a first microstrip line, a second ground layer, a third ground layer, a second microstrip line, a third microstrip line and a first via hole, wherein the first ground layer and the first microstrip line are arranged on one side surface of the dielectric substrate; the second ground layer is arranged in the dielectric substrate; the third ground layer, the second microstrip line and the third microstrip line are arranged on the other side surface of the dielectric substrate; and second and third vias through the second formation. The first ground layer is connected with the outer conductor, the first microstrip line is located in a through hole of the first ground layer, the line width of one end of the first microstrip line is smaller than 50 ohm, the line width of the other end of the first microstrip line is larger than 50 ohm, and the first microstrip line is coupled with the inner conductor through the slot of the outer conductor; the second microstrip line and the third microstrip line are located in the two gaps of the third ground layer; the second and third microstrip lines are connected with two ends of the first microstrip line through the second and third via holes.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a coupler. Background Art

[0002] When designing communication circuits, antenna detection is an important step. In order to detect the standing wave ratio of the antenna, a coupler is usually used for detection. Among them, the accuracy of using a coupler to detect the standing wave ratio of the antenna is limited by the directivity of the coupler.

[0003] Therefore, how to provide a highly directional coupler to accurately detect the standing wave ratio of the antenna is a technical problem that needs to be solved urgently by those skilled in the art. Utility Model Content

[0004] The embodiment of the present application provides a coupler with high directivity to improve the accuracy of detecting the standing wave ratio of an antenna.

[0005] In order to solve the above technical problems, this application is implemented as follows:

[0006] The present application provides a coupler, which includes: a coaxial line and a multilayer circuit board, the coaxial line includes an inner conductor and an outer conductor, the outer conductor is provided with a slot, the multilayer circuit board is arranged on the coaxial line and includes a dielectric substrate, a first stratum, a first microstrip line, a second stratum, a third stratum, a second microstrip line, a third microstrip line, a first via, a second via and a third via. The dielectric substrate has a first surface adjacent to the coaxial line and a second surface away from the coaxial line; the first stratum is arranged on the first surface and connected to the outer conductor, the first stratum is provided with a first through hole; the first microstrip line is arranged on the first surface and is located in the first through hole, the line width of one end of the first microstrip line is less than the line width of 50 ohms, the line width of the other end of the first microstrip line is greater than the line width of 50 ohms, and the first microstrip line is coupled to the inner conductor through the slot; the second stratum is arranged inside the dielectric substrate; the third stratum is arranged on the second surface and is provided with two notches arranged at intervals; the second microstrip line is arranged on the second surface and is located in one of the two notches The first via hole is provided inside the dielectric substrate, and the first via hole connects the first ground layer, the second ground layer and the third ground layer; the second via hole is provided inside the dielectric substrate, and the second via hole passes through the second ground layer and is not conductive with the second ground layer, and the second via hole connects the other end of the first microstrip line and the second microstrip line; the third via hole is provided inside the dielectric substrate, and the third via hole passes through the second ground layer and is not conductive with the second ground layer, and the third via hole connects one end of the first microstrip line and the third microstrip line.

[0007] In the embodiment of the present application, through the design of the first microstrip line (that is, the line width at one end of the first microstrip line is less than the line width of 50 ohms, and the line width at the other end of the first microstrip line is greater than the line width of 50 ohms), the first microstrip line has good directivity, so that the coupler has higher directivity; at the same time, the first microstrip line obtains an impedance closer to 50 ohms, thereby achieving more ideal impedance matching. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are configured to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0009] Figure 1 A three-dimensional schematic diagram of an embodiment of a coupler of the present application;

[0010] Figure 2 for Figure 1 A partially exploded schematic diagram of a coupler;

[0011] Figure 3 for Figure 1 A partial structural diagram of an embodiment of a multi-layer circuit board;

[0012] Figure 4 for Figure 1 A top view of a multi-layer circuit board;

[0013] Figure 5 for Figure 1 A schematic top view configuration diagram of a second ground layer of a multi-layer circuit board;

[0014] Figure 6 for Figure 1 A schematic top view configuration diagram of a fourth ground layer of a multi-layer circuit board;

[0015] Figure 7 for Figure 1 A schematic diagram of a bottom-up configuration of a first ground layer and a first microstrip line of a multilayer circuit board;

[0016] Figure 8 for Figure 1 A partial structural schematic diagram of another embodiment of a multi-layer circuit board;

[0017] Fig. 9 is a three-dimensional schematic diagram of an existing coupler;

[0018] Fig.10 for Fig. 9 A partial structural diagram of an embodiment of a multi-layer circuit board; and

[0019] Fig.11 for Figure 1 and Figure 3The coupler and Fig. 9 and Fig.10 A comparison chart of the directivity of the couplers. DETAILED DESCRIPTION

[0020] The following will be used in conjunction with the accompanying drawings to illustrate the embodiments of the present utility model. In these drawings, the same reference numerals represent the same or similar components or method flows.

[0021] It must be understood that the words "comprise", "include", etc. used in this specification are configured to indicate the existence of specific technical features, values, method steps, job processing and / or components, but do not exclude the addition of more technical features, values, method steps, job processing, components, or any combination of the above.

[0022] It should be understood that when a component is described as being "connected" or "coupled" to another component, it may be directly connected or coupled to the other component, and intermediate components may be present. Conversely, when a component is described as being "directly connected" or "directly coupled" to another component, there are no intermediate components.

[0023] See also Figures 1 to 7 , Figure 1 This is a three-dimensional schematic diagram of an embodiment of a coupler of the present application. Figure 2 for Figure 1 A partial exploded diagram of the coupler. Figure 3 for Figure 1 Schematic diagram of the partial structure of a multi-layer circuit board. Figure 4 for Figure 1 A top view of a multi-layer circuit board. Figure 5 for Figure 1 A top view of the second ground layer of a multi-layer circuit board. Figure 6 for Figure 1 A top view of the fourth layer of the multi-layer circuit board. Figure 7 for Figure 1 Schematic diagram of the bottom-up configuration of the first ground layer and the first microstrip line of the multi-layer circuit board.

[0024] like Figures 1 to 7As shown, the coupler 1 includes: a coaxial line 11 and a multilayer circuit board 12, the coaxial line 11 includes an inner conductor 111 and an outer conductor 112, the outer conductor 112 is provided with a slot 1121, the multilayer circuit board 12 is arranged on the coaxial line 11 and includes a dielectric substrate 121, a first layer 122, a first microstrip line 123, a second layer 124, a fourth layer 131, a third layer 125, a second microstrip line 126, a third microstrip line 127, a first via 128, a second via 129 and a third via 130. Among them, the coaxial line 11 is a signal transmission line; the dielectric substrate 121 has a first surface 1211 adjacent to the coaxial line 11 and a second surface 1212 away from the coaxial line 11, the first layer 122 and the first microstrip line 123 are arranged on the first surface 1211, the second layer 124 is arranged inside the dielectric substrate 121, the third layer 125, the second microstrip line 126 and the third microstrip line 127 are arranged on the second surface 1212, and the fourth layer 131 is arranged inside the dielectric substrate 121; in other words, the multi-layer circuit board 12 is a four-layer circuit board, but this embodiment is not used to limit the present application; for example, the fourth layer 131 is a selectively arranged element, therefore, in other embodiments, the multi-layer circuit board 12 may be a three-layer circuit board (that is, the multi-layer circuit board 12 does not include the fourth layer 131).

[0025] In this embodiment, the first stratum 122 is connected to the outer conductor 112, and the first stratum 122 is provided with a first through hole 1221; the first microstrip line 123 is located in the first through hole 1221 and is not in contact with the first stratum 122 (i.e., there is a gap between the first microstrip line 123 and the first stratum 122), the line width of one end of the first microstrip line 123 is less than the line width of 50 ohms, the line width of the other end of the first microstrip line 123 is greater than the line width of 50 ohms, and the first microstrip line 123 is coupled to the inner conductor 111 through the slot 1121. In other words, the first microstrip line 123 is a signal coupling line. The third stratum 125 is provided with gaps 1251a and 1251b spaced apart from each other, the second microstrip line 126 is located in the gap 1251a and does not contact the third stratum 125 (i.e., there is a gap between the second microstrip line 126 and the third stratum 125), the third microstrip line 127 is located in the gap 1251b and does not contact the third stratum 125 (i.e., there is a gap between the third microstrip line 127 and the third stratum 125), and the line width of the second microstrip line 126 is greater than the line width of the third microstrip line 127. The fourth stratum 131 is located between the first stratum 122 and the second stratum 124. The first via hole 128 is arranged inside the dielectric substrate 121, and the first via hole 128 connects the first stratum 122, the second stratum 124, the third stratum 125 and the fourth stratum 131. The first via hole 128 can be composed of three metal via holes; the second via hole 129 is arranged inside the dielectric substrate 121, and the second via hole 129 passes through the second stratum 124 and the fourth stratum 131 and is not conductive with the second stratum 124 and the fourth stratum 131, and the second via hole 129 connects one end of the first microstrip line 123 with a line width greater than 50 ohms and the second microstrip line 126; the third via hole 130 is arranged inside the dielectric substrate 121, and the third via hole 130 passes through the second stratum 124 and the fourth stratum 131 and is not conductive with the second stratum 124 and the fourth stratum 131, and the third via hole 130 connects one end of the first microstrip line 123 with a line width less than 50 ohms and the third microstrip line 127.

[0026] Among them, the material of the dielectric substrate 121 can be a resin with a low dielectric constant, and the resin with a low dielectric constant can be but not limited to polytetrafluoroethylene (PTFE), polyphenylene ether, cyanate ester or polyimide resin. The above-mentioned resin with a low dielectric constant has good mechanical stability and electrical properties and low dielectric loss, which can not only ensure good signal transmission but also facilitate reducing transmission loss; the first layer 122, the second layer 124, the fourth layer 131, the third layer 125, the first via 128, the second via 129 and the third via 130 can be made of metal material, and the metal material can be but not limited to gold, silver, copper or aluminum; the first microstrip line 123, the second microstrip line 126 and the third microstrip line 127 can be metal microstrip lines, and the material of the metal microstrip lines can be but not limited to gold, silver, copper or aluminum.

[0027] Through the design of the first microstrip line 123 (i.e., the line width of one end of the first microstrip line 123 is less than the line width of 50 ohms, and the line width of the other end of the first microstrip line 123 is greater than the line width of 50 ohms), the first microstrip line 123 has good directivity, so that the coupler 1 has higher directivity; at the same time, the first microstrip line 123 obtains an impedance closer to 50 ohms, thereby achieving more ideal impedance matching.

[0028] In one embodiment, the coaxial line 11 may be a coaxial line in which an air medium is filled between the inner conductor 111 and the outer conductor 112 .

[0029] In one embodiment, the shape of the first through hole 1221 may correspond to the shape of the first microstrip line 123; for example, the shapes of the first microstrip line 123 and the first through hole 1221 are both T-shaped (eg Figure 2 and Figure 6 In another embodiment, the shape of the first through hole 1221 may not correspond to the shape of the first microstrip line 123 (i.e., the shapes of the first microstrip line 123 and the first through hole 1221 are different); for example, the shape of the first microstrip line 123 is a trapezoid, and the shape of the first through hole 1221 is a T-shape (e.g., Figure 8 As shown, Figure 8 for Figure 1 Schematic diagram of the partial structure of another embodiment of a multi-layer circuit board).

[0030] In one embodiment, the shapes of the first microstrip line 123 and the first through hole 1221 may be T-shaped, trapezoidal, or conical.

[0031] In one embodiment, the second layer 124 may be provided with a third through hole 1241 and a fourth through hole 1242, and the third through hole 1241 and the fourth through hole 1242 may be filled with a dielectric material (eg, Figure 4 ), the second via 129 may pass through the dielectric material in the third via 1241, and the third via 130 may pass through the dielectric material in the fourth via 1242. The dielectric material may be, but is not limited to, polytetrafluoroethylene, polyphenylene ether, cyanate ester or polyimide resin.

[0032] In one embodiment, the area of ​​the fourth through hole 1242 may correspond to the impedance of the end of the first microstrip line 123 whose line width is less than 50 ohms. The area of ​​the fourth through hole 1242 is designed to allow the third via 130 to pass through, and to change the impedance of the end of the first microstrip line 123 whose line width is less than 50 ohms, so that the first microstrip line 123 obtains higher directivity. Therefore, the directivity of the first microstrip line 123 can be adjusted by hollowing out the area of ​​the second stratum 124 next to the third via 130 (that is, the directivity of the first microstrip line 123 is adjusted by the area of ​​the fourth through hole 1242).

[0033] In one embodiment, the shape of the fourth through hole 1242 may be rectangular or circular, and the shape of the third through hole 1241 may be circular. It should be noted that this embodiment is not intended to limit the present application, and the shapes of the fourth through hole 1242 and the third through hole 1241 may be optimized according to actual conditions.

[0034] In one embodiment, the fourth stratum 131 may be provided with a second through hole 1311, and the second through hole 1311 corresponds to the first through hole 1221. For example, the second through hole 1311 and the first through hole 1221 are provided at corresponding positions, the second through hole 1311 and the first through hole 1221 are both T-shaped, and the second through hole 1311 and the first through hole 1221 have the same area.

[0035] In one embodiment, the second through hole 1311 may be filled with a dielectric material (eg Figure 5 ), the second via 129 and the third via 130 pass through the dielectric material. The dielectric material may be, but is not limited to, polytetrafluoroethylene, polyphenylene ether, cyanate ester or polyimide resin. By setting the fourth stratum 131 and designing that the second through hole 1311 is filled with dielectric material, the thickness of the dielectric material corresponding to the first microstrip line 123 becomes thicker (at this time, the thickness of the dielectric material corresponding to the first microstrip line 123 is: the sum of the thickness of the dielectric material filled with the second through hole 1311, the thickness of the dielectric material between the fourth stratum 131 and the second stratum 124, and the thickness of the dielectric material between the fourth stratum 131 and the third stratum 125), thereby increasing the microstrip width of the first microstrip line 123, and then increasing the directivity of the first microstrip line 123. In other words, when there are more layers inside the dielectric substrate 121 and the through holes corresponding to the first microstrip line 123 are arranged on the layers adjacent to the first microstrip line 123 and filled with dielectric material, the thickness of the dielectric material corresponding to the first microstrip line 123 can be made thicker, thereby increasing the directivity of the first microstrip line 123.

[0036] In one embodiment, one end of the second microstrip line 126 is connected to the second via 129, and the end of the second microstrip line 126 away from the second via 129 is a coupling output port, and one end of the third microstrip line 127 is connected to the third via 130, and the end of the third microstrip line 127 away from the third via 130 is a load port.

[0037] In one embodiment, the second microstrip line 126 and the third microstrip line 127 may be rectangular microstrip lines.

[0038] In one embodiment, the shape of the notch 1251 a corresponds to the shape of the second microstrip line 126 , and the shape of the notch 1251 b corresponds to the shape of the third microstrip line 127 .

[0039] See also Figure 1 , Figure 3 , Fig. 9 , Fig.10 and Fig.11 , Fig. 9 is a three-dimensional schematic diagram of an existing coupler. Fig.10 for Fig. 9 A partial structural diagram of an embodiment of a multi-layer circuit board; Fig.11 for Figure 1 and Figure 3 The coupler and Fig. 9 and Fig.10 The directivity comparison diagram of the coupler, where the solid line is Figure 1 and Figure 3 The directivity curve of the coupler is Fig. 9 and Fig.10 The directivity curve of the coupler, the horizontal axis is frequency, the unit is gigahertz (GHz); the vertical axis is directivity, the unit is decibel (dB).

[0040] exist Fig. 9 and Fig.10In the figure, the coupler 2 includes: a coaxial line 21 and a multilayer circuit board 22, the coaxial line 21 includes an inner conductor 211 and an outer conductor 212, the outer conductor 212 is provided with a slot, the multilayer circuit board 22 is arranged on the coaxial line 21 and includes a dielectric substrate 221, a first layer 222, a first microstrip line 223, a second layer 224, a fourth layer 231, a third layer 225, a second microstrip line 226, a third microstrip line 227, a first via 228, a second via 229 and a third via 230. The first stratum 222 and the first microstrip line 223 are arranged on the surface of the dielectric substrate 221 adjacent to the coaxial line 21, the first stratum 222 is connected to the outer conductor 212, the first microstrip line 223 is located in the through hole of the first stratum 222, the first microstrip line 223 is a rectangular microstrip line, and the first microstrip line 223 is coupled to the inner conductor 211 through the slot; the second stratum 224 and the fourth stratum 231 are arranged inside the dielectric substrate 221; the third stratum 225, the second microstrip line 226 and the third microstrip line 227 are arranged on the surface of the dielectric substrate 221 away from the coaxial line 21, the second microstrip line 226 and the third microstrip line 227 are arranged on the surface of the dielectric substrate 221 away from the coaxial line 21, Line 227 is located in two notches 2251 of the third stratum 225, and the line widths of the second microstrip line 226 and the third microstrip line 227 are equal; the first via 228, the second via 229 and the third via 230 are arranged inside the dielectric substrate 221, the first via 228 connects the first stratum 222, the second stratum 224, the third stratum 225 and the fourth stratum 231, the first via 228 can be composed of three metal vias, the second via 229 connects one end of the first microstrip line 223 and the second microstrip line 226, and the third via 230 connects the other end of the first microstrip line 223 and the third microstrip line 227.

[0041] pass Fig.11 From the directivity comparison diagram, we can see that within the same frequency range, Figure 1 and Figure 3 The directivity of coupler 1 is almost better than Fig. 9 and Fig.10 The directivity of coupler 2 (the smaller the directivity value, the better the directivity), and in some frequency ranges, Figure 1 and Figure 3 The directivity of coupler 1 can be better than Fig. 9 and Fig.10 The directivity of coupler 2 is about 1 order of magnitude, so, Figure 1 and Figure 3 The coupler 1 has high directivity; in addition, Figure 1 and Figure 3 The directivity value of coupler 1 can be less than -30dB with a bandwidth of about 2GHz, while Fig. 9 and Fig.10 The value of the directivity of coupler 2 can be smaller than -30dB as the bandwidth is smaller.

[0042] In summary, through the design of the first microstrip line (i.e., the line width of one end of the first microstrip line is less than the line width of 50 ohms, and the line width of the other end of the first microstrip line is greater than the line width of 50 ohms), the first microstrip line has good directivity, so that the coupler has high directivity; at the same time, the first microstrip line obtains an impedance closer to 50 ohms, thereby achieving a more ideal impedance matching. In addition, the directivity of the first microstrip line can be adjusted by hollowing out the area of ​​the second stratum next to the third via (i.e., the area of ​​the fourth through hole). In addition, when the number of strata inside the dielectric substrate increases and the through hole corresponding to the first microstrip line is set on the stratum adjacent to the first microstrip line and is filled with dielectric material, the thickness of the dielectric material corresponding to the first microstrip line can be made thicker, thereby increasing the directivity of the first microstrip line.

[0043] Although the present invention is described using the above embodiments, it should be noted that these descriptions are not configured to limit the present invention. On the contrary, the present invention covers obvious modifications and similar arrangements that are obvious to those skilled in the art. Therefore, the scope of the claims should be interpreted in the broadest way to include all obvious modifications and similar arrangements.

Claims

1. A coupler, characterized in that: include: A coaxial line, comprising an inner conductor and an outer conductor, wherein the outer conductor is provided with a slot; as well as A multi-layer circuit board is arranged on the coaxial line, and the multi-layer circuit board comprises: A dielectric substrate having a first surface adjacent to the coaxial line and a second surface away from the coaxial line; A first ground layer is disposed on the first surface and connected to the outer conductor. The first stratum is provided with a first through hole; a first microstrip line, disposed on the first surface and located in the first through hole, wherein a line width of one end of the first microstrip line is less than a line width of 50 ohms, a line width of the other end of the first microstrip line is greater than a line width of 50 ohms, and the first microstrip line is coupled to the inner conductor through the slot; A second ground layer is disposed inside the dielectric substrate; A third ground layer is disposed on the second surface and is concavely provided with two gaps spaced apart from each other; A second microstrip line is disposed on the second surface and is located in one of the two notches; A third microstrip line is disposed on the second surface and located in the other of the two notches, wherein the line width of the second microstrip line is greater than the line width of the third microstrip line; A first via hole is disposed inside the dielectric substrate, the first via hole connecting the first ground layer, the second ground layer and the third ground layer; A second via hole is disposed inside the dielectric substrate, the second via hole passes through the second ground layer and is not conductive with the second ground layer, and the second via hole connects the other end of the first microstrip line with the second microstrip line; and A third via hole is disposed inside the dielectric substrate, passes through the second ground layer and is not conductive with the second ground layer, and connects the one end of the first microstrip line with the third microstrip line.

2. The coupler according to claim 1, characterized in that The multilayer circuit board also includes a fourth ground layer, which is arranged inside the dielectric substrate and between the first ground layer and the second ground layer. The first via is also connected to the fourth ground layer, and the second via and the third via pass through the fourth ground layer and are not conductive to the fourth ground layer.

3. The coupler according to claim 2, characterized in that: The fourth stratum is provided with a second through hole, and the second through hole corresponds to the first through hole.

4. The coupler according to claim 3, characterized in that: The second through hole is filled with a dielectric material, and the second via hole and the third via hole pass through the dielectric material.

5. The coupler according to claim 1, characterized in that: The shape of the first through hole is set to correspond to the shape of the first microstrip line.

6. The coupler according to claim 1 or 5, characterized in that: The first microstrip line and the first through hole are in a T-shape, a trapezoid or a cone shape.

7. The coupler according to claim 1, characterized in that: The second ground layer is provided with a third through hole and a fourth through hole, the third through hole and the fourth through hole are filled with dielectric material, the second through hole passes through the dielectric material in the third through hole, and the third through hole passes through the dielectric material in the fourth through hole.

8. The coupler according to claim 7, characterized in that An area of ​​the fourth through hole corresponds to an impedance of the one end of the first microstrip line.

9. The coupler according to claim 7 or 8, characterized in that: The third through hole is circular in shape.

10. The coupler according to claim 1, characterized in that The coaxial line is a coaxial line with air medium filled between the inner conductor and the outer conductor.

11. The coupler according to claim 1, characterized in that One end of the second microstrip line is connected to the second via hole, and one end of the second microstrip line away from the second via hole is a coupling output port. One end of the third microstrip line is connected to the third via hole, and one end of the third microstrip line away from the third via hole is a load port.

12. The coupler according to claim 1, characterized in that The second microstrip line and the third microstrip line are rectangular microstrip lines.

13. The coupler according to claim 1, characterized in that The shapes of the two notches correspond to the shapes of the second microstrip line and the third microstrip line.