Voltage signal output circuit

Abstract

The utility model discloses a voltage signal output circuit which receives a first current signal output by a master control circuit through a first logic circuit and outputs a third current signal to a first power amplification circuit. The first power amplification circuit amplifies the third current signal and then outputs the third current signal to the booster circuit; the second logic circuit receives a second current signal output by the main control circuit and outputs a fourth current signal to the second power amplification circuit; the second power amplification circuit amplifies the fourth current signal and then outputs the fourth current signal to the booster circuit; the booster circuit receives the third current signal, outputs a negative voltage to the electrode plate, receives the fourth current signal, and outputs a positive voltage to the electrode plate; under the participation of the first logic circuit and the second logic circuit, the output positive voltage and negative voltage can be accurate enough, so that the electrode plate can have a certain stimulation effect on the skin of a human body.

Description

Technical Field

[0001] The utility model relates to the technical field of signal processing, in particular to a voltage signal output circuit. Background Art

[0002] Radio frequency beauty instrument is a beauty method that uses radio frequency electromagnetic waves to act on the deep tissue of the skin, heat the dermis of the skin, stimulate the production of new collagen and elastin, and thus achieve the effect of tightening the skin. Microcurrent beauty uses microcurrent to stimulate muscle tissue movement and promote collagen synthesis. The above two beauty methods generally require the use of electrodes to contact the skin to release radio frequency electromagnetic waves or microcurrents to the deep tissue of the skin. For microcurrent beauty instruments, in the prior art, positive and negative voltages are usually output to the electrode plate. Due to the resistance of the electrode plate itself, the electrode plate can output microcurrent to the human body for stimulation. However, the positive and negative voltages output by the prior art are not accurate enough, so that the electrode plate cannot achieve a certain stimulation effect on human skin. Utility Model Content

[0003] Based on this, it is necessary to propose a voltage signal output circuit to address the above problems.

[0004] A voltage signal output circuit, applied to a beauty instrument, comprises:

[0005] A main control circuit, whose output end is connected to the input end of the first logic circuit and the input end of the second logic circuit, and is used to output a first current signal to the first logic circuit and output a second current signal to the second logic circuit;

[0006] The first logic circuit, an output end of which is connected to an input end of the first power amplifier circuit, is used to receive the first current signal and output a third current signal to the first power amplifier circuit;

[0007] The second logic circuit, an output end of which is connected to an input end of a second power amplifier circuit, is configured to receive the second current signal and output a fourth current signal to the second power amplifier circuit;

[0008] The first power amplifier circuit has an output end connected to the input end of the boost circuit, and is used to receive the third current signal and output it to the boost circuit after amplification;

[0009] The second power amplifier circuit has an output end connected to the input end of the boost circuit, and is used to receive the fourth current signal and output it to the boost circuit after amplification;

[0010] The boost circuit has an output end connected to the electrode sheet, and is used to receive the third current signal and output a negative voltage to the electrode sheet, and to receive the fourth current signal and output a positive voltage to the electrode sheet.

[0011] In one embodiment, the voltage signal output circuit further includes:

[0012] a first amplifier circuit, connected between the first logic circuit and the first power amplifier circuit, and configured to amplify the third current signal output by the first logic circuit and then output the amplified current signal to the first power amplifier circuit;

[0013] The second amplifier circuit is connected between the second logic circuit and the second power amplifier circuit, and is used for amplifying the fourth current signal output by the second logic circuit and then outputting the amplified current signal to the second power amplifier circuit.

[0014] In one embodiment, the voltage signal output circuit further includes:

[0015] A first protection circuit, connected between the first logic circuit and the first amplifier circuit, and configured to protect the first amplifier circuit;

[0016] The second protection circuit is connected between the second logic circuit and the second amplifier circuit, and is used to protect the second amplifier circuit.

[0017] In one embodiment,

[0018] The main control circuit comprises: a main control chip;

[0019] The first logic circuit includes: a first AND gate chip, a first inverter and a second inverter;

[0020] The second logic circuit includes: a second AND gate chip, a third inverter and a fourth inverter;

[0021] The first input end of the first AND gate chip is connected to the first output end of the main control chip, the second input end of the first AND gate chip is connected to the second output end of the main control chip, the third input end of the first AND gate chip is connected to the third output end of the main control chip, and the fourth input end of the first AND gate chip is connected to the fourth output end of the main control chip; the output end of the first AND gate chip is connected to the upper input end of the first inverter and the input end of the second inverter;

[0022] The first input end of the second AND gate chip is connected to the fifth output end of the main control chip; the second input end of the second AND gate chip is connected to the third output end of the main control chip; the third input end of the second AND gate chip is connected to the sixth output end of the main control chip; the fourth input end of the second AND gate chip is connected to the second output end of the main control chip; the output end of the second AND gate chip is connected to the input end of the third inverter and the input end of the fourth inverter;

[0023] The output end of the first inverter and the output end of the second inverter are both connected to the input end of the first power amplifier circuit;

[0024] The output end of the third inverter and the output end of the fourth inverter are both connected to the input end of the second power amplifier circuit.

[0025] In one embodiment, the boost circuit includes: a transformer;

[0026] One end of the primary coil of the transformer is connected to the output end of the first power amplifier circuit; the other end of the primary coil of the transformer is connected to the output end of the second power amplifier circuit; and both ends of the secondary coil of the transformer are connected to the electrode sheet.

[0027] In one embodiment, the first power amplifier circuit includes: a first MOS tube and a first resistor;

[0028] The gate of the first MOS transistor is connected to the output end of the first logic circuit, the source of the first MOS transistor is grounded, and the drain of the first MOS transistor is connected to the input end of the boost circuit;

[0029] One end of the first resistor is connected to the gate of the first MOS transistor, and the other end is connected to the source of the first MOS transistor.

[0030] In one embodiment, the second power amplifier circuit includes: a second MOS tube and a second resistor;

[0031] The gate of the second MOS transistor is connected to the output end of the second logic circuit, the source of the second MOS transistor is grounded, and the drain of the second MOS transistor is connected to the input end of the boost circuit;

[0032] One end of the second resistor is connected to the gate of the second MOS transistor, and the other end is connected to the source of the second MOS transistor.

[0033] In one embodiment, the first amplifying circuit includes: a first triode and a second triode;

[0034] The second amplifying circuit comprises: a third triode and a fourth triode;

[0035] The base of the first transistor is connected to the output end of the first logic circuit, the collector of the first transistor is connected to the input end of the first power amplifier circuit, and the emitter of the first transistor is grounded; the base of the second transistor is connected to the output end of the first logic circuit, the collector of the second transistor is connected to the input end of the first power amplifier circuit, and the emitter of the second transistor is grounded;

[0036] The base of the third transistor is connected to the output end of the second logic circuit, the collector of the third transistor is connected to the input end of the second power amplifier circuit, and the emitter of the third transistor is grounded; the base of the fourth transistor is connected to the output end of the second logic circuit, the collector of the fourth transistor is connected to the input end of the second power amplifier circuit, and the emitter of the fourth transistor is grounded.

[0037] In one embodiment, the first protection circuit includes: a third resistor, a fourth resistor, a first capacitor, a second capacitor, a first diode, a second diode and a third diode;

[0038] One end of the third resistor is connected to the output end of the first inverter, and the other end is connected to the anode of the second diode, and the cathode of the second diode is connected to the anode of the first diode and the input end of the first amplifier circuit;

[0039] The cathode of the first diode is grounded;

[0040] One end of the first capacitor is connected to one end of the third resistor, and the other end is connected to the cathode of the second diode;

[0041] One end of the fourth resistor is connected to the output end of the second inverter, and the other end is connected to the cathode of the third diode and the input end of the first amplifier circuit;

[0042] The anode of the third diode is grounded;

[0043] The second capacitor is connected in parallel with the fourth resistor.

[0044] In one embodiment, the second protection circuit includes: a fifth resistor, a sixth resistor, a third capacitor, a fourth capacitor, a fourth diode, a fifth diode and a sixth diode;

[0045] One end of the fifth resistor is connected to the output end of the third inverter, and the other end is connected to the anode of the fifth diode, and the cathode of the fifth diode is connected to the anode of the fourth diode and the input end of the second amplifier circuit;

[0046] The cathode of the fourth diode is grounded;

[0047] One end of the third capacitor is connected to one end of one end of the fifth resistor, and the other end is connected to the cathode of the fifth diode;

[0048] One end of the sixth resistor is connected to the output end of the fourth inverter, and the other end is connected to the cathode of the sixth diode and the input end of the second amplifier circuit, and the anode of the second amplifier circuit is grounded;

[0049] The fourth capacitor is connected in parallel with the sixth resistor.

[0050] Implementing the embodiments of the present utility model will have the following beneficial effects:

[0051] The present application receives the first current signal output by the main control circuit through the first logic circuit, and outputs the third current signal to the first power amplifier circuit; the first power amplifier circuit amplifies the third current signal and outputs it to the boost circuit; the second logic circuit receives the second current signal output by the main control circuit, and outputs the fourth current signal to the second power amplifier circuit; the second power amplifier circuit amplifies the fourth current signal and outputs it to the boost circuit; the boost circuit receives the third current signal and outputs a negative voltage to the electrode sheet, and receives the fourth current signal and outputs a positive voltage to the electrode sheet; with the participation of the first logic circuit and the second logic circuit, the output positive and negative voltages can be made sufficiently accurate, so that the electrode sheet can have a certain stimulating effect on human skin. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0053] in:

[0054] Figure 1 is a structural block diagram of a voltage signal output circuit in one embodiment;

[0055] Figure 2 is a structural block diagram of a voltage signal output circuit in another embodiment;

[0056] Figure 3 is a circuit diagram of a main control circuit in one embodiment;

[0057] Figure 4It is a circuit diagram of a first logic circuit, a second logic circuit, a first amplifier circuit, a second amplifier circuit, a first power amplifier circuit, a second power amplifier circuit, a boost circuit, a first protection circuit and a second protection circuit in one embodiment. DETAILED DESCRIPTION

[0058] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0059] A radio frequency beauty instrument is a beauty method that uses radio frequency electromagnetic waves to act on the deep tissues of the skin, heat the dermis of the skin, stimulate the production of new collagen and elastin, and thus achieve the effect of tightening the skin. Microcurrent beauty uses microcurrent to stimulate muscle tissue movement and promote collagen synthesis. The above two beauty methods generally require the use of electrodes to contact the skin to release radio frequency electromagnetic waves or microcurrents to the deep tissues of the skin. For microcurrent beauty instruments, in the prior art, positive and negative voltages are usually output to the electrode plates. Due to the resistance of the electrode plates themselves, the electrode plates can output microcurrents to the human body for stimulation. However, the positive and negative voltages output by the prior art are not accurate enough, so that the electrode plates cannot achieve a certain stimulation effect on human skin. In order to solve the above technical problems, the present application provides a voltage signal output circuit, which is used in beauty instruments, such as Figure 1As shown, it includes: a main control circuit 100, a first logic circuit 10, a second logic circuit 20, a first power amplifier circuit 50, a second power amplifier circuit 60 and a boost circuit 70, wherein the output end of the main control circuit 100 is connected to the input end of the first logic circuit 10 and the input end of the second logic circuit 20, and is used to output a first current signal to the first logic circuit 10 and output a second current signal to the second logic circuit 20; the output end of the first logic circuit 10 is connected to the input end of the first power amplifier circuit 50, and is used to receive the first current signal and output a third current signal to the first power amplifier circuit 50; the output end of the second logic circuit 20 is connected to the input end of the second ... The input end of the first power amplifier circuit 50 is connected to the input end of the boost circuit 70, for receiving the second current signal and outputting the fourth current signal to the second power amplifier circuit 60; the output end of the first power amplifier circuit 50 is connected to the input end of the boost circuit 70, for receiving the third current signal and outputting it to the boost circuit 70 after amplification; the output end of the second power amplifier circuit 60 is connected to the input end of the boost circuit 70, for receiving the fourth current signal and outputting it to the boost circuit 70 after amplification; the output end of the boost circuit 70 is connected to the electrode sheet, for receiving the third current signal and outputting a negative voltage to the electrode sheet, and receiving the fourth current signal and outputting a positive voltage to the electrode sheet. The present application receives the first current signal output by the main control circuit through the first logic circuit, and outputs the third current signal to the first power amplifier circuit 50; the first power amplifier circuit amplifies the third current signal and outputs it to the boost circuit; the second logic circuit receives the second current signal output by the main control circuit, and outputs the fourth current signal to the second power amplifier circuit 60; the second power amplifier circuit amplifies the fourth current signal and outputs it to the boost circuit; the boost circuit receives the third current signal and outputs a negative voltage to the electrode sheet, and receives the fourth current signal and outputs a positive voltage to the electrode sheet; with the participation of the first logic circuit and the second logic circuit, the output positive and negative voltages can be made sufficiently accurate, so that the electrode sheet can have a certain stimulating effect on human skin.

[0060] In one embodiment, Figure 2 As shown, the voltage signal output circuit also includes: a first amplifier circuit 30 and a second amplifier circuit 40, wherein the first amplifier circuit 30 is connected between the first logic circuit 10 and the first power amplifier circuit 50, and is used to amplify the third current signal output by the first logic circuit 10 and output it to the first power amplifier circuit 50; the second amplifier circuit 40 is connected between the second logic circuit 20 and the second power amplifier circuit 60, and is used to amplify the fourth current signal output by the second logic circuit 20 and output it to the second power amplifier circuit 60.

[0061] In one embodiment, Figure 2 As shown, the voltage signal output circuit also includes: a first protection circuit 80 and a second protection circuit 90, wherein the first protection circuit 80 is connected between the first logic circuit 10 and the first amplifier circuit 30, and is used to protect the first amplifier circuit 30; the second protection circuit 90 is connected between the second logic circuit 20 and the second amplifier circuit 40, and is used to protect the second amplifier circuit 40.

[0062] In one embodiment, Figure 3 As shown, the main control circuit 100 includes: a main control chip U6, the model of the main control chip U6 is STM32F105RBT6; Figure 4 As shown, the first logic circuit 10 includes: a first AND gate chip U8B, a first inverter U7F and a second inverter U7E; Figure 4 As shown, the second logic circuit 20 includes: a second AND gate chip U8A, a third inverter U7A and a fourth inverter U7B; wherein, the first input terminal A of the first AND gate chip U8B is connected to the first output terminal PC7 of the main control chip U6, the second input terminal B of the first AND gate chip U8B is connected to the second output terminal PA8 of the main control chip U6, the third input terminal C of the first AND gate chip U8B is connected to the third output terminal PB15 of the main control chip U6, and the fourth input terminal D of the first AND gate chip U8B is connected to the fourth output terminal PC6 of the main control chip U6; the output terminal of the first AND gate chip U8B is connected to the upper input terminal of the first inverter U7F and the input terminal of the second inverter U7E; the first input terminal A of the second AND gate chip U8A is connected to the main control chip The fifth output terminal PB14 of U6 is connected; the second input terminal B of the second AND gate chip U8A is connected to the third output terminal PB15 of the main control chip U6; the third input terminal C of the second AND gate chip U8A is connected to the sixth output terminal PB13 of the main control chip U6; the fourth input terminal D of the second AND gate chip U8A is connected to the second output terminal PA8 of the main control chip U6; the output terminal of the second AND gate chip U8A is connected to the input terminal of the third inverter U7A and the input terminal of the fourth inverter U7B; the output terminal of the first inverter U7F and the output terminal of the second inverter U7E are both connected to the input terminal of the first power amplifier circuit 50; the output terminal of the third inverter U7A and the output terminal of the fourth inverter U7B are both connected to the input terminal of the second power amplifier circuit 60.

[0063] In one embodiment, Figure 4As shown, the boost circuit 70 includes: a transformer T1; wherein one end of the primary coil of the transformer T1 is connected to the output end of the first power amplifier circuit 50; the other end of the primary coil of the transformer T1 is connected to the output end of the second power amplifier circuit 60; and both ends of the secondary coil of the transformer T1 are connected to the electrode sheet.

[0064] In one embodiment, Figure 4 As shown, the first power amplifier circuit 50 includes: a first MOS transistor Q4 and a first resistor R33; wherein the gate of the first MOS transistor Q4 is connected to the output end of the first logic circuit 10, the source of the first MOS transistor Q4 is grounded, and the drain of the first MOS transistor Q4 is connected to the input end of the boost circuit 70; one end of the first resistor R33 is connected to the gate of the first MOS transistor Q4, and the other end is connected to the source of the first MOS transistor Q4.

[0065] In one embodiment, Figure 4 As shown, the second power amplifier circuit 60 includes: a second MOS tube Q7 and a second resistor R38; wherein the gate of the second MOS tube Q7 is connected to the output end of the second logic circuit 20, the source of the second MOS tube Q7 is grounded, and the drain of the second MOS tube Q7 is connected to the input end of the boost circuit 70; one end of the second resistor R38 is connected to the gate of the second MOS tube Q7, and the other end is connected to the source of the second MOS tube Q7.

[0066] In one embodiment, Figure 4 As shown, the first amplifier circuit 30 includes: a first transistor Q3 and a second transistor Q5; wherein, the second amplifier circuit 40 includes: a third transistor Q6 and a fourth transistor Q8; the base of the first transistor Q3 is connected to the output end of the first logic circuit 10, the collector of the first transistor Q3 is connected to the input end of the first power amplifier circuit 50, and the emitter of the first transistor Q3 is grounded; the base of the second transistor Q5 is connected to the output end of the first logic circuit 10, the collector of the second transistor Q5 is connected to the input end of the first power amplifier circuit 50, and the emitter of the first transistor Q3 is grounded; The first transistor Q8 is connected to the input end of the second power amplifier circuit 50, and the emitter of the second transistor Q5 is grounded; the base of the third transistor Q6 is connected to the output end of the second logic circuit 20, the collector of the third transistor Q6 is connected to the input end of the second power amplifier circuit 60, and the emitter of the third transistor Q6 is grounded; the base of the fourth transistor Q8 is connected to the output end of the second logic circuit 20, the collector of the fourth transistor Q8 is connected to the input end of the second power amplifier circuit 60, and the emitter of the fourth transistor Q8 is grounded.

[0067] In one embodiment, Figure 4 As shown, the first protection circuit 80 includes: a third resistor R30, a fourth resistor R34, a first capacitor C34, a second capacitor C35, a first diode D6, a second diode D7 and a third diode D8; wherein, one end of the third resistor R30 is connected to the output end of the first inverter U7F, and the other end is connected to the anode of the second diode D7, and the cathode of the second diode D7 is connected to the anode of the first diode D6 and the input end of the first amplifier circuit 30; the cathode of the first diode D6 is grounded; one end of the first capacitor C34 is connected to one end of the third resistor R30, and the other end is connected to the cathode of the second diode D7; one end of the fourth resistor R34 is connected to the output end of the second inverter U7E, and the other end is connected to the cathode of the third diode D8 and the input end of the first amplifier circuit 30; the anode of the third diode D8 is grounded; the second capacitor C35 is connected in parallel with the fourth resistor R34.

[0068] In one embodiment, Figure 4 As shown, the second protection circuit 90 includes: a fifth resistor R35, a sixth resistor R39, a third capacitor C40, a fourth capacitor C41, a fourth diode D9, a fifth diode D10 and a sixth diode D11; wherein, one end of the fifth resistor R35 is connected to the output end of the third inverter U7A, and the other end is connected to the anode of the fifth diode D10, and the cathode of the fifth diode D10 is connected to the anode of the fourth diode D9 and the input end of the second amplifier circuit 40; the cathode of the fourth diode D9 is grounded; one end of the third capacitor C40 is connected to one end of one end of the fifth resistor R35, and the other end is connected to the cathode of the fifth diode D10; one end of the sixth resistor R39 is connected to the output end of the fourth inverter U7B, and the other end is connected to the cathode of the sixth diode D11 and the input end of the second amplifier circuit 40, and the anode of the second amplifier circuit 40 is grounded; the fourth capacitor C41 is connected in parallel with the sixth resistor R39.

[0069] The present application receives the first current signal output by the main control circuit through the first logic circuit, and outputs the third current signal to the first power amplifier circuit 50; the first power amplifier circuit amplifies the third current signal and outputs it to the boost circuit; the second logic circuit receives the second current signal output by the main control circuit, and outputs the fourth current signal to the second power amplifier circuit 60; the second power amplifier circuit amplifies the fourth current signal and outputs it to the boost circuit; the boost circuit receives the third current signal and outputs a negative voltage to the electrode sheet, and receives the fourth current signal and outputs a positive voltage to the electrode sheet; with the participation of the first logic circuit and the second logic circuit, the output positive and negative voltages can be made sufficiently accurate, so that the electrode sheet can have a certain stimulating effect on human skin.

[0070] The above disclosure is only a preferred embodiment of the present invention, and certainly cannot be used to limit the scope of rights of the present invention. Therefore, equivalent changes made according to the claims of the present invention are still within the scope covered by the present invention.

Claims

1. A voltage signal output circuit, used in a beauty instrument, characterized in that: include: A main control circuit, whose output end is connected to the input end of the first logic circuit and the input end of the second logic circuit, and is used to output a first current signal to the first logic circuit and output a second current signal to the second logic circuit; The first logic circuit, an output end of which is connected to an input end of the first power amplifier circuit, is used to receive the first current signal and output a third current signal to the first power amplifier circuit; The second logic circuit, whose output end is connected to the input end of the second power amplifier circuit, is used to receive the second current signal and output a fourth current signal to the second power amplifier circuit; The first power amplifier circuit has an output end connected to the input end of the boost circuit, and is used to receive the third current signal and output it to the boost circuit after amplification; The output end of the second power amplifier circuit is connected to the input end of the boost circuit, and is used to receive the fourth current signal and output it to the boost circuit after amplification; The boost circuit has an output end connected to the electrode sheet, and is used to receive the third current signal and output a negative voltage to the electrode sheet, and to receive the fourth current signal and output a positive voltage to the electrode sheet.

2. The voltage signal output circuit according to claim 1, characterized in that: Also includes: a first amplifier circuit, connected between the first logic circuit and the first power amplifier circuit, and configured to amplify the third current signal output by the first logic circuit and then output the amplified current signal to the first power amplifier circuit; The second amplifier circuit is connected between the second logic circuit and the second power amplifier circuit, and is used for amplifying the fourth current signal output by the second logic circuit and then outputting the amplified current signal to the second power amplifier circuit.

3. The voltage signal output circuit according to claim 2, characterized in that: Also includes: A first protection circuit, connected between the first logic circuit and the first amplifier circuit, and configured to protect the first amplifier circuit; The second protection circuit is connected between the second logic circuit and the second amplifier circuit, and is used to protect the second amplifier circuit.

4. The voltage signal output circuit according to claim 3, characterized in that: The main control circuit comprises: a main control chip; The first logic circuit includes: a first AND gate chip, a first inverter and a second inverter; The second logic circuit includes: a second AND gate chip, a third inverter and a fourth inverter; The first input end of the first AND gate chip is connected to the first output end of the main control chip, the second input end of the first AND gate chip is connected to the second output end of the main control chip, the third input end of the first AND gate chip is connected to the third output end of the main control chip, and the fourth input end of the first AND gate chip is connected to the fourth output end of the main control chip; the output end of the first AND gate chip is connected to the upper input end of the first inverter and the input end of the second inverter; The first input end of the second AND gate chip is connected to the fifth output end of the main control chip; the second input end of the second AND gate chip is connected to the third output end of the main control chip; the third input end of the second AND gate chip is connected to the sixth output end of the main control chip; the fourth input end of the second AND gate chip is connected to the second output end of the main control chip; the output end of the second AND gate chip is connected to the input end of the third inverter and the input end of the fourth inverter; The output end of the first inverter and the output end of the second inverter are both connected to the input end of the first power amplifier circuit; The output end of the third inverter and the output end of the fourth inverter are both connected to the input end of the second power amplifier circuit.

5. The voltage signal output circuit according to claim 4, characterized in that: The boost circuit comprises: a transformer; One end of the primary coil of the transformer is connected to the output end of the first power amplifier circuit; the other end of the primary coil of the transformer is connected to the output end of the second power amplifier circuit; and both ends of the secondary coil of the transformer are connected to the electrode sheet.

6. The voltage signal output circuit according to claim 1, characterized in that: The first power amplifier circuit includes: a first MOS tube and a first resistor; The gate of the first MOS transistor is connected to the output end of the first logic circuit, the source of the first MOS transistor is grounded, and the drain of the first MOS transistor is connected to the input end of the boost circuit; One end of the first resistor is connected to the gate of the first MOS transistor, and the other end is connected to the source of the first MOS transistor.

7. The voltage signal output circuit according to claim 1, characterized in that: The second power amplifier circuit includes: a second MOS tube and a second resistor; The gate of the second MOS transistor is connected to the output end of the second logic circuit, the source of the second MOS transistor is grounded, and the drain of the second MOS transistor is connected to the input end of the boost circuit; One end of the second resistor is connected to the gate of the second MOS transistor, and the other end is connected to the source of the second MOS transistor.

8. The voltage signal output circuit according to claim 2, characterized in that: The first amplifying circuit comprises: a first triode and a second triode; The second amplifying circuit comprises: a third triode and a fourth triode; The base of the first transistor is connected to the output end of the first logic circuit, the collector of the first transistor is connected to the input end of the first power amplifier circuit, and the emitter of the first transistor is grounded; the base of the second transistor is connected to the output end of the first logic circuit, the collector of the second transistor is connected to the input end of the first power amplifier circuit, and the emitter of the second transistor is grounded; The base of the third transistor is connected to the output end of the second logic circuit, the collector of the third transistor is connected to the input end of the second power amplifier circuit, and the emitter of the third transistor is grounded; the base of the fourth transistor is connected to the output end of the second logic circuit, the collector of the fourth transistor is connected to the input end of the second power amplifier circuit, and the emitter of the fourth transistor is grounded.

9. The voltage signal output circuit according to claim 4, characterized in that: The first protection circuit includes: a third resistor, a fourth resistor, a first capacitor, a second capacitor, a first diode, a second diode and a third diode; One end of the third resistor is connected to the output end of the first inverter, and the other end is connected to the anode of the second diode, and the cathode of the second diode is connected to the anode of the first diode and the input end of the first amplifier circuit; The cathode of the first diode is grounded; One end of the first capacitor is connected to one end of the third resistor, and the other end is connected to the cathode of the second diode; One end of the fourth resistor is connected to the output end of the second inverter, and the other end is connected to the cathode of the third diode and the input end of the first amplifier circuit; The anode of the third diode is grounded; The second capacitor is connected in parallel with the fourth resistor.

10. The voltage signal output circuit according to claim 9, characterized in that: The second protection circuit comprises: a fifth resistor, a sixth resistor, a third capacitor, a fourth capacitor, a fourth diode, a fifth diode and a sixth diode; One end of the fifth resistor is connected to the output end of the third inverter, and the other end is connected to the anode of the fifth diode, and the cathode of the fifth diode is connected to the anode of the fourth diode and the input end of the second amplifier circuit; The cathode of the fourth diode is grounded; One end of the third capacitor is connected to one end of one end of the fifth resistor, and the other end is connected to the cathode of the fifth diode; One end of the sixth resistor is connected to the output end of the fourth inverter, and the other end is connected to the cathode of the sixth diode and the input end of the second amplifier circuit, and the anode of the second amplifier circuit is grounded; The fourth capacitor is connected in parallel with the sixth resistor.

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